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annotate packages/devs/eth/cl/cs8900a/current/src/if_cs8900a.c @ 196:9b55e9c69693

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Merge from eCos master repository on 2001-11-23-15:32:03-GMT
author jlarmour
date Fri, 23 Nov 2001 17:12:52 +0000
parents
children 51b34619b677
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1 //==========================================================================
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2 //
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3 // dev/if_cs8900a.c
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4 //
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5 // Device driver for Cirrus Logic CS8900A ethernet controller
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6 //
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7 //==========================================================================
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8 //####COPYRIGHTBEGIN####
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9 //
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10 // -------------------------------------------
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11 // The contents of this file are subject to the Red Hat eCos Public License
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12 // Version 1.1 (the "License"); you may not use this file except in
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13 // compliance with the License. You may obtain a copy of the License at
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14 // http://www.redhat.com/
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15 //
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16 // Software distributed under the License is distributed on an "AS IS"
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17 // basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the
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18 // License for the specific language governing rights and limitations under
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19 // the License.
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20 //
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21 // The Original Code is eCos - Embedded Configurable Operating System,
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22 // released September 30, 1998.
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23 //
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24 // The Initial Developer of the Original Code is Red Hat.
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25 // Portions created by Red Hat are
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26 // Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc.
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27 // All Rights Reserved.
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28 // -------------------------------------------
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29 //
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30 //####COPYRIGHTEND####
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31 //####BSDCOPYRIGHTBEGIN####
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32 //
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33 // -------------------------------------------
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34 //
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35 // Portions of this software may have been derived from OpenBSD or other sources,
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36 // and are covered by the appropriate copyright disclaimers included herein.
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37 //
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38 // -------------------------------------------
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39 //
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40 //####BSDCOPYRIGHTEND####
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41 //==========================================================================
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42 //#####DESCRIPTIONBEGIN####
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43 //
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44 // Author(s): gthomas
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45 // Contributors: gthomas, jskov
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46 // Date: 2001-11-02
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47 // Purpose:
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48 // Description: Driver for CS8900 ethernet controller
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49 //
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50 // Note: Platform can define CYGSEM_DEVS_ETH_CL_CS8900A_NOINTS
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51 // to get a timer thread polling instead of interupt based
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52 // operation.
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53 //
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54 // Note: Driver will need some changes to support multiple instances
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55 //
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56 //####DESCRIPTIONEND####
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57 //
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58 //==========================================================================
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59
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60 #include <pkgconf/system.h>
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61 #ifdef CYGPKG_NET
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62 #include <pkgconf/net.h>
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63 #include <cyg/kernel/kapi.h>
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64 #endif
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65 #include <pkgconf/io_eth_drivers.h>
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66 #include <cyg/infra/cyg_type.h>
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67 #include <cyg/hal/hal_arch.h>
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68 #include <cyg/hal/hal_intr.h>
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69 #include <cyg/infra/diag.h>
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70 #include <cyg/hal/drv_api.h>
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71 #undef __ECOS
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72 #define __ECOS
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73 #include <eth_drv.h>
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74 #include <netdev.h>
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75
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76 #include <cyg/io/cs8900.h>
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77
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78 #define __WANT_DEVS
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79 #include CYGDAT_DEVS_ETH_CL_CS8900A_INL
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80 #undef __WANT_DEVS
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81
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82 // NOINTS operation only relevant when the NET package is loaded
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83 #ifndef CYGPKG_NET
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84 # undef CYGSEM_DEVS_ETH_CL_CS8900A_NOINTS
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85 #endif
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86
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87 #ifdef CYGSEM_DEVS_ETH_CL_CS8900A_NOINTS
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88 #define STACK_SIZE CYGNUM_HAL_STACK_SIZE_MINIMUM
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89 static char cs8900a_fake_int_stack[STACK_SIZE];
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90 static cyg_thread cs8900a_fake_int_thread_data;
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91 static cyg_handle_t cs8900a_fake_int_thread_handle;
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92 static void cs8900a_fake_int(cyg_addrword_t);
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93 #endif
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94
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95 #ifdef CYGDBG_IO_ETH_DRIVERS_DEBUG
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96 extern int cyg_io_eth_net_debug;
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97 #endif
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98
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99 static void cs8900a_poll(struct eth_drv_sc *sc);
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100 #ifdef CYGPKG_NET
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101 // This ISR is called when the ethernet interrupt occurs
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102 static int
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103 cs8900a_isr(cyg_vector_t vector, cyg_addrword_t data, HAL_SavedRegisters *regs)
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104 {
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105 cs8900a_priv_data_t* cpd = (cs8900a_priv_data_t *)data;
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106 cyg_drv_interrupt_mask(cpd->interrupt);
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107 return (CYG_ISR_HANDLED|CYG_ISR_CALL_DSR); // Run the DSR
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108 }
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109
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110 static void
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111 cs8900a_dsr(cyg_vector_t vector, cyg_ucount32 count, cyg_addrword_t data)
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112 {
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113 // This conditioning out is necessary because of explicit calls to this
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114 // DSR - which would not ever be called in the case of a polled mode
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115 // usage ie. in RedBoot.
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116 #ifdef CYGPKG_IO_ETH_DRIVERS_NET
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117 cs8900a_priv_data_t* cpd = (cs8900a_priv_data_t *)data;
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118 struct cyg_netdevtab_entry *ndp = (struct cyg_netdevtab_entry *)(cpd->tab);
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119 struct eth_drv_sc *sc = (struct eth_drv_sc *)(ndp->device_instance);
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120
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121 DEBUG_FUNCTION();
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122
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123 // but here, it must be a *sc:
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124 eth_drv_dsr( vector, count, (cyg_addrword_t)sc );
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125 #else
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126 # ifndef CYGPKG_REDBOOT
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127 # error Empty CS8900A ethernet DSR is compiled. Is this what you want?
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128 # endif
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129 #endif
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130 }
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131 #endif
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132
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133 // The deliver function (ex-DSR) handles the ethernet [logical] processing
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134 static void
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135 cs8900a_deliver(struct eth_drv_sc *sc)
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136 {
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137 cs8900a_poll(sc);
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138 #ifdef CYGPKG_NET
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139 {
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140 cs8900a_priv_data_t *cpd = (cs8900a_priv_data_t *)sc->driver_private;
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141 // Allow interrupts to happen again
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142 cyg_drv_interrupt_acknowledge(cpd->interrupt);
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143 cyg_drv_interrupt_unmask(cpd->interrupt);
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144 }
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145 #endif
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146 }
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147
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148 static int
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149 cs8900a_int_vector(struct eth_drv_sc *sc)
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150 {
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151 cs8900a_priv_data_t *cpd = (cs8900a_priv_data_t *)sc->driver_private;
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152 return (cpd->interrupt) ? 1 : 0;
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153 }
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154
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155 static bool
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156 cs8900a_init(struct cyg_netdevtab_entry *tab)
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157 {
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158 struct eth_drv_sc *sc = (struct eth_drv_sc *)tab->device_instance;
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159 cs8900a_priv_data_t *cpd = (cs8900a_priv_data_t *)sc->driver_private;
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160 cyg_addrword_t base = cpd->base;
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161 cyg_uint16 chip_type, chip_rev, chip_status;
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162 int i;
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163 long timeout = 500000;
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164
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165 cpd->tab = tab;
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166
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167 CYGHWR_CL_CS8900A_PLF_INIT(cpd);
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168
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169 #ifdef CYGPKG_NET
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170 // Initialize environment, setup interrupt handler
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171 cyg_drv_interrupt_create(cpd->interrupt,
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172 0, // Priority - what goes here?
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173 (cyg_addrword_t)cpd, // Data item passed to interrupt handler
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174 (cyg_ISR_t *)cs8900a_isr,
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175 (cyg_DSR_t *)cs8900a_dsr,
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176 &cpd->interrupt_handle,
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177 &cpd->interrupt_object);
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178 cyg_drv_interrupt_attach(cpd->interrupt_handle);
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179 cyg_drv_interrupt_acknowledge(cpd->interrupt);
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180 cyg_drv_interrupt_unmask(cpd->interrupt);
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181
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182 #ifdef CYGSEM_DEVS_ETH_CL_CS8900A_NOINTS
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183 cyg_thread_create(1, // Priority
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184 cs8900a_fake_int, // entry
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185 (cyg_addrword_t)sc, // entry parameter
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186 "CS8900 int", // Name
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187 &cs8900a_fake_int_stack[0], // Stack
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188 STACK_SIZE, // Size
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189 &cs8900a_fake_int_thread_handle, // Handle
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190 &cs8900a_fake_int_thread_data // Thread data structure
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191 );
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192 cyg_thread_resume(cs8900a_fake_int_thread_handle); // Start it
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193 #endif
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194 #endif
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195
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196 // Read controller ID - the first is a dummy read, since (on some
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197 // platforms) the first access to the controller seems to skip the
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198 // MSB 8 bits.
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199 get_reg(base, PP_ChipID);
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200 chip_type = get_reg(base, PP_ChipID);
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201 chip_rev = get_reg(base, PP_ChipRev);
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202 #if DEBUG & 8
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203 diag_printf("CS8900A[%p] - type: 0x%04x, rev: 0x%04x\n", base, chip_type, chip_rev);
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204 #endif
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205 if (chip_type != 0x630e) {
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206 #if DEBUG & 8
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207 diag_printf("CS8900 - invalid type (0x%04x), must be 0x630e\n", chip_type);
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208 #endif
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209 return false;
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210 }
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211
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212 CYGHWR_CL_CS8900A_PLF_RESET(base);
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213 put_reg(base, PP_SelfCtl, PP_SelfCtl_Reset); // Reset chip
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214 while ((get_reg(base, PP_SelfStat) & PP_SelfStat_InitD) == 0) {
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215 if (--timeout <= 0) {
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216 #if DEBUG & 8
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217 diag_printf("CS8900 didn't reset - abort!\n");
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218 #endif
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219 return false;
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220 }
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221 }
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222
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223 chip_status = get_reg(base, PP_SelfStat);
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224 #if DEBUG & 8
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225 diag_printf("CS8900 - status: 0x%04x (%sEEPROM present)\n", chip_status,
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226 chip_status & PP_SelfStat_EEPROM ? "" : "no ");
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227 #endif
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228
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229
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230 // Disable reception whilst finding the ESA
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231 put_reg(base, PP_LineCTL, 0 );
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232 // Find ESA
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233 if (!cpd->hardwired_esa) {
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234 cyg_bool esa_configured = false;
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235 if (NULL != cpd->provide_esa) {
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236 esa_configured = cpd->provide_esa(cpd);
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237 # if DEBUG & 8
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238 if (esa_configured)
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239 diag_printf("Got ESA from RedBoot option\n");
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240 # endif
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241 }
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242 if (!esa_configured && (chip_status & PP_SelfStat_EEPROM)) {
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243 // Get ESA from EEPROM - via the PP_IA registers
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244 cyg_uint16 esa_word;
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245 for (i = 0; i < sizeof(cpd->esa); i += 2) {
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246 esa_word = get_reg(base, PP_IA+i);
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247 cpd->esa[i] = (esa_word & 0xFF);
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248 cpd->esa[i+1] = (esa_word >> 8) & 0xFF;
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249 }
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250 esa_configured = true;
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251 }
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252 if (!esa_configured) {
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253 # if DEBUG & 8
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254 diag_printf("CS8900 - no EEPROM, static ESA or RedBoot config option.\n");
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255 # endif
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256 return false;
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257 }
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258 }
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259 // Tell the chip what ESA to use
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260 for (i = 0; i < sizeof(cpd->esa); i += 2) {
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261 put_reg(base, PP_IA+i, cpd->esa[i] | (cpd->esa[i+1] << 8));
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262 }
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263 // Set logical address mask
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264 for (i = 0; i < 8; i += 2) {
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265 put_reg(base, PP_LAF+i, 0xFFFF);
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266 }
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267 # if DEBUG & 8
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268 diag_printf("ESA %02x:%02x:%02x:%02x:%02x:%02x\n",
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269 cpd->esa[0], cpd->esa[1], cpd->esa[2],
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270 cpd->esa[3], cpd->esa[4], cpd->esa[5]);
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271 # endif
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272
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273 // Initialize upper level driver
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274 (sc->funs->eth_drv->init)(sc, cpd->esa);
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275
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276 return true;
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277 }
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278
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279 static void
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280 cs8900a_stop(struct eth_drv_sc *sc)
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281 {
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282 cs8900a_priv_data_t *cpd = (cs8900a_priv_data_t *)sc->driver_private;
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283 cyg_addrword_t base = cpd->base;
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284
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285 put_reg(base, PP_LineCTL, 0);
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286 }
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287
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288 // This function is called to "start up" the interface. It may be called
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289 // multiple times, even when the hardware is already running. It will be
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290 // called whenever something "hardware oriented" changes and should leave
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291 // the hardware ready to send/receive packets.
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292 static void
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293 cs8900a_start(struct eth_drv_sc *sc, cyg_uint8 *esa, int flags)
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294 {
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295 cyg_uint16 stat;
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296 cs8900a_priv_data_t *cpd = (cs8900a_priv_data_t *)sc->driver_private;
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297 cyg_addrword_t base = cpd->base;
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298
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299 put_reg(base, PP_BusCtl, PP_BusCtl_MemoryE); // Disable interrupts, memory mode
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300 put_reg(base, PP_IntReg, PP_IntReg_IRQ0); // Only possibility
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301 put_reg(base, PP_RxCFG, PP_RxCFG_RxOK | PP_RxCFG_CRC |
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302 PP_RxCFG_RUNT | PP_RxCFG_EXTRA);
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303 put_reg(base, PP_RxCTL, PP_RxCTL_RxOK | PP_RxCTL_Broadcast |
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304 PP_RxCTL_IA);
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305 put_reg(base, PP_TxCFG, PP_TxCFG_TxOK | PP_TxCFG_Collision |
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306 PP_TxCFG_CRS | PP_TxCFG_SQE | PP_TxCFG_Late |
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307 PP_TxCFG_Jabber | PP_TxCFG_16Collisions);
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308 put_reg(base, PP_BufCFG, PP_BufCFG_TxRDY | PP_BufCFG_TxUE | PP_BufCFG_RxMiss |
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309 PP_BufCFG_TxCol | PP_BufCFG_Miss | PP_BufCFG_SWI);
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310 put_reg(base, PP_IntReg, PP_IntReg_IRQ0); // Only possibility
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311 put_reg(base, PP_LineCTL, PP_LineCTL_Rx | PP_LineCTL_Tx);
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312 // Clear Interrupt Status Queue before enabling interrupts
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313 do {
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314 HAL_READ_UINT16(cpd->base+CS8900A_ISQ, stat);
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315 } while (stat != 0) ;
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316 cpd->txbusy = false;
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317 put_reg(base, PP_BusCtl, PP_BusCtl_EnableIRQ);
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318 }
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319
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320 // This routine is called to perform special "control" opertions
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321 static int
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322 cs8900a_control(struct eth_drv_sc *sc, unsigned long key, void *data, int data_length)
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323 {
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324 switch (key) {
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325 case ETH_DRV_SET_MAC_ADDRESS:
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326 return 0;
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327 break;
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328 default:
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329 return 1;
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330 break;
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331 }
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332 }
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333
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334 // This routine is called to see if it is possible to send another packet.
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335 // It will return non-zero if a transmit is possible, zero otherwise.
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336 static int
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337 cs8900a_can_send(struct eth_drv_sc *sc)
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338 {
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339 cs8900a_priv_data_t *cpd = (cs8900a_priv_data_t *)sc->driver_private;
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340 cyg_addrword_t base = cpd->base;
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341 cyg_uint16 stat;
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342
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343 stat = get_reg(base, PP_LineStat);
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344 if ((stat & PP_LineStat_LinkOK) == 0) {
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345 return false; // Link not connected
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346 }
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347 #ifdef CYGPKG_NET
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348 // Horrible hack!
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349 if (cpd->txbusy) {
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350 cyg_tick_count_t now = cyg_current_time();
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351 if ((now - cpd->txstart) > 25) {
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352 // 250ms is more than enough to transmit one frame
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353 #if DEBUG & 1
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354 diag_printf("CS8900: Tx interrupt lost\n");
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355 #endif
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356 cpd->txbusy = false;
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357 // Free up the buffer (with error indication)
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358 (sc->funs->eth_drv->tx_done)(sc, cpd->txkey, 1);
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359 }
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360 }
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361 #endif
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362 return (cpd->txbusy == false);
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363 }
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364
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365 // This routine is called to send data to the hardware.
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366 static void
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367 cs8900a_send(struct eth_drv_sc *sc, struct eth_drv_sg *sg_list, int sg_len,
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368 int total_len, unsigned long key)
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369 {
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370 cs8900a_priv_data_t *cpd = (cs8900a_priv_data_t *)sc->driver_private;
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371 cyg_addrword_t base = cpd->base;
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372 int i;
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373 int len;
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374 cyg_uint8 *data;
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375 cyg_uint16 saved_data = 0, *sdata;
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376 cyg_uint16 stat;
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377 bool odd_byte = false;
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378
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379 // Mark xmitter busy
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380 cpd->txbusy = true;
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381 cpd->txkey = key;
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382 #ifdef CYGPKG_NET
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383 cpd->txstart = cyg_current_time();
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384 #endif
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385 // Start the xmit sequence
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386
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387 // The hardware indicates that there are options as to when the actual
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388 // packet transmission will start wrt moving of data into the transmit
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389 // buffer. However, impirical results seem to indicate that if the
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390 // packet is large and transmission is allowed to start before the
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391 // entire packet has been pushed into the buffer, the hardware gets
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392 // confused and the packet is lost, along with a "lost" Tx interrupt.
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393 // This may be a case of the copy loop below being interrupted, e.g.
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394 // a system timer interrupt, and the hardware getting unhappy that
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395 // not all of the data was provided before the transmission should
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396 // have completed (i.e. buffer underrun).
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397 // For now, the solution is to not allow this overlap.
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398 //HAL_WRITE_UINT16(cpd->base+CS8900A_TxCMD, PP_TxCmd_TxStart_5)
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399
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400 // Start only when all data sent to chip
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401 HAL_WRITE_UINT16(cpd->base+CS8900A_TxCMD, PP_TxCmd_TxStart_Full);
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402
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403 HAL_WRITE_UINT16(cpd->base+CS8900A_TxLEN, total_len);
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404 // Wait for controller ready signal
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405 do {
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406 stat = get_reg(base, PP_BusStat);
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407 } while (!(stat & PP_BusStat_TxRDY));
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408
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409 // Put data into buffer
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410 for (i = 0; i < sg_len; i++) {
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411 data = (cyg_uint8 *)sg_list[i].buf;
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412 len = sg_list[i].len;
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parents:
diff changeset
413
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jlarmour
parents:
diff changeset
414 if (len > 0) {
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jlarmour
parents:
diff changeset
415 /* Finish the last word. */
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jlarmour
parents:
diff changeset
416 if (odd_byte) {
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jlarmour
parents:
diff changeset
417 saved_data |= ((cyg_uint16)*data++) << 8;
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parents:
diff changeset
418 HAL_WRITE_UINT16(cpd->base+CS8900A_RTDATA, saved_data);
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jlarmour
parents:
diff changeset
419 len--;
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jlarmour
parents:
diff changeset
420 odd_byte = false;
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jlarmour
parents:
diff changeset
421 }
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jlarmour
parents:
diff changeset
422 /* Output contiguous words. */
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parents:
diff changeset
423 sdata = (cyg_uint16 *)data;
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parents:
diff changeset
424 while (len > 1) {
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jlarmour
parents:
diff changeset
425 HAL_WRITE_UINT16(cpd->base+CS8900A_RTDATA, *sdata++);
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jlarmour
parents:
diff changeset
426 len -= sizeof(cyg_uint16);
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jlarmour
parents:
diff changeset
427 }
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jlarmour
parents:
diff changeset
428 /* Save last byte, if necessary. */
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jlarmour
parents:
diff changeset
429 if (len == 1) {
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parents:
diff changeset
430 data = (cyg_uint8 *)sdata;
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parents:
diff changeset
431 saved_data = (cyg_uint16)*data;
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diff changeset
432 odd_byte = true;
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parents:
diff changeset
433 }
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jlarmour
parents:
diff changeset
434 }
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jlarmour
parents:
diff changeset
435 }
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jlarmour
parents:
diff changeset
436 if (odd_byte) {
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parents:
diff changeset
437 HAL_WRITE_UINT16(cpd->base+CS8900A_RTDATA, saved_data);
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parents:
diff changeset
438 }
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jlarmour
parents:
diff changeset
439 }
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jlarmour
parents:
diff changeset
440
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jlarmour
parents:
diff changeset
441 // This function is called when a packet has been received. It's job is
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jlarmour
parents:
diff changeset
442 // to prepare to unload the packet from the hardware. Once the length of
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parents:
diff changeset
443 // the packet is known, the upper layer of the driver can be told. When
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jlarmour
parents:
diff changeset
444 // the upper layer is ready to unload the packet, the internal function
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jlarmour
parents:
diff changeset
445 // 'cs8900a_recv' will be called to actually fetch it from the hardware.
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jlarmour
parents:
diff changeset
446 static void
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jlarmour
parents:
diff changeset
447 cs8900a_RxEvent(struct eth_drv_sc *sc)
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parents:
diff changeset
448 {
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parents:
diff changeset
449 cs8900a_priv_data_t *cpd = (cs8900a_priv_data_t *)sc->driver_private;
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diff changeset
450 cyg_addrword_t base = cpd->base;
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parents:
diff changeset
451 cyg_uint16 stat, len;
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parents:
diff changeset
452
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diff changeset
453 HAL_READ_UINT16(base+CS8900A_RTDATA, stat);
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jlarmour
parents:
diff changeset
454 HAL_READ_UINT16(base+CS8900A_RTDATA, len);
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jlarmour
parents:
diff changeset
455 #ifdef CYGDBG_IO_ETH_DRIVERS_DEBUG
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parents:
diff changeset
456 if (cyg_io_eth_net_debug) {
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parents:
diff changeset
457 diag_printf("RxEvent - stat: %x, len: %d\n", stat, len);
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jlarmour
parents:
diff changeset
458 }
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jlarmour
parents:
diff changeset
459 #endif
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jlarmour
parents:
diff changeset
460 (sc->funs->eth_drv->recv)(sc, len);
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jlarmour
parents:
diff changeset
461 }
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jlarmour
parents:
diff changeset
462
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jlarmour
parents:
diff changeset
463 // This function is called as a result of the "eth_drv_recv()" call above.
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jlarmour
parents:
diff changeset
464 // It's job is to actually fetch data for a packet from the hardware once
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jlarmour
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diff changeset
465 // memory buffers have been allocated for the packet. Note that the buffers
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jlarmour
parents:
diff changeset
466 // may come in pieces, using a scatter-gather list. This allows for more
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jlarmour
parents:
diff changeset
467 // efficient processing in the upper layers of the stack.
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jlarmour
parents:
diff changeset
468 static void
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jlarmour
parents:
diff changeset
469 cs8900a_recv(struct eth_drv_sc *sc, struct eth_drv_sg *sg_list, int sg_len)
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jlarmour
parents:
diff changeset
470 {
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diff changeset
471 cs8900a_priv_data_t *cpd = (cs8900a_priv_data_t *)sc->driver_private;
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diff changeset
472 cyg_addrword_t base = cpd->base;
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diff changeset
473 int i, mlen;
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jlarmour
parents:
diff changeset
474 cyg_uint16 *data, val;
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jlarmour
parents:
diff changeset
475 cyg_uint8 *cp, cval;
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jlarmour
parents:
diff changeset
476
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jlarmour
parents:
diff changeset
477 for (i = 0; i < sg_len; i++) {
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diff changeset
478 data = (cyg_uint16 *)sg_list[i].buf;
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diff changeset
479 mlen = sg_list[i].len;
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jlarmour
parents:
diff changeset
480 while (mlen >= sizeof(*data)) {
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diff changeset
481 HAL_READ_UINT16(base+CS8900A_RTDATA, val);
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jlarmour
parents:
diff changeset
482 if (data) {
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jlarmour
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diff changeset
483 *data++ = val;
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jlarmour
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diff changeset
484 }
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jlarmour
parents:
diff changeset
485 mlen -= sizeof(*data);
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jlarmour
parents:
diff changeset
486 }
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jlarmour
parents:
diff changeset
487 if (mlen) {
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jlarmour
parents:
diff changeset
488 // Fetch last odd byte
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jlarmour
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diff changeset
489 HAL_READ_UINT16(base+CS8900A_RTDATA, cval);
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jlarmour
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diff changeset
490 cval &= 0xFF;
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parents:
diff changeset
491 if ((cp = (cyg_uint8 *)data) != 0) {
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jlarmour
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diff changeset
492 *cp = cval;
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jlarmour
parents:
diff changeset
493 }
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jlarmour
parents:
diff changeset
494 }
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jlarmour
parents:
diff changeset
495 }
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jlarmour
parents:
diff changeset
496 }
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jlarmour
parents:
diff changeset
497
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jlarmour
parents:
diff changeset
498 static void
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jlarmour
parents:
diff changeset
499 cs8900a_TxEvent(struct eth_drv_sc *sc, int stat)
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jlarmour
parents:
diff changeset
500 {
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jlarmour
parents:
diff changeset
501 cs8900a_priv_data_t *cpd = (cs8900a_priv_data_t *)sc->driver_private;
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jlarmour
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diff changeset
502 cyg_addrword_t base = cpd->base;
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jlarmour
parents:
diff changeset
503
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jlarmour
parents:
diff changeset
504 stat = get_reg(base, PP_TER);
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jlarmour
parents:
diff changeset
505 #ifdef CYGDBG_IO_ETH_DRIVERS_DEBUG
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jlarmour
parents:
diff changeset
506 if (cyg_io_eth_net_debug) {
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jlarmour
parents:
diff changeset
507 diag_printf("Tx event: %x\n", stat);
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jlarmour
parents:
diff changeset
508 }
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jlarmour
parents:
diff changeset
509 #endif
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jlarmour
parents:
diff changeset
510 cpd->txbusy = false;
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jlarmour
parents:
diff changeset
511 (sc->funs->eth_drv->tx_done)(sc, cpd->txkey, 0);
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jlarmour
parents:
diff changeset
512 }
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jlarmour
parents:
diff changeset
513
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jlarmour
parents:
diff changeset
514 static void
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jlarmour
parents:
diff changeset
515 cs8900a_BufEvent(struct eth_drv_sc *sc, int stat)
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jlarmour
parents:
diff changeset
516 {
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jlarmour
parents:
diff changeset
517 if (stat & PP_BufCFG_RxMiss) {
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jlarmour
parents:
diff changeset
518 }
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jlarmour
parents:
diff changeset
519 if (stat & PP_BufCFG_TxUE) {
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jlarmour
parents:
diff changeset
520 }
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jlarmour
parents:
diff changeset
521 }
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jlarmour
parents:
diff changeset
522
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jlarmour
parents:
diff changeset
523 static void
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jlarmour
parents:
diff changeset
524 cs8900a_poll(struct eth_drv_sc *sc)
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jlarmour
parents:
diff changeset
525 {
9b55e9c69693 Merge from eCos master repository on 2001-11-23-15:32:03-GMT
jlarmour
parents:
diff changeset
526 cyg_uint16 event;
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jlarmour
parents:
diff changeset
527 cs8900a_priv_data_t *cpd = (cs8900a_priv_data_t *)sc->driver_private;
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jlarmour
parents:
diff changeset
528 cyg_addrword_t base = cpd->base;
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jlarmour
parents:
diff changeset
529
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jlarmour
parents:
diff changeset
530 HAL_READ_UINT16(base+CS8900A_ISQ, event);
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jlarmour
parents:
diff changeset
531 while (event != 0) {
9b55e9c69693 Merge from eCos master repository on 2001-11-23-15:32:03-GMT
jlarmour
parents:
diff changeset
532 switch (event & ISQ_EventMask) {
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jlarmour
parents:
diff changeset
533 case ISQ_RxEvent:
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jlarmour
parents:
diff changeset
534 cs8900a_RxEvent(sc);
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jlarmour
parents:
diff changeset
535 break;
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jlarmour
parents:
diff changeset
536 case ISQ_TxEvent:
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jlarmour
parents:
diff changeset
537 cs8900a_TxEvent(sc, event);
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jlarmour
parents:
diff changeset
538 break;
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jlarmour
parents:
diff changeset
539 case ISQ_BufEvent:
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jlarmour
parents:
diff changeset
540 cs8900a_BufEvent(sc, event);
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jlarmour
parents:
diff changeset
541 break;
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jlarmour
parents:
diff changeset
542 case ISQ_RxMissEvent:
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jlarmour
parents:
diff changeset
543 // Receive miss counter has overflowed
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jlarmour
parents:
diff changeset
544 break;
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jlarmour
parents:
diff changeset
545 case ISQ_TxColEvent:
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jlarmour
parents:
diff changeset
546 // Transmit collision counter has overflowed
9b55e9c69693 Merge from eCos master repository on 2001-11-23-15:32:03-GMT
jlarmour
parents:
diff changeset
547 break;
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jlarmour
parents:
diff changeset
548 default:
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jlarmour
parents:
diff changeset
549 #if DEBUG & 1
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jlarmour
parents:
diff changeset
550 diag_printf("%s: Unknown event: %x\n", __FUNCTION__, event);
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jlarmour
parents:
diff changeset
551 #endif
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jlarmour
parents:
diff changeset
552 break;
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jlarmour
parents:
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553 }
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554 HAL_READ_UINT16(base+CS8900A_ISQ, event);
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555 }
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556
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557 CYGHWR_CL_CS8900A_PLF_INT_CLEAR(cpd);
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558 }
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559
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560 #ifdef CYGSEM_DEVS_ETH_CL_CS8900A_NOINTS
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561 void
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562 cs8900a_fake_int(cyg_addrword_t param)
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563 {
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564 struct eth_drv_sc *sc = (struct eth_drv_sc *) param;
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565 int s;
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566
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567 #if DEBUG & 1
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568 diag_printf("cs8900a_fake_int()\n");
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569 #endif
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570
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571 while (true) {
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572 cyg_thread_delay(5);
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573 s = splnet();
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574 cs8900a_poll(sc);
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575 splx(s);
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576 }
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577 }
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578 #endif