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Merge from eCos master repository on 2001-06-08-21:11:51-BST
author jlarmour
date Sun, 10 Jun 2001 19:35:23 +0000
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children 920b9b754b53
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1 #ifndef CYGONCE_HAL_HAL_IO_H
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2 #define CYGONCE_HAL_HAL_IO_H
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3
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4 //=============================================================================
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5 //
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6 // hal_io.h
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7 //
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8 // HAL device IO register support.
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9 //
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10 //=============================================================================
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11 //####COPYRIGHTBEGIN####
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12 //
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13 // -------------------------------------------
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14 // The contents of this file are subject to the Red Hat eCos Public License
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15 // Version 1.1 (the "License"); you may not use this file except in
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16 // compliance with the License. You may obtain a copy of the License at
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17 // http://www.redhat.com/
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18 //
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19 // Software distributed under the License is distributed on an "AS IS"
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20 // basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the
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21 // License for the specific language governing rights and limitations under
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22 // the License.
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23 //
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24 // The Original Code is eCos - Embedded Configurable Operating System,
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25 // released September 30, 1998.
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26 //
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27 // The Initial Developer of the Original Code is Red Hat.
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28 // Portions created by Red Hat are
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29 // Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc.
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30 // All Rights Reserved.
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31 // -------------------------------------------
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32 //
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33 //####COPYRIGHTEND####
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34 //=============================================================================
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35 //#####DESCRIPTIONBEGIN####
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36 //
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37 // Author(s): nickg
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38 // Contributors:nickg, bartv
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39 // Date: 1998-02-17
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40 // Purpose: Define IO register support
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41 // Description: The macros defined here provide the HAL APIs for handling
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42 // device IO control registers.
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43 //
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44 // For the synthetic target these macros should never
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45 // actually be used since the application will run as an
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46 // ordinary user application and should not have
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47 // permission to access any real hardware. Instead
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48 // hardware access should go via the auxiliary. Possibly
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49 // the macros should be #pragma poison'd, but some people
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50 // may want to run the synthetic target in a way that
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51 // does involve accessing real hardware.
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52 //
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53 // The synthetic target provides some additional I/O
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54 // facilities in the form of Linux system calls. A useful
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55 // subset of these are prototyped here, together with
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56 // associated constants. There are also I/O operations to
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57 // interact with the auxiliary.
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58 //
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59 // Usage:
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60 // #include <cyg/hal/hal_io.h>
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61 // ...
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62 //
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63 //####DESCRIPTIONEND####
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64 //
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65 //=============================================================================
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66
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67 #include <cyg/infra/cyg_type.h>
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68
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69 //-----------------------------------------------------------------------------
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70 // IO Register address.
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71 // This type is for recording the address of an IO register.
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72
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73 typedef volatile CYG_ADDRWORD HAL_IO_REGISTER;
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74
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75 //-----------------------------------------------------------------------------
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76 // BYTE Register access.
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77 // Individual and vectorized access to 8 bit registers.
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78
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79 #define HAL_READ_UINT8( _register_, _value_ ) \
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80 CYG_MACRO_START \
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81 ((_value_) = *((volatile CYG_BYTE *)(_register_))); \
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82 CYG_MACRO_END
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83
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84 #define HAL_WRITE_UINT8( _register_, _value_ ) \
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85 CYG_MACRO_START \
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86 (*((volatile CYG_BYTE *)(_register_)) = (_value_)); \
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87 CYG_MACRO_END
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88
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89 #define HAL_READ_UINT8_VECTOR( _register_, _buf_, _count_, _step_ ) \
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90 CYG_MACRO_START \
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91 cyg_count32 _i_,_j_; \
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92 for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) { \
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93 (_buf_)[_i_] = ((volatile CYG_BYTE *)(_register_))[_j_]; \
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94 } \
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95 CYG_MACRO_END
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96
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97 #define HAL_WRITE_UINT8_VECTOR( _register_, _buf_, _count_, _step_ ) \
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98 CYG_MACRO_START \
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99 cyg_count32 _i_,_j_; \
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100 for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) { \
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101 ((volatile CYG_BYTE *)(_register_))[_j_] = (_buf_)[_i_]; \
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102 } \
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103 CYG_MACRO_END
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104
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105
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106 //-----------------------------------------------------------------------------
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107 // 16 bit access.
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108 // Individual and vectorized access to 16 bit registers.
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109
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110 #define HAL_READ_UINT16( _register_, _value_ ) \
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111 CYG_MACRO_START \
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112 ((_value_) = *((volatile CYG_WORD16 *)(_register_))); \
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113 CYG_MACRO_END
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114
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115 #define HAL_WRITE_UINT16( _register_, _value_ ) \
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116 CYG_MACRO_START \
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117 (*((volatile CYG_WORD16 *)(_register_)) = (_value_)); \
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118 CYG_MACRO_END
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119
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120 #define HAL_READ_UINT16_VECTOR( _register_, _buf_, _count_, _step_ ) \
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121 CYG_MACRO_START \
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122 cyg_count32 _i_,_j_; \
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123 for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) { \
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124 (_buf_)[_i_] = ((volatile CYG_WORD16 *)(_register_))[_j_]; \
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125 } \
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126 CYG_MACRO_END
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127
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128 #define HAL_WRITE_UINT16_VECTOR( _register_, _buf_, _count_, _step_ ) \
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129 CYG_MACRO_START \
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130 cyg_count32 _i_,_j_; \
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131 for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) { \
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132 ((volatile CYG_WORD16 *)(_register_))[_j_] = (_buf_)[_i_]; \
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133 } \
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134 CYG_MACRO_END
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135
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136 //-----------------------------------------------------------------------------
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137 // 32 bit access.
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138 // Individual and vectorized access to 32 bit registers.
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139
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140 #define HAL_READ_UINT32( _register_, _value_ ) \
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141 CYG_MACRO_START \
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142 ((_value_) = *((volatile CYG_WORD32 *)(_register_))); \
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143 CYG_MACRO_END
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144
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145 #define HAL_WRITE_UINT32( _register_, _value_ ) \
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146 CYG_MACRO_START \
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147 (*((volatile CYG_WORD32 *)(_register_)) = (_value_)); \
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148 CYG_MACRO_END
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149
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150 #define HAL_READ_UINT32_VECTOR( _register_, _buf_, _count_, _step_ ) \
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151 CYG_MACRO_START \
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152 cyg_count32 _i_,_j_; \
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153 for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) { \
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154 (_buf_)[_i_] = ((volatile CYG_WORD32 *)(_register_))[_j_]; \
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155 } \
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156 CYG_MACRO_END
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157
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158 #define HAL_WRITE_UINT32_VECTOR( _register_, _buf_, _count_, _step_ ) \
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159 CYG_MACRO_START \
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160 cyg_count32 _i_,_j_; \
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161 for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) { \
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162 ((volatile CYG_WORD32 *)(_register_))[_j_] = (_buf_)[_i_]; \
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163 } \
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164 CYG_MACRO_END
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165
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166 // ----------------------------------------------------------------------------
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167 // Linux system calls and associated structures and constants. This is
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168 // by no means a complete list, but there is enough information for
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169 // the needs of the relevant HAL packages. The information needs to be
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170 // kept in synch with the Linux header files, but in practice
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171 // divergence will be rare because that would imply incompatible
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172 // changes in the Linux kernel API.
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173 //
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174 // It may seem tempting to import the Linux header files directly, but
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175 // that would prevent cross-compilation and introduce all kinds of
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176 // namespace pollution.
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177 //
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178 // The actual implementation lives in variant HAL packages since
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179 // typically they involve direct system calls via bits of assembler.
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180 // Note that only a subset of system calls are actually implemented,
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181 // so the variant HALs may need to be updated if this list needs to
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182 // be extended.
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183
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184 // Error codes.
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185 #define CYG_HAL_SYS_EINTR 4
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186 #define CYG_HAL_SYS_EAGAIN 11
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187
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188 // Signal-related information
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189 #define CYG_HAL_SYS_SIGHUP 1
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190 #define CYG_HAL_SYS_SIGINT 2
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191 #define CYG_HAL_SYS_SIGQUIT 3
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192 #define CYG_HAL_SYS_SIGILL 4
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193 #define CYG_HAL_SYS_SIGBUS 7
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194 #define CYG_HAL_SYS_SIGFPE 8
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195 #define CYG_HAL_SYS_SIGSEGV 11
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196 #define CYG_HAL_SYS_SIGPIPE 13
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197 #define CYG_HAL_SYS_SIGALRM 14
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198 #define CYG_HAL_SYS_SIGTERM 15
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199 #define CYG_HAL_SYS_SIGCHLD 17
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200 #define CYG_HAL_SYS_SIGCONT 18
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201 #define CYG_HAL_SYS_SIGSTOP 19
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202 #define CYG_HAL_SYS_SIGTSTP 20
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203 #define CYG_HAL_SYS_SIGIO 29
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204
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205 #define CYG_HAL_SYS_SA_NOCLDSTOP 0x00000001
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206 #define CYG_HAL_SYS_SA_NOCLDWAIT 0x00000002
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207 #define CYG_HAL_SYS_SA_SIGINFO 0x00000004
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208 #define CYG_HAL_SYS_SA_RESTART 0x10000000
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209 #define CYG_HAL_SYS_SA_NODEFER 0x40000000
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210 #define CYG_HAL_SYS_SIG_BLOCK 0
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211 #define CYG_HAL_SYS_SIG_UNBLOCK 1
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212 #define CYG_HAL_SYS_SIG_SETMASK 2
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213
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214 #define CYG_HAL_SYS__NSIG 64
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215 #define CYG_HAL_SYS__SIGBITS (8 * sizeof(unsigned long))
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216 #define CYG_HAL_SYS__SIGELT(_d_) ((_d_) / CYG_HAL_SYS__SIGBITS)
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217 #define CYG_HAL_SYS__SIGMASK(_d_) ((unsigned long)1 << ((_d_) % CYG_HAL_SYS__SIGBITS))
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218
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219 typedef struct cyg_hal_sys_sigset_t {
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220 unsigned long hal_sig_bits[CYG_HAL_SYS__NSIG / CYG_HAL_SYS__SIGBITS];
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221 } cyg_hal_sys_sigset_t;
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222
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223 #define CYG_HAL_SYS_SIGFILLSET(_set_) \
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224 CYG_MACRO_START \
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225 unsigned int __i; \
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226 for (__i = 0; __i < (CYG_HAL_SYS__NSIG / CYG_HAL_SYS__SIGBITS); __i++) { \
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227 (_set_)->hal_sig_bits[__i] = ~0; \
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228 } \
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229 CYG_MACRO_END
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230
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231 #define CYG_HAL_SYS_SIGEMPTYSET(_set_) \
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232 CYG_MACRO_START \
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233 unsigned int __i; \
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234 for (__i = 0; __i < (CYG_HAL_SYS__NSIG / CYG_HAL_SYS__SIGBITS); __i++) { \
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235 (_set_)->hal_sig_bits[__i] = 0; \
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236 } \
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237 CYG_MACRO_END
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238
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239 #define CYG_HAL_SYS_SIGADDSET(_set_, _bit_) \
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240 CYG_MACRO_START \
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241 (_set_)->hal_sig_bits[CYG_HAL_SYS__SIGELT(_bit_ - 1)] |= CYG_HAL_SYS__SIGMASK(_bit_ - 1); \
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242 CYG_MACRO_END
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243
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244 #define CYG_HAL_SYS_SIGDELSET(_set_, _bit_) \
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245 CYG_MACRO_START \
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246 (_set_)->hal_sig_bits[CYG_HAL_SYS__SIGELT(_bit_ - 1)] &= ~CYG_HAL_SYS__SIGMASK(_bit_ - 1); \
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247 CYG_MACRO_END
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248
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249 #define CYG_HAL_SYS_SIGISMEMBER(_set_, _bit_) \
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250 (0 != ((_set_)->hal_sig_bits[CYG_HAL_SYS__SIGELT(_bit_ - 1)] & CYG_HAL_SYS__SIGMASK(_bit_ - 1)))
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251
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252 struct cyg_hal_sys_sigaction {
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253 void (*hal_handler)(int);
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254 long hal_mask;
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255 int hal_flags;
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256 void (*hal_bogus)(int);
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257 };
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258
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259 // Time support.
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260 struct cyg_hal_sys_timeval {
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261 long hal_tv_sec;
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262 long hal_tv_usec;
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263 };
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264
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265 struct cyg_hal_sys_timezone {
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266 int hal_tz_minuteswest;
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267 int hal_tz_dsttime;
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268 };
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269
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270 // Select support. Initially this is used only by the idle handler.
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271 #define CYG_HAL_SYS_FD_SETSIZE 1024
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272 #define CYG_HAL_SYS__NFDBITS (8 * sizeof(unsigned long))
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273 #define CYG_HAL_SYS__FDELT(_d_) ((_d_) / CYG_HAL_SYS__NFDBITS)
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274 #define CYG_HAL_SYS__FDMASK(_d_) ((unsigned long)1 << ((_d_) % CYG_HAL_SYS__NFDBITS))
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275
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276 struct cyg_hal_sys_fd_set {
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277 unsigned long hal_fds_bits[CYG_HAL_SYS_FD_SETSIZE / CYG_HAL_SYS__NFDBITS];
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278 };
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279 #define CYG_HAL_SYS_FD_ZERO(_fdsp_) \
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280 do { \
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281 unsigned int __i; \
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282 for (__i = 0; \
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283 __i < (CYG_HAL_SYS_FD_SETSIZE / CYG_HAL_SYS__NFDBITS); \
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284 __i++) { \
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285 (_fdsp_)->hal_fds_bits[__i] = 0; \
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286 } while (0);
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287
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288 #define CYG_HAL_SYS_FD_SET(_fd_, _fdsp_) \
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289 CYG_MACRO_START \
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290 (_fdsp_)->hal_fds_bits[CYG_HAL_SYS__FDELT(_fd_)] |= CYG_HAL_SYS__FDMASK(_fd_); \
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291 CYG_MACRO_END
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292
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293 #define CYG_HAL_SYS_FD_CLR(_fd_, _fdsp_) \
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294 CYG_MACRO_START \
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295 (_fdsp_)->hal_fds_bits[CYG_HAL_SYS__FDELT(_fd_)] &= ~CYG_HAL_SYS__FDMASK(_fd_); \
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296 CYG_MACRO_END
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297
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298 #define CYG_HAL_SYS_FD_ISSET(_fd_, _fdsp_) \
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299 (0 != ((_fdsp_)->hal_fds_bits[CYG_HAL_SYS__FDELT(_fd_)] & CYG_HAL_SYS__FDMASK(_fd_)))
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300
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301 // Interval timer support, needed for the clock.
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302 #define CYG_HAL_SYS_ITIMER_REAL 0
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303 #define CYG_HAL_SYS_ITIMER_VIRTUAL 1
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304 #define CYG_HAL_SYS_ITIMER_PROF 2
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305
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306 struct cyg_hal_sys_itimerval {
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307 struct cyg_hal_sys_timeval hal_it_interval;
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308 struct cyg_hal_sys_timeval hal_it_value;
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309 };
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310
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311 // System calls, or rather the subset that is needed internally.
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312 externC unsigned long cyg_hal_sys_write(int, const void*, long);
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313 externC unsigned long cyg_hal_sys_read(int, void*, long);
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314 externC int cyg_hal_sys_fdatasync(int);
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315 externC int cyg_hal_sys_sigaction(int,
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316 const struct cyg_hal_sys_sigaction*,
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317 struct cyg_hal_sys_sigaction*);
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318 externC int cyg_hal_sys_sigprocmask(int,
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319 const cyg_hal_sys_sigset_t*,
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320 cyg_hal_sys_sigset_t*);
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321 externC int cyg_hal_sys__newselect(int,
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322 struct cyg_hal_sys_fd_set*,
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323 struct cyg_hal_sys_fd_set*,
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324 struct cyg_hal_sys_fd_set*,
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325 struct cyg_hal_sys_timeval*);
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326 externC int cyg_hal_sys_setitimer(int,
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327 const struct cyg_hal_sys_itimerval*,
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328 struct cyg_hal_sys_itimerval*);
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329 externC int cyg_hal_sys_gettimeofday(struct cyg_hal_sys_timeval*,
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330 struct cyg_hal_sys_timezone*);
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331
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332 // The actual implementation appears to return the new brk() value.
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333 externC void* cyg_hal_sys_brk(void*);
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334
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335 // ----------------------------------------------------------------------------
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336 // Interaction between the application and the auxiliary.
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337 // Not yet available, but there is a hardware-initialization routine.
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338 externC void hal_synthetic_target_init(void);
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339
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340 //-----------------------------------------------------------------------------
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341 #endif // ifndef CYGONCE_HAL_HAL_IO_H
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342 // End of hal_io.h