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annotate packages/hal/sh/cq7708/current/include/platform.inc @ 156:b939e9cada46

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Merge from eCos master repository on 2001-03-29-21:44:39-BST
author jlarmour
date Fri, 06 Apr 2001 17:20:13 +0000
parents f0e3fb000de8
children e0c0827131d1
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1 #ifndef CYGONCE_HAL_PLATFORM_INC
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2 #define CYGONCE_HAL_PLATFORM_INC
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3 ##=============================================================================
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4 ##
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5 ## platform.inc
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6 ##
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7 ## SH/CQ7708 board assembler header file
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8 ##
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9 ##=============================================================================
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10 #####COPYRIGHTBEGIN####
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11 #
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12 # -------------------------------------------
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13 # The contents of this file are subject to the Red Hat eCos Public License
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14 # Version 1.0 (the "License"); you may not use this file except in
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15 # compliance with the License. You may obtain a copy of the License at
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16 # http://sourceware.cygnus.com/ecos
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17 #
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18 # Software distributed under the License is distributed on an
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19 # basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the
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20 # License for the specific language governing rights and limitations under
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21 # the License.
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22 #
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23 # The Original Code is eCos - Embedded Configurable Operating System,
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24 # released September 30, 1998.
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25 #
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26 # The Initial Developer of the Original Code is Red Hat.
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27 # Portions created by Red Hat are
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28 # Copyright (C) 1998, 1999, 2000 Red Hat, Inc.
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29 # All Rights Reserved.
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30 # -------------------------------------------
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31 #
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32 #####COPYRIGHTEND####
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33 ##=============================================================================
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34 #######DESCRIPTIONBEGIN####
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35 ##
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36 ## Author(s): jskov
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37 ## Contributors:jskov
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38 ## Date: 2000-02-02
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39 ## Purpose: SH/CQ7708 board definitions.
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40 ## Description: This file contains various definitions and macros that are
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41 ## useful for writing assembly code for the SH/CQ7708 board.
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42 ## Usage:
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43 ## #include <cyg/hal/platform.inc>
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44 ## ...
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45 ##
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46 ##
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47 ######DESCRIPTIONEND####
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48 ##
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49 ##=============================================================================
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50
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51 #include <pkgconf/hal.h>
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52
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53 #include <cyg/hal/sh_offsets.inc>
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54 #include <cyg/hal/sh_regs.h>
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55
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56 #------------------------------------------------------------------------------
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57 # Hardware initialization.
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58
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59 .macro hal_hardware_init
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60 // Set up the Bus State Controller
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61 mova BSC_settings_table,r0
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62 mov r0,r3
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63 1: mov.w @r3+,r0 // Address (or zero)
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64 cmp/eq #0,r0
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65 bt 2f
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66 mov.w @r3+,r1 // data
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67 bra 1b
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68 mov.w r1,@r0 // delay slot
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69
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70 .align 2
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71
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72 BSC_settings_table:
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73 # These are the settings set by the ROM Monitor.
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74
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75 .word CYGARC_REG_FRQCR
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76 .word CYGARC_REG_FRQCR_INIT
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77
94
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78 # BCR1: Areas 3 are SDRAM
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79 .word CYGARC_REG_BCR1
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80 .word 0x0010
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81 # BCR2: Bus size of areas 2,4 are 8 bits
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82 .word CYGARC_REG_BCR2
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83 .word 0x3ddc
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84 # WCR1: 3 wait-state cycles inserted for all areas
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85 .word CYGARC_REG_WCR1
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86 .word 0x3fff
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87 # WCR2: cs0=8wait cs1=0wait cs2=0wait cs3=2wait cs4=4wait */
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88 .word CYGARC_REG_WCR2
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89 .word 0x0246
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90 # MCR: dram setting 10 bit
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91 .word CYGARC_REG_MCR
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92 .word 0x0074
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93 # RTCSR: refresh timer control
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94 .word CYGARC_REG_RTCSR
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95 .word (0xa500 | 0x0010)
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96 # RTCOR: refresh time constant
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97 .word CYGARC_REG_RTCOR
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98 .word (0xa500 | 0x003a)
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99
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100 # Table end
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101 .word 0
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102
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103 .align 2
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104 2:
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105 .endm
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106
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107 #------------------------------------------------------------------------------
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108 # Monitor initialization.
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109
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110 #ifndef CYGPKG_HAL_SH_MON_DEFINED
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111
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112 #if defined(CYG_HAL_STARTUP_ROM) || \
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113 ( defined(CYG_HAL_STARTUP_RAM) && \
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114 !defined(CYGSEM_HAL_USE_ROM_MONITOR))
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115
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116 # If we are starting up from ROM, or we are starting in
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117 # RAM and NOT using a ROM monitor, initialize the VSR table.
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118
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119 .macro hal_mon_init
138
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120 mov.l $hal_vsr_table,r3
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121 # Write exception vectors
138
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122 mov.l $cyg_hal_default_exception_vsr,r4
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123 mov #CYGNUM_HAL_VSR_EXCEPTION_COUNT,r5
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124 1: mov.l r4,@r3
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125 add #4,r3
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126 dt r5
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127 bf 1b
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128 # Write interrupt vector
138
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129 mov.l $cyg_hal_default_interrupt_vsr,r4
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130 mov.l $hal_vsr_table,r3
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131 add #CYGNUM_HAL_VECTOR_INTERRUPT*4,r3
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132 mov.l r4,@r3
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133 bra 2f
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134 nop
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135 .align 2
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136
138
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137 SYM_PTR_REF(cyg_hal_default_exception_vsr)
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138 SYM_PTR_REF(cyg_hal_default_interrupt_vsr)
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139 SYM_PTR_REF(hal_vsr_table)
94
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140 2:
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141 .endm
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142
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143 #elif defined(CYG_HAL_STARTUP_RAM) && defined(CYGSEM_HAL_USE_ROM_MONITOR)
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144
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145 # Initialize the VSR table entries
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146 # We only take control of the interrupt vector,
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147 # the rest are left to the ROM for now...
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148
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149 .macro hal_mon_init
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150 # Write interrupt vector
138
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151 mov.l $hal_vsr_table,r3
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152 mov.l $cyg_hal_default_interrupt_vsr,r4
150
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153 add #CYGNUM_HAL_VECTOR_INTERRUPT*4,r3
94
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154 mov.l r4,@r3
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155 bra 2f
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156 nop
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157 .align 2
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158
138
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159 SYM_PTR_REF(cyg_hal_default_interrupt_vsr)
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160 SYM_PTR_REF(hal_vsr_table)
94
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161 2:
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162 .endm
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163
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164 #else
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165
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166 .macro hal_mon_init
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167 .endm
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168
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169 #endif
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170
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171
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172 #define CYGPKG_HAL_SH_MON_DEFINED
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173
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174 #endif // CYGPKG_HAL_SH_MON_DEFINED
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175
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176 #endif // CYGONCE_HAL_PLATFORM_INC