Mercurial > ecos
annotate packages/kernel/current/tests/kcache2.c @ 3188:cb5a35f3fda4
Include CYGHWR_MEMORY_LAYOUT_H in order to effectively test memory size. Bug reported and fix suggested by Bernd Edlinger. [Bugzilla 1001650]
| author | vae |
|---|---|
| date | Thu, 04 Oct 2012 07:40:45 +0000 |
| parents | c8f21fa31800 |
| children |
| rev | line source |
|---|---|
| 2 | 1 /*================================================================= |
| 2 // | |
| 3 // kcache2.c | |
| 4 // | |
| 5 // Cache feature/timing tests | |
| 6 // | |
| 7 //========================================================================== | |
|
2729
74dbf4c3f2e1
Update all copyright banners to reflect FSF ownership; fix and improve licence text.
jlarmour
parents:
1996
diff
changeset
|
8 // ####ECOSGPLCOPYRIGHTBEGIN#### |
|
74dbf4c3f2e1
Update all copyright banners to reflect FSF ownership; fix and improve licence text.
jlarmour
parents:
1996
diff
changeset
|
9 // ------------------------------------------- |
|
74dbf4c3f2e1
Update all copyright banners to reflect FSF ownership; fix and improve licence text.
jlarmour
parents:
1996
diff
changeset
|
10 // This file is part of eCos, the Embedded Configurable Operating System. |
|
74dbf4c3f2e1
Update all copyright banners to reflect FSF ownership; fix and improve licence text.
jlarmour
parents:
1996
diff
changeset
|
11 // Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc. |
|
208
e0c0827131d1
Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
199
diff
changeset
|
12 // |
|
2729
74dbf4c3f2e1
Update all copyright banners to reflect FSF ownership; fix and improve licence text.
jlarmour
parents:
1996
diff
changeset
|
13 // eCos is free software; you can redistribute it and/or modify it under |
|
74dbf4c3f2e1
Update all copyright banners to reflect FSF ownership; fix and improve licence text.
jlarmour
parents:
1996
diff
changeset
|
14 // the terms of the GNU General Public License as published by the Free |
|
74dbf4c3f2e1
Update all copyright banners to reflect FSF ownership; fix and improve licence text.
jlarmour
parents:
1996
diff
changeset
|
15 // Software Foundation; either version 2 or (at your option) any later |
|
74dbf4c3f2e1
Update all copyright banners to reflect FSF ownership; fix and improve licence text.
jlarmour
parents:
1996
diff
changeset
|
16 // version. |
|
208
e0c0827131d1
Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
199
diff
changeset
|
17 // |
|
2729
74dbf4c3f2e1
Update all copyright banners to reflect FSF ownership; fix and improve licence text.
jlarmour
parents:
1996
diff
changeset
|
18 // eCos is distributed in the hope that it will be useful, but WITHOUT |
|
74dbf4c3f2e1
Update all copyright banners to reflect FSF ownership; fix and improve licence text.
jlarmour
parents:
1996
diff
changeset
|
19 // ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
|
74dbf4c3f2e1
Update all copyright banners to reflect FSF ownership; fix and improve licence text.
jlarmour
parents:
1996
diff
changeset
|
20 // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
|
74dbf4c3f2e1
Update all copyright banners to reflect FSF ownership; fix and improve licence text.
jlarmour
parents:
1996
diff
changeset
|
21 // for more details. |
|
208
e0c0827131d1
Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
199
diff
changeset
|
22 // |
|
2729
74dbf4c3f2e1
Update all copyright banners to reflect FSF ownership; fix and improve licence text.
jlarmour
parents:
1996
diff
changeset
|
23 // You should have received a copy of the GNU General Public License |
|
74dbf4c3f2e1
Update all copyright banners to reflect FSF ownership; fix and improve licence text.
jlarmour
parents:
1996
diff
changeset
|
24 // along with eCos; if not, write to the Free Software Foundation, Inc., |
|
74dbf4c3f2e1
Update all copyright banners to reflect FSF ownership; fix and improve licence text.
jlarmour
parents:
1996
diff
changeset
|
25 // 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. |
|
208
e0c0827131d1
Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
199
diff
changeset
|
26 // |
|
2729
74dbf4c3f2e1
Update all copyright banners to reflect FSF ownership; fix and improve licence text.
jlarmour
parents:
1996
diff
changeset
|
27 // As a special exception, if other files instantiate templates or use |
|
74dbf4c3f2e1
Update all copyright banners to reflect FSF ownership; fix and improve licence text.
jlarmour
parents:
1996
diff
changeset
|
28 // macros or inline functions from this file, or you compile this file |
|
74dbf4c3f2e1
Update all copyright banners to reflect FSF ownership; fix and improve licence text.
jlarmour
parents:
1996
diff
changeset
|
29 // and link it with other works to produce a work based on this file, |
|
74dbf4c3f2e1
Update all copyright banners to reflect FSF ownership; fix and improve licence text.
jlarmour
parents:
1996
diff
changeset
|
30 // this file does not by itself cause the resulting work to be covered by |
|
74dbf4c3f2e1
Update all copyright banners to reflect FSF ownership; fix and improve licence text.
jlarmour
parents:
1996
diff
changeset
|
31 // the GNU General Public License. However the source code for this file |
|
74dbf4c3f2e1
Update all copyright banners to reflect FSF ownership; fix and improve licence text.
jlarmour
parents:
1996
diff
changeset
|
32 // must still be made available in accordance with section (3) of the GNU |
|
74dbf4c3f2e1
Update all copyright banners to reflect FSF ownership; fix and improve licence text.
jlarmour
parents:
1996
diff
changeset
|
33 // General Public License v2. |
|
208
e0c0827131d1
Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
199
diff
changeset
|
34 // |
|
2729
74dbf4c3f2e1
Update all copyright banners to reflect FSF ownership; fix and improve licence text.
jlarmour
parents:
1996
diff
changeset
|
35 // This exception does not invalidate any other reasons why a work based |
|
74dbf4c3f2e1
Update all copyright banners to reflect FSF ownership; fix and improve licence text.
jlarmour
parents:
1996
diff
changeset
|
36 // on this file might be covered by the GNU General Public License. |
|
74dbf4c3f2e1
Update all copyright banners to reflect FSF ownership; fix and improve licence text.
jlarmour
parents:
1996
diff
changeset
|
37 // ------------------------------------------- |
|
74dbf4c3f2e1
Update all copyright banners to reflect FSF ownership; fix and improve licence text.
jlarmour
parents:
1996
diff
changeset
|
38 // ####ECOSGPLCOPYRIGHTEND#### |
| 2 | 39 //========================================================================== |
| 40 //#####DESCRIPTIONBEGIN#### | |
| 41 // | |
| 42 // Author(s): jskov, based on kcache1.c by dsm | |
|
477
658c231c7e71
Fix kcache2 test for 32 byte cache line size. Add low level cache testing.
gthomas
parents:
210
diff
changeset
|
43 // Contributors: jskov, gthomas |
| 2 | 44 // Date: 1998-12-10 |
| 45 // Description: Tests some of the more exotic cache macros. | |
| 46 //####DESCRIPTIONEND#### | |
| 47 */ | |
| 48 | |
| 49 #include <cyg/hal/hal_arch.h> // CYGNUM_HAL_STACK_SIZE_TYPICAL | |
| 50 | |
| 51 #include <cyg/kernel/kapi.h> | |
| 52 | |
| 53 #include <cyg/infra/testcase.h> | |
| 54 | |
| 55 #ifdef CYGVAR_KERNEL_COUNTERS_CLOCK | |
| 56 #ifdef CYGFUN_KERNEL_API_C | |
| 57 | |
| 58 #include <cyg/infra/diag.h> | |
| 59 #include <cyg/hal/hal_cache.h> | |
|
3188
cb5a35f3fda4
Include CYGHWR_MEMORY_LAYOUT_H in order to effectively test memory size. Bug reported and fix suggested by Bernd Edlinger. [Bugzilla 1001650]
vae
parents:
3183
diff
changeset
|
60 #include CYGHWR_MEMORY_LAYOUT_H |
| 2 | 61 |
| 62 // ------------------------------------------------------------------------- | |
| 63 | |
| 64 #define NTHREADS 1 | |
| 65 #define STACKSIZE CYGNUM_HAL_STACK_SIZE_TYPICAL | |
| 66 | |
| 67 // The following are defaults for loop variables. Note they will be overriden | |
| 68 // on simulator targets, where detected - there is no point testing a cache | |
| 69 // which doesn't exist :-). | |
| 70 | |
| 71 #define TEST_DZERO_LOOPS 5000 // default number of loops for test_dzero() | |
| 72 #define TIME_ILOCK_LOOPS 10000 // default number of loops for time_ilock() | |
| 73 #define TIME_DLOCK_LOOPS 10000 // default number of loops for time_dlock() | |
| 74 | |
|
477
658c231c7e71
Fix kcache2 test for 32 byte cache line size. Add low level cache testing.
gthomas
parents:
210
diff
changeset
|
75 // Define this to enable a simple, but hopefully useful, data cache |
|
658c231c7e71
Fix kcache2 test for 32 byte cache line size. Add low level cache testing.
gthomas
parents:
210
diff
changeset
|
76 // test. It may help discover if the cache support has been defined |
|
658c231c7e71
Fix kcache2 test for 32 byte cache line size. Add low level cache testing.
gthomas
parents:
210
diff
changeset
|
77 // properly (in terms of size and shape) |
| 583 | 78 #ifdef HAL_DCACHE_LINE_SIZE |
| 79 #define _TEST_DCACHE_OPERATION | |
|
477
658c231c7e71
Fix kcache2 test for 32 byte cache line size. Add low level cache testing.
gthomas
parents:
210
diff
changeset
|
80 #endif |
| 2 | 81 |
| 82 static cyg_handle_t thread[NTHREADS]; | |
| 83 | |
| 84 static cyg_thread thread_obj[NTHREADS]; | |
| 85 static char stack[NTHREADS][STACKSIZE]; | |
| 86 | |
|
3183
c8f21fa31800
Allow comilation for targets with less then 128KiB RAM by conditionally reducing of MAXSIZE to (1<<16)
vae
parents:
2729
diff
changeset
|
87 #if (CYGMEM_REGION_ram_SIZE <= (128*1024)) |
|
c8f21fa31800
Allow comilation for targets with less then 128KiB RAM by conditionally reducing of MAXSIZE to (1<<16)
vae
parents:
2729
diff
changeset
|
88 # define MAXSIZE (1<<16) |
|
c8f21fa31800
Allow comilation for targets with less then 128KiB RAM by conditionally reducing of MAXSIZE to (1<<16)
vae
parents:
2729
diff
changeset
|
89 #else |
|
c8f21fa31800
Allow comilation for targets with less then 128KiB RAM by conditionally reducing of MAXSIZE to (1<<16)
vae
parents:
2729
diff
changeset
|
90 # define MAXSIZE (1<<18) |
|
c8f21fa31800
Allow comilation for targets with less then 128KiB RAM by conditionally reducing of MAXSIZE to (1<<16)
vae
parents:
2729
diff
changeset
|
91 #endif |
| 2 | 92 |
| 93 volatile char m[MAXSIZE]; | |
| 94 | |
| 95 // ------------------------------------------------------------------------- | |
| 96 // Test of data cache zero. | |
| 97 // o Timing comparison with instructions doing the same amount of work. | |
| 98 // o Check that area cleared with the DCACHE_ZERO macro contains zeros. | |
| 99 #ifdef HAL_DCACHE_ZERO | |
| 100 static void test_dzero(void) | |
| 101 { | |
| 102 register cyg_uint32 k, i; | |
| 103 cyg_tick_count_t count0, count1; | |
| 104 cyg_ucount32 t; | |
| 105 volatile cyg_uint32* aligned_p; | |
| 106 volatile cyg_uint32* p; | |
| 107 register CYG_INTERRUPT_STATE oldints; | |
| 108 cyg_ucount32 test_dzero_loops = TEST_DZERO_LOOPS; | |
| 109 | |
| 110 CYG_TEST_INFO("Data cache zero"); | |
| 111 | |
| 112 if (cyg_test_is_simulator) | |
| 113 test_dzero_loops=10; | |
| 114 | |
| 115 aligned_p = (volatile cyg_uint32*) | |
| 116 (((unsigned long) &m[HAL_DCACHE_LINE_SIZE*2]) | |
| 117 & ~(HAL_DCACHE_LINE_SIZE-1)); | |
| 118 | |
| 119 // Time with conventional instructions. | |
| 120 HAL_DISABLE_INTERRUPTS(oldints); | |
| 121 HAL_DCACHE_SYNC(); | |
| 122 HAL_DCACHE_DISABLE(); | |
| 123 HAL_DCACHE_SYNC(); | |
| 124 HAL_DCACHE_INVALIDATE_ALL(); | |
| 125 HAL_DCACHE_ENABLE(); | |
| 126 HAL_RESTORE_INTERRUPTS(oldints); | |
| 127 count0 = cyg_current_time(); | |
| 128 for (k = 0; k < test_dzero_loops; k++) { | |
| 129 p = aligned_p; | |
| 130 for (i = 0; i < HAL_DCACHE_SETS; i++) { | |
| 131 #if (16 == HAL_DCACHE_LINE_SIZE) | |
| 132 *p++ = 0; | |
| 133 *p++ = 0; | |
| 134 *p++ = 0; | |
| 135 *p++ = 0; | |
|
477
658c231c7e71
Fix kcache2 test for 32 byte cache line size. Add low level cache testing.
gthomas
parents:
210
diff
changeset
|
136 #elif (32 == HAL_DCACHE_LINE_SIZE) |
|
658c231c7e71
Fix kcache2 test for 32 byte cache line size. Add low level cache testing.
gthomas
parents:
210
diff
changeset
|
137 *p++ = 0; |
|
658c231c7e71
Fix kcache2 test for 32 byte cache line size. Add low level cache testing.
gthomas
parents:
210
diff
changeset
|
138 *p++ = 0; |
|
658c231c7e71
Fix kcache2 test for 32 byte cache line size. Add low level cache testing.
gthomas
parents:
210
diff
changeset
|
139 *p++ = 0; |
|
658c231c7e71
Fix kcache2 test for 32 byte cache line size. Add low level cache testing.
gthomas
parents:
210
diff
changeset
|
140 *p++ = 0; |
|
658c231c7e71
Fix kcache2 test for 32 byte cache line size. Add low level cache testing.
gthomas
parents:
210
diff
changeset
|
141 *p++ = 0; |
|
658c231c7e71
Fix kcache2 test for 32 byte cache line size. Add low level cache testing.
gthomas
parents:
210
diff
changeset
|
142 *p++ = 0; |
|
658c231c7e71
Fix kcache2 test for 32 byte cache line size. Add low level cache testing.
gthomas
parents:
210
diff
changeset
|
143 *p++ = 0; |
|
658c231c7e71
Fix kcache2 test for 32 byte cache line size. Add low level cache testing.
gthomas
parents:
210
diff
changeset
|
144 *p++ = 0; |
| 2 | 145 #else |
| 146 #error "Not defined for this cache line size." | |
| 147 #endif | |
| 148 } | |
| 149 | |
| 150 HAL_DISABLE_INTERRUPTS(oldints); | |
| 151 HAL_DCACHE_SYNC(); | |
| 152 HAL_DCACHE_DISABLE(); | |
| 153 HAL_DCACHE_SYNC(); | |
| 154 HAL_DCACHE_INVALIDATE_ALL(); | |
| 155 HAL_DCACHE_ENABLE(); | |
| 156 HAL_RESTORE_INTERRUPTS(oldints); | |
| 157 } | |
| 158 count1 = cyg_current_time(); | |
| 159 t = count1 - count0; | |
| 160 diag_printf("time with instructions: %d\n", t); | |
| 161 | |
| 162 // Initialize the area with non-zero so we can check whether | |
| 163 // the macro cleared the area properly. | |
| 164 p = aligned_p; | |
| 165 for (i = 0; | |
| 166 i < HAL_DCACHE_SETS*HAL_DCACHE_LINE_SIZE/sizeof(cyg_uint32); | |
| 167 i++) { | |
| 168 *p++ = 0xdeadbeef; | |
| 169 } | |
| 170 | |
| 171 // Time with DCACHE_ZERO. | |
| 172 HAL_DISABLE_INTERRUPTS(oldints); | |
| 173 HAL_DCACHE_SYNC(); | |
| 174 HAL_DCACHE_DISABLE(); | |
| 175 HAL_DCACHE_SYNC(); | |
| 176 HAL_DCACHE_INVALIDATE_ALL(); | |
| 177 HAL_DCACHE_ENABLE(); | |
| 178 HAL_RESTORE_INTERRUPTS(oldints); | |
| 179 count0 = cyg_current_time(); | |
| 180 for (k = 0; k < test_dzero_loops; k++) { | |
| 181 HAL_DCACHE_ZERO(aligned_p, HAL_DCACHE_SETS*HAL_DCACHE_LINE_SIZE); | |
| 182 | |
| 183 HAL_DISABLE_INTERRUPTS(oldints); | |
| 184 HAL_DCACHE_SYNC(); | |
| 185 HAL_DCACHE_DISABLE(); | |
| 186 HAL_DCACHE_SYNC(); | |
| 187 HAL_DCACHE_INVALIDATE_ALL(); | |
| 188 HAL_DCACHE_ENABLE(); | |
| 189 HAL_RESTORE_INTERRUPTS(oldints); | |
| 190 } | |
| 191 count1 = cyg_current_time(); | |
| 192 t = count1 - count0; | |
| 193 diag_printf("time with HAL_DCACHE_ZERO: %d\n", t); | |
| 194 | |
| 195 // Verify that the area was actually cleared. | |
| 196 { | |
| 197 cyg_uint32 d; | |
| 198 | |
| 199 d = 0; | |
| 200 p = aligned_p; | |
| 201 for (i = 0; | |
| 202 i < HAL_DCACHE_SETS*HAL_DCACHE_LINE_SIZE/sizeof(cyg_uint32); | |
| 203 i++) { | |
| 204 d |= *p++; | |
| 205 } | |
| 206 | |
| 207 CYG_TEST_CHECK(0 == d, "region not properly cleared"); | |
| 208 } | |
| 209 | |
| 210 } | |
| 211 #endif | |
| 212 | |
| 213 // ------------------------------------------------------------------------- | |
| 214 // Test of data cache write hint. | |
| 215 // Just check that the macro compiles. | |
| 216 #ifdef HAL_DCACHE_WRITE_HINT | |
| 217 static void test_dwrite_hint(void) | |
| 218 { | |
| 219 register cyg_uint32 k; | |
| 220 register CYG_INTERRUPT_STATE oldints; | |
| 221 | |
| 222 CYG_TEST_INFO("Data cache write hint"); | |
| 223 | |
| 224 HAL_DISABLE_INTERRUPTS(oldints); | |
| 225 HAL_DCACHE_SYNC(); | |
| 226 HAL_DCACHE_DISABLE(); | |
| 227 HAL_DCACHE_SYNC(); | |
| 228 HAL_DCACHE_INVALIDATE_ALL(); | |
| 229 HAL_DCACHE_ENABLE(); | |
| 230 HAL_RESTORE_INTERRUPTS(oldints); | |
| 231 | |
| 232 HAL_DCACHE_WRITE_HINT(&m[HAL_DCACHE_LINE_SIZE*2], 2*HAL_DCACHE_LINE_SIZE); | |
| 233 for (k = 0; k < 20; k++); | |
| 234 m[HAL_DCACHE_LINE_SIZE*2] = 42; | |
| 235 } | |
| 236 #endif | |
| 237 | |
| 238 // ------------------------------------------------------------------------- | |
| 239 // Test of data cache read hint. | |
| 240 // Just check that the macro compiles. | |
| 241 #ifdef HAL_DCACHE_READ_HINT | |
| 242 static void test_dread_hint(void) | |
| 243 { | |
| 244 register char c; | |
| 245 register cyg_uint32 k; | |
| 246 register CYG_INTERRUPT_STATE oldints; | |
| 247 | |
| 248 CYG_TEST_INFO("Data cache read hint"); | |
| 249 | |
| 250 HAL_DISABLE_INTERRUPTS(oldints); | |
| 251 HAL_DCACHE_SYNC(); | |
| 252 HAL_DCACHE_DISABLE(); | |
| 253 HAL_DCACHE_SYNC(); | |
| 254 HAL_DCACHE_INVALIDATE_ALL(); | |
| 255 HAL_DCACHE_ENABLE(); | |
| 256 HAL_RESTORE_INTERRUPTS(oldints); | |
| 257 | |
| 258 HAL_DCACHE_READ_HINT(&m[HAL_DCACHE_LINE_SIZE*2], 2*HAL_DCACHE_LINE_SIZE); | |
| 259 for (k = 0; k < 20; k++); | |
| 260 c = m[HAL_DCACHE_LINE_SIZE*2]; | |
| 261 } | |
| 262 #endif | |
| 263 | |
| 264 // ------------------------------------------------------------------------- | |
|
143
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
265 // Test of data cache line store |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
266 // o No semantic requirement. |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
267 // o Check that flushed data is written to memory. |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
268 // o Simple invocation check of macro. |
| 2 | 269 #ifdef HAL_DCACHE_STORE |
| 270 static void test_dstore(void) | |
| 271 { | |
| 272 volatile cyg_uint8* aligned_p; | |
| 273 cyg_int32 i; | |
| 274 register CYG_INTERRUPT_STATE oldints; | |
| 275 | |
| 276 CYG_TEST_INFO("Data cache store region"); | |
| 277 | |
| 278 for (i = 0; i < HAL_DCACHE_LINE_SIZE*16; i++) | |
| 279 m[i] = 0; | |
| 280 | |
| 281 HAL_DISABLE_INTERRUPTS(oldints); | |
| 282 HAL_DCACHE_SYNC(); | |
| 283 HAL_DCACHE_DISABLE(); | |
| 284 HAL_DCACHE_SYNC(); | |
| 285 HAL_DCACHE_INVALIDATE_ALL(); | |
| 286 HAL_DCACHE_ENABLE(); | |
| 287 | |
| 288 aligned_p = (volatile cyg_uint8*) | |
| 289 (((unsigned long) &m[HAL_DCACHE_LINE_SIZE*2]) | |
| 290 & ~(HAL_DCACHE_LINE_SIZE-1)); | |
| 291 | |
|
143
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
292 aligned_p[0] = 42 + aligned_p[1]; // Load causes cache to be used! |
| 2 | 293 |
| 294 HAL_DCACHE_STORE(aligned_p, HAL_DCACHE_LINE_SIZE); | |
|
143
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
295 |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
296 CYG_TEST_CHECK(42 == aligned_p[0], |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
297 "memory didn't contain flushed data"); |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
298 |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
299 HAL_DCACHE_INVALIDATE_ALL(); // Discard... |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
300 |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
301 CYG_TEST_CHECK(42 == aligned_p[0], |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
302 "memory didn't contain flushed data after invalidate all"); |
|
208
e0c0827131d1
Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
199
diff
changeset
|
303 |
|
e0c0827131d1
Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
199
diff
changeset
|
304 HAL_RESTORE_INTERRUPTS(oldints); |
| 2 | 305 } |
| 306 #endif | |
| 307 | |
| 308 // ------------------------------------------------------------------------- | |
|
143
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
309 // Test of data cache total flush (sync). |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
310 // o No semantic requirement. |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
311 // o Check that flushed data is written to memory. |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
312 // o Simple invocation check of macro. |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
313 #ifdef HAL_DCACHE_LINE_SIZE // So we can find our way around memory |
|
477
658c231c7e71
Fix kcache2 test for 32 byte cache line size. Add low level cache testing.
gthomas
parents:
210
diff
changeset
|
314 |
|
658c231c7e71
Fix kcache2 test for 32 byte cache line size. Add low level cache testing.
gthomas
parents:
210
diff
changeset
|
315 #ifdef _TEST_DCACHE_OPERATION |
|
658c231c7e71
Fix kcache2 test for 32 byte cache line size. Add low level cache testing.
gthomas
parents:
210
diff
changeset
|
316 static void |
|
658c231c7e71
Fix kcache2 test for 32 byte cache line size. Add low level cache testing.
gthomas
parents:
210
diff
changeset
|
317 test_dcache_operation(void) |
|
658c231c7e71
Fix kcache2 test for 32 byte cache line size. Add low level cache testing.
gthomas
parents:
210
diff
changeset
|
318 { |
|
658c231c7e71
Fix kcache2 test for 32 byte cache line size. Add low level cache testing.
gthomas
parents:
210
diff
changeset
|
319 long *lp = (long *)m; |
|
658c231c7e71
Fix kcache2 test for 32 byte cache line size. Add low level cache testing.
gthomas
parents:
210
diff
changeset
|
320 int i, errs; |
| 583 | 321 cyg_uint32 oldints; |
|
477
658c231c7e71
Fix kcache2 test for 32 byte cache line size. Add low level cache testing.
gthomas
parents:
210
diff
changeset
|
322 |
|
658c231c7e71
Fix kcache2 test for 32 byte cache line size. Add low level cache testing.
gthomas
parents:
210
diff
changeset
|
323 CYG_TEST_INFO("Data cache basic"); |
|
658c231c7e71
Fix kcache2 test for 32 byte cache line size. Add low level cache testing.
gthomas
parents:
210
diff
changeset
|
324 |
|
658c231c7e71
Fix kcache2 test for 32 byte cache line size. Add low level cache testing.
gthomas
parents:
210
diff
changeset
|
325 HAL_DISABLE_INTERRUPTS(oldints); |
|
658c231c7e71
Fix kcache2 test for 32 byte cache line size. Add low level cache testing.
gthomas
parents:
210
diff
changeset
|
326 HAL_DCACHE_SYNC(); |
|
658c231c7e71
Fix kcache2 test for 32 byte cache line size. Add low level cache testing.
gthomas
parents:
210
diff
changeset
|
327 HAL_DCACHE_DISABLE(); |
|
658c231c7e71
Fix kcache2 test for 32 byte cache line size. Add low level cache testing.
gthomas
parents:
210
diff
changeset
|
328 HAL_DCACHE_SYNC(); |
|
658c231c7e71
Fix kcache2 test for 32 byte cache line size. Add low level cache testing.
gthomas
parents:
210
diff
changeset
|
329 // Fill test buffer |
|
658c231c7e71
Fix kcache2 test for 32 byte cache line size. Add low level cache testing.
gthomas
parents:
210
diff
changeset
|
330 for (i = 0; i < sizeof(m)/sizeof(*lp); i++) { |
|
658c231c7e71
Fix kcache2 test for 32 byte cache line size. Add low level cache testing.
gthomas
parents:
210
diff
changeset
|
331 lp[i] = i; |
|
658c231c7e71
Fix kcache2 test for 32 byte cache line size. Add low level cache testing.
gthomas
parents:
210
diff
changeset
|
332 } |
|
658c231c7e71
Fix kcache2 test for 32 byte cache line size. Add low level cache testing.
gthomas
parents:
210
diff
changeset
|
333 HAL_DCACHE_INVALIDATE_ALL(); |
|
658c231c7e71
Fix kcache2 test for 32 byte cache line size. Add low level cache testing.
gthomas
parents:
210
diff
changeset
|
334 HAL_DCACHE_ENABLE(); |
|
658c231c7e71
Fix kcache2 test for 32 byte cache line size. Add low level cache testing.
gthomas
parents:
210
diff
changeset
|
335 // Now push data through the cache |
| 583 | 336 // Note: 256 seems like a reasonable offset. It may be useful to actually |
| 337 // compute this (and the size of the test region) based on cache geometry | |
|
477
658c231c7e71
Fix kcache2 test for 32 byte cache line size. Add low level cache testing.
gthomas
parents:
210
diff
changeset
|
338 for (i = 256; i < 256+HAL_DCACHE_SIZE/sizeof(*lp); i++) { |
|
658c231c7e71
Fix kcache2 test for 32 byte cache line size. Add low level cache testing.
gthomas
parents:
210
diff
changeset
|
339 lp[i] = 0xFF000000 + i; |
|
658c231c7e71
Fix kcache2 test for 32 byte cache line size. Add low level cache testing.
gthomas
parents:
210
diff
changeset
|
340 } |
|
658c231c7e71
Fix kcache2 test for 32 byte cache line size. Add low level cache testing.
gthomas
parents:
210
diff
changeset
|
341 // Now force cache clean and off |
|
658c231c7e71
Fix kcache2 test for 32 byte cache line size. Add low level cache testing.
gthomas
parents:
210
diff
changeset
|
342 HAL_DCACHE_SYNC(); |
|
658c231c7e71
Fix kcache2 test for 32 byte cache line size. Add low level cache testing.
gthomas
parents:
210
diff
changeset
|
343 HAL_DCACHE_DISABLE(); |
|
658c231c7e71
Fix kcache2 test for 32 byte cache line size. Add low level cache testing.
gthomas
parents:
210
diff
changeset
|
344 // Verify the data |
|
658c231c7e71
Fix kcache2 test for 32 byte cache line size. Add low level cache testing.
gthomas
parents:
210
diff
changeset
|
345 diag_printf("Verify data with cache off\n"); |
|
658c231c7e71
Fix kcache2 test for 32 byte cache line size. Add low level cache testing.
gthomas
parents:
210
diff
changeset
|
346 errs = 0; |
|
658c231c7e71
Fix kcache2 test for 32 byte cache line size. Add low level cache testing.
gthomas
parents:
210
diff
changeset
|
347 for (i = 0; i < sizeof(m)/sizeof(*lp); i++) { |
|
658c231c7e71
Fix kcache2 test for 32 byte cache line size. Add low level cache testing.
gthomas
parents:
210
diff
changeset
|
348 if ((i >= 256) && (i < 256+HAL_DCACHE_SIZE/sizeof(*lp))) { |
|
658c231c7e71
Fix kcache2 test for 32 byte cache line size. Add low level cache testing.
gthomas
parents:
210
diff
changeset
|
349 if (lp[i] != (0xFF000000 + i)) { |
|
658c231c7e71
Fix kcache2 test for 32 byte cache line size. Add low level cache testing.
gthomas
parents:
210
diff
changeset
|
350 if (++errs < 16) { |
|
1996
2c3a824f07b9
* tests/kcache2.c (test_dcache_operation): Fixed compiler warnings
asl
parents:
583
diff
changeset
|
351 diag_printf("Data inside test range changed - was: %x, is %lx, index: %x\n", |
|
477
658c231c7e71
Fix kcache2 test for 32 byte cache line size. Add low level cache testing.
gthomas
parents:
210
diff
changeset
|
352 0xFF000000+i, lp[i], i); |
|
658c231c7e71
Fix kcache2 test for 32 byte cache line size. Add low level cache testing.
gthomas
parents:
210
diff
changeset
|
353 } |
|
658c231c7e71
Fix kcache2 test for 32 byte cache line size. Add low level cache testing.
gthomas
parents:
210
diff
changeset
|
354 } |
|
658c231c7e71
Fix kcache2 test for 32 byte cache line size. Add low level cache testing.
gthomas
parents:
210
diff
changeset
|
355 } else { |
|
658c231c7e71
Fix kcache2 test for 32 byte cache line size. Add low level cache testing.
gthomas
parents:
210
diff
changeset
|
356 if (lp[i] != i) { |
|
658c231c7e71
Fix kcache2 test for 32 byte cache line size. Add low level cache testing.
gthomas
parents:
210
diff
changeset
|
357 if (++errs < 16) { |
|
1996
2c3a824f07b9
* tests/kcache2.c (test_dcache_operation): Fixed compiler warnings
asl
parents:
583
diff
changeset
|
358 diag_printf("Data outside test range changed - was: %x, is %lx, index: %x\n", |
|
477
658c231c7e71
Fix kcache2 test for 32 byte cache line size. Add low level cache testing.
gthomas
parents:
210
diff
changeset
|
359 i, lp[i], i); |
|
658c231c7e71
Fix kcache2 test for 32 byte cache line size. Add low level cache testing.
gthomas
parents:
210
diff
changeset
|
360 } |
|
658c231c7e71
Fix kcache2 test for 32 byte cache line size. Add low level cache testing.
gthomas
parents:
210
diff
changeset
|
361 } |
|
658c231c7e71
Fix kcache2 test for 32 byte cache line size. Add low level cache testing.
gthomas
parents:
210
diff
changeset
|
362 } |
|
658c231c7e71
Fix kcache2 test for 32 byte cache line size. Add low level cache testing.
gthomas
parents:
210
diff
changeset
|
363 } |
| 583 | 364 CYG_TEST_CHECK(0 == errs, "dcache basic failed"); |
| 365 #if 0 // Additional information | |
|
477
658c231c7e71
Fix kcache2 test for 32 byte cache line size. Add low level cache testing.
gthomas
parents:
210
diff
changeset
|
366 diag_printf("%d total errors during compare\n", errs); |
|
658c231c7e71
Fix kcache2 test for 32 byte cache line size. Add low level cache testing.
gthomas
parents:
210
diff
changeset
|
367 diag_dump_buf(&lp[240], 128); |
| 583 | 368 #endif |
|
477
658c231c7e71
Fix kcache2 test for 32 byte cache line size. Add low level cache testing.
gthomas
parents:
210
diff
changeset
|
369 HAL_RESTORE_INTERRUPTS(oldints); |
|
658c231c7e71
Fix kcache2 test for 32 byte cache line size. Add low level cache testing.
gthomas
parents:
210
diff
changeset
|
370 } |
|
658c231c7e71
Fix kcache2 test for 32 byte cache line size. Add low level cache testing.
gthomas
parents:
210
diff
changeset
|
371 #endif |
|
658c231c7e71
Fix kcache2 test for 32 byte cache line size. Add low level cache testing.
gthomas
parents:
210
diff
changeset
|
372 |
|
143
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
373 static void test_dsync(void) |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
374 { |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
375 volatile cyg_uint8* aligned_p; |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
376 cyg_int32 i; |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
377 register CYG_INTERRUPT_STATE oldints; |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
378 |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
379 CYG_TEST_INFO("Data cache sync all"); |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
380 |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
381 for (i = 0; i < HAL_DCACHE_LINE_SIZE*16; i++) |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
382 m[i] = 0; |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
383 |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
384 HAL_DISABLE_INTERRUPTS(oldints); |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
385 HAL_DCACHE_SYNC(); |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
386 HAL_DCACHE_DISABLE(); |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
387 HAL_DCACHE_SYNC(); |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
388 HAL_DCACHE_INVALIDATE_ALL(); |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
389 HAL_DCACHE_ENABLE(); |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
390 |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
391 aligned_p = (volatile cyg_uint8*) |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
392 (((unsigned long) &m[HAL_DCACHE_LINE_SIZE*2]) |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
393 & ~(HAL_DCACHE_LINE_SIZE-1)); |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
394 |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
395 aligned_p[0] = 42 + aligned_p[1]; // Load causes cache to be used! |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
396 aligned_p[HAL_DCACHE_LINE_SIZE] = 43 + aligned_p[HAL_DCACHE_LINE_SIZE + 1]; |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
397 |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
398 HAL_DCACHE_SYNC(); |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
399 |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
400 CYG_TEST_CHECK(42 == aligned_p[0], |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
401 "memory didn't contain flushed data"); |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
402 CYG_TEST_CHECK(43 == aligned_p[HAL_DCACHE_LINE_SIZE], |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
403 "memory didn't contain flushed data next block"); |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
404 |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
405 HAL_DCACHE_INVALIDATE_ALL(); |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
406 |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
407 CYG_TEST_CHECK(42 == aligned_p[0], |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
408 "memory didn't contain flushed data after invalidate"); |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
409 CYG_TEST_CHECK(43 == aligned_p[HAL_DCACHE_LINE_SIZE], |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
410 "memory didn't contain flushed data next block after invalidate"); |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
411 |
|
208
e0c0827131d1
Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
199
diff
changeset
|
412 HAL_RESTORE_INTERRUPTS(oldints); |
|
e0c0827131d1
Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
199
diff
changeset
|
413 |
|
195
67850532eebb
Merge from eCos master repository on 2001-11-02-06:43:03-GMT
jlarmour
parents:
191
diff
changeset
|
414 HAL_ICACHE_INVALIDATE_ALL(); |
|
143
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
415 HAL_DCACHE_DISABLE(); |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
416 |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
417 CYG_TEST_CHECK(42 == aligned_p[0], |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
418 "memory didn't contain flushed data after disable"); |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
419 CYG_TEST_CHECK(43 == aligned_p[HAL_DCACHE_LINE_SIZE], |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
420 "memory didn't contain flushed data next block after disable"); |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
421 |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
422 HAL_DCACHE_ENABLE(); |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
423 } |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
424 #endif // HAL_DCACHE_LINE_SIZE |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
425 |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
426 // ------------------------------------------------------------------------- |
| 2 | 427 // Test of data cache line flush. |
| 428 // o Requires write-back cache. | |
| 429 // o Check that flushed data is written to memory. | |
| 430 // o Simple range check of macro. | |
|
191
678094f34118
Merge from eCos master repository on 2001-10-19-06:43:02-BST
jlarmour
parents:
143
diff
changeset
|
431 #ifdef HAL_DCACHE_QUERY_WRITE_MODE // only if we know this, can we test: |
| 2 | 432 #ifdef HAL_DCACHE_FLUSH |
| 433 static void test_dflush(void) | |
| 434 { | |
| 435 volatile cyg_uint8* aligned_p; | |
| 436 cyg_int32 i; | |
| 437 register CYG_INTERRUPT_STATE oldints; | |
| 438 | |
| 439 CYG_TEST_INFO("Data cache flush region"); | |
| 440 | |
| 441 for (i = 0; i < HAL_DCACHE_LINE_SIZE*16; i++) | |
| 442 m[i] = 0; | |
| 443 | |
| 444 HAL_DISABLE_INTERRUPTS(oldints); | |
| 445 HAL_DCACHE_SYNC(); | |
| 446 HAL_DCACHE_DISABLE(); | |
| 447 HAL_DCACHE_SYNC(); | |
| 448 HAL_DCACHE_INVALIDATE_ALL(); | |
| 449 HAL_DCACHE_ENABLE(); | |
| 450 HAL_RESTORE_INTERRUPTS(oldints); | |
| 451 | |
| 452 aligned_p = (volatile cyg_uint8*) | |
| 453 (((unsigned long) &m[HAL_DCACHE_LINE_SIZE*2]) | |
| 454 & ~(HAL_DCACHE_LINE_SIZE-1)); | |
| 455 | |
|
143
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
456 HAL_DISABLE_INTERRUPTS(oldints); |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
457 |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
458 aligned_p[0] = 42 + aligned_p[1]; // Load causes cache to be used! |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
459 aligned_p[HAL_DCACHE_LINE_SIZE] = 43 + aligned_p[HAL_DCACHE_LINE_SIZE + 1]; |
| 2 | 460 |
| 461 HAL_DCACHE_FLUSH(aligned_p, HAL_DCACHE_LINE_SIZE); | |
| 462 | |
| 463 HAL_DCACHE_DISABLE(); | |
| 464 | |
|
143
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
465 HAL_RESTORE_INTERRUPTS(oldints); |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
466 |
| 2 | 467 CYG_TEST_CHECK(42 == aligned_p[0], |
| 468 "memory didn't contain flushed data"); | |
| 469 CYG_TEST_CHECK(0 == aligned_p[HAL_DCACHE_LINE_SIZE], | |
| 470 "flushed beyond region"); | |
| 471 | |
| 472 HAL_DCACHE_ENABLE(); | |
| 473 } | |
| 474 #endif | |
|
191
678094f34118
Merge from eCos master repository on 2001-10-19-06:43:02-BST
jlarmour
parents:
143
diff
changeset
|
475 #endif |
| 2 | 476 |
| 477 // ------------------------------------------------------------------------- | |
|
143
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
478 // Test of data cache disable (which does NOT force contents out to RAM) |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
479 // o Requires write-back cache [so NOT invoked unconditionally] |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
480 // o Check that dirty data is not written to memory and is invalidated |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
481 // in the cache. |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
482 // o Simple invocation check of macro. |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
483 #ifdef HAL_DCACHE_QUERY_WRITE_MODE // only if we know this, can we test: |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
484 static void test_ddisable(void) |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
485 { |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
486 volatile cyg_uint8* aligned_p; |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
487 cyg_int32 i; |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
488 register CYG_INTERRUPT_STATE oldints; |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
489 |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
490 CYG_TEST_INFO("Data cache gross disable"); |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
491 |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
492 for (i = 0; i < HAL_DCACHE_LINE_SIZE*16; i++) |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
493 m[i] = 0; |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
494 |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
495 HAL_DISABLE_INTERRUPTS(oldints); |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
496 HAL_DCACHE_SYNC(); |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
497 HAL_DCACHE_DISABLE(); |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
498 HAL_DCACHE_SYNC(); |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
499 HAL_DCACHE_INVALIDATE_ALL(); |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
500 HAL_DCACHE_ENABLE(); |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
501 HAL_RESTORE_INTERRUPTS(oldints); |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
502 |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
503 aligned_p = (volatile cyg_uint8*) |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
504 (((unsigned long) &m[HAL_DCACHE_LINE_SIZE*2]) |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
505 & ~(HAL_DCACHE_LINE_SIZE-1)); |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
506 |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
507 HAL_DISABLE_INTERRUPTS(oldints); |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
508 |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
509 aligned_p[0] = 43 + aligned_p[1]; // Load causes cache to be used! |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
510 aligned_p[HAL_DCACHE_LINE_SIZE-1] = 43; |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
511 |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
512 aligned_p[HAL_DCACHE_LINE_SIZE] = 42 + aligned_p[HAL_DCACHE_LINE_SIZE + 1]; |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
513 |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
514 HAL_DCACHE_DISABLE(); |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
515 |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
516 HAL_RESTORE_INTERRUPTS(oldints); |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
517 |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
518 CYG_TEST_CHECK(0 == aligned_p[0] && |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
519 0 == aligned_p[HAL_DCACHE_LINE_SIZE-1], |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
520 "cache/memory contained invalidated data"); |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
521 CYG_TEST_CHECK(0 == aligned_p[HAL_DCACHE_LINE_SIZE], |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
522 "next block contained invalidated data"); |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
523 |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
524 HAL_DCACHE_ENABLE(); |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
525 } |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
526 #endif // def HAL_DCACHE_QUERY_WRITE_MODE |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
527 |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
528 // ------------------------------------------------------------------------- |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
529 // Test of data cache total invalidate. |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
530 // o Requires write-back cache. |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
531 // o Check that invalidated data is not written to memory and is invalidated |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
532 // in the cache. |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
533 // o Simple invocation check of macro. |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
534 #ifdef HAL_DCACHE_QUERY_WRITE_MODE // only if we know this, can we test: |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
535 #ifdef HAL_DCACHE_INVALIDATE_ALL |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
536 static void test_dinvalidate_all(void) |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
537 { |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
538 volatile cyg_uint8* aligned_p; |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
539 cyg_int32 i; |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
540 register CYG_INTERRUPT_STATE oldints; |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
541 |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
542 CYG_TEST_INFO("Data cache invalidate all"); |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
543 |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
544 for (i = 0; i < HAL_DCACHE_LINE_SIZE*16; i++) |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
545 m[i] = 0; |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
546 |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
547 HAL_DISABLE_INTERRUPTS(oldints); |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
548 HAL_DCACHE_SYNC(); |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
549 HAL_DCACHE_DISABLE(); |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
550 HAL_DCACHE_SYNC(); |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
551 HAL_DCACHE_INVALIDATE_ALL(); |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
552 HAL_DCACHE_ENABLE(); |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
553 |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
554 aligned_p = (volatile cyg_uint8*) |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
555 (((unsigned long) &m[HAL_DCACHE_LINE_SIZE*2]) |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
556 & ~(HAL_DCACHE_LINE_SIZE-1)); |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
557 |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
558 aligned_p[0] = 43 + aligned_p[1]; // Load causes cache to be used! |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
559 aligned_p[HAL_DCACHE_LINE_SIZE-1] = 43; |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
560 |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
561 aligned_p[HAL_DCACHE_LINE_SIZE] = 42 + aligned_p[HAL_DCACHE_LINE_SIZE + 1]; |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
562 |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
563 HAL_DCACHE_INVALIDATE_ALL(); |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
564 |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
565 HAL_RESTORE_INTERRUPTS(oldints); |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
566 |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
567 CYG_TEST_CHECK(0 == aligned_p[0] && |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
568 0 == aligned_p[HAL_DCACHE_LINE_SIZE-1], |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
569 "cache/memory contained invalidated data"); |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
570 CYG_TEST_CHECK(0 == aligned_p[HAL_DCACHE_LINE_SIZE], |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
571 "next block contained invalidated data"); |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
572 } |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
573 #endif |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
574 #endif // def HAL_DCACHE_QUERY_WRITE_MODE |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
575 |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
576 // ------------------------------------------------------------------------- |
| 2 | 577 // Test of data cache line invalidate. |
| 578 // o Requires write-back cache. | |
| 579 // o Check that invalidated data is not written to memory and is invalidated | |
| 580 // in the cache. | |
| 581 // o Simple range check of macro. | |
|
143
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
582 #ifdef HAL_DCACHE_QUERY_WRITE_MODE // only if we know this, can we test: |
| 2 | 583 #ifdef HAL_DCACHE_INVALIDATE |
| 584 static void test_dinvalidate(void) | |
| 585 { | |
| 586 volatile cyg_uint8* aligned_p; | |
| 587 cyg_int32 i; | |
| 588 register CYG_INTERRUPT_STATE oldints; | |
| 589 | |
| 590 CYG_TEST_INFO("Data cache invalidate region"); | |
| 591 | |
| 592 for (i = 0; i < HAL_DCACHE_LINE_SIZE*16; i++) | |
| 593 m[i] = 0; | |
| 594 | |
| 595 HAL_DISABLE_INTERRUPTS(oldints); | |
| 596 HAL_DCACHE_SYNC(); | |
| 597 HAL_DCACHE_DISABLE(); | |
| 598 HAL_DCACHE_SYNC(); | |
| 599 HAL_DCACHE_INVALIDATE_ALL(); | |
| 600 HAL_DCACHE_ENABLE(); | |
| 601 HAL_RESTORE_INTERRUPTS(oldints); | |
| 602 | |
| 603 aligned_p = (volatile cyg_uint8*) | |
| 604 (((unsigned long) &m[HAL_DCACHE_LINE_SIZE*2]) | |
| 605 & ~(HAL_DCACHE_LINE_SIZE-1)); | |
| 606 | |
|
143
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
607 HAL_DISABLE_INTERRUPTS(oldints); |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
608 |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
609 aligned_p[0] = 43 + aligned_p[1]; // Load causes cache to be used! |
| 2 | 610 aligned_p[HAL_DCACHE_LINE_SIZE-1] = 43; |
| 611 | |
|
143
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
612 aligned_p[HAL_DCACHE_LINE_SIZE] = 42 + aligned_p[HAL_DCACHE_LINE_SIZE + 1]; |
| 2 | 613 |
| 614 HAL_DCACHE_INVALIDATE(aligned_p, HAL_DCACHE_LINE_SIZE); | |
| 615 | |
|
143
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
616 HAL_RESTORE_INTERRUPTS(oldints); |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
617 |
| 2 | 618 CYG_TEST_CHECK(0 == aligned_p[0] && |
| 619 0 == aligned_p[HAL_DCACHE_LINE_SIZE-1], | |
| 620 "cache/memory contained invalidated data"); | |
| 621 CYG_TEST_CHECK(42 == aligned_p[HAL_DCACHE_LINE_SIZE], | |
| 622 "invalidated beyond range"); | |
|
143
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
623 |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
624 HAL_DCACHE_SYNC(); |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
625 HAL_DCACHE_DISABLE(); |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
626 |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
627 CYG_TEST_CHECK(0 == aligned_p[0] && |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
628 0 == aligned_p[HAL_DCACHE_LINE_SIZE-1], |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
629 "cache/memory contained invalidated data after SYNC/DIS"); |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
630 CYG_TEST_CHECK(42 == aligned_p[HAL_DCACHE_LINE_SIZE], |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
631 "invalidated beyond range after SYNC/DIS"); |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
632 |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
633 HAL_DCACHE_ENABLE(); |
| 2 | 634 } |
| 635 #endif | |
|
143
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
636 #endif // def HAL_DCACHE_QUERY_WRITE_MODE |
| 2 | 637 |
| 638 // ------------------------------------------------------------------------- | |
| 639 // Test of instruction cache locking. | |
| 640 // o Time difference between repeatedly executing a bunch of instructions | |
| 641 // with and without locking. | |
| 642 #ifdef HAL_ICACHE_LOCK | |
|
199
920b9b754b53
Merge from eCos master repository on 2001-12-15-12:00:33-GMT
jlarmour
parents:
195
diff
changeset
|
643 static void iloop(unsigned long* start, unsigned long* end, int dummy) |
| 2 | 644 { |
|
199
920b9b754b53
Merge from eCos master repository on 2001-12-15-12:00:33-GMT
jlarmour
parents:
195
diff
changeset
|
645 // dummy is just used to fool the compiler to not move the labels |
|
920b9b754b53
Merge from eCos master repository on 2001-12-15-12:00:33-GMT
jlarmour
parents:
195
diff
changeset
|
646 // around. All callers should call with dummy=0; |
|
920b9b754b53
Merge from eCos master repository on 2001-12-15-12:00:33-GMT
jlarmour
parents:
195
diff
changeset
|
647 |
| 2 | 648 register char c; |
| 649 register CYG_INTERRUPT_STATE oldints; | |
| 650 | |
|
199
920b9b754b53
Merge from eCos master repository on 2001-12-15-12:00:33-GMT
jlarmour
parents:
195
diff
changeset
|
651 if (1 == dummy) goto label_end; |
|
920b9b754b53
Merge from eCos master repository on 2001-12-15-12:00:33-GMT
jlarmour
parents:
195
diff
changeset
|
652 |
| 2 | 653 label_start: |
| 654 // Invalidating shouldn't affect locked lines. | |
| 655 HAL_DISABLE_INTERRUPTS(oldints); | |
| 656 HAL_ICACHE_DISABLE(); | |
| 657 HAL_ICACHE_INVALIDATE_ALL(); | |
| 658 HAL_ICACHE_ENABLE(); | |
| 659 HAL_RESTORE_INTERRUPTS(oldints); | |
| 660 | |
| 661 c = m[HAL_DCACHE_LINE_SIZE*0]; | |
| 662 c = m[HAL_DCACHE_LINE_SIZE*1]; | |
| 663 c = m[HAL_DCACHE_LINE_SIZE*2]; | |
| 664 c = m[HAL_DCACHE_LINE_SIZE*3]; | |
| 665 c = m[HAL_DCACHE_LINE_SIZE*4]; | |
| 666 c = m[HAL_DCACHE_LINE_SIZE*5]; | |
| 667 c = m[HAL_DCACHE_LINE_SIZE*6]; | |
| 668 c = m[HAL_DCACHE_LINE_SIZE*7]; | |
| 669 c = m[HAL_DCACHE_LINE_SIZE*8]; | |
| 670 c = m[HAL_DCACHE_LINE_SIZE*9]; | |
| 671 c = m[HAL_DCACHE_LINE_SIZE*10]; | |
| 672 c = m[HAL_DCACHE_LINE_SIZE*11]; | |
| 673 c = m[HAL_DCACHE_LINE_SIZE*12]; | |
| 674 c = m[HAL_DCACHE_LINE_SIZE*13]; | |
| 675 c = m[HAL_DCACHE_LINE_SIZE*14]; | |
| 676 c = m[HAL_DCACHE_LINE_SIZE*15]; | |
| 677 c = m[HAL_DCACHE_LINE_SIZE*16]; | |
| 678 c = m[HAL_DCACHE_LINE_SIZE*17]; | |
| 679 c = m[HAL_DCACHE_LINE_SIZE*18]; | |
| 680 c = m[HAL_DCACHE_LINE_SIZE*19]; | |
| 681 c = m[HAL_DCACHE_LINE_SIZE*20]; | |
| 682 c = m[HAL_DCACHE_LINE_SIZE*21]; | |
| 683 c = m[HAL_DCACHE_LINE_SIZE*22]; | |
| 684 c = m[HAL_DCACHE_LINE_SIZE*23]; | |
| 685 c = m[HAL_DCACHE_LINE_SIZE*24]; | |
| 686 c = m[HAL_DCACHE_LINE_SIZE*25]; | |
| 687 c = m[HAL_DCACHE_LINE_SIZE*26]; | |
| 688 c = m[HAL_DCACHE_LINE_SIZE*27]; | |
| 689 c = m[HAL_DCACHE_LINE_SIZE*28]; | |
| 690 c = m[HAL_DCACHE_LINE_SIZE*29]; | |
| 691 c = m[HAL_DCACHE_LINE_SIZE*30]; | |
| 692 c = m[HAL_DCACHE_LINE_SIZE*31]; | |
| 693 c = m[HAL_DCACHE_LINE_SIZE*32]; | |
| 694 c = m[HAL_DCACHE_LINE_SIZE*33]; | |
| 695 c = m[HAL_DCACHE_LINE_SIZE*34]; | |
| 696 c = m[HAL_DCACHE_LINE_SIZE*35]; | |
| 697 c = m[HAL_DCACHE_LINE_SIZE*36]; | |
| 698 c = m[HAL_DCACHE_LINE_SIZE*37]; | |
| 699 c = m[HAL_DCACHE_LINE_SIZE*38]; | |
| 700 c = m[HAL_DCACHE_LINE_SIZE*39]; | |
| 701 c = m[HAL_DCACHE_LINE_SIZE*40]; | |
| 702 c = m[HAL_DCACHE_LINE_SIZE*41]; | |
| 703 c = m[HAL_DCACHE_LINE_SIZE*42]; | |
| 704 c = m[HAL_DCACHE_LINE_SIZE*43]; | |
| 705 c = m[HAL_DCACHE_LINE_SIZE*44]; | |
| 706 c = m[HAL_DCACHE_LINE_SIZE*45]; | |
| 707 c = m[HAL_DCACHE_LINE_SIZE*46]; | |
| 708 c = m[HAL_DCACHE_LINE_SIZE*47]; | |
| 709 c = m[HAL_DCACHE_LINE_SIZE*48]; | |
| 710 c = m[HAL_DCACHE_LINE_SIZE*49]; | |
| 711 c = m[HAL_DCACHE_LINE_SIZE*50]; | |
| 712 c = m[HAL_DCACHE_LINE_SIZE*51]; | |
| 713 c = m[HAL_DCACHE_LINE_SIZE*52]; | |
| 714 c = m[HAL_DCACHE_LINE_SIZE*53]; | |
| 715 c = m[HAL_DCACHE_LINE_SIZE*54]; | |
| 716 c = m[HAL_DCACHE_LINE_SIZE*55]; | |
| 717 c = m[HAL_DCACHE_LINE_SIZE*56]; | |
| 718 c = m[HAL_DCACHE_LINE_SIZE*57]; | |
| 719 c = m[HAL_DCACHE_LINE_SIZE*58]; | |
| 720 c = m[HAL_DCACHE_LINE_SIZE*59]; | |
| 721 c = m[HAL_DCACHE_LINE_SIZE*60]; | |
| 722 c = m[HAL_DCACHE_LINE_SIZE*61]; | |
| 723 c = m[HAL_DCACHE_LINE_SIZE*62]; | |
| 724 c = m[HAL_DCACHE_LINE_SIZE*63]; | |
| 725 | |
| 726 label_end: | |
| 727 | |
| 728 *start = (unsigned long) &&label_start; | |
| 729 *end = (unsigned long) &&label_end; | |
|
199
920b9b754b53
Merge from eCos master repository on 2001-12-15-12:00:33-GMT
jlarmour
parents:
195
diff
changeset
|
730 |
|
920b9b754b53
Merge from eCos master repository on 2001-12-15-12:00:33-GMT
jlarmour
parents:
195
diff
changeset
|
731 if (1 == dummy) goto label_start; |
| 2 | 732 } |
| 733 | |
| 734 static void time_ilock(void) | |
| 735 { | |
| 736 register cyg_ucount32 k; | |
| 737 cyg_tick_count_t count0, count1; | |
| 738 cyg_ucount32 t; | |
| 739 unsigned long start, end; | |
| 740 register cyg_ucount32 time_ilock_loops = TIME_ILOCK_LOOPS; | |
| 741 | |
| 742 CYG_TEST_INFO("Instruction cache lock"); | |
| 743 | |
| 744 if (cyg_test_is_simulator) | |
| 745 time_ilock_loops = 10; | |
| 746 | |
| 747 count0 = cyg_current_time(); | |
| 748 for (k = 0; k < time_ilock_loops; k++) { | |
|
199
920b9b754b53
Merge from eCos master repository on 2001-12-15-12:00:33-GMT
jlarmour
parents:
195
diff
changeset
|
749 iloop(&start, &end, 0); |
| 2 | 750 } |
| 751 count1 = cyg_current_time(); | |
| 752 t = count1 - count0; | |
| 753 diag_printf("time without lock: %d\n", t); | |
| 754 | |
| 755 HAL_ICACHE_LOCK(start, end-start); | |
| 756 | |
| 757 count0 = cyg_current_time(); | |
| 758 for (k = 0; k < time_ilock_loops; k++) { | |
|
199
920b9b754b53
Merge from eCos master repository on 2001-12-15-12:00:33-GMT
jlarmour
parents:
195
diff
changeset
|
759 iloop(&start, &end, 0); |
| 2 | 760 } |
| 761 count1 = cyg_current_time(); | |
| 762 t = count1 - count0; | |
| 763 diag_printf("time with lock: %d\n", t); | |
| 764 | |
| 765 HAL_ICACHE_UNLOCK(start, end-start); | |
| 766 } | |
| 767 #endif // ifdef HAL_ICACHE_LOCK | |
| 768 | |
| 769 // ------------------------------------------------------------------------- | |
| 770 // Test of data cache locking. | |
| 771 // o Time difference between repeatedly accessing a memory region | |
| 772 // with and without locking. | |
| 773 #ifdef HAL_DCACHE_LOCK | |
| 774 static void dloop(void) | |
| 775 { | |
| 776 register cyg_uint32 j; | |
| 777 register char c; | |
| 778 register CYG_INTERRUPT_STATE oldints; | |
| 779 | |
| 780 HAL_DISABLE_INTERRUPTS(oldints); | |
| 781 HAL_DCACHE_SYNC(); | |
| 782 HAL_DCACHE_DISABLE(); | |
| 783 HAL_DCACHE_SYNC(); | |
| 784 HAL_DCACHE_INVALIDATE_ALL(); | |
| 785 HAL_DCACHE_ENABLE(); | |
| 786 HAL_RESTORE_INTERRUPTS(oldints); | |
| 787 for (j = 0; j < HAL_DCACHE_SETS; j++) { | |
| 788 c = m[HAL_DCACHE_LINE_SIZE*j]; | |
| 789 } | |
| 790 } | |
| 791 | |
| 792 static void time_dlock(void) | |
| 793 { | |
| 794 register cyg_ucount32 k; | |
| 795 cyg_tick_count_t count0, count1; | |
| 796 cyg_ucount32 t; | |
| 797 register cyg_ucount32 time_dlock_loops = TIME_DLOCK_LOOPS; | |
| 798 | |
| 799 CYG_TEST_INFO("Data cache lock"); | |
| 800 | |
| 801 if (cyg_test_is_simulator) | |
| 802 time_dlock_loops = 10; | |
| 803 | |
| 804 count0 = cyg_current_time(); | |
| 805 for (k = 0; k < time_dlock_loops; k++) { | |
| 806 dloop(); | |
| 807 } | |
| 808 count1 = cyg_current_time(); | |
| 809 t = count1 - count0; | |
| 810 diag_printf("time without lock: %d\n", t); | |
| 811 | |
| 812 HAL_DCACHE_LOCK(&m[0], HAL_DCACHE_SETS*HAL_DCACHE_LINE_SIZE); | |
| 813 | |
| 814 count0 = cyg_current_time(); | |
| 815 for (k = 0; k < time_dlock_loops; k++) { | |
| 816 dloop(); | |
| 817 } | |
| 818 count1 = cyg_current_time(); | |
| 819 t = count1 - count0; | |
| 820 diag_printf("time with lock: %d\n", t); | |
| 821 | |
| 822 HAL_DCACHE_UNLOCK(&m[0], HAL_DCACHE_SETS*HAL_DCACHE_LINE_SIZE); | |
| 823 } | |
| 824 #endif // ifdef HAL_DCACHE_LOCK | |
| 825 | |
| 826 // ------------------------------------------------------------------------- | |
| 827 static void entry0( cyg_addrword_t data ) | |
| 828 { | |
|
143
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
829 int numtests = 0; |
|
24
306eee292492
Merge from eCos master repository on 1999-07-16-05:47:06-BST
jlarmour
parents:
2
diff
changeset
|
830 #ifdef HAL_DCACHE_QUERY_WRITE_MODE |
|
306eee292492
Merge from eCos master repository on 1999-07-16-05:47:06-BST
jlarmour
parents:
2
diff
changeset
|
831 int wmode; |
|
306eee292492
Merge from eCos master repository on 1999-07-16-05:47:06-BST
jlarmour
parents:
2
diff
changeset
|
832 #endif |
| 2 | 833 #ifdef HAL_DCACHE_LOCK |
|
143
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
834 time_dlock(); numtests++; |
| 2 | 835 #endif |
| 836 #ifdef HAL_ICACHE_LOCK | |
|
143
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
837 time_ilock(); numtests++; |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
838 #endif |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
839 #ifdef HAL_DCACHE_LINE_SIZE // So we can find our way around memory |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
840 test_dsync(); numtests++; |
| 2 | 841 #endif |
| 842 #ifdef HAL_DCACHE_STORE | |
|
143
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
843 test_dstore(); numtests++; |
| 2 | 844 #endif |
| 583 | 845 #ifdef _TEST_DCACHE_OPERATION |
| 846 test_dcache_operation(); numtests++; | |
| 847 #endif | |
| 2 | 848 #ifdef HAL_DCACHE_READ_HINT |
|
143
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
849 test_dread_hint(); numtests++; |
| 2 | 850 #endif |
| 851 #ifdef HAL_DCACHE_WRITE_HINT | |
|
143
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
852 test_dwrite_hint(); numtests++; |
| 2 | 853 #endif |
| 854 #ifdef HAL_DCACHE_ZERO | |
|
143
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
855 test_dzero(); numtests++; |
| 2 | 856 #endif |
| 857 | |
| 858 // The below tests only work on a copy-back cache. | |
|
24
306eee292492
Merge from eCos master repository on 1999-07-16-05:47:06-BST
jlarmour
parents:
2
diff
changeset
|
859 #ifdef HAL_DCACHE_QUERY_WRITE_MODE |
|
306eee292492
Merge from eCos master repository on 1999-07-16-05:47:06-BST
jlarmour
parents:
2
diff
changeset
|
860 HAL_DCACHE_QUERY_WRITE_MODE( wmode ); |
|
306eee292492
Merge from eCos master repository on 1999-07-16-05:47:06-BST
jlarmour
parents:
2
diff
changeset
|
861 |
|
306eee292492
Merge from eCos master repository on 1999-07-16-05:47:06-BST
jlarmour
parents:
2
diff
changeset
|
862 if ( HAL_DCACHE_WRITEBACK_MODE == wmode ) { |
|
143
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
863 test_ddisable(); numtests++; |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
864 #ifdef HAL_DCACHE_INVALIDATE |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
865 test_dinvalidate_all(); numtests++; |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
866 #endif |
| 2 | 867 #ifdef HAL_DCACHE_FLUSH |
|
143
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
868 test_dflush(); numtests++; |
| 2 | 869 #endif |
| 870 #ifdef HAL_DCACHE_INVALIDATE | |
|
143
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
871 test_dinvalidate(); numtests++; |
| 2 | 872 #endif |
| 873 } | |
|
24
306eee292492
Merge from eCos master repository on 1999-07-16-05:47:06-BST
jlarmour
parents:
2
diff
changeset
|
874 #endif // def HAL_DCACHE_QUERY_WRITE_MODE |
|
143
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
875 if ( numtests ) { |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
876 CYG_TEST_PASS_FINISH("End of test"); |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
877 } |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
878 else { |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
879 CYG_TEST_NA( "No applicable cache tests" ); |
|
6b5f480c6929
Merge from eCos master repository on 2000-12-08-02:09:36-GMT
jlarmour
parents:
66
diff
changeset
|
880 } |
| 2 | 881 } |
| 882 | |
| 883 // ------------------------------------------------------------------------- | |
| 884 | |
| 885 void kcache2_main( void ) | |
| 886 { | |
| 887 CYG_TEST_INIT(); | |
| 888 | |
| 889 cyg_thread_create(4, entry0 , (cyg_addrword_t)0, "kcache2", | |
| 890 (void *)stack[0], STACKSIZE, &thread[0], &thread_obj[0]); | |
| 891 cyg_thread_resume(thread[0]); | |
| 892 | |
| 893 cyg_scheduler_start(); | |
| 894 } | |
| 895 | |
| 896 // ------------------------------------------------------------------------- | |
| 897 | |
| 898 externC void | |
| 899 cyg_start( void ) | |
| 900 { | |
| 901 kcache2_main(); | |
| 902 } | |
| 903 | |
| 904 // ------------------------------------------------------------------------- | |
| 905 | |
| 906 #else // def CYGFUN_KERNEL_API_C | |
| 907 #define N_A_MSG "Kernel C API layer disabled" | |
| 908 #endif // def CYGFUN_KERNEL_API_C | |
| 909 #else // def CYGVAR_KERNEL_COUNTERS_CLOCK | |
| 910 #define N_A_MSG "Kernel real-time clock disabled" | |
| 911 #endif // def CYGVAR_KERNEL_COUNTERS_CLOCK | |
| 912 | |
| 913 #ifdef N_A_MSG | |
| 914 externC void | |
| 915 cyg_start( void ) | |
| 916 { | |
| 917 CYG_TEST_INIT(); | |
| 918 CYG_TEST_NA( N_A_MSG ); | |
| 919 } | |
| 920 #endif // N_A_MSG | |
| 921 | |
| 922 // ------------------------------------------------------------------------- | |
| 923 /* EOF kcache2.c */ |
