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Merge from eCos master repository on 2002-05-23-21:39:14-BST
author jlarmour
date Thu, 23 May 2002 22:59:51 +0000
parents e0c0827131d1
children f58b62f3c85d
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1 #ifndef CYGONCE_HAL_HAL_IO_H
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2 #define CYGONCE_HAL_HAL_IO_H
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3
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4 //=============================================================================
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5 //
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6 // hal_io.h
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7 //
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8 // HAL device IO register support.
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9 //
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10 //=============================================================================
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11 //####ECOSGPLCOPYRIGHTBEGIN####
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12 // -------------------------------------------
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13 // This file is part of eCos, the Embedded Configurable Operating System.
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14 // Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
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15 //
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16 // eCos is free software; you can redistribute it and/or modify it under
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17 // the terms of the GNU General Public License as published by the Free
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18 // Software Foundation; either version 2 or (at your option) any later version.
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19 //
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20 // eCos is distributed in the hope that it will be useful, but WITHOUT ANY
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21 // WARRANTY; without even the implied warranty of MERCHANTABILITY or
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22 // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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23 // for more details.
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24 //
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25 // You should have received a copy of the GNU General Public License along
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26 // with eCos; if not, write to the Free Software Foundation, Inc.,
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27 // 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
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28 //
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29 // As a special exception, if other files instantiate templates or use macros
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30 // or inline functions from this file, or you compile this file and link it
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31 // with other works to produce a work based on this file, this file does not
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32 // by itself cause the resulting work to be covered by the GNU General Public
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33 // License. However the source code for this file must still be made available
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34 // in accordance with section (3) of the GNU General Public License.
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35 //
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36 // This exception does not invalidate any other reasons why a work based on
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37 // this file might be covered by the GNU General Public License.
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38 //
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39 // Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
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40 // at http://sources.redhat.com/ecos/ecos-license/
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41 // -------------------------------------------
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42 //####ECOSGPLCOPYRIGHTEND####
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43 //=============================================================================
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44 //#####DESCRIPTIONBEGIN####
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45 //
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46 // Author(s): yoshinori sato
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47 // Contributors: yoshinori sato
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48 // Date: 2002-02-13
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49 // Purpose: Define IO register support
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50 // Description: The macros defined here provide the HAL APIs for handling
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51 // device IO control registers.
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52 //
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53 // Usage:
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54 // #include <cyg/hal/hal_io.h>
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55 // ...
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56 //
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57 //
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58 //####DESCRIPTIONEND####
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59 //
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60 //=============================================================================
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61
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62 #include <cyg/infra/cyg_type.h>
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63
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64 //-----------------------------------------------------------------------------
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65 // IO Register address.
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66 // This type is for recording the address of an IO register.
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67
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68 typedef volatile CYG_ADDRWORD HAL_IO_REGISTER;
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69
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70 //-----------------------------------------------------------------------------
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71 // BYTE Register access.
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72 // Individual and vectorized access to 8 bit registers.
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73
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74 #define HAL_READ_UINT8( _register_, _value_ ) \
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75 ((_value_) = *((volatile CYG_BYTE *)(_register_)))
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76
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77 #define HAL_WRITE_UINT8( _register_, _value_ ) \
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78 (*((volatile CYG_BYTE *)(_register_)) = (_value_))
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79
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80 #define HAL_READ_UINT8_VECTOR( _register_, _buf_, _count_, _step_ ) \
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81 { \
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82 cyg_count32 _i_,_j_; \
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83 for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) \
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84 (_buf_)[_i_] = ((volatile CYG_BYTE *)(_register_))[_j_]; \
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85 }
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86
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87 #define HAL_WRITE_UINT8_VECTOR( _register_, _buf_, _count_, _step_ ) \
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88 { \
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89 cyg_count32 _i_,_j_; \
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90 for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) \
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91 ((volatile CYG_BYTE *)(_register_))[_j_] = (_buf_)[_i_]; \
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92 }
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93
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94
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95 //-----------------------------------------------------------------------------
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96 // 16 bit access.
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97 // Individual and vectorized access to 16 bit registers.
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98
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99 #define HAL_READ_UINT16( _register_, _value_ ) \
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100 ((_value_) = *((volatile CYG_WORD16 *)(_register_)))
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101
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102 #define HAL_WRITE_UINT16( _register_, _value_ ) \
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103 (*((volatile CYG_WORD16 *)(_register_)) = (_value_))
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104
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105 #define HAL_READ_UINT16_VECTOR( _register_, _buf_, _count_, _step_ ) \
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106 { \
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107 cyg_count32 _i_,_j_; \
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108 for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) \
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109 (_buf_)[_i_] = ((volatile CYG_WORD16 *)(_register_))[_j_]; \
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110 }
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111
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112 #define HAL_WRITE_UINT16_VECTOR( _register_, _buf_, _count_, _step_ ) \
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113 { \
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114 cyg_count32 _i_,_j_; \
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115 for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) \
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116 ((volatile CYG_WORD16 *)(_register_))[_j_] = (_buf_)[_i_]; \
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117 }
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118
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119 //-----------------------------------------------------------------------------
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120 // 32 bit access.
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121 // Individual and vectorized access to 32 bit registers.
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122
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123 #define HAL_READ_UINT32( _register_, _value_ ) \
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124 ((_value_) = *((volatile CYG_WORD32 *)(_register_)))
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125
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126 #define HAL_WRITE_UINT32( _register_, _value_ ) \
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127 (*((volatile CYG_WORD32 *)(_register_)) = (_value_))
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128
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129 #define HAL_READ_UINT32_VECTOR( _register_, _buf_, _count_, _step_ ) \
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130 { \
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131 cyg_count32 _i_,_j_; \
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132 for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) \
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133 (_buf_)[_i_] = ((volatile CYG_WORD32 *)(_register_))[_j_]; \
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134 }
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135
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136 #define HAL_WRITE_UINT32_VECTOR( _register_, _buf_, _count_, _step_ ) \
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137 { \
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138 cyg_count32 _i_,_j_; \
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139 for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) \
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140 ((volatile CYG_WORD32 *)(_register_))[_j_] = (_buf_)[_i_]; \
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141 }
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142
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143 //-----------------------------------------------------------------------------
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144 #endif // ifndef CYGONCE_HAL_HAL_IO_H
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145 // End of hal_io.h