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annotate packages/hal/mips/tx39/current/src/mips_tx39.ld @ 6:d376b777e2ce ecos-sw-1999-05-14

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Merge from eCos master repository on 1999-05-14-19:27:43-BST
author jlarmour
date Fri, 14 May 1999 12:20:00 +0000
parents
children 4cc3eff958ab
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1 //===========================================================================
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2 //
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3 // MLT linker script for MIPS TX39
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4 //
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5 //===========================================================================
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6 //####COPYRIGHTBEGIN####
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7 //
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8 // -------------------------------------------
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9 // The contents of this file are subject to the Cygnus eCos Public License
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10 // Version 1.0 (the "License"); you may not use this file except in
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11 // compliance with the License. You may obtain a copy of the License at
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12 // http://sourceware.cygnus.com/ecos
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13 //
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14 // Software distributed under the License is distributed on an "AS IS"
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15 // basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the
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16 // License for the specific language governing rights and limitations under
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17 // the License.
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18 //
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19 // The Original Code is eCos - Embedded Cygnus Operating System, released
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20 // September 30, 1998.
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21 //
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22 // The Initial Developer of the Original Code is Cygnus. Portions created
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23 // by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved.
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24 // -------------------------------------------
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25 //
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26 //####COPYRIGHTEND####
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27 //===========================================================================
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28
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29 #include <pkgconf/system.h>
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30
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31 STARTUP(vectors.o)
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32 ENTRY(reset_vector)
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33 #ifdef EXTRAS
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34 INPUT(extras.o)
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35 #endif
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36 GROUP(libtarget.a libgcc.a)
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37
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38 #define ALIGN_LMA 8
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39 #define FOLLOWING(_section_) AT ((LOADADDR (_section_) + SIZEOF (_section_) + ALIGN_LMA - 1) & ~ (ALIGN_LMA - 1))
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40 #define LMA_EQ_VMA
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41 #define FORCE_OUTPUT . = .
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42
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43 #define SECTIONS_BEGIN
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44
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45 #if defined(CYG_HAL_STARTUP_RAM)
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46
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47 /* this version for RAM startup */
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48 #define SECTION_rom_vectors(_region_, _vma_, _lma_) \
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49 .rom_vectors _vma_ : _lma_ \
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50 { KEEP (*(.utlb_vector)) \
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51 . = ALIGN(0x80); KEEP(*(.other_vector)) \
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52 /* debug and reset vector not used in RAM version */ \
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53 KEEP(*(.debug_vector)) \
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54 KEEP (*(.reset_vector)) } \
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55 > _region_
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56
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57 #elif defined(CYG_HAL_STARTUP_ROM)
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58
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59 /* this version for ROM startup */
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60 #define SECTION_rom_vectors(_region_, _vma_, _lma_) \
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61 .rom_vectors _vma_ : _lma_ \
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62 { KEEP (*(.reset_vector)) \
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63 . = ALIGN(0x100); KEEP (*(.utlb_vector)) \
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64 . = ALIGN(0x80); KEEP(*(.other_vector)) \
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65 . = ALIGN(0x100); KEEP(*(.debug_vector)) } \
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66 > _region_
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67
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68 #endif /* ROM startup version of ROM vectors */
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69
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70 #define SECTION_text(_region_, _vma_, _lma_) \
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71 .text _vma_ : _lma_ \
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72 { _stext = ABSOLUTE(.); \
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73 *(.text*) *(.gnu.warning) *(.gnu.linkonce*) *(.init) } \
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74 > _region_ \
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75 _etext = .; PROVIDE (etext = .);
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76
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77 #define SECTION_fini(_region_, _vma_, _lma_) \
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78 .fini _vma_ : _lma_ \
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79 { FORCE_OUTPUT; *(.fini) } \
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80 > _region_
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81
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82 #define SECTION_rodata(_region_, _vma_, _lma_) \
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83 .rodata _vma_ : _lma_ \
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84 { FORCE_OUTPUT; *(.rodata*) } \
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85 > _region_
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86
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87 #define SECTION_vsr_table(_region_, _vma_, _lma_) \
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88 .vsr_table _vma_ : _lma_ \
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89 { FORCE_OUTPUT; *(.vsr_table) } \
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90 > _region_
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91
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92 #define SECTION_rodata1(_region_, _vma_, _lma_) \
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93 .rodata1 _vma_ : _lma_ \
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94 { FORCE_OUTPUT; *(.rodata1) } \
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95 > _region_
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96
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97 #define SECTION_fixup(_region_, _vma_, _lma_) \
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98 .fixup _vma_ : _lma_ \
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99 { FORCE_OUTPUT; *(.fixup) } \
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100 > _region_
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101
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102 #define SECTION_rel__dyn(_region_, _vma_, _lma_) \
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103 .rel.dyn _vma_ : _lma_ \
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104 { FORCE_OUTPUT; *(.rel.dyn) } \
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105 > _region_
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106
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107 #define SECTION_gcc_except_table(_region_, _vma_, _lma_) \
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108 .gcc_except_table _vma_ : _lma_ \
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109 { FORCE_OUTPUT; *(.gcc_except_table) } \
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110 > _region_
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111
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112 #define SECTION_data(_region_, _vma_, _lma_) \
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113 .data _vma_ : _lma_ \
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114 { __ram_data_start = ABSOLUTE (.); \
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115 *(.data*) *(.data1) \
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116 _GOT1_START_ = ABSOLUTE (.); *(.got1) _GOT1_END_ = ABSOLUTE (.); \
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117 _GOT2_START_ = ABSOLUTE (.); *(.got2) _GOT2_END_ = ABSOLUTE (.); \
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118 . = ALIGN (8); \
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119 SORT (CONSTRUCTORS) *(.ctors*) *(.dtors*) \
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120 . = ALIGN (8); \
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121 __DEVTAB__ = ABSOLUTE (.); KEEP (*(SORT (.devtab*))) __DEVTAB_END__ = ABSOLUTE (.); \
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122 . = ALIGN (8); \
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123 _GOT_START = ABSOLUTE (.); _gp = ABSOLUTE (.); __global = _gp; _GLOBAL_OFFSET_TABLE_ = ABSOLUTE (.); _SDA_BASE_ = ABSOLUTE (.); \
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124 *(.got.plt) *(.got) _GOT_END_ = ABSOLUTE (.); \
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125 *(.dynamic) *(.sdata*) *(.sbss*) *(.eh_frame) } \
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126 > _region_ \
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127 __rom_data_start = LOADADDR (.data); \
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128 __ram_data_end = .; PROVIDE (__ram_data_end = .); _edata = .; PROVIDE (edata = .);
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129
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130 #define SECTION_bss(_region_, _vma_, _lma_) \
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131 .bss _vma_ : _lma_ \
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132 { __bss_start = ABSOLUTE (.); \
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133 *(.scommon) *(.dynbss) *(.bss) *(COMMON) \
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134 __bss_end = ABSOLUTE (.); } \
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135 > _region_
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136
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137 #define SECTIONS_END . = ALIGN(4); _end = .; PROVIDE (end = .); \
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138 .debug 0 : { *(.debug) } \
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139 .line 0 : { *(.line) } \
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140 .debug_srcinfo 0 : { *(.debug_srcinfo) } \
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141 .debug_sfnames 0 : { *(.debug_sfnames) } \
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142 .debug_aranges 0 : { *(.debug_aranges) } \
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143 .debug_pubnames 0 : { *(.debug_pubnames) } \
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144 .debug_info 0 : { *(.debug_info) } \
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145 .debug_abbrev 0 : { *(.debug_abbrev) } \
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146 .debug_line 0 : { *(.debug_line) } \
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147 .debug_frame 0 : { *(.debug_frame) } \
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148 .debug_str 0 : { *(.debug_str) } \
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149 .debug_loc 0 : { *(.debug_loc) } \
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150 .debug_macinfo 0 : { *(.debug_macinfo) } \
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151 .debug_weaknames 0 : { *(.debug_weaknames) } \
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152 .debug_funcnames 0 : { *(.debug_funcnames) } \
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153 .debug_typenames 0 : { *(.debug_typenames) } \
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154 .debug_varnames 0 : { *(.debug_varnames) }
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155
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156 #include CYGHWR_MEMORY_LAYOUT_LDI
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157
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158 #ifndef CYGPKG_HAL_MIPS_SIM
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159 hal_vsr_table = 0x80000100;
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160 #endif