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1 //========================================================================== |
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2 // |
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3 // pid_misc.c |
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4 // |
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5 // HAL misc board support code for ARM PID7 |
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6 // |
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7 //========================================================================== |
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8 //####COPYRIGHTBEGIN#### |
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9 // |
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10 // ------------------------------------------- |
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11 // The contents of this file are subject to the Cygnus eCos Public License |
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12 // Version 1.0 (the "License"); you may not use this file except in |
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13 // compliance with the License. You may obtain a copy of the License at |
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14 // http://sourceware.cygnus.com/ecos |
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15 // |
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16 // Software distributed under the License is distributed on an "AS IS" |
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17 // basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the |
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18 // License for the specific language governing rights and limitations under |
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19 // the License. |
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20 // |
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21 // The Original Code is eCos - Embedded Cygnus Operating System, released |
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22 // September 30, 1998. |
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23 // |
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24 // The Initial Developer of the Original Code is Cygnus. Portions created |
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25 // by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. |
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26 // ------------------------------------------- |
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27 // |
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28 //####COPYRIGHTEND#### |
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29 //========================================================================== |
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30 //#####DESCRIPTIONBEGIN#### |
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31 // |
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32 // Author(s): gthomas |
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33 // Contributors: gthomas |
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34 // Date: 1999-02-20 |
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35 // Purpose: HAL board support |
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36 // Description: Implementations of HAL board interfaces |
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37 // |
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38 //####DESCRIPTIONEND#### |
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39 // |
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40 //===========================================================================*/ |
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41 |
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42 #include <pkgconf/hal.h> |
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43 |
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44 #include <cyg/infra/cyg_type.h> // base types |
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45 #include <cyg/infra/cyg_trac.h> // tracing macros |
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46 #include <cyg/infra/cyg_ass.h> // assertion macros |
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47 |
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48 #include <cyg/hal/hal_io.h> // IO macros |
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49 #include <cyg/hal/hal_arch.h> // Register state info |
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50 #include <cyg/hal/hal_diag.h> |
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51 #include <cyg/hal/hal_intr.h> // necessary? |
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52 |
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53 /*------------------------------------------------------------------------*/ |
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54 // On-board timer |
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55 /*------------------------------------------------------------------------*/ |
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56 |
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57 // Timer registers |
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58 #define CYG_DEVICE_TIMER_BASE 0x0A800020 |
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59 #define CYG_DEVICE_TIMER_LOAD \ |
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60 ((volatile cyg_uint32 *) (CYG_DEVICE_TIMER_BASE + 0x00)) |
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61 // Load value, read/write |
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62 #define CYG_DEVICE_TIMER_CURRENT \ |
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63 ((volatile cyg_uint32 *) (CYG_DEVICE_TIMER_BASE + 0x04)) |
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64 // Current value, read |
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65 #define CYG_DEVICE_TIMER_CONTROL \ |
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66 ((volatile cyg_uint32 *) (CYG_DEVICE_TIMER_BASE + 0x08)) |
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67 // Control register, read/write |
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68 #define CYG_DEVICE_TIMER_CLEAR \ |
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69 ((volatile cyg_uint32 *) (CYG_DEVICE_TIMER_BASE + 0x0C)) |
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70 // Clears interrrupt, write only |
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71 |
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72 // Clock/timer control register |
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73 #define CTL_ENABLE 0x80 // Bit 7: 1 - counter enabled |
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74 #define CTL_DISABLE 0x00 // 0 - counter disabled |
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75 #define CTL_FREERUN 0x00 // Bit 6: 0 - free running counter |
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76 #define CTL_PERIODIC 0x40 // 1 - periodic timer mode |
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77 #define CTL_SCALE_1 0x00 // Bits 32: 00 - Scale clock by 1 |
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78 #define CTL_SCALE_16 0x04 // 01 - Scale by 16 |
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79 #define CTL_SCALE_256 0x08 // 10 - Scale by 256 |
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80 // 12.8us/tick |
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81 |
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82 // Interrupt controller registers |
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83 #define CYG_DEVICE_ICTL_BASE 0x0A000000 |
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84 #define CYG_DEVICE_IRQ_Status \ |
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85 ((volatile cyg_uint32 *) (CYG_DEVICE_ICTL_BASE + 0x00)) |
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86 // Current status, read only |
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87 #define CYG_DEVICE_IRQ_Enable \ |
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88 ((volatile cyg_uint32 *) (CYG_DEVICE_ICTL_BASE + 0x08)) |
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89 // Enable status, read only |
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90 #define CYG_DEVICE_IRQ_EnableSet \ |
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91 ((volatile cyg_uint32 *) (CYG_DEVICE_ICTL_BASE + 0x08)) |
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92 // Enable (1's only), write only |
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93 #define CYG_DEVICE_IRQ_EnableClear \ |
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94 ((volatile cyg_uint32 *) (CYG_DEVICE_ICTL_BASE + 0x0C)) |
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95 // Disable (1's only), write only |
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96 |
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97 static cyg_uint32 _period; |
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98 |
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99 void hal_clock_initialize(cyg_uint32 period) |
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100 { |
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101 //diag_init(); diag_printf("%s(%d)\n", __PRETTY_FUNCTION__, period); |
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102 //diag_printf("psr = %x\n", psr()); |
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103 HAL_WRITE_UINT32(CYG_DEVICE_TIMER_CONTROL, CTL_DISABLE); // Turn off |
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104 HAL_WRITE_UINT32(CYG_DEVICE_TIMER_LOAD, period); |
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105 HAL_WRITE_UINT32(CYG_DEVICE_TIMER_CONTROL, |
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106 CTL_ENABLE | CTL_PERIODIC | CTL_SCALE_16); |
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107 _period = period; |
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108 } |
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109 |
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110 void hal_clock_reset(cyg_uint32 vector, cyg_uint32 period) |
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111 { |
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112 //diag_init(); diag_printf("%s\n", __PRETTY_FUNCTION__); |
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113 HAL_WRITE_UINT32(CYG_DEVICE_TIMER_CLEAR, 0); |
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114 _period = period; |
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115 } |
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116 |
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117 void hal_clock_read(cyg_uint32 *pvalue) |
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118 { |
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119 cyg_uint32 value; |
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120 // diag_init(); diag_printf("%s\n", __PRETTY_FUNCTION__); |
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121 HAL_READ_UINT32(CYG_DEVICE_TIMER_CURRENT, value); |
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122 value &= 0xFFFF; |
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123 *pvalue = _period - (value & 0xFFFF); // Note: counter is only 16 bits |
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124 // and decreases |
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125 } |
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126 |
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127 void hal_hardware_init(void) |
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128 { |
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129 // Any hardware/platform initialization that needs to be done. |
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130 HAL_WRITE_UINT32(CYG_DEVICE_IRQ_EnableClear, 0xFFFF); // Clear all |
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131 // interrupt sources |
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132 } |
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133 |
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134 // |
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135 // This routine is called to respond to a hardware interrupt (IRQ). It |
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136 // should interrogate the hardware and return the IRQ vector number. |
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137 |
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138 int hal_IRQ_handler(void) |
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139 { |
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140 // Do hardware-level IRQ handling |
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141 int irq_status, vector; |
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142 HAL_READ_UINT32(CYG_DEVICE_IRQ_Status, irq_status); |
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143 //diag_init(); diag_printf("%s, status: %x\n", __PRETTY_FUNCTION__, irq_status); |
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144 for (vector = 1; vector < 16; vector++) { |
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145 if (irq_status & (1<<vector)) return vector; |
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146 } |
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147 return CYGNUM_HAL_INTERRUPT_unused; // This shouldn't happen! |
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148 } |
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149 |
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150 // |
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151 // Interrupt control |
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152 // |
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153 |
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154 void hal_interrupt_mask(int vector) |
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155 { |
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156 //diag_init(); diag_printf("%s(%d)\n", __PRETTY_FUNCTION__, vector); |
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157 HAL_WRITE_UINT32(CYG_DEVICE_IRQ_EnableClear, 1<<vector); |
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158 } |
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159 |
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160 #if 0 |
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161 void hal_interrupt_status(void) |
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162 { |
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163 int irq_status, irq_enable, timer_status, timer_value, timer_load; |
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164 HAL_READ_UINT32(CYG_DEVICE_IRQ_Status, irq_status); |
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165 HAL_READ_UINT32(CYG_DEVICE_IRQ_Enable, irq_enable); |
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166 HAL_READ_UINT32(CYG_DEVICE_TIMER_LOAD, timer_load); |
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167 HAL_READ_UINT32(CYG_DEVICE_TIMER_CURRENT, timer_value); |
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168 HAL_READ_UINT32(CYG_DEVICE_TIMER_CONTROL, timer_status); |
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169 diag_printf("Interrupt: IRQ: %x.%x, TIMER: %x.%x.%x, psr: %x\n", |
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170 irq_status, irq_enable, timer_status, timer_value, |
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171 timer_load, psr()); |
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172 } |
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173 #endif |
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174 |
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175 void hal_interrupt_unmask(int vector) |
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176 { |
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177 //diag_init(); diag_printf("%s(%d)\n", __PRETTY_FUNCTION__, vector); |
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178 HAL_WRITE_UINT32(CYG_DEVICE_IRQ_EnableSet, 1<<vector); |
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179 } |
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180 |
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181 void hal_interrupt_acknowledge(int vector) |
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182 { |
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183 //diag_init(); diag_printf("%s(%d)\n", __PRETTY_FUNCTION__, vector); |
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184 } |
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185 |
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186 void hal_interrupt_configure(int vector, int level, int up) |
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187 { |
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188 //diag_init(); diag_printf("%s(%d,%d,%d)\n", __PRETTY_FUNCTION__, vector, level, up); |
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189 } |
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190 |
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191 void hal_interrupt_set_level(int vector, int level) |
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192 { |
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193 //diag_init(); diag_printf("%s(%d,%d)\n", __PRETTY_FUNCTION__, vector, level); |
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194 } |
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195 |
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196 void hal_show_IRQ(int vector, int data, int handler) |
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197 { |
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198 // diag_printf("IRQ - vector: %x, data: %x, handler: %x\n", vector, data, handler); |
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199 } |
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200 |
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201 /*---------------------------------------------------------------------------*/ |
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202 /* End of hal_misc.c */ |
