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Merge from eCos master repository on 2002-05-20-20:11:54-BST
author jlarmour
date Mon, 20 May 2002 22:19:26 +0000
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children d2c90368aeef
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1 #ifndef CYGONCE_VAR_CACHE_H
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2 #define CYGONCE_VAR_CACHE_H
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3 //=============================================================================
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4 //
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5 // var_cache.h
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6 //
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7 // Variant HAL cache control API
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8 //
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9 //=============================================================================
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10 //####ECOSGPLCOPYRIGHTBEGIN####
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11 // -------------------------------------------
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12 // This file is part of eCos, the Embedded Configurable Operating System.
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13 // Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
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14 //
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15 // eCos is free software; you can redistribute it and/or modify it under
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16 // the terms of the GNU General Public License as published by the Free
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17 // Software Foundation; either version 2 or (at your option) any later version.
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18 //
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19 // eCos is distributed in the hope that it will be useful, but WITHOUT ANY
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20 // WARRANTY; without even the implied warranty of MERCHANTABILITY or
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21 // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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22 // for more details.
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23 //
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24 // You should have received a copy of the GNU General Public License along
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25 // with eCos; if not, write to the Free Software Foundation, Inc.,
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26 // 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
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27 //
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28 // As a special exception, if other files instantiate templates or use macros
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29 // or inline functions from this file, or you compile this file and link it
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30 // with other works to produce a work based on this file, this file does not
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31 // by itself cause the resulting work to be covered by the GNU General Public
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32 // License. However the source code for this file must still be made available
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33 // in accordance with section (3) of the GNU General Public License.
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34 //
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35 // This exception does not invalidate any other reasons why a work based on
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36 // this file might be covered by the GNU General Public License.
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37 //
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38 // Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
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39 // at http://sources.redhat.com/ecos/ecos-license
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40 // -------------------------------------------
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41 //####ECOSGPLCOPYRIGHTEND####
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42 //=============================================================================
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43 //#####DESCRIPTIONBEGIN####
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44 //
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45 // Author(s): Bob Koninckx
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46 // Contributors:Bob Koninckx
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47 // Date: 2001-12-11
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48 // Purpose: Variant cache control API
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49 // Description: The macros defined here provide the HAL APIs for handling
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50 // cache control operations on the MPC8xx variant CPUs.
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51 // Usage: Is included via the architecture cache header:
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52 // #include <cyg/hal/hal_cache.h>
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53 // ...
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54 //
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55 //####DESCRIPTIONEND####
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56 //
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57 //=============================================================================
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58
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59 #include <pkgconf/hal.h>
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60 #include <cyg/infra/cyg_type.h>
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61
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62 #include <cyg/hal/ppc_regs.h>
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63
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64 #include <cyg/hal/plf_cache.h>
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65
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66
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67 //-----------------------------------------------------------------------------
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68 // MPC5xx has no data or instruction cache. This is going to be a relatively
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69 // simple file
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70
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71 //-----------------------------------------------------------------------------
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72 // Global control of data cache
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73
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74 // Enable the data cache
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75 #define HAL_DCACHE_ENABLE() \
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76 CYG_MACRO_START \
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77 CYG_MACRO_END
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78
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79 // Disable the data cache
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80 #define HAL_DCACHE_DISABLE() \
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81 CYG_MACRO_START \
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82 CYG_MACRO_END
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83
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84 // Invalidate the entire cache
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85 #define HAL_DCACHE_INVALIDATE_ALL() \
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86 CYG_MACRO_START \
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87 CYG_MACRO_END
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88
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89 // Synchronize the contents of the cache with memory.
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90 #define HAL_DCACHE_SYNC() \
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91 CYG_MACRO_START \
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92 CYG_MACRO_END
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93
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94 // Query the state of the data cache
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95 #define HAL_DCACHE_IS_ENABLED(_state_) \
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96 CYG_MACRO_START \
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97 _state_ = 0; \
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98 CYG_MACRO_END
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99
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100 // Load the contents of the given address range into the data cache
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101 // and then lock the cache so that it stays there.
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102
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103 //#define HAL_DCACHE_LOCK(_base_, _size_)
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104
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105 // Undo a previous lock operation
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106 //#define HAL_DCACHE_UNLOCK(_base_, _size_)
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107
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108 // Unlock entire cache
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109 //#define HAL_DCACHE_UNLOCK_ALL()
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110
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111
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112 //-----------------------------------------------------------------------------
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113 // Data cache line control
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114
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115 // Write dirty cache lines to memory and invalidate the cache entries
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116 // for the given address range.
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117 //#define HAL_DCACHE_FLUSH( _base_ , _size_ )
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118
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119 // Invalidate cache lines in the given range without writing to memory.
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120 //#define HAL_DCACHE_INVALIDATE( _base_ , _size_ )
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121
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122 // Write dirty cache lines to memory for the given address range.
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123 //#define HAL_DCACHE_STORE( _base_ , _size_ )
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124
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125 // Preread the given range into the cache with the intention of reading
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126 // from it later.
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127 //#define HAL_DCACHE_READ_HINT( _base_ , _size_ )
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128
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129 // Preread the given range into the cache with the intention of writing
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130 // to it later.
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131 //#define HAL_DCACHE_WRITE_HINT( _base_ , _size_ )
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132
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133 // Allocate and zero the cache lines associated with the given range.
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134 //#define HAL_DCACHE_ZERO( _base_ , _size_ )
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135
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136 //-----------------------------------------------------------------------------
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137 // Global control of Instruction cache
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138
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139 // Enable the instruction cache
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140 #define HAL_ICACHE_ENABLE() \
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141 CYG_MACRO_START \
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142 CYG_MACRO_END
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143
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144 // Disable the instruction cache
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145 #define HAL_ICACHE_DISABLE() \
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146 CYG_MACRO_START \
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147 CYG_MACRO_END
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148
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149 // Invalidate the entire cache
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150 #define HAL_ICACHE_INVALIDATE_ALL() \
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151 CYG_MACRO_START \
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152 CYG_MACRO_END
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153
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154 // Synchronize the contents of the cache with memory.
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155 #define HAL_ICACHE_SYNC() \
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156 CYG_MACRO_START \
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157 CYG_MACRO_END
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158
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159 // Query the state of the instruction cache
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160 #define HAL_ICACHE_IS_ENABLED(_state_) \
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161 CYG_MACRO_START \
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162 _state_ = 0; \
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163 CYG_MACRO_END
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164
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165 // Load the contents of the given address range into the instruction cache
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166 // and then lock the cache so that it stays there.
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167 //#define HAL_ICACHE_LOCK(_base_, _size_)
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168
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169 // Undo a previous lock operation
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170 //#define HAL_ICACHE_UNLOCK(_base_, _size_)
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171
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172 // Unlock entire cache
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173 //#define HAL_ICACHE_UNLOCK_ALL()
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174
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175 //-----------------------------------------------------------------------------
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176 #endif // ifndef CYGONCE_VAR_CACHE_H
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177 // End of var_cache.h