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annotate packages/hal/sh/arch/current/include/hal_var_sp.inc @ 208:e0c0827131d1 ecos

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Merge from eCos master repository on 2002-05-20-20:11:54-BST
author jlarmour
date Mon, 20 May 2002 22:19:26 +0000
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children d2c90368aeef
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1 ##==========================================================================
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2 ##
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3 ## hal_var_sp.inc
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4 ##
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5 ## SH support code for variants using stack at exception entry
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6 ##
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7 ##==========================================================================
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8 #####ECOSGPLCOPYRIGHTBEGIN####
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9 # -------------------------------------------
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10 # This file is part of eCos, the Embedded Configurable Operating System.
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11 # Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
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12 #
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13 # eCos is free software; you can redistribute it and/or modify it under
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14 # the terms of the GNU General Public License as published by the Free
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15 # Software Foundation; either version 2 or (at your option) any later version.
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16 #
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17 # eCos is distributed in the hope that it will be useful, but WITHOUT ANY
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18 # WARRANTY; without even the implied warranty of MERCHANTABILITY or
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19 # FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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20 # for more details.
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21 #
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22 # You should have received a copy of the GNU General Public License along
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23 # with eCos; if not, write to the Free Software Foundation, Inc.,
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24 # 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
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25 #
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26 # As a special exception, if other files instantiate templates or use macros
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27 # or inline functions from this file, or you compile this file and link it
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28 # with other works to produce a work based on this file, this file does not
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29 # by itself cause the resulting work to be covered by the GNU General Public
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30 # License. However the source code for this file must still be made available
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31 # in accordance with section (3) of the GNU General Public License.
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32 #
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33 # This exception does not invalidate any other reasons why a work based on
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34 # this file might be covered by the GNU General Public License.
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35 #
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36 # Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
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37 # at http://sources.redhat.com/ecos/ecos-license
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38 # -------------------------------------------
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39 #####ECOSGPLCOPYRIGHTEND####
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40 ##==========================================================================
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41 #######DESCRIPTIONBEGIN####
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42 ##
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43 ## Author(s): jskov
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44 ## Contributors: jskov
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45 ## Date: 2002-01-11
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46 ## Purpose: SH support code for variants using stack at exception entry
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47 ##
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48 ######DESCRIPTIONEND####
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49 ##
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50 ##==========================================================================
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51
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52 #include <cyg/hal/sh2_offsets.inc>
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53 #include <cyg/hal/hal_intr.h>
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54
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55 ## This is the address of the reset entry
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56
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57 #if defined(CYG_HAL_STARTUP_RAM) || defined(CYGARC_SH_MOD_CAC_NO_WINDOWS)
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58 // No translation if RAM startup, or if the variant does not
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59 // have cached/non-cached windows in the address space.
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60 # define _RESET_ENTRY CYG_LABEL_DEFN(_reset_platform)
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61 #elif defined(CYG_HAL_STARTUP_ROMRAM)
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62 // Uncached "shadow" address but adjusted for VMA/LMA differences
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63 # define _RESET_ENTRY __reset_platform+0x20000000-CYGMEM_REGION_ram+CYGMEM_REGION_rom
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64 #else
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65 // Uncached "shadow" address
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66 # define _RESET_ENTRY CYG_LABEL_DEFN(_reset_platform)+0x20000000
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67 #endif
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68
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69 #if !defined(CYG_HAL_STARTUP_RAM) || !defined(CYGSEM_HAL_USE_ROM_MONITOR)
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70
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71 ## This is the table of HW_EXC_ENTRY pointers fetched from by the CPU
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72 ## on an exception. They point to pre-VSR handlers (below) which prep
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73 ## R0 with the vector number (which, AFAICT, there''s no other way
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74 ## to find) before calling the VSR.
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75 ## Note that this takes up a massive 4KiB so it should only be included
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76 ## when really needed (that is, when not relying on RedBoot to provide
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77 ## it).
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78
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79 .align 2
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80 FUNC_START(_HW_EXC_ENTRY_TABLE)
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81 # Power-on reset entry address and stack
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82 .long _RESET_ENTRY
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83 .long 0
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84 # Manual reset entry address and stack
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85 .long _RESET_ENTRY
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86 .long 0
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87 # All the other vectors
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88 .set vecno, 0
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89 .rept (256-4)
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90 .long $vectors_code+(vecno)*16
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91 .set vecno, vecno+1
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92 .endr
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93
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94 ## The piece of code pointed to by the HW_EXC table. Each vector
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95 ## has such a piece of code, which saves R0 on the stack, fetches
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96 ## the VSR pointer and loads the vector number into R0.
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97 ##
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98 ## Note the three variants:
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99 ## exception_vector: maps the HW_EXC vector to the same eCos HAL_VECTOR
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100 ## exception_vector_trap: maps the HW_EXC vector to the eCos HAL_VECTOR_TRAP
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101 ## exception_vector_int: maps the HW_EXC vector to the eCos HAL_VECTOR_INTERRUPT
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102 ##
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103 ## With these we translate the SH2 vector style exceptions to something more
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104 ## like the SH3/SH4 style:
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105 ##
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106 ## HW vectors eCos vectors
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107 ## 00-31 0-31 Various exceptions
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108 ## 32-63 32 TRAP
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109 ## 64-255 33 Interrupt
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110 ## 34-63 Free for application
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111 ##
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112 ## This allows the VSR table to be reduced to 1/4 of the size, and eases
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113 ## code sharing with the SH3/SH4 variants without any real loss of power.
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114 ##
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115 .macro exception_vector vec
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116 mov.l r0,@-r15
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117 mov.l 1f,r0
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118 mov.l @r0,r0
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119 jmp @r0
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120 mov #\vec,r0
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121 .align 2
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122 1: .long CYG_LABEL_DEFN(hal_vsr_table)+4*\vec
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123 .endm
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124
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125 .macro exception_vector_trap vec
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126 mov.l r0,@-r15
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127 mov.l 1f,r0
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128 mov.l @r0,r0
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129 jmp @r0
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130 mov #\vec,r0
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131 .align 2
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132 1: .long CYG_LABEL_DEFN(hal_vsr_table)+4*CYGNUM_HAL_VECTOR_TRAP
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133 .endm
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134
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135 # The comment argument is not used for anything. It's just there
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136 # to provide callers a slot for comments (which is not otherwise
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137 # possible when doing multiple invocations on the same line).
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138 .macro exception_vector_int vec,comment
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139 mov.l r0,@-r15
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140 mov.l 1f,r0
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141 mov.l @r0,r0
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142 jmp @r0
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143 mov #\vec,r0
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144 .align 2
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145 1: .long CYG_LABEL_DEFN(hal_vsr_table)+4*CYGNUM_HAL_VECTOR_INTERRUPT
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146 .endm
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147
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148 # And their entry points
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149 $vectors_code:
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150 exception_vector 4 // general illegal instr
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151 exception_vector 5 // reserved
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152 exception_vector 6 // slot illegal instr
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153 exception_vector 7 // reserved
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154 exception_vector 8 // reserved
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155 exception_vector 9 // CPU address error
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156 exception_vector 10 // DMA address error
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157 exception_vector_int CYGNUM_HAL_INTERRUPT_NMI // NMI
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158 exception_vector 12 // User Break
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159 exception_vector 13 // H-UDI
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160 .set vecno, 14
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161 .rept (32-14)
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162 exception_vector vecno // reserved
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163 .set vecno, vecno+1
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164 .endr
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165 .set vecno, 32
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166 .rept (64-32)
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167 exception_vector_trap vecno // Trap
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168 .set vecno, vecno+1
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169 .endr
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170
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171 #ifdef CYGHWR_HAL_SH_SH2_CUSTOM_INTERRUPT_LAYOUT
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172 # Some variants may have a very sparsely populated
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173 # vector table (7044 is an example) which results
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174 # in many unused entries in various interrupt tables.
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175 # To reduce bloat, these may define a custom
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176 # layout of these interrupt decoders - the code
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177 # is to be found in var_intr.h since it's very
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178 # tightly coupled with the interrupt vectors.
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179 CYGHWR_HAL_SH_SH2_CUSTOM_INTERRUPT_LAYOUT
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180 #else
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181 # Note that there''s an entry for vector 0 (NMI) here again
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182 # to avoid having to make hal_interrupt_set_vectors()
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183 # adjust for this off-by-one discrepancy.
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184 .set vecno, CYGNUM_HAL_INTERRUPT_NMI
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185 .rept (256-64)
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186 exception_vector_int vecno // interrupts
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187 .set vecno, vecno+1
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188 .endr
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189 #endif // CYGHWR_HAL_SH_SH2_CUSTOM_INTERRUPT_LAYOUT
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190
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191 #endif // !defined(CYG_HAL_STARTUP_RAM) || !defined(CYGSEM_HAL_USE_ROM_MONITOR)
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192
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193 ## For RAM startups, provide a convenient jump to the application start
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194 ## at the very start of the image.
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195 FUNC_START(_reset)
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196 mov.l 1f,r0
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197 jmp @r0
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198 nop
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199 .align 2
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200 1: .long _RESET_ENTRY
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201
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202
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203 ##-----------------------------------------------------------------------------
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204 ## Macros for saving/restoring register state on an exception. These
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205 ## are generic for all variants, so be careful to not make assumptions.
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206
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207 ## r15 is location stored to/loaded from
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208 ## r0 is the available scratch register
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209
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210 ## At exit:
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211 ## r7 is the vector #
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212 ## all other registers (except sp) are available
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213
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214 ## Furthermore, stack content at this point is
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215 #-- original SP address
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216 # pre-exception SR
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217 # pre-exception PC
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218 # pre-exception r0
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219 #-- present SP address
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220
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221 .macro hal_cpu_save_regs
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222 mov.l r0,@-sp ! vector number
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223 #ifdef CYGDBG_HAL_COMMON_INTERRUPTS_SAVE_MINIMUM_CONTEXT
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224 add #-8,sp ! Space for gbr, and vbr
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225 #else
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226 stc gbr,r0 ! GBR
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227 mov.l r0,@-sp
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228 stc vbr,r0 ! VBR
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229 mov.l r0,@-sp
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230 #endif
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231
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232 add #-8,sp ! Space for entry PC and SR
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233
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234 #if 0 // FIXME
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235 stc.l re,@-sp ! RE
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236 stc.l rs,@-sp ! RS
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237 stc.l mod,@-sp ! MOD
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238 #endif
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239 sts.l pr,@-sp ! PR
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240 sts.l mach,@-sp ! mach
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241 sts.l macl,@-sp ! macl
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242
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243 add #-4,sp ! Space for entry sp
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244 mov.l r14,@-sp ! r14-r0
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245 mov.l r13,@-sp
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246 mov.l r12,@-sp
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247 mov.l r11,@-sp
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248 mov.l r10,@-sp
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249 mov.l r9,@-sp
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250 mov.l r8,@-sp
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251 mov.l r7,@-sp
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252 mov.l r6,@-sp
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253 mov.l r5,@-sp
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254 mov.l r4,@-sp
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255 mov.l r3,@-sp
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256 mov.l r2,@-sp
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257 mov.l r1,@-sp
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258 add #-4,sp ! space for r0
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259
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260 ! Compute location of pre-exception r0 and move
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261 ! data from above structure into the structure
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262 mov sp,r1
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263 add #CYGARC_SH_EXCEPTION_SIZE,r1
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264 mov.l @r1+,r0 ! pre-exception R0
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265 mov.l r0,@(CYGARC_SHREG_REGS,sp)
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266 mov.l @r1+,r2 ! pre-exception PC
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267 mov #CYGARC_SHREG_PC,r0
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268 mov.l r2,@(r0,sp)
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269 mov.l @r1+,r2 ! pre-exception SR
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270 mov #CYGARC_SHREG_SR,r0
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271 mov.l r2,@(r0,sp)
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272 mov #CYGARC_SHREG_SP,r0
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273 mov.l r1,@(r0,sp) ! pre-exception SP
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274 ! Load up the vector number
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275 mov #CYGARC_SHREG_EVENT,r0
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276 mov.l @(r0,sp),r7
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277 .endm
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278
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279 .macro hal_exception_entry_extras
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280 # Disable interrupts before anything else
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281 mov.l 1f,r0
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282 ldc r0,sr
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283 bra 2f
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284 nop
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285 .align 2
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286 1: .long CYG_SR
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287 2:
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288 .endm
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289
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290 # No additional magic needed. hal_cpu_save_regs does it all.
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291 .macro hal_interrupt_entry_extras
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292 .endm
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293
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294 #---------------------------------------------------------------------------
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295 ## Restore registers after exception:
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296 ## At entry:
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297 ## r15 is location to be loaded from
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298 ## all other registers (except sp) are available
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299
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300 ## At exit:
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301 ## Returns to interrupted code
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302
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303 .macro hal_cpu_restore_regs_return
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304 ! Disable interrupts during the restore operation
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305 mov.l 1f,r1
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306 ldc r1,sr
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307
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308 ! Move R0/PC/SR values from register structure onto the stack where
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309 ! they''ll be popped from on return. Note that this is the SP as
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310 ! set in the register frame! (otherwise GDB would be unable to change
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311 ! SP).
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312 mov.l @(CYGARC_SHREG_SP,sp),r0
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313 mov r0,r1
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314 add #-12,r1
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315 mov.l @(CYGARC_SHREG_REGS,sp),r0
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316 mov.l r0,@r1 ! pre-exception R0
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317 mov #CYGARC_SHREG_PC,r0
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318 mov.l @(r0,sp),r2
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319 mov.l r2,@(4,r1) ! pre-exception PC
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320 mov #CYGARC_SHREG_SR,r0
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321 mov.l @(r0,sp),r2
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322 mov.l r2,@(8,r1) ! pre-exception SR
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323
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324 ! Load up registers
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325 add #4,sp ! skip r0
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326 mov.l @sp+,r1
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327 mov.l @sp+,r2
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328 mov.l @sp+,r3
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329 mov.l @sp+,r4
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330 mov.l @sp+,r5
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331 mov.l @sp+,r6
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332 mov.l @sp+,r7
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333 mov.l @sp+,r8
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334 mov.l @sp+,r9
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335 mov.l @sp+,r10
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336 mov.l @sp+,r11
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337 mov.l @sp+,r12
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338 mov.l @sp+,r13
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339 mov.l @sp+,r14
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340 add #4,sp ! skip SP
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341
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342 lds.l @sp+,macl ! macl
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343 lds.l @sp+,mach ! mach
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344 lds.l @sp+,pr ! PR
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345
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346 #if 0 // FIXME - also change SP adjustment below!
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347 ldc.l @sp+,re ! RE
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348 ldc.l @sp+,rs ! RS
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349 ldc.l @sp+,mod ! MOD
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350 #endif
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351 add #8,sp ! skip sr and pc
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352
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353 #ifndef CYGDBG_HAL_COMMON_INTERRUPTS_SAVE_MINIMUM_CONTEXT
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354 mov.l @sp+,r0
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355 ldc r0,vbr ! return VBR
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356 mov.l @sp+,r0
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357 ldc r0,gbr ! return GBR
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358 #else
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359 add #8,sp ! skip VBR+GBR
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360 #endif
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361
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362 add #-8*4,sp ! get to new SP
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363 mov.l @sp,sp
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364 add #-12,sp ! get to exception state + saved r0
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365
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366 mov.l @sp+,r0 ! pre-exception r0
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367 rte
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368 nop
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369 .align 2
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370 1: .long CYG_SR
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371 .endm
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372
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373 #---------------------------------------------------------------------------
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374 # Translate cause of exception to a vector number
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375 .macro hal_exception_translate
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376 .endm
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377
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378 #---------------------------------------------------------------------------
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379 # end of hal_var_sp.inc