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Fix FREESCALE_EDMA_NBYTES_MLOFFYES_MLOFF() so it works with negative offsets.
author vae
date Wed, 29 Apr 2015 23:31:48 +0000
parents 74dbf4c3f2e1
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
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1 <!-- {{{ Banner -->
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5 <!-- redboot_installing.sgml -->
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6 <!-- -->
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7 <!-- RedBoot Documentation -->
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8 <!-- -->
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12 <!-- Copyright (C) 1997, 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc. -->
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13 <!-- This material may be distributed only subject to the terms -->
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14 <!-- and conditions set forth in the Open Publication License, v1.0 -->
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15 <!-- or later (the latest version is presently available at -->
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30 <!-- FIXME:
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31 Need to make index terms consistent
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32 -->
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35 <chapter id="Installation-and-Testing">
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36 <title>Installation and Testing</title>
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37 <indexterm><primary>installing and testing RedBoot</primary></indexterm><indexterm>
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38 <primary>RedBoot</primary><secondary>installing and testing</secondary></indexterm>
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39
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40 <!-- *************************** AM3x ********************** -->
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41
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42 <?Pub _newpage>
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43 <sect1 id="asb2305">
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44 <title>AM3x/MN103E010 Matsushita MN103E010 (AM33/2.0) ASB2305 Board</title>
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45 <sect2>
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46 <title>Overview</title>
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47 <para>
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48 <indexterm>
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49 <primary>Matsushita MN103E010 (AM33/2.0) ASB2305 Board</primary>
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50 <secondary>installing and testing</secondary>
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51 </indexterm>
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52 <indexterm>
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53 <primary>installing and testing</primary>
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54 <secondary>Matsushita MN103E010 (AM33/2.0) ASB2305 Board</secondary>
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55 </indexterm>
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56 RedBoot supports the debug serial port and the built in ethernet port for communication and
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57 downloads. The default serial port settings are 115200,8,N,1 with RTS/CTS flow control. RedBoot can
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58 run from either flash, and can support flash management for either the boot PROM or the system
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59 flash regions.</para>
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60
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61 <para>The following RedBoot configurations are supported:
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62
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63 <informaltable frame="all">
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64 <tgroup cols="4" colsep="1" rowsep="1" align="left">
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65 <thead>
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66 <row>
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67 <entry>Configuration</entry>
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68 <entry>Mode</entry>
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69 <entry>Description</entry>
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70 <entry>File</entry>
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71 </row>
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72 </thead>
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73 <tbody>
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74 <row>
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75 <entry>PROM</entry>
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76 <entry>[ROM]</entry>
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77 <entry>RedBoot running from the boot PROM and able to
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78 access the system flash.</entry>
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79 <entry>redboot_ROM.ecm</entry>
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80 </row>
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81 <row>
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82 <entry>FLASH</entry>
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83 <entry>[ROM]</entry>
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84 <entry>RedBoot running from the system flash and able to
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85 access the boot PROM.</entry>
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86 <entry>redboot_FLASH.ecm</entry>
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87 </row>
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88 <row>
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89 <entry>RAM</entry>
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90 <entry>[RAM]</entry>
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91 <entry>RedBoot running from RAM and able to access the
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92 boot PROM.</entry>
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93 <entry>redboot_RAM.ecm</entry>
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94 </row>
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95 </tbody>
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96 </tgroup>
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97 </informaltable>
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98 </para>
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99 </sect2>
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100
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101 <sect2>
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102 <title>Initial Installation</title>
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103 <para>Unless a pre-programmed system flash module is available to be plugged into a new board,
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104 RedBoot must be installed with the aid of a JTAG interface unit. To achieve this, the RAM mode
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105 RedBoot must be loaded directly into RAM by JTAG and started, and then <emphasis>that</emphasis>
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106 must be used to store the ROM mode RedBoot into the boot PROM.</para>
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107 <para>These instructions assume that you have binary images of the RAM-based and boot PROM-based
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108 RedBoot images available.</para>
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109 <sect3>
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110 <title>Preparing to program the board</title>
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111 <para>If the board is to be programmed, whether via JTAG or RedBoot, some hardware settings need to
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112 be changed:</para>
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113 <itemizedlist>
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114 <listitem>
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115 <para>Jumper across ST18 on the board to allow write access to the boot PROM.</para>
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116 </listitem>
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117 <listitem>
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118 <para>Set DIP switch S1-3 to OFF to allow RedBoot to write to the system flash.</para>
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119 </listitem>
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120 <listitem>
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121 <para>Set the switch S5 (on the front of the board) to boot from whichever flash is
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122 <emphasis>not</emphasis> being programmed. Note that the RedBoot image cannot access the flash from
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123 which it is currently executing (it can only access the other flash).</para>
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124 </listitem>
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125 </itemizedlist>
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126 <para>
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127 The RedBoot binary image files should also be copied to the TFTP pickup area on the host providing
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128 TFTP services if that is how RedBoot should pick up the images it is going to program into the
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129 flash. Alternatively, the images can be passed by YMODEM over the serial link.
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130 </para>
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131 </sect3>
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132 <sect3>
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133 <title>Preparing to use the JTAG debugger</title>
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134 <para>The JTAG debugger will also need setting up:</para>
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135 <orderedlist>
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136 <listitem><para>Install the JTAG debugger software (WICE103E) on a PC running Windows (WinNT is
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137 probably the best choice for this) in &ldquo;C:/PanaX&rdquo;.</para>
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138 </listitem>
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139 <listitem><para>Install the Matsushita provided &ldquo;project&rdquo; into the
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140 &ldquo;C:/Panax/wice103e/prj&rdquo; directory.</para>
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141 </listitem>
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142 <listitem><para>Install the RedBoot image files into the &ldquo;C:/Panax/wice103e/prj&rdquo;
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143 directory under the names redboot.ram and redboot.prom.</para>
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144 </listitem>
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145 <listitem><para>Make sure the PC's BIOS has the parallel port set to full bidirectional
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146 mode.</para>
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147 </listitem>
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148 <listitem><para>Connect the JTAG debugger to the PC's parallel port.</para>
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149 </listitem>
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150 <listitem><para>Connect the JTAG debugger to the board.</para>
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151 </listitem>
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152 <listitem><para>Set the switch on the front of the board to boot from &ldquo;boot
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153 PROM&rdquo;.</para>
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154 </listitem>
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155 <listitem><para>Power up the JTAG debugger and then power up the board.</para>
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156 </listitem>
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157 <listitem><para>Connect the board's Debug Serial port to a computer by a null modem cable.</para>
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158 </listitem>
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159 <listitem><para>Start minicom or some other serial communication software and set for 115200 baud,
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160 1-N-8 with hardware (RTS/CTS) flow control.</para>
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161 </listitem>
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162 </orderedlist>
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163 </sect3>
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164 <sect3>
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165 <title>Loading the RAM-based RedBoot via JTAG</title>
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166 <para>To perform the first half of the operation, the following steps should be followed:</para>
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167 <orderedlist>
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168 <listitem><para>Start the JTAG debugger software.</para>
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169 </listitem>
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170 <listitem>
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171 <para>Run the following commands at the JTAG debugger's prompt to set up the MMU registers on the
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172 CPU.</para>
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173 <screen>
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174 <userinput>ed 0xc0002000, 0x12000580</userinput>
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175
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176 <userinput>ed 0xd8c00100, 0x8000fe01</userinput>
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177 <userinput>ed 0xd8c00200, 0x21111000</userinput>
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178 <userinput>ed 0xd8c00204, 0x00100200</userinput>
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179 <userinput>ed 0xd8c00208, 0x00000004</userinput>
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180
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181 <userinput>ed 0xd8c00110, 0x8400fe01</userinput>
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182 <userinput>ed 0xd8c00210, 0x21111000</userinput>
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183 <userinput>ed 0xd8c00214, 0x00100200</userinput>
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184 <userinput>ed 0xd8c00218, 0x00000004</userinput>
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185
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186 <userinput>ed 0xd8c00120, 0x8600ff81</userinput>
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187 <userinput>ed 0xd8c00220, 0x21111000</userinput>
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188 <userinput>ed 0xd8c00224, 0x00100200</userinput>
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189 <userinput>ed 0xd8c00228, 0x00000004</userinput>
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190
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191 <userinput>ed 0xd8c00130, 0x8680ff81</userinput>
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192 <userinput>ed 0xd8c00230, 0x21111000</userinput>
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193 <userinput>ed 0xd8c00234, 0x00100200</userinput>
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194 <userinput>ed 0xd8c00238, 0x00000004</userinput>
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195
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196 <userinput>ed 0xd8c00140, 0x9800f801</userinput>
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197 <userinput>ed 0xd8c00240, 0x00140000</userinput>
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198 <userinput>ed 0xd8c00244, 0x11011100</userinput>
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199 <userinput>ed 0xd8c00248, 0x01000001</userinput>
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200
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201 <userinput>ed 0xda000000, 0x55561645</userinput>
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202 <userinput>ed 0xda000004, 0x000003c0</userinput>
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203 <userinput>ed 0xda000008, 0x9000fe01</userinput>
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204 <userinput>ed 0xda00000c, 0x9200fe01</userinput>
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205 <userinput>ed 0xda000000, 0xa89b0654</userinput>
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206 </screen>
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207 </listitem>
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208 <listitem>
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209 <para>Run the following commands at the JTAG debugger's prompt to tell it what regions of the CPU's
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210 address space it can access:</para>
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211 <screen>
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212 <userinput>ex 0x80000000,0x81ffffff,/mexram</userinput>
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213 <userinput>ex 0x84000000,0x85ffffff,/mexram</userinput>
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214 <userinput>ex 0x86000000,0x867fffff,/mexram</userinput>
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215 <userinput>ex 0x86800000,0x87ffffff,/mexram</userinput>
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216 <userinput>ex 0x8c000000,0x8cffffff,/mexram</userinput>
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217 <userinput>ex 0x90000000,0x93ffffff,/mexram</userinput>
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218 </screen>
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219 </listitem>
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220 <listitem><para>Instruct the debugger to load the RAM RedBoot image into RAM:</para>
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221 <screen>
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222 <userinput>_pc=90000000</userinput>
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223 <userinput>u_pc</userinput>
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224 <userinput>rd redboot.ram,90000000</userinput>
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225 </screen>
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226 </listitem>
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227 <listitem><para>Load the boot PROM RedBoot into RAM:</para>
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228 <screen>
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229 <userinput>rd redboot.prom,91020000</userinput>
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230 </screen>
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231 </listitem>
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232 <listitem><para>Start RedBoot in RAM:</para>
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233 <screen>
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234 <userinput>g</userinput>
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235 </screen>
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236 <para>Note that RedBoot may take some time to start up, as it will attempt to query a BOOTP or DHCP
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237 server to try and automatically get an IP address for the board. Note, however, that it should send
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238 a plus over the serial port immediately, and the 7-segment LEDs should display &ldquo;rh
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239 8&rdquo;.</para>
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240 </listitem>
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241 </orderedlist>
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242 </sect3>
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243 <sect3>
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244 <title>Loading the boot PROM-based RedBoot via the RAM mode RedBoot</title>
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245 <para>Once the RAM mode RedBoot is up and running, it can be communicated with by way of the serial
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246 port. Commands can now be entered directly to RedBoot for flashing the boot PROM.</para>
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247 <orderedlist>
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248 <listitem><para>Instruct RedBoot to initialise the boot PROM:</para>
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249 <screen>
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250 RedBoot> <userinput>fi init</userinput>
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251 </screen>
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252 </listitem>
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253 <listitem><para>Write the previously loaded redboot.prom image into the boot PROM:</para>
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254 <screen>
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255 RedBoot> <userinput>fi write -f 0x80000000 -b 0x91020000 -l 0x00020000</userinput>
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256 </screen>
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257 </listitem>
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258 <listitem><para>Check that RedBoot has written the image:</para>
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259 <screen>
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260 RedBoot> <userinput>dump -b 0x91020000</userinput>
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261 RedBoot> <userinput>dump -b 0x80000000</userinput>
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262 </screen>
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263 <para>Barring the difference in address, the two dumps should be the same.</para>
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264 </listitem>
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265 <listitem><para>Close the JTAG software and power-cycle the board. The RedBoot banners should be
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266 displayed again over the serial port, followed by the RedBoot prompt. The boot PROM-based RedBoot
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267 will now be running.</para>
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268 </listitem>
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269 <listitem><para>Power off the board and unjumper ST18 to write-protect the contents of the boot
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270 PROM. Then power the board back up.</para>
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271 </listitem>
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272 <listitem><para>Run the following command to initialise the system flash:</para>
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273 <screen>
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274 RedBoot> <userinput>fi init</userinput>
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275 </screen>
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276 <para>Then program the system flash based RedBoot into the system flash:</para>
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277 <screen>
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278 RedBoot> <userinput>load -r -b %{FREEMEMLO} redboot_FLASH.bin</userinput>
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279 RedBoot> <userinput>fi write -f 0x84000000 -b %{FREEMEMLO} -l 0x00020000</userinput>
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280 </screen>
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281 <note>
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282 <title>NOTE</title>
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283 <para>RedBoot arranges the flashes on booting such that they always appear at the same addresses,
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284 no matter which one was booted from.</para>
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285 </note>
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286 </listitem>
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287 <listitem>
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288 <para>A similar sequence of commands can be used to program the boot PROM when RedBoot has been
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289 booted from an image stored in the system flash.
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290 </para>
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291 <screen>
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292 RedBoot> <userinput>load -r -b %{FREEMEMLO} /tftpboot/redboot_ROM.bin</userinput>
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293 RedBoot> <userinput>fi write -f 0x80000000 -b %{FREEMEMLO} -l 0x00020000</userinput>
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294 </screen>
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295 <para>See <xref linkend="Persistent-State-Flash"> for details on configuring the RedBoot in
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296 general, and also <xref linkend="Flash-Image-System"> for more details on programming the system
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297 flash.</para>
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298 </listitem>
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299 </orderedlist>
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300 </sect3>
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301 </sect2>
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302 <sect2>
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303 <title>Additional Commands</title>
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304 <para>The <command>exec</command> command which allows the loading and execution of
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305 Linux kernels, is supported for this architecture (see <xref linkend="executing-programs">). The
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306 <command>exec</command> parameters used for ASB2305 board are:</para>
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307 <variablelist>
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308 <varlistentry><term>
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309 -w <replaceable>&lt;time></replaceable></term>
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310 <listitem><para>Wait time in seconds before starting kernel</para></listitem></varlistentry>
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311 <varlistentry><term>
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312 -c <replaceable>"params"</replaceable></term>
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313 <listitem><para>Parameters passed to kernel</para></listitem></varlistentry>
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314 <varlistentry><term><replaceable>&lt;addr></replaceable></term>
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315 <listitem><para>Kernel entry point, defaulting to the entry point of the last image
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316 loaded</para></listitem></varlistentry>
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317 </variablelist>
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318 <para>The parameter string is stored in the on-chip memory at location 0x8C001000, and is prefixed
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319 by &ldquo;cmdline:&rdquo; if it was supplied.</para>
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320 </sect2>
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321 <sect2>
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322 <title>Memory Maps </title>
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323 <para>RedBoot sets up the following memory map on the ASB2305 board.</para>
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324 <note>
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325 <title>NOTE</title>
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326 <para>The regions mapped between 0x80000000-0x9FFFFFFF are cached by the CPU. However, all those
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327 regions can be accessed uncached by adding 0x20000000 to the address.</para>
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328 </note>
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329 <programlisting>
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330 Physical Address Range Description
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331 ----------------------- -----------
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332 0x80000000 - 0x9FFFFFFF Cached Region
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333 0x80000000 - 0x81FFFFFF Boot PROM
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334 0x84000000 - 0x85FFFFFF System Flash
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335 0x86000000 - 0x86007FFF 64Kbit Sys Config EEPROM
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336 0x86F90000 - 0x86F90003 4x 7-segment LEDs
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337 0x86FA0000 - 0x86FA0003 Software DIP Switches
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338 0x86FB0000 - 0x86FB001F PC16550 Debug Serial Port
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339 0x8C000000 - 0x8FFFFFFF On-Chip Memory (repeated 16Kb SRAM)
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340 0x90000000 - 0x93FFFFFF SDRAM
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341 0x98000000 - 0x9BFFFFFF Paged PCI Memory Space (64Mb)
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342 0x9C000000 - 0x9DFFFFFF PCI Local SRAM (32Mb)
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343 0x9E000000 - 0x9E03FFFF PCI I/O Space
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344 0x9E040000 - 0x9E0400FF AM33-PCI Bridge Registers
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345 0x9FFFFFF4 - 0x9FFFFFF7 PCI Memory Page Register
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346 0x9FFFFFF8 - 0x9FFFFFFF PCI Config Registers
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347 0xA0000000 - 0xBFFFFFFF Uncached Mirror Region
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348 0xC0000000 - 0xDFFFFFFF CPU Control Registers
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349 </programlisting>
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350 <para>The ASB2305 HAL makes use of the on-chip memory in the following way:</para>
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351 <programlisting>
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352 0x8C000000 - 0x8C0000FF hal_vsr_table
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353 0x8C000100 - 0x8C0001FF hal_virtual_vector_table
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354 0x8C001000 - Linux command line (RedBoot exec command)
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355 - 0x8C003FFF Emergency DoubleFault Exception Stack
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356 </programlisting>
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357 <para>Currently the CPU's interrupt table lies at the beginning of the RedBoot image, which must
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358 therefore be aligned to a 0xFF000000 mask.</para>
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359 </sect2>
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360 <sect2>
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361 <title>Rebuilding RedBoot</title>
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362
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363 <para>These shell variables provide the platform-specific information
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364 needed for building RedBoot according to the procedure described in
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365 <xref linkend="Rebuilding-Redboot">:
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366 <programlisting>
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367 export TARGET=asb2305
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368 export ARCH_DIR=mn10300
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369 export PLATFORM_DIR=asb2305
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370 </programlisting>
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371 </para>
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372
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373 <para>The names of configuration files are listed above with the
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374 description of the associated modes.</para>
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375
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376 </sect2>
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377 </sect1>
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378
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379 <!-- *************************** ARM ******************* -->
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380
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381 <?Pub _newpage>
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382 <sect1 id="e7t">
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383 <title>ARM/ARM7 ARM Evaluator7T</title>
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384 <sect2>
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385 <title>Overview</title>
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386 <para><indexterm><primary>ARM Evaluator7T</primary><secondary>installing and
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387 testing</secondary></indexterm><indexterm><primary>installing and testing
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388 </primary><secondary>ARM Evaluator7T</secondary></indexterm>RedBoot supports
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389 both serial ports for communication and downloads. The default serial port
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390 settings are 38400,8,N,1.</para>
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391
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392 <para>The following RedBoot configurations are supported:
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393
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394 <informaltable frame="all">
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395 <tgroup cols="4" colsep="1" rowsep="1" align="left">
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396 <thead>
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397 <row>
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398 <entry>Configuration</entry>
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399 <entry>Mode</entry>
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400 <entry>Description</entry>
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401 <entry>File</entry>
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402 </row>
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403 </thead>
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404 <tbody>
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405 <row>
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406 <entry>ROM</entry>
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407 <entry>[ROM]</entry>
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408 <entry>RedBoot running from flash address 0x20000, with
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409 ARM Boot Monitor in flash boot sector.</entry>
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410 <entry>redboot_ROMA.ecm</entry>
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411 </row>
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412 </tbody>
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413 </tgroup>
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414 </informaltable>
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415 </para>
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416
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417 </sect2>
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418 <sect2>
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419 <title>Initial Installation</title>
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420 <para>RedBoot is installed using the on-board boot environment. See the user
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421 manual for full details.</para>
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422 </sect2>
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423 <sect2>
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424 <title>Quick download instructions</title>
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425 <para>Here are quick start instructions for downloading the prebuilt Redboot
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426 image:</para>
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427 <itemizedlist>
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428 <listitem><para>Boot the board and press ENTER:</para>
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429 <screen>
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430
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431 ARM Evaluator7T Boot Monitor PreRelease 1.00
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432 Press ENTER within 2 seconds to stop autoboot
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433 Boot: </screen>
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434 </listitem>
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435 <listitem><para>Erase the part of the flash where RedBoot will get programmed:
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436 </para>
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437 <screen> Boot: <userinput>flasherase 01820000 10000</userinput></screen>
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438 </listitem>
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439 <listitem><para>Prepare to download the UU-encoded version of the RedBoot
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440 image:</para>
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441 <screen> Boot: <userinput>download 10000</userinput>
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442 Ready to download. Use 'transmit' option on terminal emulator to download file.
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443 </screen>
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444 </listitem>
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445 <listitem><para>Either use ASCII transmit option in the terminal emulator,
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446 or on Linux, simply cat the file to the serial port:<screen> $ <userinput>
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447 cat redboot.UU > /dev/ttyS0</userinput></screen>When complete, you should
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448 see:<screen> Loaded file redboot.bin at address 000100000, size = 41960
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449 Boot:</screen></para>
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450 </listitem>
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451 <listitem><para>Program the flash:<screen> Boot: <userinput>flashwrite 01820000 10000 10000
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452 </userinput></screen></para>
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453 </listitem>
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454 <listitem><para>And verify that the module is available:<screen> Boot: <userinput>
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455 rommodules</userinput>
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456 Header Base Limit
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457 018057c8 01800000 018059e7 BootStrapLoader v1.0 Apr 27 2000 10:33:58
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458 01828f24 01820000 0182a3e8 RedBoot Apr 5 2001</screen></para>
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459 </listitem>
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460 <listitem><para>Reboot the board and you should see the RedBoot banner.</para>
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461 </listitem>
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462 </itemizedlist>
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463 </sect2>
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464 <sect2>
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465 <title>Special RedBoot Commands </title>
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466 <para>None.</para>
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467 </sect2>
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468 <sect2>
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469 <title>Memory Maps </title>
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470 <para>RedBoot sets up the following memory map on the E7T board. <note><title>
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471 NOTE</title>
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472 <para>The virtual memory maps in this section use a C and B column to indicate
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473 whether or not the region is cached (C) or buffered (B).</para>
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474 </note> <programlisting>Physical Address Range C B Description
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475 ----------------------- - - -----------
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476 0x00000000 - 0x0007ffff Y N SDRAM
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477 0x03ff0000 - 0x03ffffff N N Microcontroller registers
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478 0x01820000 - 0x0187ffff N N System flash (mirrored)</programlisting></para>
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479 </sect2>
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480 <sect2>
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481 <title>Rebuilding RedBoot</title>
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482
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483 <para>These shell variables provide the platform-specific information
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484 needed for building RedBoot according to the procedure described in
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485 <xref linkend="Rebuilding-Redboot">:
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486 <programlisting>
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487 export TARGET=e7t
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488 export ARCH_DIR=arm
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489 export PLATFORM_DIR=e7t
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490 </programlisting>
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491 </para>
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492
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493 <para>The names of configuration files are listed above with the
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494 description of the associated modes.</para>
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495
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496 </sect2>
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497 </sect1>
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498
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499 <?Pub _newpage>
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500 <sect1 id="integrator">
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501 <title>ARM/ARM7+ARM9 ARM Integrator</title>
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502 <sect2>
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503 <title>Overview</title>
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504 <para><indexterm><primary>ARM Integrator</primary><secondary>installing and
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505 testing</secondary></indexterm><indexterm><primary>installing and testing
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506 </primary><secondary>ARM Integrator</secondary></indexterm>RedBoot supports
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507 both serial ports for communication and downloads. The default serial port
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508 settings are 38400,8,N,1.</para>
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509
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510 <para>The following RedBoot configurations are supported:
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511
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512 <informaltable frame="all">
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513 <tgroup cols="4" colsep="1" rowsep="1" align="left">
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514 <thead>
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515 <row>
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516 <entry>Configuration</entry>
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517 <entry>Mode</entry>
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518 <entry>Description</entry>
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519 <entry>File</entry>
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520 </row>
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521 </thead>
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522 <tbody>
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523 <row>
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524 <entry>ROM</entry>
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525 <entry>[ROM]</entry>
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526 <entry>RedBoot running from the board's flash boot
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527 sector.</entry>
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528 <entry>redboot_ROM.ecm</entry>
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529 </row>
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530 <row>
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531 <entry>RAM</entry>
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532 <entry>[RAM]</entry>
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533 <entry>RedBoot running from RAM with RedBoot in the
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534 flash boot sector.</entry>
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535 <entry>redboot_RAM.ecm</entry>
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536 </row>
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537 <row>
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538 <entry>ROMRAM</entry>
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539 <entry>[ROMRAM]</entry>
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540 <entry>RedBoot running from RAM, but contained in the
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541 board's flash boot sector.</entry>
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542 <entry>redboot_ROMRAM.ecm</entry>
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543 </row>
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544 </tbody>
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545 </tgroup>
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546 </informaltable>
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547 </para>
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548
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549 </sect2>
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550
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551 <sect2>
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552 <title>Initial Installation</title>
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553 <para>RedBoot is installed using the on-board bootPROM environment. See the user
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554 manual for full details.</para>
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555 </sect2>
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556 <sect2>
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557 <title>Quick download instructions</title>
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558 <para>Here are quick start instructions for downloading the prebuilt Redboot
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559 image:</para>
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560 <itemizedlist>
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561 <listitem><para>Set DIP switch S1[1] to the ON position and reset or
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562 power the board up. You will see the bootPROM startup message on
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563 serial port A (J14):</para>
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564 <screen>
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565 Initialising...
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566
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567
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568 ARM bootPROM [Version 1.3] Rebuilt on Jun 26 2001 at 22:04:10
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569 Running on a Integrator Evaluation Board
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570 Board Revision V1.0, ARM966E-S Processor
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571 Memory Size is 16MBytes, Flash Size is 32MBytes
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572 Copyright (c) ARM Limited 1999 - 2001. All rights reserved.
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573 Board designed by ARM Limited
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574 Hardware support provided at http://www.arm.com/
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575 For help on the available commands type ? or h
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576 boot Monitor >
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577 </screen>
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578 </listitem>
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579 <listitem>
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580 <para>Issue the FLASH ROM load command:
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581 </para>
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582 <screen>
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583 boot Monitor > <userinput>L</userinput>
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584 Load Motorola S-Records into flash
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585
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586 Deleting Image 0
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587
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588 The S-Record loader only accepts input on the serial port.
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589 Type Ctrl/C to exit loader.
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590 </screen>
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591 </listitem>
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592 <listitem><para>Either use the ASCII transmit option in the terminal emulator,
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593 or on Linux, simply cat the file to the serial port:
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594 </para>
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595 <screen>
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596 $ <userinput>cat redboot.srec > /dev/ttyS0</userinput>
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597 </screen>
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598 <para>
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599 When complete, type Ctrl-C and you should see something similar to:
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600 </para>
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601 <screen>
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602 ................................
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603 ................................
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604 ....................
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605 Downloaded 5,394 records in 81 seconds.
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606
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607 Overwritten block/s
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608 0
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609
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610 boot Monitor >
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611 </screen>
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612 </listitem>
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613 <listitem><para>Set DIP switch S1[1] to the OFF position and reboot
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614 the board and you should see the RedBoot banner.</para>
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615 </listitem>
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616 </itemizedlist>
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617 </sect2>
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618 <sect2>
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619 <title>Special RedBoot Commands </title>
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620 <para>None.</para>
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621 </sect2>
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622 <sect2>
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623 <title>Memory Maps </title>
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624 <para>RedBoot sets up the following memory map on the Integrator board. <note><title>
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625 NOTE</title>
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626 <para>The virtual memory maps in this section use a C and B column to indicate
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627 whether or not the region is cached (C) or buffered (B).</para>
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628 </note>
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629 <programlisting>
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630
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631 ARM7TDMI
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632 --------
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633
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634 Physical Address Range C B Description
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635 ----------------------- - - -----------
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636 0x00000000 - 0x0007ffff N N SSRAM
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637 0x00080000 - 0x0fffffff N N SDRAM (depends on part fitted)
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638 0x10000000 - 0x1fffffff N N System control and peripheral registers
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639 0x20000000 - 0x23ffffff N N Boot ROM (contains boot Monitor)
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640 0x24000000 - 0x27ffffff N N FLASH ROM (contains RedBoot)
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641 0x28000000 - 0x2bffffff N N SSRAM echo area
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642 0x40000000 - 0x5fffffff N N PCI Memory access windows
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643 0x60000000 - 0x60ffffff N N PCI IO access window
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644 0x61000000 - 0x61ffffff N N PCI config space window
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645 0x62000000 - 0x6200ffff N N PCI bridge register window
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646 0x80000000 - 0x8fffffff N N SDRAM echo area (used for PCI accesses)
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647
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648
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649 ARM966E
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650 -------
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651
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652 Physical Address Range C B Description
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653 ----------------------- - - -----------
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654 0x00000000 - 0x000fffff N N SSRAM
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655 0x00100000 - 0x0fffffff N N SDRAM (depends on part fitted)
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656 0x10000000 - 0x1fffffff N N System control and peripheral registers
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657 0x20000000 - 0x23ffffff N N Boot ROM (contains boot Monitor)
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658 0x24000000 - 0x27ffffff N N FLASH ROM (contains RedBoot)
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659 0x28000000 - 0x2bffffff N N SSRAM echo area
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660 0x40000000 - 0x5fffffff N N PCI Memory access windows
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661 0x60000000 - 0x60ffffff N N PCI IO access window
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662 0x61000000 - 0x61ffffff N N PCI config space window
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663 0x62000000 - 0x6200ffff N N PCI bridge register window
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664 0x80000000 - 0x8fffffff N N SDRAM echo area (used for PCI accesses)
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665
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666 </programlisting>
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667 </para>
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668 </sect2>
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669 <sect2>
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670 <title>Rebuilding RedBoot</title>
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671
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672 <para>These shell variables provide the platform-specific information
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673 needed for building RedBoot according to the procedure described in
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674 <xref linkend="Rebuilding-Redboot">:
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675 <programlisting>
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676 export TARGET=integrator
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677 export ARCH_DIR=arm
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678 export PLATFORM_DIR=integrator
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679 </programlisting>
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680 </para>
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681
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682 <para>The names of configuration files are listed above with the
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683 description of the associated modes.</para>
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684
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685 </sect2>
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686 </sect1>
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687
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688 <?Pub _newpage>
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689 <sect1 id="pid">
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690 <title>ARM/ARM7+ARM9 ARM PID Board and EPI Dev7+Dev9</title>
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691 <sect2>
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692 <title>Overview</title>
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693 <para><indexterm><primary>ARM ARM7 PID, Dev7 and Dev9</primary><secondary>
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694 installing and testing</secondary></indexterm><indexterm><primary>installing
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695 and testing</primary><secondary>ARM ARM7 PID, Dev7 and Dev9</secondary></indexterm>RedBoot
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696 uses either of the serial ports. The default serial port settings are 38400,8,N,1.
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697 Management of onboard flash is also supported.</para>
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698
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699 <para>The following RedBoot configurations are supported:
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700
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701 <informaltable frame="all">
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702 <tgroup cols="4" colsep="1" rowsep="1" align="left">
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703 <thead>
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704 <row>
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705 <entry>Configuration</entry>
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706 <entry>Mode</entry>
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707 <entry>Description</entry>
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708 <entry>File</entry>
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709 </row>
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710 </thead>
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711 <tbody>
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712 <row>
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713 <entry>ROM</entry>
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714 <entry>[ROM]</entry>
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715 <entry>RedBoot running from the board's flash boot
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716 sector.</entry>
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717 <entry>redboot_ROM.ecm</entry>
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718 </row>
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719 <row>
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720 <entry>RAM</entry>
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721 <entry>[RAM]</entry>
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722 <entry>RedBoot running from RAM with RedBoot in the
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723 flash boot sector.</entry>
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724 <entry>redboot_RAM.ecm</entry>
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725 </row>
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726 </tbody>
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727 </tgroup>
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728 </informaltable>
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729 </para>
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730 </sect2>
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731
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732 <sect2>
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733 <title>Initial Installation Method </title>
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734 <para>Device programmer is used to program socketed flash parts with ROM version
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735 of RedBoot. </para>
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736 <para>Alternatively, to install RedBoot on a target that already has eCos
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737 GDB stubs, download the RAM mode image of RedBoot and run it. Initialize the
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738 flash image directory: <command>fis init</command> Then
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739 download the ROM version of RedBoot and program it into flash: <screen>
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740 RedBoot> <userinput>load -b %{FREEMEMLO} -m ymodem</userinput>
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741 RedBoot> <userinput>fi cr RedBoot</userinput>
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742 </screen></para>
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743 </sect2>
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744 <sect2>
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745 <title>Special RedBoot Commands </title>
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746 <para>None.</para>
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747 </sect2>
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748 <sect2>
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749 <title>Memory Maps </title>
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750 <para>RedBoot sets up the following memory map on the PID board. <programlisting>
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751 Physical Address Range Description
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752 ----------------------- -----------
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753 0x00000000 - 0x0007ffff DRAM
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754 0x04000000 - 0x04080000 flash
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755 0x08000000 - 0x09ffffff ASB Expansion
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756 0x0a000000 - 0x0bffffff APB Reference Peripheral
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757 0x0c000000 - 0x0fffffff NISA Serial, Parallel and PC Card ports </programlisting></para>
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758 </sect2>
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759 <sect2>
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760 <title>Rebuilding RedBoot</title>
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761
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762 <para>These shell variables provide the platform-specific information
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763 needed for building RedBoot according to the procedure described in
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764 <xref linkend="Rebuilding-Redboot">:
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765 <programlisting>
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766 export TARGET=pid
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767 export ARCH_DIR=arm
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768 export PLATFORM_DIR=pid
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769 </programlisting>
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770 </para>
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771
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772 <para>The names of configuration files are listed above with the
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773 description of the associated modes.</para>
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774
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775 </sect2></sect1>
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776
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777 <?Pub _newpage>
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778 <sect1 id="at91">
1016
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779 <title>ARM/ARM7 Atmel AT91 Evaluation Boards (EBXX)</title>
211
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780 <sect2>
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781 <title>Overview</title>
1016
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782 <para><indexterm><primary>Atmel AT91/EBXX</primary>
211
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783 <secondary>installing and testing</secondary></indexterm><indexterm><primary>
1016
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784 installing and testing</primary><secondary>Atmel AT91/EBXX
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785 </secondary></indexterm>
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786 RedBoot support is available for the EB40, EB40A, EB42 and EB55
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787 boards. By default all these boards are shipped with only 256Kbytes of
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788 RAM. To minimize the amount of RAM used by RedBoot, only very basic
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789 flash management is provided, comprising of just the <command>fis
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790 erase</command> and <command>fis write</command> commands.
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791 </para>
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792 <para>
1081
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793 RedBoot supports both serial ports. On all AT91 evaluation boards, serial
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794 port A requires a straight through cable to connect with a PC, whereas
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795 serial port B requires a null modem cable. If you fail to be able to
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796 connect to Angel in the instructions below when installing RedBoot, be
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797 sure to verify you are using the appropriate cable for the serial port.
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798 The default serial port settings for RedBoot are 38400,8,N,1.
1016
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799 </para>
211
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800
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801 <para>The following RedBoot configurations are supported:
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802
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803 <informaltable frame="all">
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804 <tgroup cols="4" colsep="1" rowsep="1" align="left">
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805 <thead>
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806 <row>
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807 <entry>Configuration</entry>
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808 <entry>Mode</entry>
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809 <entry>Description</entry>
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810 <entry>File</entry>
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811 </row>
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812 </thead>
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813 <tbody>
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814 <row>
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815 <entry>ROM</entry>
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816 <entry>[ROM]</entry>
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817 <entry>RedBoot running from the board's flash boot
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818 sector.</entry>
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819 <entry>redboot_ROM.ecm</entry>
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820 </row>
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821 <row>
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822 <entry>RAM</entry>
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823 <entry>[RAM]</entry>
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824 <entry>RedBoot running from RAM with RedBoot in the
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825 flash boot sector.</entry>
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826 <entry>redboot_RAM.ecm</entry>
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827 </row>
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828 <row>
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829 <entry>ROMRAM</entry>
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830 <entry>[ROMRAM]</entry>
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831 <entry>RedBoot running from RAM, but contained in the
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832 board's flash boot sector.</entry>
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833 <entry>redboot_ROMRAM.ecm</entry>
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834 </row>
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835 </tbody>
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836 </tgroup>
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837 </informaltable>
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838 </para>
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839 </sect2>
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840
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841 <sect2>
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842 <title>Initial Installation Method </title>
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843 <para>
1016
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diff changeset
844 RedBoot installation is essentially the same for all boards, however
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
845 the details differ slightly. Please make sure you follow the
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
846 directions from the correct section below. Any errors could result in
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
847 an unusable board.
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
848 </para>
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
849
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
850 <sect3>
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
851 <title>Installing RedBoot on the EB40</title>
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
852 <para>
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
853 This development board comes with ARM's debug tool, Angel, installed
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
854 in flash. At this time, Angel will not be replaced. Rather, RedBoot
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
855 will be placed in the alternate half of flash. Switch SW1 is used to
1148
818f520093b8 * doc/redboot_installing.sgml: Fix brain fart in last change to
jlarmour
parents: 1107
diff changeset
856 select which monitor to boot. Once RedBoot is installed, selecting SW1
818f520093b8 * doc/redboot_installing.sgml: Fix brain fart in last change to
jlarmour
parents: 1107
diff changeset
857 to <literal>lower mem</literal> will choose Angel, whereas selecting
1318
e7283a4a428c * doc/redboot_installing.sgml: Fix eb40 flash install instructions.
jlarmour
parents: 1250
diff changeset
858 SW1 to <literal>upper mem</literal> will choose RedBoot.
211
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diff changeset
859 </para>
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diff changeset
860 <para>
1016
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
861 Set SW1 to <literal>lower mem</literal> and connect serial port A to a
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
862 host computer. Using GDB from the host and Angel on the board,
1318
e7283a4a428c * doc/redboot_installing.sgml: Fix eb40 flash install instructions.
jlarmour
parents: 1250
diff changeset
863 download and run the RAM mode image of RedBoot to the board.
211
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diff changeset
864 <screen>
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diff changeset
865 <userinput>arm-elf-gdb redboot_RAM.elf</userinput>
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diff changeset
866 (gdb) <userinput>tar rdi s=/dev/ttyS0</userinput>
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parents: 210
diff changeset
867 Angel Debug Monitor (serial) 1.04 (Advanced RISC Machines SDT 2.5) for
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diff changeset
868 AT91EB40 (2.00)
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diff changeset
869 Angel Debug Monitor rebuilt on Apr 07 2000 at 12:40:31
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diff changeset
870 Serial Rate: 9600
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diff changeset
871 Connected to ARM RDI target.
845
fa9a9d22a594 * doc/redboot_installing.sgml: Updated AT91EB40 RedBoot installation
jld
parents: 835
diff changeset
872 (gdb) <userinput>set $cpsr=0xd3</userinput>
211
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diff changeset
873 (gdb) <userinput>load</userinput>
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diff changeset
874 Loading section .rom_vectors, size 0x40 lma 0x2020000
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diff changeset
875 Loading section .text, size 0x7fd8 lma 0x2020040
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diff changeset
876 Loading section .rodata, size 0x15a0 lma 0x2028018
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diff changeset
877 Loading section .data, size 0x2e4 lma 0x20295b8
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diff changeset
878 Start address 0x2020040 , load size 39068
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diff changeset
879 Transfer rate: 6250 bits/sec, 500 bytes/write.
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diff changeset
880 (gdb) <userinput>cont</userinput>
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diff changeset
881 Continuing.
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diff changeset
882 </screen>
1148
818f520093b8 * doc/redboot_installing.sgml: Fix brain fart in last change to
jlarmour
parents: 1107
diff changeset
883 Once RedBoot is started, the GDB session connected with Angel
818f520093b8 * doc/redboot_installing.sgml: Fix brain fart in last change to
jlarmour
parents: 1107
diff changeset
884 must be suspended (this can be done using Ctrl-Z) or terminated
818f520093b8 * doc/redboot_installing.sgml: Fix brain fart in last change to
jlarmour
parents: 1107
diff changeset
885 (with Ctrl-C or the Windows task manager). Follow this
818f520093b8 * doc/redboot_installing.sgml: Fix brain fart in last change to
jlarmour
parents: 1107
diff changeset
886 by connecting to the board using a terminal emulator such as
818f520093b8 * doc/redboot_installing.sgml: Fix brain fart in last change to
jlarmour
parents: 1107
diff changeset
887 hyperterminal or minicom at 38400-8N1. At this point, RedBoot will be running on the board in
818f520093b8 * doc/redboot_installing.sgml: Fix brain fart in last change to
jlarmour
parents: 1107
diff changeset
888 RAM.
211
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diff changeset
889 <screen>
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jlarmour
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diff changeset
890 RedBoot> <userinput>version</userinput>
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parents: 210
diff changeset
891
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diff changeset
892 RedBoot(tm) bootstrap and debug environment [RAM]
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
893 Non-certified release, version UNKNOWN - built 14:09:27, Jul 20 2001
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
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diff changeset
894
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
895 Platform: Atmel AT91/EB40 (ARM7TDMI)
2729
74dbf4c3f2e1 Update all copyright banners to reflect FSF ownership; fix and improve licence text.
jlarmour
parents: 1979
diff changeset
896 Copyright (C) 2000, 2001, Free Software Foundation, Inc.
211
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
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diff changeset
897
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parents: 210
diff changeset
898 RAM: 0x02000000-0x02080000, 0x020116d8-0x0207fd00 available
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
899 FLASH: 0x01010000 - 0x01020000, 256 blocks of 0x00000100 bytes each.
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
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diff changeset
900
1148
818f520093b8 * doc/redboot_installing.sgml: Fix brain fart in last change to
jlarmour
parents: 1107
diff changeset
901 RedBoot>
818f520093b8 * doc/redboot_installing.sgml: Fix brain fart in last change to
jlarmour
parents: 1107
diff changeset
902 </screen>
818f520093b8 * doc/redboot_installing.sgml: Fix brain fart in last change to
jlarmour
parents: 1107
diff changeset
903 Now, download the ROM mode image.
818f520093b8 * doc/redboot_installing.sgml: Fix brain fart in last change to
jlarmour
parents: 1107
diff changeset
904 <screen>
211
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diff changeset
905 RedBoot> <userinput>load -m ymodem -b %{FREEMEMLO}</userinput>
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
906 </screen>
1148
818f520093b8 * doc/redboot_installing.sgml: Fix brain fart in last change to
jlarmour
parents: 1107
diff changeset
907 Use your terminal emulator to send the file redboot_ROM.srec via YModem.
818f520093b8 * doc/redboot_installing.sgml: Fix brain fart in last change to
jlarmour
parents: 1107
diff changeset
908 e.g. <literal>Transfer->Send File</literal> in Hyperterminal, or
818f520093b8 * doc/redboot_installing.sgml: Fix brain fart in last change to
jlarmour
parents: 1107
diff changeset
909 <literal>Ctrl-A S</literal> in minicom.
818f520093b8 * doc/redboot_installing.sgml: Fix brain fart in last change to
jlarmour
parents: 1107
diff changeset
910 Finally, program it to flash.
211
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parents: 210
diff changeset
911 <screen>
845
fa9a9d22a594 * doc/redboot_installing.sgml: Updated AT91EB40 RedBoot installation
jld
parents: 835
diff changeset
912 RedBoot> <userinput>fi wr -f 0x01010000 -b %{FREEMEMLO} -l 0xe100</userinput>
211
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
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parents: 210
diff changeset
913 </screen>
1318
e7283a4a428c * doc/redboot_installing.sgml: Fix eb40 flash install instructions.
jlarmour
parents: 1250
diff changeset
914 SW1 should now be set to <literal>upper mem</literal> to select booting
e7283a4a428c * doc/redboot_installing.sgml: Fix eb40 flash install instructions.
jlarmour
parents: 1250
diff changeset
915 with RedBoot rather than Angel. Finally, press the "reset" pushbutton and
e7283a4a428c * doc/redboot_installing.sgml: Fix eb40 flash install instructions.
jlarmour
parents: 1250
diff changeset
916 RedBoot should come up on the board.
211
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diff changeset
917 </para>
1016
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
918 </sect3>
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
919
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
920 <sect3>
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
921 <title>Installing RedBoot on the EB40A, EB42 or EB55</title>
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
922 <para>
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
923 These development boards come with ARM's debug tool, Angel, installed
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
924 in flash. At this time, Angel will not be replaced. Rather, RedBoot
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
925 will be placed in the alternate half of flash. Jumper JP1 is used to
1148
818f520093b8 * doc/redboot_installing.sgml: Fix brain fart in last change to
jlarmour
parents: 1107
diff changeset
926 select which monitor to boot. Once RedBoot is installed, setting JP1
818f520093b8 * doc/redboot_installing.sgml: Fix brain fart in last change to
jlarmour
parents: 1107
diff changeset
927 to <literal>STD</literal> will choose Angel, whereas setting JP1 to
818f520093b8 * doc/redboot_installing.sgml: Fix brain fart in last change to
jlarmour
parents: 1107
diff changeset
928 <literal>USER</literal> will choose RedBoot.
1016
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
929 </para>
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
930 <para>
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
931 Set JP1 to <literal>STD</literal> and connect serial port A to a host
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
932 computer. Using GDB from the host and Angel on the board, download
1148
818f520093b8 * doc/redboot_installing.sgml: Fix brain fart in last change to
jlarmour
parents: 1107
diff changeset
933 the RAM mode image of RedBoot to the board, and start it using the
818f520093b8 * doc/redboot_installing.sgml: Fix brain fart in last change to
jlarmour
parents: 1107
diff changeset
934 'cont' command.
1016
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
935 <screen>
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
936 <userinput>arm-elf-gdb redboot_RAM.elf</userinput>
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
937 (gdb) <userinput>tar rdi s=/dev/ttyS0</userinput>
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
938 Angel Debug Monitor (serial) 1.04 (Advanced RISC Machines SDT 2.5) for AT91EB55 (2.20)
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
939 Angel Debug Monitor rebuilt on Feb 03 2002 at 16:10:20
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
940 Serial Rate: 9600
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
941 Connected to ARM RDI target.
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
942 (gdb) <userinput>set $cpsr=0xd3</userinput>
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
943 (gdb) <userinput>load</userinput>
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
944 Loading section .rom_vectors, size 0x40 lma 0x2008000
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
945 Loading section .text, size 0xb0b8 lma 0x2008040
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
946 Loading section .rodata, size 0x1c27 lma 0x20130f8
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
947 Loading section .data, size 0x5f0 lma 0x2014d20
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
948 Start address 0x2008040, load size 54031
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
949 Transfer rate: 6264 bits/sec, 500 bytes/write.
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
950 (gdb) <userinput>cont</userinput>
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
951 Continuing.
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
952 </screen>
1148
818f520093b8 * doc/redboot_installing.sgml: Fix brain fart in last change to
jlarmour
parents: 1107
diff changeset
953 Once RedBoot is started, the GDB session connected with Angel must be
818f520093b8 * doc/redboot_installing.sgml: Fix brain fart in last change to
jlarmour
parents: 1107
diff changeset
954 suspended (this can be done using Ctrl-Z) or terminated
818f520093b8 * doc/redboot_installing.sgml: Fix brain fart in last change to
jlarmour
parents: 1107
diff changeset
955 (with Ctrl-C or the Windows task manager). Follow this by connecting to
818f520093b8 * doc/redboot_installing.sgml: Fix brain fart in last change to
jlarmour
parents: 1107
diff changeset
956 the board using a terminal emulator such as hyperterminal or minicom
818f520093b8 * doc/redboot_installing.sgml: Fix brain fart in last change to
jlarmour
parents: 1107
diff changeset
957 at 38400-8N1. At this point, RedBoot will be running on the board in
818f520093b8 * doc/redboot_installing.sgml: Fix brain fart in last change to
jlarmour
parents: 1107
diff changeset
958 RAM.
1016
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
959 <screen>
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
960 RedBoot> <userinput>version</userinput>
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
961
1148
818f520093b8 * doc/redboot_installing.sgml: Fix brain fart in last change to
jlarmour
parents: 1107
diff changeset
962 RedBoot(tm) bootstrap and debug environment [RAM]
1016
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
963 Non-certified release, version UNKNOWN - built 16:58:52, May 7 2003
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
964
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
965 Platform: Atmel AT91/EB55 (ARM7TDMI)
2729
74dbf4c3f2e1 Update all copyright banners to reflect FSF ownership; fix and improve licence text.
jlarmour
parents: 1979
diff changeset
966 Copyright (C) 2000, 2001, 2002, Free Software Foundation, Inc.
1016
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
967
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
968 RAM: 0x02000000-0x02040000, 0x020068a8-0x0203f000 available
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
969 FLASH: 0x01010000 - 0x01200000, 31 blocks of 0x00010000 bytes each.
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
970
1148
818f520093b8 * doc/redboot_installing.sgml: Fix brain fart in last change to
jlarmour
parents: 1107
diff changeset
971 RedBoot>
818f520093b8 * doc/redboot_installing.sgml: Fix brain fart in last change to
jlarmour
parents: 1107
diff changeset
972 </screen>
818f520093b8 * doc/redboot_installing.sgml: Fix brain fart in last change to
jlarmour
parents: 1107
diff changeset
973 Now, download the ROM mode image.
818f520093b8 * doc/redboot_installing.sgml: Fix brain fart in last change to
jlarmour
parents: 1107
diff changeset
974 <screen>
1016
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
975 RedBoot> <userinput>load -m ymodem -b %{FREEMEMLO}</userinput>
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
976 </screen>
1148
818f520093b8 * doc/redboot_installing.sgml: Fix brain fart in last change to
jlarmour
parents: 1107
diff changeset
977 Use your terminal emulator to send the file redboot_ROM.srec via YModem.
818f520093b8 * doc/redboot_installing.sgml: Fix brain fart in last change to
jlarmour
parents: 1107
diff changeset
978 e.g. <literal>Transfer->Send File</literal> in Hyperterminal, or
818f520093b8 * doc/redboot_installing.sgml: Fix brain fart in last change to
jlarmour
parents: 1107
diff changeset
979 <literal>Ctrl-A S</literal> in minicom.
818f520093b8 * doc/redboot_installing.sgml: Fix brain fart in last change to
jlarmour
parents: 1107
diff changeset
980 Finally, program it to flash.
1016
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
981 <screen>
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
982 RedBoot> <userinput>fi wr -f 0x01100000 -b %{FREEMEMLO} -l 0x10000</userinput>
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
983 </screen>
1148
818f520093b8 * doc/redboot_installing.sgml: Fix brain fart in last change to
jlarmour
parents: 1107
diff changeset
984 Set JP1 to the <literal>USER</literal> setting, press the "reset"
818f520093b8 * doc/redboot_installing.sgml: Fix brain fart in last change to
jlarmour
parents: 1107
diff changeset
985 pushbutton and RedBoot should come up on the board.
1016
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
986 </para>
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
987 </sect3>
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
988
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
989
211
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
990 </sect2>
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
991 <sect2>
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
992 <title>Special RedBoot Commands </title>
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
993 <para>None.</para>
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
994 </sect2>
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
995 <sect2>
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
996 <title>Memory Maps </title>
1016
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
997 <para>This processor has no MMU, so the only memory map is for
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
998 physical addresses.
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
999 </para>
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
1000 <para>
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
1001 The memory layout of the EB40 is as follows:
211
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
1002 <programlisting>
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
1003 Physical Address Range Description
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
1004 ----------------------- ----------------------------------
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
1005 0x00000000 - 0x00000fff On-chip SRAM
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
1006 0x01000000 - 0x0101ffff Flash
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
1007 0x02000000 - 0x0207ffff RAM
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
1008 0xffe00000 - 0xffffffff I/O registers
1016
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
1009 </programlisting>
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
1010
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
1011 The flash based RedBoot image occupies virtual addresses 0x01010000 - 0x0101dfff.
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
1012 </para>
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
1013
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
1014 <para>
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
1015 The memory layout of the EB40A is as follows:
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
1016 <programlisting>
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
1017 Physical Address Range Description
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
1018 ----------------------- ----------------------------------
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
1019 0x00000000 - 0x0003ffff On-chip SRAM
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
1020 0x01000000 - 0x011fffff Flash
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
1021 0x02000000 - 0x02ffffff External SRAM (optional)
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
1022 0xffe00000 - 0xffffffff I/O registers
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
1023 </programlisting>
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
1024
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
1025 The flash based RedBoot image occupies virtual addresses 0x01100000 - 0x0110ffff.
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
1026 </para>
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
1027
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
1028 <para>
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
1029 The memory layout of the EB42 and EB55 is as follows:
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
1030 <programlisting>
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
1031 Physical Address Range Description
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
1032 ----------------------- ----------------------------------
1250
9af0b6bf194b * doc/redboot_installing.sgml: Fixed bogus memory sizes in AT91
nickg
parents: 1148
diff changeset
1033 0x00000000 - 0x00001fff On-chip SRAM
1016
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
1034 0x01000000 - 0x011fffff Flash
1250
9af0b6bf194b * doc/redboot_installing.sgml: Fixed bogus memory sizes in AT91
nickg
parents: 1148
diff changeset
1035 0x02000000 - 0x0203ffff RAM
1016
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
1036 0xffe00000 - 0xffffffff I/O registers
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
1037 </programlisting>
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
1038
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
1039 The flash based RedBoot image occupies virtual addresses 0x01100000 - 0x0110ffff.
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
1040 </para>
211
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
1041
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
1042 </sect2>
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
1043 <sect2>
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
1044 <title>Rebuilding RedBoot</title>
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
1045
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
1046 <para>These shell variables provide the platform-specific information
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
1047 needed for building RedBoot according to the procedure described in
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
1048 <xref linkend="Rebuilding-Redboot">:
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
1049 <programlisting>
1016
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
1050 export ARCH_DIR=arm
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
1051
211
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
1052 export TARGET=eb40
1016
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
1053 export PLATFORM_DIR=at91/eb40
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
1054
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
1055 export TARGET=eb40a
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
1056 export PLATFORM_DIR=at91/eb40a
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
1057
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
1058 export TARGET=eb42
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
1059 export PLATFORM_DIR=at91/eb42
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
1060
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
1061 export TARGET=eb55
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
1062 export PLATFORM_DIR=at91/eb55
211
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
1063 </programlisting>
1016
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
1064
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
1065 Use just one of the <literal>TARGET</literal> and
09c58c54db2f * ecos.db: Added packages and targets for Atmel AT91 boards: EB40,
nickg
parents: 845
diff changeset
1066 <literal>PLATFORM_DIR</literal> variable pairs only.
211
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
1067 </para>
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
1068
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
1069 <para>The names of configuration files are listed above with the
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
1070 description of the associated modes.</para>
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
1071
1148
818f520093b8 * doc/redboot_installing.sgml: Fix brain fart in last change to
jlarmour
parents: 1107
diff changeset
1072 <para>When reprogramming RedBoot using RedBoot itself, you should
818f520093b8 * doc/redboot_installing.sgml: Fix brain fart in last change to
jlarmour
parents: 1107
diff changeset
1073 load a RedBoot RAM image as normal, and load the new ROM image
818f520093b8 * doc/redboot_installing.sgml: Fix brain fart in last change to
jlarmour
parents: 1107
diff changeset
1074 into RAM. However before programming the new image into Flash
818f520093b8 * doc/redboot_installing.sgml: Fix brain fart in last change to
jlarmour
parents: 1107
diff changeset
1075 you <emphasis>must</emphasis> switch SW1 to lower mem (EB40)
818f520093b8 * doc/redboot_installing.sgml: Fix brain fart in last change to
jlarmour
parents: 1107
diff changeset
1076 or set JP1 to STD (EB40A, EB42, EB55) before writing to Flash.
818f520093b8 * doc/redboot_installing.sgml: Fix brain fart in last change to
jlarmour
parents: 1107
diff changeset
1077 </para>
818f520093b8 * doc/redboot_installing.sgml: Fix brain fart in last change to
jlarmour
parents: 1107
diff changeset
1078
818f520093b8 * doc/redboot_installing.sgml: Fix brain fart in last change to
jlarmour
parents: 1107
diff changeset
1079 <warning><title>Warning!</title><para>Failure to set SW1 to
818f520093b8 * doc/redboot_installing.sgml: Fix brain fart in last change to
jlarmour
parents: 1107
diff changeset
1080 <literal>lower mem</literal> (EB40) or JP1 to
818f520093b8 * doc/redboot_installing.sgml: Fix brain fart in last change to
jlarmour
parents: 1107
diff changeset
1081 <literal>STD</literal> (EB40A, EB42, EB55) will cause the
818f520093b8 * doc/redboot_installing.sgml: Fix brain fart in last change to
jlarmour
parents: 1107
diff changeset
1082 installation of RedBoot to overwrite Angel, thus making the board
818f520093b8 * doc/redboot_installing.sgml: Fix brain fart in last change to
jlarmour
parents: 1107
diff changeset
1083 <emphasis>unbootable</emphasis>. Only hardware JTAG can restore the
818f520093b8 * doc/redboot_installing.sgml: Fix brain fart in last change to
jlarmour
parents: 1107
diff changeset
1084 board once in this state.
818f520093b8 * doc/redboot_installing.sgml: Fix brain fart in last change to
jlarmour
parents: 1107
diff changeset
1085 </para></warning>
211
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
1086 </sect2>
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
1087 </sect1>
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
1088
1772
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1089 <?Pub _newpage>
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1090 <sect1 id="at91jtst">
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1091 <title>ARM/ARM7 Atmel JTST Evaluation Board (AT572D740-DK1)</title>
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1092 <sect2>
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1093 <title>Overview</title>
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1094 <para><indexterm><primary>Atmel AT91/JTST</primary>
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1095 <secondary>installing and testing</secondary></indexterm><indexterm><primary>
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1096 installing and testing</primary><secondary>Atmel AT91/JTST
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1097 </secondary></indexterm>
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1098 RedBoot support is available for the JTST board.
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1099 By default this board is shipped with 256Kbytes of
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1100 external SRAM. To minimize the amount of RAM used by RedBoot, only very basic
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1101 flash management is provided, comprising of just the <command>fis
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1102 erase</command> and <command>fis write</command> commands.
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1103 </para>
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1104 <para>
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1105 RedBoot supports two serial ports.
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1106 The default serial port settings for RedBoot are 115200,8,N,1.
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1107 </para>
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1108
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1109 <para>The following RedBoot configurations are supported:
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1110
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1111 <informaltable frame="all">
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1112 <tgroup cols="4" colsep="1" rowsep="1" align="left">
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1113 <thead>
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1114 <row>
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1115 <entry>Configuration</entry>
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1116 <entry>Mode</entry>
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1117 <entry>Description</entry>
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1118 <entry>File</entry>
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1119 </row>
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1120 </thead>
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1121 <tbody>
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1122 <row>
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1123 <entry>ROM</entry>
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1124 <entry>[ROM]</entry>
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1125 <entry>RedBoot running from the board's flash boot
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1126 sector.</entry>
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1127 <entry>redboot_ROM.ecm</entry>
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1128 </row>
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1129 <row>
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1130 <entry>RAM</entry>
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1131 <entry>[RAM]</entry>
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1132 <entry>RedBoot running from RAM with RedBoot in the
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1133 flash boot sector.</entry>
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1134 <entry>redboot_RAM.ecm</entry>
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1135 </row>
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1136
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1137 </tbody>
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1138 </tgroup>
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1139 </informaltable>
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1140 </para>
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1141 </sect2>
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1142 <sect2>
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1143 <title>Installing a RedBoot image on the JTST</title>
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1144 <para>
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1145 This development board comes with RedBoot installed on flash. To
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1146 install a new version of RedBoot or another binary image in flash you
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1147 must start a GDB session setting a remote target and load and run the
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1148 <command>jtstflashd.elf</command> diopsis application. This is a
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1149 daemon that listens on JTST serial port 1. On the PC side you must use
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1150 the <command>jtstflash.exe</command> (both linux and windows PC are
1803
4028c3fff75e * doc/redboot_installing.sgml: Added links to the tools for the
asl
parents: 1772
diff changeset
1151 supported) to flash the image on JTST. The sources for win32 and
4028c3fff75e * doc/redboot_installing.sgml: Added links to the tools for the
asl
parents: 1772
diff changeset
1152 linux/cygwin versions of this host tool can be found in the support
4028c3fff75e * doc/redboot_installing.sgml: Added links to the tools for the
asl
parents: 1772
diff changeset
1153 directory of the jtst hal. The binaries can be found along with the
4028c3fff75e * doc/redboot_installing.sgml: Added links to the tools for the
asl
parents: 1772
diff changeset
1154 binaries for redboot on the eCos website at
4028c3fff75e * doc/redboot_installing.sgml: Added links to the tools for the
asl
parents: 1772
diff changeset
1155 <ulink url="http://ecos.sourceware.org/ecos/boards/redbootbins/at91jtst/index.html">
4028c3fff75e * doc/redboot_installing.sgml: Added links to the tools for the
asl
parents: 1772
diff changeset
1156 http://ecos.sourceware.org/ecos/boards/redbootbins/at91jtst/</ulink>
1979
d5cc8ff21831 Add missing tag so docs can be built with latest tools
gthomas
parents: 1803
diff changeset
1157 </para>
1772
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1158 <para>
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1159 When the jtstflashd.elf is started, the user should open the jumper
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1160 JP5 to write in the second half (512Kbytes) of the flash, in this way
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1161 the original RedBoot image is preserved.
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1162 </para>
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1163 <sect3>
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1164 <title>GDB console</title>
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1165 <screen>
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1166 <userinput>arm-elf-gdb jtstflash.elf</userinput>
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1167 (gdb) <userinput>set remotebaud 115200</userinput>
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1168 (gdb) <userinput>target remote /dev/ttyS0</userinput>
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1169 Remote debugging using /dev/ttyS0
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1170 0x00502a44 in ?? ()
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1171 (gdb) <userinput>load</userinput>
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1172 Loading section .internal_vectors, size 0x1c4 lma 0x160
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1173 Loading section .rom_vectors, size 0x40 lma 0x606000
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1174 Loading section .text, size 0x14198 lma 0x606040
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1175 Loading section .rodata, size 0xb6c lma 0x61a1d8
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1176 Loading section .data, size 0x498 lma 0x61ad44
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1177 Start address 0x606040, load size 86944
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1178 Transfer rate: 77283 bits/sec, 301 bytes/write.
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1179 (gdb) <userinput>c</userinput>
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1180 Continuing.
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1181 * JTST FLASH PROGRAMMER
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1182 * opening usart port 1
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1183 ...
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1184 </screen>
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1185 </sect3>
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1186 <sect3>
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1187 <title>PC console</title>
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1188 <screen>
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1189 <userinput>jtstflash mybinaryimage.bin</userinput>
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1190 * binary len 79536 bytes flash add 0x500000..
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1191 * flash id check ok
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1192 * erasing space address 0x500000... please wait
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1193 * flash erase check ok
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1194 * start programming 79536 bytes.
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1195 </screen>
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1196 </sect3>
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1197 </sect2>
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1198 <sect2>
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1199 <title>Special RedBoot Commands </title>
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1200 <para>None.</para>
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1201 </sect2>
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1202 <sect2>
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1203 <title>Memory Maps </title>
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1204 <para>This processor has no MMU, so the only memory map is for
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1205 physical addresses.
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1206 </para>
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1207 <para>
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1208 The memory layout of the JTST after bootstrap is as follows:
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1209 <programlisting>
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1210 Physical Address Range Description
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1211 ----------------------- ----------------------------------
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1212 0x00000000 - 0x00007fff On-chip SRAM
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1213 0x00500000 - 0x0057ffff Flash
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1214 0x00600000 - 0x0063ffff External SRAM
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1215 0x00410000 - 0x0042fffc On-chip Magic Data Memory Left
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1216 0x00430000 - 0x0043fffc On-chip Magic Data Memory Right
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1217 0x00430000 - 0x0044fffc On-chip Magic Program Memory
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1218 0x00490000 - 0x00490ffc On-chip Arm/Magic Data Exchange Left
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1219 0x004A0000 - 0x004A0ffc On-chip Arm/Magic Data Exchange Right
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1220 0x00450000 - 0x0045003c Magic I/O registers
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1221 0x00460000 - 0x0046000c Magic Control registers
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1222 0xffe00000 - 0xffffffff I/O registers
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1223 </programlisting>
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1224 </para>
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1225 </sect2>
2821f66e3f5a * doc/redboot_install.sgml: Added installation information for the
asl
parents: 1746
diff changeset
1226 </sect1>
211
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
1227
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
1228 <?Pub _newpage>
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
1229 <sect1 id="edb7xxx">
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
1230 <title>ARM/ARM7 Cirrus Logic EP7xxx (EDB7211, EDB7212, EDB7312) </title>
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
1231 <sect2>
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
1232 <title>Overview</title>
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
1233 <para><indexterm><primary>Cirrus Logic EP7xxx (EDB7211, EDB7212, EDB7312)</primary>
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
1234 <secondary>installing and testing</secondary></indexterm><indexterm><primary>
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
1235 installing and testing</primary><secondary>Cirrus Logic EP7xxx (EDB7211, EDB7212, EDB7312)
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
1236 </secondary></indexterm>RedBoot supports both serial ports on the board and
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
1237 the ethernet port. The default serial port settings are 38400,8,N,1. RedBoot
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
1238 also supports flash management on the EDB7xxx for the NOR flash
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
1239 only.</para>
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
1240
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
1241 <para>The following RedBoot configurations are supported:
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
1242
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
1243 <informaltable frame="all">
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
1244 <tgroup cols="4" colsep="1" rowsep="1" align="left">
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
1245 <thead>
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
1246 <row>
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
1247 <entry>Configuration</entry>
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
1248 <entry>Mode</entry>
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
1249 <entry>Description</entry>
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
1250 <entry>File</entry>
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
1251 </row>
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
1252 </thead>
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
1253 <tbody>
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
1254 <row>
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1255 <entry>ROM</entry>
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1256 <entry>[ROM]</entry>
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1257 <entry>RedBoot running from the board's flash boot
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1258 sector.</entry>
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1259 <entry>redboot_ROM.ecm</entry>
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1260 </row>
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1261 <row>
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1262 <entry>RAM</entry>
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1263 <entry>[RAM]</entry>
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1264 <entry>RedBoot running from RAM with RedBoot in the
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1265 flash boot sector.</entry>
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1266 <entry>redboot_RAM.ecm</entry>
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1267 </row>
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1268 <row>
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1269 <entry>ROMRAM</entry>
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1270 <entry>[ROMRAM]</entry>
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1271 <entry>RedBoot running from RAM, but contained in the
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1272 board's flash boot sector (EDB7312 only).</entry>
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1273 <entry>redboot_ROMRAM.ecm</entry>
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1274 </row>
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1275 </tbody>
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1276 </tgroup>
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1277 </informaltable>
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1278 </para>
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1279
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1280 </sect2>
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1281 <sect2>
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1282 <title>Initial Installation Method </title>
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1283 <para>A Windows or Linux utility is used to program flash using serial port
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1284 #1 via on-chip programming firmware. See board documentation for details on
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1285 in situ flash programming. </para>
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1286 </sect2>
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1287 <sect2>
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1288 <title>Special RedBoot Commands </title>
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1289 <para>None.</para>
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1290 </sect2>
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1291 <sect2>
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1292 <title>Memory Maps </title>
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1293 <para>The MMU page tables and LCD display buffer, if enabled, are located
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1294 at the end of DRAM. <note><title>NOTE
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1295 </title>
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1296 <para>The virtual memory maps in this section use a C and B column to indicate
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1297 whether or not the region is cached (C) or buffered (B).</para>
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1298 </note><programlisting>
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diff changeset
1299 Physical Address Range Description
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1300 ----------------------- ----------------------------------
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1301 0x00000000 - 0x01ffffff NOR Flash (EDB7211, EDB7212)
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1302 0x00000000 - 0x00ffffff NOR Flash (EDB7312)
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1303 0x10000000 - 0x11ffffff NAND Flash
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1304 0x20000000 - 0x2fffffff Expansion 2
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1305 0x30000000 - 0x3fffffff Expansion 3
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1306 0x40000000 - 0x4fffffff PCMCIA 0
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1307 0x50000000 - 0x5fffffff PCMCIA 1
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1308 0x60000000 - 0x600007ff On-chip SRAM
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1309 0x80000000 - 0x8fffffff I/O registers
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1310 0xc0000000 - 0xc1ffffff DRAM (EDB7211, EDB7212)
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1311 0xc0000000 - 0xc0ffffff DRAM (EDB7312)
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1312
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1313 Virtual Address Range C B Description
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diff changeset
1314 ----------------------- - - ----------------------------------
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1315 0x00000000 - 0x01ffffff Y Y DRAM
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1316 0x00000000 - 0x00fcffff Y Y DRAM (EDB7312)
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1317 0x20000000 - 0x2fffffff N N Expansion 2
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1318 0x30000000 - 0x3fffffff N N Expansion 3
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1319 0x40000000 - 0x4fffffff N N PCMCIA 0
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1320 0x50000000 - 0x5fffffff N N PCMCIA 1
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1321 0x60000000 - 0x600007ff Y Y On-chip SRAM
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1322 0x80000000 - 0x8fffffff N N I/O registers
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1323 0xc0000000 - 0xc001ffff N Y LCD buffer (if configured)
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1324 0xe0000000 - 0xe1ffffff Y Y NOR Flash (EDB7211, EDB7212)
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1325 0xe0000000 - 0xe0ffffff Y Y NOR Flash (EDB7312)
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1326 0xf0000000 - 0xf1ffffff Y Y NAND Flash
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1327
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1328 The flash based RedBoot image occupies virtual addresses 0xe0000000 - 0xe003ffff.
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1329 </programlisting></para>
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1330 </sect2>
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1331 <sect2>
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1332 <title>Platform Resource Usage</title>
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1333 <para>The EP7xxx timer #2 is used as a polled timer to provide timeout support
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1334 for network and XModem file transfers.</para>
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1335 </sect2><sect2>
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1336
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1337 <title>Rebuilding RedBoot</title>
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1338
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1339
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1340 <para>These shell variables provide the platform-specific information
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1341 needed for building RedBoot according to the procedure described in
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1342 <xref linkend="Rebuilding-Redboot">:
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1343 <programlisting>
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1344 export TARGET=edb7211
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1345 export TARGET=edb7212
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1346 export TARGET=edb7312
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1347 export ARCH_DIR=arm
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1348 export PLATFORM_DIR=edb7xxx
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1349 </programlisting>
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1350
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1351 Use one of the TARGET settings only.
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1352 </para>
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1353
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1354 <para>The names of configuration files are listed above with the
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1355 description of the associated modes.</para>
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1356
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1357 </sect2>
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1358 </sect1>
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1359
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diff changeset
1360 <?Pub _newpage>
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1361 <sect1 id="aaed2000">
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1362 <title>ARM/ARM9 Agilent AAED2000</title>
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1363 <sect2>
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1364 <title>Overview</title>
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1365 <para><indexterm><primary>Agilent AAED2000 ARM9 (aaed)</primary>
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1366 <secondary>installing and testing</secondary></indexterm><indexterm><primary>
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1367 installing and testing</primary><secondary>Agilent AAED2000 ARM9 (aaed)
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1368 </secondary></indexterm>RedBoot supports the serial and ethernet ports
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1369 on the board. The default serial port settings are 38400,8,N,1.
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1370 RedBoot also supports flash management on the AAED2000.</para>
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1371
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1372 <para>The following RedBoot configurations are supported:
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1373
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1374 <informaltable frame="all">
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1375 <tgroup cols="4" colsep="1" rowsep="1" align="left">
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1376 <thead>
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1377 <row>
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1378 <entry>Configuration</entry>
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1379 <entry>Mode</entry>
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1380 <entry>Description</entry>
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1381 <entry>File</entry>
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1382 </row>
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1383 </thead>
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1384 <tbody>
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1385 <row>
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1386 <entry>ROMRAM</entry>
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1387 <entry>[ROMRAM]</entry>
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1388 <entry>RedBoot running from RAM, but contained in the
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1389 board's flash boot sector.</entry>
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1390 <entry>redboot_primary_ROMRAM.ecm</entry>
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1391 </row>
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1392 <row>
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1393 <entry>RAM</entry>
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1394 <entry>[RAM]</entry>
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1395 <entry>RedBoot running from RAM with RedBoot in the
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1396 flash boot sector.</entry>
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1397 <entry>redboot_primary_RAM.ecm</entry>
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1398 </row>
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1399 </tbody>
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1400 </tgroup>
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1401 </informaltable>
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1402 </para>
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1403 </sect2>
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1404
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1405 <sect2>
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1406 <title>Initial Installation Method </title>
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1407 <para>It is possible to install RedBoot in one of two ways. Either as
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1408 the primary bootmonitor on the board (installed to blocks 0-1 of the
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1409 flash) or as the secondary bootmonitor on the board (installed to
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1410 blocks 1-2 of the flash).</para>
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1411
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1412 <para>Presently, only the former method is supported.</para>
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1413 <!-- Nuke the above line if uncommenting this block
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1414 <para>When installed as the secondary bootmonitor, the ARM bootmonitor
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1415 remains in flash and auto-executes RedBoot (but only when RedBoot is
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1416 smaller than 128KB - which means it cannot include the LCD driver).
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1417 It is of crucial importance that no RedBoot configured to be
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1418 primary bootmonitor is executed on a board where RedBoot is actually
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1419 supposed to be the secondary bootmonitor since it may cause corruption
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1420 of the flash. Installing RedBoot as the primary booter is
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1421 adviced.</para>
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1422 -->
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1423
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1424 <sect3><title>RedBoot as Primary Bootmonitor</title>
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1425
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1426 <para>RedBoot is installed in flash using the on-board ARM Boot
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1427 Monitor.</para>
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1428 <para>Boot the board while pressing SPACE. This should bring up the
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1429 Boot Monitor:
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1430 <screen>ARM bootPROM [Version 1.3] Rebuilt on Jul 16 2001 at 16:21:36
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1431 Running on a P920 board Evaluation Board
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1432 Board Revision V1.0, ARM920T processor Processor
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1433 Memory Size is 32MBytes, Flash Size is 32MBytes
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1434 Copyright (c) ARM Limited 1999 - 2001. All rights reserved.
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1435 Board designed by ARM Limited
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1436 Hardware support provided at http://www.arm.com/
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1437 For help on the available commands type ? or h
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1438 boot Monitor >
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1439 </screen>
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1440
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1441 Download the RAM mode image of RedBoot configured as a primary
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1442 bootmonitor using the ARM bootmonitor's SREC-download command:
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1443
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1444 <screen>boot Monitor &gt; <userinput>m</userinput>
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1445 Load Motorola S-Record image into memory and execute it
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1446 The S-Record loader only accepts input on the serial port.
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1447 Record addresses must be between 0x00008000 and 0x01E0F510.
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1448 Type Ctrl/C to exit loader.
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1449 </screen>
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1450
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1451 Use the terminal emulator's ASCII upload command, or (on Linux) simply
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1452 cat the file to the serial port:
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1453
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1454 <screen>$ <userinput>cat redboot_primary_RAM/redboot.srec &gt;/dev/ttyS1</userinput>
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1455 </screen>
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1456
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1457 You should see RedBoot start up:
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1458
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1459 <screen>FLASH configuration checksum error or invalid key
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1460 Ethernet eth0: MAC address 00:30:d3:03:04:99
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1461 IP: 192.168.42.111, Default server: 192.168.42.3
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1462
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1463 RedBoot(tm) bootstrap and debug environment [RAM]
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1464 Non-certified release, version UNKNOWN - built 13:15:40, Nov 9 2001
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1465
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1466 Platform: AAED2000 system (ARM9) [Primary]
2729
74dbf4c3f2e1 Update all copyright banners to reflect FSF ownership; fix and improve licence text.
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1467 Copyright (C) 2000, 2001, Free Software Foundation, Inc.
211
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1468
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1469 RAM: 0x00000000-0x01f80000, 0x0006f208-0x01f51000 available
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1470 FLASH: 0x60000000 - 0x62000000, 256 blocks of 0x00020000 bytes each.
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1471 RedBoot></screen>
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1472
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1473 As can be seen from the output above, the network has been configured
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1474 to give the board an IP address and information about the default
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1475 server. If things are not set up on your network, you can still
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1476 continue, but use the Y-modem download method when loading the RedBoot
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1477 ROMRAM mode image.
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1478
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1479 Now initialize RedBoot's FIS:
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1480
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1481 <screen>RedBoot&gt; <userinput>fis init</userinput>
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1482 About to initialize [format] FLASH image system - continue (y/n)? <userinput>y</userinput>
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1483 *** Initialize FLASH Image System
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1484 Warning: device contents not erased, some blocks may not be usable
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1485 ... Erase from 0x61fe0000-0x62000000: .
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1486 ... Program from 0x01f5f000-0x01f5f300 at 0x61fe0000: .
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1487 </screen>
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1488
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1489 Download the ROMRAM mode image of RedBoot via ethernet:
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1490
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1491 <screen>RedBoot&gt; <userinput>load -b %{FREEMEMLO} redboot_primary_ROMRAM/redboot.srec</userinput>
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1492 </screen>
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1493
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1494 or using serial Y-modem protocol:
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1495
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1496 <screen>RedBoot&gt; <userinput>load -mode ymodem -b %{FREEMEMLO}</userinput>
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1497 </screen>
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1498
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1499 (Use the terminal emulator's Y-modem upload command to send the file
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1500 <filename>redboot_primary_ROMRAM/redboot.srec</filename>.)
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1501
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1502 When the image has been downloaded, program it into flash:
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1503
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1504 <screen>Address offset = 0x00ff8000
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1505 Entry point: 0x00008040, address range: 0x00008000-0x0002da80
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1506 RedBoot&gt; <userinput>fi cr RedBoot</userinput>
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1507 An image named 'RedBoot' exists - continue (y/n)? <userinput>y</userinput>
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1508 * CAUTION * about to program 'RedBoot'
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1509 at 0x60000000..0x6003ffff from 0x00100000 - continue (y/n)? <userinput>y</userinput>
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1510 ... Erase from 0x60000000-0x60040000: ..
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1511 ... Program from 0x00100000-0x00140000 at 0x60000000: ..
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1512 ... Erase from 0x61fe0000-0x62000000: .
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1513 ... Program from 0x01f5f000-0x01f7f000 at 0x61fe0000: .
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1514 </screen>
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1515
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1516 Now reset the board. You should see the RedBoot banner.</para>
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1517
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1518 </sect3>
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1519
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1520 <!--
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1521 <sect3><title>RedBoot as Secondary Bootmonitor</title>
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1522
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1523 <para>RedBoot is installed in flash using the on-board ARM Boot
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1524 Monitor.</para>
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1525 <para>Boot the board while pressing SPACE. This should bring up the
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1526 Boot Monitor:
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1527 <screen>ARM bootPROM [Version 1.3] Rebuilt on Jul 16 2001 at 16:21:36
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1528 Running on a P920 board Evaluation Board
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1529 Board Revision V1.0, ARM920T processor Processor
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1530 Memory Size is 32MBytes, Flash Size is 32MBytes
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1531 Copyright (c) ARM Limited 1999 - 2001. All rights reserved.
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1532 Board designed by ARM Limited
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1533 Hardware support provided at http://www.arm.com/
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1534 For help on the available commands type ? or h
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1535 boot Monitor >
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1536 </screen>
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1537
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1538 Download the RAM mode image of RedBoot configured as a secondary
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1539 bootmonitor using the ARM bootmonitor's SREC-download command:
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1540
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1541 <screen>boot Monitor &gt; <userinput>m</userinput>
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1542 Load Motorola S-Record image into memory and execute it
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1543 The S-Record loader only accepts input on the serial port.
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1544 Record addresses must be between 0x00008000 and 0x01E0F510.
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1545 Type Ctrl/C to exit loader.
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1546 </screen>
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1547
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1548 Use the terminal emulator's ASCII upload command, or (on Linux) simply
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1549 cat the file to the serial port:
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1550
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1551 <screen>$ <userinput>cat redboot_secondary_RAM.srec &gt;/dev/ttyS1</userinput>
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1552 </screen>
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1553
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1554 You should see RedBoot start up:
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1555
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1556 <screen>FLASH configuration checksum error or invalid key
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1557 Ethernet eth0: MAC address 00:30:d3:03:04:99
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1558 IP: 192.168.42.111, Default server: 192.168.42.3
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1559
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1560 RedBoot(tm) bootstrap and debug environment [RAM]
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1561 Non-certified release, version UNKNOWN - built 12:31:13, Nov 9 2001
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1562
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1563 Platform: AAED2000 system (ARM9) [Secondary]
2729
74dbf4c3f2e1 Update all copyright banners to reflect FSF ownership; fix and improve licence text.
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diff changeset
1564 Copyright (C) 2000, 2001, Free Software Foundation, Inc.
211
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1565
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1566 RAM: 0x00000000-0x01f80000, 0x00063568-0x01f51000 available
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1567 FLASH: 0x60000000 - 0x62000000, 256 blocks of 0x00020000 bytes each.
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1568 </screen>
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1569
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1570 As can be seen from the output above, the network has been configured
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1571 to give the board an IP address and information about the default
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1572 server. If things are not set up on your network, you can still
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1573 continue, but use the Y-modem download method when loading the RedBoot
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1574 ROMRAM mode image.
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1575
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1576 Next step is to erase all of the flash, except where the ARM booter resides:
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1577
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1578 <screen>RedBoot&gt; <userinput>fi erase -f 0x60020000 -l 0x01fe0000</userinput>
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1579 ... Erase from 0x60020000-0x62000000: ..........................................
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1580 ................................................................................
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1581 ................................................................................
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1582 .....................................................
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1583 </screen>
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1584
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1585 Then initialize RedBoot's FIS:
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1586
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1587 <screen>RedBoot&gt; <userinput>fi init</userinput>
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1588 About to initialize [format] FLASH image system - continue (y/n)? <userinput>y</userinput>
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1589 *** Initialize FLASH Image System
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1590 Warning: device contents not erased, some blocks may not be usable
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1591 ... Erase from 0x61fc0000-0x61fe0000: .
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1592 ... Program from 0x01fdf000-0x01fff000 at 0x61fc0000: .
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1593 </screen>
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1594
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1595 Download the ROMRAM mode RedBoot image via ethernet:
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1596
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1597 <screen>RedBoot&gt; <userinput>load -raw -b %{FREEMEMLO} redboot_secondary_ROMRAM.arm.bin</userinput>
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1598 </screen>
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1599
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1600 or using serial Y-modem protocol:
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1601
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1602 <screen>RedBoot&gt; <userinput>load -raw -mode ymodem -b %{FREEMEMLO}</userinput>
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1603 </screen>
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1604
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1605 (Use the terminal emulator's Y-modem upload command to send the file
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1606 <filename>redboot_secondary_ROMRAM.arm.bin</filename>.)
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1607
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1608 When the image has been downloaded, program it into flash:
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1609
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1610 <screen>RedBoot&gt; <userinput>fi cr RedBoot</userinput>
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1611 An image named 'RedBoot' exists - continue (y/n)? <userinput>y</userinput>
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1612 * CAUTION * about to program 'RedBoot'
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1613 at 0x60020000..0x6005ffff from 0x00100000 - continue (y/n)? <userinput>y</userinput>
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1614 ... Erase from 0x60020000-0x60060000: ..
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1615 ... Program from 0x00100000-0x00140000 at 0x60020000: ..
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1616 ... Erase from 0x61fc0000-0x61fe0000: .
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1617 ... Program from 0x01f5f000-0x01f7f000 at 0x61fc0000: .
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1618 </screen>
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1619
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1620 Now reset the board. You might see the ARM Monitor complain:
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1621
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1622 <screen>Failed to boot from flash.
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1623 The ARM Boot Monitor SIB can not be found.
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1624 Press any key to continue.
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1625 </screen>
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1626
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1627 This is due to due to the flash having been erased. Press a key, and
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1628 execute the "validate flash contents" command:
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1629
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1630 <screen>boot Monitor &gt; <userinput>v</userinput>
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1631
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1632 There are 254 128KByte blocks of Application Flash:
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1633
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1634 No images found!
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1635 ================
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1636
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1637 System Information Blocks
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diff changeset
1638 =========================
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1639 Address Owner Size Idx Rev
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diff changeset
1640 ~~~~~~~ ~~~~~ ~~~~ ~~~ ~~~
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1641 0x05FE0000 ARM Boot Monitor 312 0 0
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1642
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1643
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1644 Blocks of unknown type
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1645 ======================
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1646 Block Size Footer Type
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1647 ~~~~~ ~~~~ ~~~~~~~~~~~
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1648 252 1 0x52420000
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1649 boot Monitor &gt;
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1650 </screen>
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1651
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1652 This causes the last block of the flash to be initialized with the ARM
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1653 Boot Monitor ID, necessary for the Monitor to work properly. When
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1654 resetting the board now, it should automatically start RedBoot. If you
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1655 ever need to get into the ARM Boot Monitor again, reset the board
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1656 while pressing the SPACE key.
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1657
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1658 </para></sect3>
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1659 -->
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1660
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1661 </sect2>
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1662
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diff changeset
1663 <sect2>
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1664 <title>Special RedBoot Commands </title>
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1665 <para>The <command>exec</command> command which allows the loading
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diff changeset
1666 and execution of Linux kernels,
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1667 is supported for this board (see <xref linkend="executing-programs">). The <command>
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1668 exec</command> parameters used for the AAED2000 are:</para>
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diff changeset
1669 <variablelist><varlistentry>
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1670 <term>-b <replaceable>&lt;addr></replaceable></term>
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1671 <listitem><para>Location Linux kernel was loaded to</para></listitem></varlistentry>
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diff changeset
1672 <varlistentry><term>
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diff changeset
1673 -l <replaceable>&lt;len></replaceable></term>
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1674 <listitem><para>Length of kernel</para></listitem></varlistentry>
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diff changeset
1675 <varlistentry><term>
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diff changeset
1676 -c <replaceable>"params"</replaceable></term>
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diff changeset
1677 <listitem><para>Parameters passed to kernel</para></listitem></varlistentry>
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1678 <varlistentry><term>-r <replaceable>&lt;addr></replaceable></term>
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1679 <listitem><para>'initrd' ramdisk location</para></listitem></varlistentry>
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1680 <varlistentry><term>-s <replaceable>&lt;len></replaceable></term>
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1681 <listitem><para>Length of initrd ramdisk</para></listitem></varlistentry>
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diff changeset
1682 </variablelist>
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diff changeset
1683
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diff changeset
1684 <para>The parameters for kernel image base and size are automatically
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diff changeset
1685 set after a load operation. So one way of starting the kernel would
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diff changeset
1686 be:
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diff changeset
1687
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diff changeset
1688 <screen>RedBoot&gt; <userinput>load -r -b 0x100000 zImage</userinput>
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diff changeset
1689 Raw file loaded 0x00100000-0x001a3d6c
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diff changeset
1690 RedBoot&gt; exec -c "console=ttyAC0,38400"
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diff changeset
1691 Using base address 0x00100000 and length 0x000a3d6c
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diff changeset
1692 Uncompressing Linux.....
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diff changeset
1693 </screen>
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diff changeset
1694
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diff changeset
1695 An image could also be put in flash and started directly:
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diff changeset
1696
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diff changeset
1697 <screen>RedBoot&gt; <userinput>exec -b 0x60040000 -l 0xc0000 -c "console=ttyAC0,38400"</userinput>
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diff changeset
1698 Uncompressing Linux.....
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diff changeset
1699 </screen>
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diff changeset
1700
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diff changeset
1701 </para>
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diff changeset
1702
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diff changeset
1703 </sect2>
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diff changeset
1704 <sect2>
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diff changeset
1705 <title>Memory Maps </title>
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diff changeset
1706 <para>The MMU page tables are located at 0x4000. <note><title>NOTE
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diff changeset
1707 </title>
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diff changeset
1708 <para>The virtual memory maps in this section use a C and B column to indicate
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diff changeset
1709 whether or not the region is cached (C) or buffered (B).</para>
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diff changeset
1710 </note><programlisting>Physical Address Range Description
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diff changeset
1711 ----------------------- ----------------------------------
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diff changeset
1712 0x00000000 - 0x01ffffff Flash
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diff changeset
1713 0x10000000 - 0x100fffff Ethernet
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diff changeset
1714 0x30000000 - 0x300fffff Board registers
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diff changeset
1715 0x40000000 - 0x4fffffff PCMCIA Slot (0)
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diff changeset
1716 0x50000000 - 0x5fffffff Compact Flash Slot (1)
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diff changeset
1717 0x80000000 - 0x800037ff I/O registers
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diff changeset
1718 0xb0060000 - 0xb00fffff On-chip SRAM
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diff changeset
1719 0xf0000000 - 0xfd3fffff SDRAM
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diff changeset
1720
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diff changeset
1721 Virtual Address Range C B Description
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diff changeset
1722 ----------------------- - - ----------------------------------
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diff changeset
1723 0x00000000 - 0x01f7ffff Y Y SDRAM
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diff changeset
1724 0x01f80000 - 0x01ffffff Y Y SDRAM (used for LCD frame buffer)
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diff changeset
1725 0x10000000 - 0x100fffff N N Ethernet
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diff changeset
1726 0x30000000 - 0x300fffff N N Board registers
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diff changeset
1727 0x40000000 - 0x4fffffff N N PCMCIA Slot (0)
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diff changeset
1728 0x50000000 - 0x5fffffff N N Compact Flash Slot (1)
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diff changeset
1729 0x60000000 - 0x61ffffff N N Flash
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diff changeset
1730 0x80000000 - 0x800037ff N N I/O registers
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diff changeset
1731 0xf0000000 - 0xffffffff N N SDRAM (uncached)
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diff changeset
1732
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diff changeset
1733 </programlisting></para>
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diff changeset
1734
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diff changeset
1735 </sect2>
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diff changeset
1736 <sect2>
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diff changeset
1737 <title>Rebuilding RedBoot</title>
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diff changeset
1738
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diff changeset
1739 <para>These shell variables provide the platform-specific information
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diff changeset
1740 needed for building RedBoot according to the procedure described in
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diff changeset
1741 <xref linkend="Rebuilding-Redboot">:
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diff changeset
1742 <programlisting>
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diff changeset
1743 export TARGET=aaed
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diff changeset
1744 export ARCH_DIR=arm
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diff changeset
1745 export PLATFORM_DIR=arm9/aaed2000
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diff changeset
1746 </programlisting>
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1747 </para>
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diff changeset
1748
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diff changeset
1749 <para>The names of configuration files are listed above with the
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diff changeset
1750 description of the associated modes.</para>
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diff changeset
1751
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diff changeset
1752 </sect2>
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diff changeset
1753 </sect1>
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1754
632
b928cfca72fc * cdl/redboot.cdl: Put virtually all options inside
jlarmour
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diff changeset
1755 <?Pub _newpage>
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jlarmour
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diff changeset
1756 <sect1 id="excaliburarm9">
b928cfca72fc * cdl/redboot.cdl: Put virtually all options inside
jlarmour
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diff changeset
1757 <title>ARM/ARM9 Altera Excalibur</title>
b928cfca72fc * cdl/redboot.cdl: Put virtually all options inside
jlarmour
parents: 333
diff changeset
1758 <sect2>
b928cfca72fc * cdl/redboot.cdl: Put virtually all options inside
jlarmour
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diff changeset
1759 <title>Overview</title>
b928cfca72fc * cdl/redboot.cdl: Put virtually all options inside
jlarmour
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diff changeset
1760 <para><indexterm><primary>Altera Excalibur ARM9 (excalibur_arm9)</primary>
b928cfca72fc * cdl/redboot.cdl: Put virtually all options inside
jlarmour
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diff changeset
1761 <secondary>installing and testing</secondary></indexterm><indexterm><primary>
b928cfca72fc * cdl/redboot.cdl: Put virtually all options inside
jlarmour
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diff changeset
1762 installing and testing</primary><secondary>Altera Excalibur ARM9 (excalibur_arm9)
b928cfca72fc * cdl/redboot.cdl: Put virtually all options inside
jlarmour
parents: 333
diff changeset
1763 </secondary></indexterm>RedBoot supports the serial port labelled
b928cfca72fc * cdl/redboot.cdl: Put virtually all options inside
jlarmour
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diff changeset
1764 P2 on the board. The default serial port settings are 57600,8,N,1. RedBoot
b928cfca72fc * cdl/redboot.cdl: Put virtually all options inside
jlarmour
parents: 333
diff changeset
1765 also supports flash management on the Excalibur.</para>
b928cfca72fc * cdl/redboot.cdl: Put virtually all options inside
jlarmour
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diff changeset
1766
b928cfca72fc * cdl/redboot.cdl: Put virtually all options inside
jlarmour
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diff changeset
1767 <para>The following RedBoot configurations are supported:
b928cfca72fc * cdl/redboot.cdl: Put virtually all options inside
jlarmour
parents: 333
diff changeset
1768
b928cfca72fc * cdl/redboot.cdl: Put virtually all options inside
jlarmour
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diff changeset
1769 <informaltable frame="all">
b928cfca72fc * cdl/redboot.cdl: Put virtually all options inside
jlarmour
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diff changeset
1770 <tgroup cols="4" colsep="1" rowsep="1" align="left">
b928cfca72fc * cdl/redboot.cdl: Put virtually all options inside
jlarmour
parents: 333
diff changeset
1771 <thead>
b928cfca72fc * cdl/redboot.cdl: Put virtually all options inside
jlarmour
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diff changeset
1772 <row>
b928cfca72fc * cdl/redboot.cdl: Put virtually all options inside
jlarmour
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diff changeset
1773 <entry>Configuration</entry>
b928cfca72fc * cdl/redboot.cdl: Put virtually all options inside
jlarmour
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diff changeset
1774 <entry>Mode</entry>
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jlarmour
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diff changeset
1775 <entry>Description</entry>
b928cfca72fc * cdl/redboot.cdl: Put virtually all options inside
jlarmour
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diff changeset
1776 <entry>File</entry>
b928cfca72fc * cdl/redboot.cdl: Put virtually all options inside
jlarmour
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diff changeset
1777 </row>
b928cfca72fc * cdl/redboot.cdl: Put virtually all options inside
jlarmour
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diff changeset
1778 </thead>
b928cfca72fc * cdl/redboot.cdl: Put virtually all options inside
jlarmour
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diff changeset
1779 <tbody>
b928cfca72fc * cdl/redboot.cdl: Put virtually all options inside
jlarmour
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diff changeset
1780 <row>
b928cfca72fc * cdl/redboot.cdl: Put virtually all options inside
jlarmour
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diff changeset
1781 <entry>ROMRAM</entry>
b928cfca72fc * cdl/redboot.cdl: Put virtually all options inside
jlarmour
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diff changeset
1782 <entry>[ROMRAM]</entry>
b928cfca72fc * cdl/redboot.cdl: Put virtually all options inside
jlarmour
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diff changeset
1783 <entry>RedBoot running from RAM, but contained in the
b928cfca72fc * cdl/redboot.cdl: Put virtually all options inside
jlarmour
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diff changeset
1784 board's flash boot sector.</entry>
b928cfca72fc * cdl/redboot.cdl: Put virtually all options inside
jlarmour
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diff changeset
1785 <entry>redboot_ROMRAM.ecm</entry>
b928cfca72fc * cdl/redboot.cdl: Put virtually all options inside
jlarmour
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diff changeset
1786 </row>
b928cfca72fc * cdl/redboot.cdl: Put virtually all options inside
jlarmour
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diff changeset
1787 <row>
b928cfca72fc * cdl/redboot.cdl: Put virtually all options inside
jlarmour
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diff changeset
1788 <entry>RAM</entry>
b928cfca72fc * cdl/redboot.cdl: Put virtually all options inside
jlarmour
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diff changeset
1789 <entry>[RAM]</entry>
b928cfca72fc * cdl/redboot.cdl: Put virtually all options inside
jlarmour
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diff changeset
1790 <entry>RedBoot running from RAM with RedBoot in the
b928cfca72fc * cdl/redboot.cdl: Put virtually all options inside
jlarmour
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diff changeset
1791 flash boot sector.</entry>
b928cfca72fc * cdl/redboot.cdl: Put virtually all options inside
jlarmour
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diff changeset
1792 <entry>redboot_RAM.ecm</entry>
b928cfca72fc * cdl/redboot.cdl: Put virtually all options inside
jlarmour
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diff changeset
1793 </row>
b928cfca72fc * cdl/redboot.cdl: Put virtually all options inside
jlarmour
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diff changeset
1794 <row>
b928cfca72fc * cdl/redboot.cdl: Put virtually all options inside
jlarmour
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diff changeset
1795 <entry>REDBOOT</entry>
b928cfca72fc * cdl/redboot.cdl: Put virtually all options inside
jlarmour
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diff changeset
1796 <entry>[ROMRAM]</entry>
b928cfca72fc * cdl/redboot.cdl: Put virtually all options inside
jlarmour
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diff changeset
1797 <entry>RedBoot running from top of RAM, but contained in
b928cfca72fc * cdl/redboot.cdl: Put virtually all options inside
jlarmour
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diff changeset
1798 the board's flash boot sector.</entry>
b928cfca72fc * cdl/redboot.cdl: Put virtually all options inside
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diff changeset
1799 <entry>redboot_REDBOOT.ecm</entry>
b928cfca72fc * cdl/redboot.cdl: Put virtually all options inside
jlarmour
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diff changeset
1800 </row>
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jlarmour
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diff changeset
1801 </tbody>
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jlarmour
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diff changeset
1802 </tgroup>
b928cfca72fc * cdl/redboot.cdl: Put virtually all options inside
jlarmour
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diff changeset
1803 </informaltable>
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jlarmour
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diff changeset
1804 </para>
b928cfca72fc * cdl/redboot.cdl: Put virtually all options inside
jlarmour
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diff changeset
1805
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diff changeset
1806 <note> <title>NOTE</title>
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diff changeset
1807 <para>RedBoot is currently hardwired to use a 128MB SDRAM SIMM module.
b928cfca72fc * cdl/redboot.cdl: Put virtually all options inside
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diff changeset
1808 </para>
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diff changeset
1809 </note>
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diff changeset
1810 </sect2>
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diff changeset
1811
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diff changeset
1812 <sect2>
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diff changeset
1813 <title>Initial Installation Method </title>
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diff changeset
1814 <para>A Windows utility
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diff changeset
1815 (<application>exc_flash_programmer.exe</application>) is used to
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diff changeset
1816 program flash using the ByteBlasterMV JTAG unit.
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diff changeset
1817 See board documentation for details on
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diff changeset
1818 in situ flash programming. </para>
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diff changeset
1819 <para>For ethernet to work (under Linux) the following jumper
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diff changeset
1820 settings should be used on a REV 2 board: <literallayout>
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diff changeset
1821 SW2-9 : OFF
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diff changeset
1822 U179 : 2-3
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diff changeset
1823 JP14-18 : OPEN
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diff changeset
1824 JP40-41 : 2-3
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diff changeset
1825 JP51-55 : 2-3
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diff changeset
1826 </literallayout>
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diff changeset
1827 </para>
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jlarmour
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diff changeset
1828 </sect2>
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diff changeset
1829 <sect2>
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diff changeset
1830 <title>Flash management</title>
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diff changeset
1831
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1832 <para>The ROMRAM and REDBOOT configurations supported on this platform
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diff changeset
1833 differ only in the memory layout (ROMRAM configuration runs RedBoot from
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diff changeset
1834 0x00008000 while REDBOOT configuration runs RedBoot from 0x07f80000). The
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diff changeset
1835 REDBOOT configuration allows applications to be loaded and run from
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diff changeset
1836 address 0x00008000.</para>
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diff changeset
1837 </sect2>
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diff changeset
1838 <sect2>
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diff changeset
1839 <title>Special RedBoot Commands </title>
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1840 <para>The <command>exec</command> command which allows the loading
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diff changeset
1841 and execution of Linux kernels,
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diff changeset
1842 is supported for this board (see <xref linkend="executing-programs">). The <command>
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diff changeset
1843 exec</command> parameters used for the Excalibur are:</para>
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diff changeset
1844 <variablelist><varlistentry>
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diff changeset
1845 <term>-b <replaceable>&lt;addr></replaceable></term>
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diff changeset
1846 <listitem><para>Location Linux kernel was loaded to</para></listitem></varlistentry>
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diff changeset
1847 <varlistentry><term>
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diff changeset
1848 -l <replaceable>&lt;len></replaceable></term>
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diff changeset
1849 <listitem><para>Length of kernel</para></listitem></varlistentry>
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diff changeset
1850 <varlistentry><term>
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diff changeset
1851 -c <replaceable>"params"</replaceable></term>
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diff changeset
1852 <listitem><para>Parameters passed to kernel</para></listitem></varlistentry>
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diff changeset
1853 <varlistentry><term>-r <replaceable>&lt;addr></replaceable></term>
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diff changeset
1854 <listitem><para>'initrd' ramdisk location</para></listitem></varlistentry>
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diff changeset
1855 <varlistentry><term>-s <replaceable>&lt;len></replaceable></term>
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1856 <listitem><para>Length of initrd ramdisk</para></listitem></varlistentry>
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diff changeset
1857 </variablelist>
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diff changeset
1858
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1859 <para>The parameters for kernel image base and size are automatically
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diff changeset
1860 set after a load operation. So one way of starting the kernel would
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diff changeset
1861 be:
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diff changeset
1862
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1863 <screen>RedBoot&gt; <userinput>load -r -b 0x100000 zImage</userinput>
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diff changeset
1864 Raw file loaded 0x00100000-0x001a3d6c
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diff changeset
1865 RedBoot&gt; <userinput>exec -c "console=ttyUA0,57600"</userinput>
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1866 Using base address 0x00100000 and length 0x000a3d6c
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diff changeset
1867 Uncompressing Linux.....
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diff changeset
1868 </screen>
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diff changeset
1869
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diff changeset
1870 An image could also be put in flash and started directly:
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diff changeset
1871
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diff changeset
1872 <screen>RedBoot&gt; <userinput>exec -b 0x40400000 -l 0xc0000 -c "console=ttyUA0,57600"</userinput>
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diff changeset
1873 Uncompressing Linux.....
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1874 </screen>
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diff changeset
1875
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1876 </para>
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1877 </sect2>
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1878 <sect2>
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1879 <title>Memory Maps </title>
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1880 <para>The MMU page tables are located at 0x4000. <note><title>NOTE
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1881 </title>
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diff changeset
1882 <para>The virtual memory maps in this section use a C and B column to indicate
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diff changeset
1883 whether or not the region is cached (C) or buffered (B).</para>
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diff changeset
1884 </note><programlisting>Physical Address Range Description
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diff changeset
1885 ----------------------- ----------------------------------
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jlarmour
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1886 0x00000000 - 0x07ffffff SDRAM
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diff changeset
1887 0x08000000 - 0x0805ffff On-chip SRAM
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diff changeset
1888 0x40000000 - 0x40ffffff Flash
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diff changeset
1889 0x7fffc000 - 0x7fffffff I/O registers
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diff changeset
1890 0x80000000 - 0x8001ffff PLD
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diff changeset
1891
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diff changeset
1892 Virtual Address Range C B Description
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diff changeset
1893 ----------------------- - - ----------------------------------
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1894 0x00000000 - 0x07ffffff Y Y SDRAM
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diff changeset
1895 0x08000000 - 0x0805ffff Y Y On-chip SRAM
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diff changeset
1896 0x40000000 - 0x403fffff N Y Flash
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diff changeset
1897 0x7fffc000 - 0x7fffffff N N I/O registers
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diff changeset
1898 0x80000000 - 0x8001ffff N N PLD
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diff changeset
1899 </programlisting></para>
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diff changeset
1900
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1901 </sect2>
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1902 <sect2>
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1903 <title>Rebuilding RedBoot</title>
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diff changeset
1904
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1905 <para>These shell variables provide the platform-specific information
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diff changeset
1906 needed for building RedBoot according to the procedure described in
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diff changeset
1907 <xref linkend="Rebuilding-Redboot">:
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1908 <programlisting>
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1909 export TARGET=excalibur_arm9
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diff changeset
1910 export ARCH_DIR=arm
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1911 export PLATFORM_DIR=arm9/excalibur
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1912 </programlisting>
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diff changeset
1913 </para>
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diff changeset
1914
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1915 <para>The names of configuration files are listed above with the
b928cfca72fc * cdl/redboot.cdl: Put virtually all options inside
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diff changeset
1916 description of the associated modes.</para>
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diff changeset
1917
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diff changeset
1918 </sect2>
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diff changeset
1919 </sect1>
211
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1920
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1921 <?Pub _newpage>
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1922 <sect1 id="ebsa285">
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1923 <title>ARM/StrongARM(SA110) Intel EBSA 285</title>
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1924 <sect2>
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1925 <title>Overview</title>
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1926 <para><indexterm><primary>Intel StrongArm EBSA 285</primary><secondary>installing
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diff changeset
1927 and testing</secondary></indexterm><indexterm><primary>installing and testing
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1928 </primary><secondary>Intel StrongArm EBSA 285</secondary></indexterm>RedBoot
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1929 uses the single EBSA-285 serial port. The default serial port settings are
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diff changeset
1930 38400,8,N,1. If the EBSA-285 is used as a host on a PCI backplane, ethernet
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1931 is supported using an Intel PRO/100+ ethernet adapter. Management of
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1932 onboard flash is also supported.</para>
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1933
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1934 <para>The following RedBoot configurations are supported:
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1935
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1936 <informaltable frame="all">
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1937 <tgroup cols="4" colsep="1" rowsep="1" align="left">
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1938 <thead>
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1939 <row>
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1940 <entry>Configuration</entry>
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1941 <entry>Mode</entry>
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1942 <entry>Description</entry>
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1943 <entry>File</entry>
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1944 </row>
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1945 </thead>
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1946 <tbody>
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1947 <row>
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1948 <entry>ROM</entry>
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1949 <entry>[ROM]</entry>
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1950 <entry>RedBoot running from the board's flash boot
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1951 sector.</entry>
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1952 <entry>redboot_ROM.ecm</entry>
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1953 </row>
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1954 <row>
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1955 <entry>RAM</entry>
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1956 <entry>[RAM]</entry>
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1957 <entry>RedBoot running from RAM with RedBoot in the
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1958 flash boot sector.</entry>
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1959 <entry>redboot_RAM.ecm</entry>
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1960 </row>
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1961 </tbody>
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1962 </tgroup>
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1963 </informaltable>
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1964 </para>
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1965
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1966 </sect2>
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1967 <sect2>
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1968 <title>Initial Installation Method </title>
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1969 <para>A linux application is used to program the flash over the PCI bus. Sources
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1970 and build instructions for this utility are located in the RedBoot sources
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1971 in: <filename class="directory">packages/hal/arm/ebsa285/current/support/linux/safl_util</filename>
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1972 </para>
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1973 </sect2>
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1974 <sect2>
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1975 <title>Communication Channels </title>
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1976 <para>Serial, Intel PRO 10/100+ 82559 PCI ethernet card.</para>
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1977 </sect2>
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1978 <sect2>
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1979 <title>Special RedBoot Commands </title>
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1980 <para>None.</para>
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1981 </sect2>
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1982 <sect2>
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1983 <title>Memory Maps </title>
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1984 <para>Physical and virtual mapping are mapped one to one on the EBSA-285 using
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1985 a first level page table located at address 0x4000. No second level tables
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1986 are used. <note><title>NOTE </title>
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1987 <para>The virtual memory maps in this section use a C and B column to indicate
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1988 whether or not the region is cached (C) or buffered (B).</para>
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1989 </note><programlisting>Address Range C B Description
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1990 ----------------------- - - ----------------------------------
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1991 0x00000000 - 0x01ffffff Y Y SDRAM
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1992 0x40000000 - 0x400fffff N N 21285 Registers
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1993 0x41000000 - 0x413fffff Y N flash
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1994 0x42000000 - 0x420fffff N N 21285 CSR Space
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1995 0x50000000 - 0x50ffffff Y Y Cache Clean
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1996 0x78000000 - 0x78ffffff N N Outbound Write Flush
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1997 0x79000000 - 0x7c0fffff N N PCI IACK/Config/IO
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1998 0x80000000 - 0xffffffff N Y PCI Memory </programlisting></para>
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1999 </sect2>
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2000 <sect2>
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2001 <title>Platform Resource Usage </title>
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2002 <para>Timer3 is used as a polled timer to provide timeout support for networking
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2003 and XModem file transfers.</para>
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2004 </sect2>
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2005 <!--
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2006 <sect2>
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2007 <title>Building eCos Test Cases to run with old RedBoots</title>
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2008 <para>If using older versions of RedBoot, the default configuration for
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2009 EBSA-285 will send diagnostic output to the serial line only, not over an ethernet
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2010 connection. To allow eCos programs to use RedBoot to channel diagnostic output to
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2011 GDB whether connected by net or serial, enable the configuration option <programlisting>
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2012 CYGSEM_HAL_VIRTUAL_VECTOR_DIAG
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2013 "Do diagnostic IO via virtual vector table"</programlisting> located here
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2014 in the common HAL configuration tree: <programlisting>"eCos HAL"
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2015 "ROM monitor support"
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2016 "Enable use of virtual vector calling interface"
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2017 "Do diagnostic IO via virtual vector table"</programlisting>Other
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2018 than that, no special configuration is required to use RedBoot. </para>
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2019 <para>If you have been using built-in stubs to acquire support for thread-aware
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2020 debugging, you can still do that, but you must only use the serial device
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2021 for GDB connection and you must not enable the option mentioned above. However,
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2022 it is no longer necessary to do that to get thread-awareness; RedBoot is thread
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2023 aware.</para>
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2024 </sect2>
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2025 -->
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2026 <sect2>
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2027 <title>Rebuilding RedBoot</title>
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2028
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2029 <para>These shell variables provide the platform-specific information
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2030 needed for building RedBoot according to the procedure described in
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2031 <xref linkend="Rebuilding-Redboot">:
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2032 <programlisting>
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2033 export TARGET=ebsa285
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2034 export ARCH_DIR=arm
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2035 export PLATFORM_DIR=ebsa285
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2036 </programlisting>
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2037 </para>
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2038
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2039 <para>The names of configuration files are listed above with the
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2040 description of the associated modes.</para>
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2041
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2042 </sect2>
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2043 </sect1>
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2044
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2045 <?Pub _newpage>
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2046 <sect1 id="brutus">
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2047 <title>ARM/StrongARM(SA1100) Intel Brutus</title>
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2048 <sect2>
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2049 <title>Overview</title>
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2050 <para><indexterm><primary>Intel-SA1100 (Brutus)</primary><secondary>installing
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2051 and testing</secondary></indexterm><indexterm><primary>installing and testing
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2052 </primary><secondary>Intel SA1100 (Brutus)</secondary></indexterm>RedBoot
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2053 supports both board serial ports on the Brutus board. The default serial port
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2054 settings are 38400,8,N,1. flash management is not currently supported. </para>
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2055
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2056 <para>The following RedBoot configurations are supported:
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2057
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2058 <informaltable frame="all">
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2059 <tgroup cols="4" colsep="1" rowsep="1" align="left">
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2060 <thead>
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2061 <row>
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2062 <entry>Configuration</entry>
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2063 <entry>Mode</entry>
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2064 <entry>Description</entry>
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2065 <entry>File</entry>
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2066 </row>
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2067 </thead>
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2068 <tbody>
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2069 <row>
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2070 <entry>ROM</entry>
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2071 <entry>[ROM]</entry>
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2072 <entry>RedBoot running from the board's flash boot
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2073 sector.</entry>
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2074 <entry>redboot_ROM.ecm</entry>
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2075 </row>
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2076 <row>
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2077 <entry>RAM</entry>
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2078 <entry>[RAM]</entry>
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2079 <entry>RedBoot running from RAM with RedBoot in the
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2080 flash boot sector.</entry>
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2081 <entry>redboot_RAM.ecm</entry>
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2082 </row>
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2083 </tbody>
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2084 </tgroup>
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2085 </informaltable>
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2086 </para>
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2087
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2088 </sect2>
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2089 <sect2>
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2090 <title>Initial Installation Method </title>
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2091 <para>Device programmer is used to program socketed flash parts.</para>
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2092 </sect2>
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2093 <sect2>
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2094 <title>Special RedBoot Commands </title>
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2095 <para>None.</para>
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2096 </sect2>
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2097 <sect2>
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2098 <title>Memory Maps </title>
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2099 <para>The first level page table is located at physical address 0xc0004000.
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2100 No second level tables are used.
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2101
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diff changeset
2102 <note><title>NOTE</title>
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2103 <para>The virtual memory maps in this section use a C and B column to indicate
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2104 whether or not the region is cached (C) or buffered (B).</para>
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2105
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2106 </note><programlisting>Physical Address Range Description
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2107 ----------------------- ----------------------------------
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2108 0x00000000 - 0x000fffff Boot ROM
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2109 0x08000000 - 0x083fffff Application flash
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diff changeset
2110 0x10000000 - 0x100fffff SRAM
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diff changeset
2111 0x18000000 - 0x180fffff Chip Select 3
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2112 0x20000000 - 0x3fffffff PCMCIA
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2113 0x80000000 - 0xbfffffff SA-1100 Internal Registers
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diff changeset
2114 0xc0000000 - 0xc7ffffff DRAM Bank 0
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diff changeset
2115 0xc8000000 - 0xcfffffff DRAM Bank 1
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diff changeset
2116 0xd0000000 - 0xd7ffffff DRAM Bank 2
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diff changeset
2117 0xd8000000 - 0xdfffffff DRAM Bank 3
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2118 0xe0000000 - 0xe7ffffff Cache Clean
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diff changeset
2119
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2120
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2121 Virtual Address Range C B Description
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diff changeset
2122 ----------------------- - - ----------------------------------
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2123 0x00000000 - 0x003fffff Y Y DRAM Bank 0
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2124 0x00400000 - 0x007fffff Y Y DRAM Bank 1
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2125 0x00800000 - 0x00bfffff Y Y DRAM Bank 2
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2126 0x00c00000 - 0x00ffffff Y Y DRAM Bank 3
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2127 0x08000000 - 0x083fffff Y Y Application flash
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diff changeset
2128 0x10000000 - 0x100fffff Y N SRAM
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diff changeset
2129 0x20000000 - 0x3fffffff N N PCMCIA
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2130 0x40000000 - 0x400fffff Y Y Boot ROM
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2131 0x80000000 - 0xbfffffff N N SA-1100 Internal Registers
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2132 0xe0000000 - 0xe7ffffff Y Y Cache Clean</programlisting></para>
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diff changeset
2133 </sect2>
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2134 <sect2>
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2135 <title>Platform Resource Usage </title>
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2136 <para>
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2137 The SA11x0 OS timer is used as a polled timer to provide timeout
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2138 support for XModem file transfers.</para>
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2139 </sect2>
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2140 <sect2>
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2141 <title>Rebuilding RedBoot</title>
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2142
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2143 <para>These shell variables provide the platform-specific information
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2144 needed for building RedBoot according to the procedure described in
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diff changeset
2145 <xref linkend="Rebuilding-Redboot">:
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diff changeset
2146 <programlisting>
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2147 export TARGET=brutus
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2148 export ARCH_DIR=arm
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2149 export PLATFORM_DIR=sa11x0/brutus
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2150 </programlisting>
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2151 </para>
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2152
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2153 <para>The names of configuration files are listed above with the
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2154 description of the associated modes.</para>
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diff changeset
2155
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2156 </sect2>
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2157 </sect1>
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2158
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diff changeset
2159 <?Pub _newpage>
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diff changeset
2160 <sect1 id="sa1100mm">
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2161 <title>ARM/StrongARM(SA1100) Intel SA1100 Multimedia Board </title>
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2162 <sect2>
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2163 <title>Overview</title>
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2164 <para><indexterm><primary>Intel SA1100 Multimedia Board</primary><secondary>
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diff changeset
2165 installing and testing</secondary></indexterm><indexterm><primary>installing
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2166 and testing</primary><secondary>Intel SA1100 Multimedia Board</secondary>
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2167 </indexterm>RedBoot supports both board serial ports. The default serial port
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2168 settings are 38400,8,N,1. flash management is also supported.</para>
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2169
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2170 <para>The following RedBoot configurations are supported:
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2171
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2172 <informaltable frame="all">
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2173 <tgroup cols="4" colsep="1" rowsep="1" align="left">
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2174 <thead>
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2175 <row>
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2176 <entry>Configuration</entry>
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2177 <entry>Mode</entry>
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2178 <entry>Description</entry>
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2179 <entry>File</entry>
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diff changeset
2180 </row>
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diff changeset
2181 </thead>
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diff changeset
2182 <tbody>
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diff changeset
2183 <row>
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diff changeset
2184 <entry>ROM</entry>
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2185 <entry>[ROM]</entry>
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2186 <entry>RedBoot running from the board's flash boot
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2187 sector.</entry>
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2188 <entry>redboot_ROM.ecm</entry>
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diff changeset
2189 </row>
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2190 <row>
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2191 <entry>RAM</entry>
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2192 <entry>[RAM]</entry>
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2193 <entry>RedBoot running from RAM with RedBoot in the
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diff changeset
2194 flash boot sector.</entry>
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2195 <entry>redboot_RAM.ecm</entry>
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2196 </row>
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2197 </tbody>
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2198 </tgroup>
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2199 </informaltable>
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2200 </para>
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2201 </sect2>
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2202
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2203 <sect2>
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2204 <title>Initial Installation Method </title>
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2205 <para>A device programmer is used to program socketed flash parts.</para>
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2206 </sect2>
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2207 <sect2>
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2208 <title>Special RedBoot Commands </title>
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2209 <para>None.</para>
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2210 </sect2>
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2211 <sect2>
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2212 <title>Memory Maps </title>
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2213 <para>The first level page table is located at physical address 0xc0004000.
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2214 No second level tables are used.<note><title>NOTE</title>
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2215 <para>The virtual memory maps in this section use a C and B column to indicate
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2216 whether or not the region is cached (C) or buffered (B).</para>
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2217 </note><programlisting>Physical Address Range Description
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diff changeset
2218 ----------------------- ----------------------------------
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diff changeset
2219 0x00000000 - 0x000fffff Boot flash
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diff changeset
2220 0x08000000 - 0x083fffff Application flash
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diff changeset
2221 0x10000000 - 0x107fffff SA-1101 Board Registers
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diff changeset
2222 0x18000000 - 0x180fffff Ct8020 DSP
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diff changeset
2223 0x18400000 - 0x184fffff XBusReg
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diff changeset
2224 0x18800000 - 0x188fffff SysRegA
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diff changeset
2225 0x18c00000 - 0x18cfffff SysRegB
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2226 0x19000000 - 0x193fffff Spare CPLD A
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diff changeset
2227 0x19400000 - 0x197fffff Spare CPLD B
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diff changeset
2228 0x20000000 - 0x3fffffff PCMCIA
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diff changeset
2229 0x80000000 - 0xbfffffff SA1100 Internal Registers
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diff changeset
2230 0xc0000000 - 0xc07fffff DRAM Bank 0
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diff changeset
2231 0xe0000000 - 0xe7ffffff Cache Clean
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diff changeset
2232 Virtual Address Range C B Description
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diff changeset
2233
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diff changeset
2234
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diff changeset
2235 ----------------------- - - ----------------------------------
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2236 0x00000000 - 0x007fffff Y Y DRAM Bank 0
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diff changeset
2237 0x08000000 - 0x083fffff Y Y Application flash
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2238 0x10000000 - 0x100fffff N N SA-1101 Registers
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2239 0x18000000 - 0x180fffff N N Ct8020 DSP
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2240 0x18400000 - 0x184fffff N N XBusReg
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2241 0x18800000 - 0x188fffff N N SysRegA
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2242 0x18c00000 - 0x18cfffff N N SysRegB
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2243 0x19000000 - 0x193fffff N N Spare CPLD A
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2244 0x19400000 - 0x197fffff N N Spare CPLD B
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2245 0x20000000 - 0x3fffffff N N PCMCIA
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2246 0x50000000 - 0x500fffff Y Y Boot flash
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2247 0x80000000 - 0xbfffffff N N SA1100 Internal Registers
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2248 0xc0000000 - 0xc07fffff N Y DRAM Bank 0
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2249 0xe0000000 - 0xe7ffffff Y Y Cache Clean</programlisting></para>
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diff changeset
2250 </sect2>
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diff changeset
2251 <sect2>
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2252 <title>Platform Resource Usage </title>
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2253 <para> The SA11x0 OS timer is used as a polled timer to provide timeout support
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2254 for XModem file transfers.</para>
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2255 </sect2><sect2>
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diff changeset
2256
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diff changeset
2257 <title>Rebuilding RedBoot</title>
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2258
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2259 <para>These shell variables provide the platform-specific information
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diff changeset
2260 needed for building RedBoot according to the procedure described in
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diff changeset
2261 <xref linkend="Rebuilding-Redboot">:
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diff changeset
2262 <programlisting>
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diff changeset
2263 export TARGET=sa1100mm
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2264 export ARCH_DIR=arm
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2265 export PLATFORM_DIR=sa11x0/sa1100mm
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2266 </programlisting>
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2267 </para>
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diff changeset
2268
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2269 <para>The names of configuration files are listed above with the
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diff changeset
2270 description of the associated modes.</para>
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2271
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2272 </sect2>
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2273 </sect1>
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diff changeset
2274
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diff changeset
2275
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diff changeset
2276
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diff changeset
2277 <?Pub _newpage>
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diff changeset
2278 <sect1 id="assabet">
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diff changeset
2279 <title>ARM/StrongARM(SA1110) Intel SA1110 (Assabet) </title>
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diff changeset
2280 <sect2>
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diff changeset
2281 <title>Overview</title>
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2282 <para><indexterm><primary>Intel SA1110 (Assabet)</primary><secondary>installing
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2283 and testing</secondary></indexterm><indexterm><primary>installing and testing
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2284 </primary><secondary>Intel SA1110 (Assabet)</secondary></indexterm>RedBoot
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2285 supports the board serial port and the compact flash ethernet port. The default
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2286 serial port settings are 38400,8,N,1. RedBoot also supports flash management
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diff changeset
2287 on the Assabet. </para>
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diff changeset
2288
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2289 <para>The following RedBoot configurations are supported:
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diff changeset
2290
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diff changeset
2291 <informaltable frame="all">
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diff changeset
2292 <tgroup cols="4" colsep="1" rowsep="1" align="left">
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diff changeset
2293 <thead>
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diff changeset
2294 <row>
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diff changeset
2295 <entry>Configuration</entry>
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diff changeset
2296 <entry>Mode</entry>
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diff changeset
2297 <entry>Description</entry>
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diff changeset
2298 <entry>File</entry>
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diff changeset
2299 </row>
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2300 </thead>
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diff changeset
2301 <tbody>
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diff changeset
2302 <row>
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diff changeset
2303 <entry>ROM</entry>
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diff changeset
2304 <entry>[ROM]</entry>
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2305 <entry>RedBoot running from the board's flash boot
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2306 sector.</entry>
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2307 <entry>redboot_ROM.ecm</entry>
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diff changeset
2308 </row>
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diff changeset
2309 <row>
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2310 <entry>RAM</entry>
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diff changeset
2311 <entry>[RAM]</entry>
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2312 <entry>RedBoot running from RAM with RedBoot in the
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2313 flash boot sector.</entry>
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diff changeset
2314 <entry>redboot_RAM.ecm</entry>
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diff changeset
2315 </row>
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2316 </tbody>
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2317 </tgroup>
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2318 </informaltable>
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2319 </para>
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2320 </sect2>
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2321 <sect2>
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2322 <title>Initial Installation Method</title>
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2323 <para>A Windows or Linux utility is used to program flash over parallel port
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2324 driven JTAG interface. See board documentation for details on in situ flash
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2325 programming. </para>
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2326 <para>The flash parts are also socketed and may be programmed in a suitable
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2327 device programmer.</para>
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diff changeset
2328 </sect2>
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diff changeset
2329 <sect2>
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2330 <title>Special RedBoot Commands</title>
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2331 <para>None.</para>
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2332 </sect2>
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2333 <sect2>
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2334 <title>Memory Maps</title>
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2335 <para>The first level page table is located at physical address 0xc0004000.
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2336 No second level tables are used.<note><title>NOTE</title>
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2337 <para>The virtual memory maps in this section use a C and B column to indicate
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2338 whether or not the region is cached (C) or buffered (B).</para>
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2339 </note><programlisting>Physical Address Range Description
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diff changeset
2340 ----------------------- ----------------------------------
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2341 0x00000000 - 0x07ffffff flash
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diff changeset
2342 0x08000000 - 0x0fffffff SA-1111 Board flash
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diff changeset
2343 0x10000000 - 0x17ffffff Board Registers
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2344 0x18000000 - 0x1fffffff Ethernet
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diff changeset
2345 0x20000000 - 0x2fffffff SA-1111 Board PCMCIA
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diff changeset
2346 0x30000000 - 0x3fffffff Compact Flash
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diff changeset
2347 0x40000000 - 0x47ffffff SA-1111 Board
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diff changeset
2348 0x48000000 - 0x4bffffff GFX
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diff changeset
2349 0x80000000 - 0xbfffffff SA-1110 Internal Registers
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diff changeset
2350 0xc0000000 - 0xc7ffffff DRAM Bank 0
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diff changeset
2351 0xc8000000 - 0xcfffffff DRAM Bank 1
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diff changeset
2352 0xd0000000 - 0xd7ffffff DRAM Bank 2
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diff changeset
2353 0xd8000000 - 0xdfffffff DRAM Bank 3
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diff changeset
2354 0xe0000000 - 0xe7ffffff Cache Clean
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diff changeset
2355
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diff changeset
2356
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2357 Virtual Address Range C B Description
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diff changeset
2358 ----------------------- - - ----------------------------------
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diff changeset
2359 0x00000000 - 0x01ffffff Y Y DRAM Bank 0
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diff changeset
2360 0x08000000 - 0x0fffffff Y Y SA-1111 Board flash
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diff changeset
2361 0x10000000 - 0x17ffffff N N Board Registers
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diff changeset
2362 0x18000000 - 0x1fffffff N N Ethernet
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diff changeset
2363 0x20000000 - 0x2fffffff N N SA-1111 Board PCMCIA
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diff changeset
2364 0x30000000 - 0x3fffffff N N Compact Flash
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2365 0x40000000 - 0x47ffffff N N SA-1111 Board
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diff changeset
2366 0x48000000 - 0x4bffffff N N GFX
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diff changeset
2367 0x50000000 - 0x57ffffff Y Y flash
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diff changeset
2368 0x80000000 - 0xbfffffff N N SA-1110 Internal Registers
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diff changeset
2369 0xc0000000 - 0xc1ffffff N Y DRAM Bank 0
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2370 0xe0000000 - 0xe7ffffff Y Y Cache Clean
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2371 </programlisting></para>
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diff changeset
2372 </sect2>
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diff changeset
2373 <sect2>
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2374 <title>Platform Resource Usage </title>
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2375 <para>The SA11x0 OS timer is used as a polled timer to provide timeout support
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2376 for network and XModem file transfers.</para>
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2377 </sect2><sect2>
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2378 <title>Rebuilding RedBoot</title>
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2379
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2380 <para>These shell variables provide the platform-specific information
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2381 needed for building RedBoot according to the procedure described in
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2382 <xref linkend="Rebuilding-Redboot">:
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2383 <programlisting>
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2384 export TARGET=assabet
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2385 export ARCH_DIR=arm
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2386 export PLATFORM_DIR=sa11x0/assabet
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2387 </programlisting>
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2388 </para>
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2389
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2390 <para>The names of configuration files are listed above with the
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2391 description of the associated modes.</para>
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2392
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2393 </sect2>
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2394 </sect1>
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2395
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2396 <?Pub _newpage>
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2397 <sect1 id="nano">
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2398 <title>ARM/StrongARM(SA11X0) Bright Star Engineering commEngine and nanoEngine</title>
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2399 <sect2>
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2400 <title>Overview</title>
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2401 <para><indexterm><primary>commEngine</primary><secondary>installing and testing
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2402 </secondary></indexterm><indexterm><primary>nanoEngine</primary><secondary>
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2403 installing and testing</secondary></indexterm><indexterm><primary>installing
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2404 and testing</primary><secondary>commEngine</secondary></indexterm><indexterm>
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2405 <primary>installing and testing</primary><secondary>nanoEngine</secondary>
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2406 </indexterm>RedBoot supports a serial port and the built in ethernet port
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2407 for communication and downloads. The default serial port settings are 38400,8,N,1.
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2408 RedBoot runs from and supports flash management for the system flash
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2409 region.</para>
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2410
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2411 <para>The following RedBoot configurations are supported:
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2412
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2413 <informaltable frame="all">
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2414 <tgroup cols="4" colsep="1" rowsep="1" align="left">
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2415 <thead>
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2416 <row>
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2417 <entry>Configuration</entry>
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2418 <entry>Mode</entry>
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2419 <entry>Description</entry>
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2420 <entry>File</entry>
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2421 </row>
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2422 </thead>
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2423 <tbody>
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2424 <row>
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2425 <entry>POST</entry>
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2426 <entry>[ROM]</entry>
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2427 <entry>RedBoot running from the first free flash block
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2428 at 0x40000.</entry>
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2429 <entry>redboot_ROM.ecm</entry>
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2430 </row>
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2431 <row>
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2432 <entry>RAM</entry>
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2433 <entry>[RAM]</entry>
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2434 <entry>RedBoot running from RAM with RedBoot in the
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2435 flash boot sector.</entry>
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2436 <entry>redboot_RAM.ecm</entry>
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2437 </row>
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2438 </tbody>
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2439 </tgroup>
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2440 </informaltable>
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2441 </para>
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2442
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2443 </sect2>
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2444 <sect2>
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2445 <title>Initial Installation</title>
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2446 <para>Unlike other targets, the nanoEngine comes equipped with boot firmware
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2447 which you cannot modify. See chapter 5, "nanoEngine Firmware" of the <citetitle>
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2448 nanoEngine Hardware Reference Manual</citetitle> (we refer to "July 17, 2000
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2449 Rev 0.6") from Bright Star Engineering. </para>
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2450 <para>Because of this, eCos, and therefore Redboot, only supports a
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2451 special configuration of the ROM mode, starting at offset 0x40000 in
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2452 the flash.</para>
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2453 <para>Briefly, the POST-configuration RedBoot image lives in flash following the
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2454 BSE firmware. The BSE firmware is configured, using its standard <command>
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2455 bootcmd</command> command, to run RedBoot at startup.
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2456 </para>
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2457 </sect2>
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2458 <sect2>
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2459 <title>Download Instructions</title>
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2460 <para>You can perform the initial load of the POST-configuration RedBoot image into
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2461 flash using the BSE firmware's <command>load</command> command.
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2462 This will load a binary file, using TFTP, and program it into flash in one
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2463 operation. Because no memory management is used in the BSE firmware, flash
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2464 is mapped from address zero upwards, so the address for the RedBoot POST image
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2465 is 0x40000. You must use the binary version of RedBoot for this,
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2466 <filename>redboot-post.bin</filename>.</para>
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2467
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2468 <para>This assumes you have set up the other BSE firmware config
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2469 parameters such that it can communicate over your network to your TFTP
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2470 server.
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2471 <screen>><userinput>load redboot-post.bin 40000</userinput>
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2472 loading ... erasing blk at 00040000
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2473 erasing blk at 00050000
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2474 94168 bytes loaded cksum 00008579
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2475 done
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2476 >
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2477 > <userinput>set bootcmd "go 40000"</userinput>
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2478 > <userinput>get</userinput>
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2479 myip = 10.16.19.198
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2480 netmask = 255.255.255.0
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2481 eth = 0
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2482 gateway = 10.16.19.66
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2483 serverip = 10.16.19.66
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2484 bootcmd = go 40000
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2485 ></screen>
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2486
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2487 <note><title>NOTE</title>
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2488 <para>the BSE firmware runs its serial IO at 9600 Baud; RedBoot runs instead
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2489 at 38400 Baud. You must select the right baud rate in your terminal program
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2490 to be able to set up the BSE firmware.</para>
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2491 </note>
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2492
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2493 After a reset, the BSE firmware will print
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2494
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2495 <screen>Boot: BSE 2000 Sep 12 2000 14:00:30
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2496 autoboot: "go 40000" [hit ESC to abort]</screen>
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2497
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2498 and then RedBoot starts, switching to 38400 Baud.</para>
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2499
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2500 <para>Once you have installed a bootable RedBoot in the system in this
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2501 manner, we advise re-installing using the generic method described in
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2502 <xref linkend="updating-redboot"> in order that the Flash Image System
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2503 contains an appropriate description of the flash entries.</para>
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2504 </sect2>
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2505 <sect2>
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2506 <title>Cohabiting with POST in Flash</title>
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2507 <para>The configuration file named <filename>redboot_POST.ecm</filename>
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2508 configures RedBoot to build for execution at address 0x50040000 (or, during
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2509 bootup, 0x00040000). This is to allow power-on self-test (POST) code or immutable
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2510 firmware to live in the lower addresses of the flash and to run before RedBoot
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2511 gets control. The assumption is that RedBoot will be entered at its base address
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2512 in physical memory, that is 0x00040000.</para>
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2513
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2514 <para>Alternatively, for testing, you can call it in an already running system
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2515 by using <userinput>go 0x50040040</userinput> at another RedBoot prompt, or
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2516 a branch to that address. The address is where the reset vector
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2517 points. It is reported by RedBoot's <command>load</command> command
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2518 and listed
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2519 by the <command>fis list</command> command, amongst other
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2520 places.</para>
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2521
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2522 <para>Using the POST configuration enables a normal config option which causes
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diff changeset
2523 linking and initialization against memory layout files called "...post..."
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2524 rather than "...rom..." or "...ram..." in the <filename class="directory">include/pkgconf
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2525 </filename> directory. Specifically:<literallayout><filename>include/pkgconf/mlt_arm_sa11x0_nano_post.h</filename>
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diff changeset
2526 <filename>include/pkgconf/mlt_arm_sa11x0_nano_post.ldi</filename>
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diff changeset
2527 <filename>include/pkgconf/mlt_arm_sa11x0_nano_post.mlt</filename></literallayout>
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2528
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diff changeset
2529 It is these you should edit if you wish to move the execution address
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2530 from 0x50040000 in the POST configuration. Startup mode naturally
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2531 remains ROM in this configuration.</para>
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diff changeset
2532
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2533 <para>Because the nanoEngine contains immutable boot firmware at the start
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2534 of flash, RedBoot for this target is configured to reserve that area in the
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diff changeset
2535 Flash Image System, and to create by default an entry for the POST
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2536 mode RedBoot.
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2537 <screen>
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diff changeset
2538 RedBoot> <userinput>fis list</userinput>
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2539 Name FLASH addr Mem addr Length Entry point
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2540 (reserved) 0x50000000 0x50000000 0x00040000 0x00000000
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2541 RedBoot[post] 0x50040000 0x00100000 0x00020000 0x50040040
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2542 RedBoot config 0x503E0000 0x503E0000 0x00010000 0x00000000
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2543 FIS directory 0x503F0000 0x503F0000 0x00010000 0x00000000
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diff changeset
2544 RedBoot>
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2545 </screen>
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diff changeset
2546 The entry "(reserved)" ensures that the FIS cannot attempt
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diff changeset
2547 to overwrite the BSE firmware, thus ensuring that the board remains bootable
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2548 and recoverable even after installing a broken RedBoot image.</para>
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diff changeset
2549 </sect2>
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diff changeset
2550 <sect2>
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2551 <title>Special RedBoot Commands</title>
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2552 <para>The nanoEngine/commEngine has one or two Intel i82559 Ethernet controllers
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2553 installed, but these have no associated serial EEPROM in which to record their
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diff changeset
2554 Ethernet Station Address (ESA, or MAC address). The BSE firmware records an
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diff changeset
2555 ESA for the device it uses, but this information is not available to RedBoot;
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diff changeset
2556 we cannot share it.</para>
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2557 <para>To keep the ESAs for the two ethernet interfaces, two new items of RedBoot
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2558 configuration data are introduced. You can list them with the RedBoot command <command>
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diff changeset
2559 fconfig -l</command> thus:
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diff changeset
2560 <screen>
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diff changeset
2561 RedBoot> <userinput>fconfig -l</userinput>
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2562 Run script at boot: false
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diff changeset
2563 Use BOOTP for network configuration: false
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diff changeset
2564 Local IP address: 10.16.19.91
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diff changeset
2565 Default server IP address: 10.16.19.66
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diff changeset
2566 Network hardware address [MAC] for eth0: 0x00:0xB5:0xE0:0xB5:0xE0:0x99
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diff changeset
2567 Network hardware address [MAC] for eth1: 0x00:0xB5:0xE0:0xB5:0xE0:0x9A
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diff changeset
2568 GDB connection port: 9000
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diff changeset
2569 Network debug at boot time: false
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diff changeset
2570 RedBoot></screen>
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diff changeset
2571
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diff changeset
2572 You should set them before running RedBoot or eCos applications with
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diff changeset
2573 the board connected to a network. The <command>fconfig </command>
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2574 command can be used as for any configuration data item; the entire ESA
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2575 is entered in one line.</para>
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diff changeset
2576 </sect2>
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diff changeset
2577 <sect2>
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diff changeset
2578 <title>Memory Maps</title>
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2579 <para>The first level page table is located at physical address 0xc0004000.
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2580 No second level tables are used. <note><title>NOTE</title>
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2581 <para>The virtual memory maps in this section use a C and B column to indicate
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diff changeset
2582 whether or not the region is cached (C) or buffered (B).</para>
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2583 </note><programlisting>Physical Address Range Description
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diff changeset
2584 ----------------------- ----------------------------------
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2585 0x00000000 - 0x003fffff 4Mb FLASH (nCS0)
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2586 0x18000000 - 0x18ffffff Internal PCI bus - 2 x i82559 ethernet
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2587 0x40000000 - 0x4fffffff External IO or PCI bus
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2588 0x80000000 - 0xbfffffff SA-1110 Internal Registers
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2589 0xc0000000 - 0xc7ffffff DRAM Bank 0 - 32Mb SDRAM
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diff changeset
2590 0xc8000000 - 0xcfffffff DRAM Bank 1 - empty
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diff changeset
2591 0xe0000000 - 0xe7ffffff Cache Clean
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diff changeset
2592
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diff changeset
2593 Virtual Address Range C B Description
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diff changeset
2594 ----------------------- - - ----------------------------------
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2595 0x00000000 - 0x001fffff Y Y DRAM - 8Mb to 32Mb
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2596 0x18000000 - 0x180fffff N N Internal PCI bus - 2 x i82559 ethernet
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diff changeset
2597 0x40000000 - 0x4fffffff N N External IO or PCI bus
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2598 0x50000000 - 0x51ffffff Y Y Up to 32Mb FLASH (nCS0)
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diff changeset
2599 0x80000000 - 0xbfffffff N N SA-1110 Internal Registers
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2600 0xc0000000 - 0xc0ffffff N Y DRAM Bank 0: 8 or 16Mb
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2601 0xc8000000 - 0xc8ffffff N Y DRAM Bank 1: 8 or 16Mb or absent
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2602 0xe0000000 - 0xe7ffffff Y Y Cache Clean</programlisting>
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2603 </para>
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2604
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2605 <para>The ethernet devices use a "PCI window" to communicate with the CPU.
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2606 This is 1Mb of SDRAM which is shared with the ethernet devices that are on
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2607 the PCI bus. It is neither cached nor buffered, to ensure that CPU and PCI
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2608 accesses see correct data in the correct order. By default it is configured
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2609 to be megabyte number 30, at addresses 0x01e00000-0x01efffff. This can be
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2610 modified, and indeed must be, if less than 32Mb of SDRAM is installed, via
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2611 the memory layout tool, or by moving the section <computeroutput>__pci_window
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2612 </computeroutput> referred to by symbols <computeroutput>CYGMEM_SECTION_pci_window*
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2613 </computeroutput> in the linker script. </para>
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2614 <para>Though the nanoEngine ships with 32Mb of SDRAM all attached to DRAM
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2615 bank 0, the code can cope with any of these combinations also; "2 x " in this
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2616 context means one device in each DRAM Bank. <literallayout>1 x 8Mb = 8Mb 2 x 8Mb = 16Mb
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2617 1 x 16Mb = 16Mb 2 x 16Mb = 32Mb</literallayout>All are programmed the same
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2618 in the memory controller. </para>
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2619 <para>Startup code detects which is fitted and programs the memory map accordingly.
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2620 If the device(s) is 8Mb, then there are gaps in the physical memory map, because
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2621 a high order address bit is not connected. The gaps are the higher 2Mb out
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diff changeset
2622 of every 4Mb.</para>
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diff changeset
2623
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2624 <para> The SA11x0 OS timer is used as a polled timer to provide timeout
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2625 support within RedBoot.</para>
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diff changeset
2626 </sect2>
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diff changeset
2627 <sect2>
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diff changeset
2628 <title>Nano Platform Port</title>
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2629 <para>The nano is in the set of SA11X0-based platforms. It uses the arm architectural
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diff changeset
2630 HAL, the sa11x0 variant HAL, plus the nano platform hal. These are components
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diff changeset
2631 <literallayout>CYGPKG_HAL_ARM hal/arm/arch/
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diff changeset
2632 CYGPKG_HAL_ARM_SA11X0 hal/arm/sa11x0/var
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diff changeset
2633 CYGPKG_HAL_ARM_SA11X0_NANO hal/arm/sa11x0/nano</literallayout> respectively.
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2634 </para>
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2635 <para>The target name is "nano" which includes all these, plus the ethernet
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diff changeset
2636 driver packages, flash driver, and so on.</para>
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diff changeset
2637 </sect2>
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diff changeset
2638 <sect2>
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2639 <title>Ethernet Driver</title>
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2640 <para>The ethernet driver is in two parts: </para>
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2641 <para>A generic ether driver for Intel i8255x series devices, specifically
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2642 the i82559, is <computeroutput>devs/eth/intel/i82559</computeroutput>. Its
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2643 package name is <computeroutput>CYGPKG_DEVS_ETH_INTEL_I82559</computeroutput>.
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2644 </para>
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2645 <para>The platform-specific ether driver is <computeroutput>devs/eth/arm/nano
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2646 </computeroutput>. Its package is <computeroutput>CYGPKG_DEVS_ETH_ARM_NANO
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2647 </computeroutput>. This tells the generic driver the address in IO memory
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2648 of the chip, for example, and other configuration details. This driver picks
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2649 up the ESA from RedBoot's configuration data - unless configured to use a
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2650 static ESA in the usual manner. </para>
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2651 </sect2><sect2>
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2652 <title>Rebuilding RedBoot</title>
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2653
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2654 <para>These shell variables provide the platform-specific information
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2655 needed for building RedBoot according to the procedure described in
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2656 <xref linkend="Rebuilding-Redboot">:
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2657 <programlisting>
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2658 export TARGET=nano
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2659 export ARCH_DIR=arm
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2660 export PLATFORM_DIR=sa11x0/nano
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2661 </programlisting>
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2662 </para>
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2663
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2664 <para>The names of configuration files are listed above with the
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2665 description of the associated modes.</para>
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2666 </sect2>
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2667 </sect1>
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2668
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diff changeset
2669 <?Pub _newpage>
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2670 <sect1 id="ipaq">
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2671 <title>ARM/StrongARM(SA11X0) Compaq iPAQ PocketPC</title>
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2672 <indexterm><primary>Compaq iPAQ PocketPC</primary><secondary>installing and
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2673 testing</secondary></indexterm><indexterm><primary>installing and testing
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2674 </primary><secondary>Compaq iPAQ PocketPC</secondary></indexterm>
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diff changeset
2675 <sect2>
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2676 <title>Overview</title>
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2677 <para>RedBoot supports the serial port via cradle or cable, and Compact Flash
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2678 ethernet cards if fitted for communication and downloads. The LCD touchscreen
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2679 may also be used for the console, although by default RedBoot will switch
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2680 exclusively to one channel once input arrives. </para>
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2681 <para>The default serial port settings are 38400,8,N,1. RedBoot runs from
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2682 and supports flash management for the system flash region. </para>
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2683
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2684 <para>The following RedBoot configurations are supported:
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2685
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2686 <informaltable frame="all">
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diff changeset
2687 <tgroup cols="4" colsep="1" rowsep="1" align="left">
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diff changeset
2688 <thead>
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2689 <row>
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2690 <entry>Configuration</entry>
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2691 <entry>Mode</entry>
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diff changeset
2692 <entry>Description</entry>
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2693 <entry>File</entry>
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diff changeset
2694 </row>
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2695 </thead>
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2696 <tbody>
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diff changeset
2697 <row>
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2698 <entry>ROM</entry>
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2699 <entry>[ROM]</entry>
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2700 <entry>RedBoot running from the board's flash boot
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2701 sector.</entry>
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2702 <entry>redboot_ROM.ecm</entry>
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2703 </row>
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2704 <row>
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2705 <entry>RAM</entry>
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2706 <entry>[RAM]</entry>
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2707 <entry>RedBoot running from RAM with RedBoot in the
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2708 flash boot sector.</entry>
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diff changeset
2709 <entry>redboot_RAM.ecm</entry>
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2710 </row>
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2711 <row>
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2712 <entry>WinCE</entry>
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2713 <entry>[RAM]</entry>
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2714 <entry>RedBoot running from RAM, started from
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2715 <application>OSloader</application>.</entry>
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2716 <entry>redboot_WinCE.ecm</entry>
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2717 </row>
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2718 </tbody>
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2719 </tgroup>
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2720 </informaltable>
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2721 </para>
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2722
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2723
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2724
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2725 </sect2>
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2726 <sect2>
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2727 <title>Initial Installation</title>
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2728 <para>RedBoot ROM and WinCE mode images are needed by the installation process.
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2729 </para>
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2730 <sect3>
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2731 <title>Installing RedBoot on the iPAQ using Windows/CE</title>
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2732 <para>
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2733 The Windows/CE environment originally shipped with the iPAQ contains a hidden
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2734 mini-loader, sometimes referred to as the "Parrot" loader. This loader can
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2735 be started by holding down the action button (the joypad) while resetting
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2736 the unit or when powering on. At this point, a blue bird will appear on
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2737 the LCD screen. Also at this point, a simple loader can be accessed over the
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2738 serial port at 115200/8N1. Using this loader, the contents of the iPAQ flash
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2739 memory can be saved to a Compact Flash memory card.
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2740 <note><title>NOTE</title><para>We have only tested this operation with a 32Mbyte CF memory card.
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2741 Given that the backup will take 16MBytes + 1KByte, something more than a 16MByte
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2742 card will be required.</para></note>
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2743 </para>
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2744 <para>
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2745 Use the "r2c" command to dump Flash contents to the CF memory card. Once this
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2746 completes, RedBoot can be installed with no fear since the Parrot loader can
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diff changeset
2747 be used to restore the Flash contents at a later time.
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2748 </para>
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2749 <para>
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2750 If you expect to completely recover the state of the iPAQ Win/CE environment, then
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diff changeset
2751 HotSync should be run to backup all "RAM" files as well before installing RedBoot.
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2752 </para>
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2753 <para>The next step in installing RedBoot on the iPAQ actually involves Windows/CE,
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2754 which is the native environment on the unit. Using WinCE, you need to
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2755 install an application which will run a RAM based version of RedBoot. Once
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2756 this is installed and running, RedBoot can be used to update the flash with
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2757 a native/ROM version of RedBoot. <itemizedlist>
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2758 <listitem><para>Using ActiveSync, copy the file OSloader to your iPAQ. </para>
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2759 </listitem>
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2760 <listitem><para>Using ActiveSync, copy the file redboot_WinCE.bin to the iPAQ
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2761 as bootldr in its root directory. Note: this is not the top level folder
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2762 displayed by Windows (Mobile Device), but rather the 'My Pocket PC' folder
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2763 within it.</para>
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2764 </listitem>
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2765 <listitem><para>Execute OSloader. If you didn't create a shortcut, then you
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2766 will have to poke around for it using the WinCE file explorer.</para>
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2767 </listitem>
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2768 <listitem><para>Choose the <guimenuitem>Tools->BootLdr->Run after loading
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diff changeset
2769 from file</guimenuitem> menu item. </para>
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2770 </listitem>
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2771 </itemizedlist>At this point, the RAM based version of RedBoot should be running.
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2772 You should be able to return to this point by just executing the last two
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2773 steps of the previous process if necessary.</para>
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2774 </sect3>
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2775 <sect3>
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2776 <title>Installing RedBoot on the iPAQ - using the Compaq boot loader</title>
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2777 <para>This method of installation is no longer supported.
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2778 If you have previously installed either the Compaq boot loader or older
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diff changeset
2779 versions of RedBoot, restore the Win/CE environment and proceed as outlined
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diff changeset
2780 above.
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2781 </para>
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2782 </sect3>
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2783 <sect3 id="setting-up-and-testing-redboot">
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diff changeset
2784 <title>Setting up and testing RedBoot</title>
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2785 <para>When RedBoot first comes up, it will want to initialize its LCD touch
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diff changeset
2786 screen parameters. It does this by displaying a keyboard graphic and asks
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diff changeset
2787 you to press certain keys. Using the stylus, press and hold until the prompt
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2788 is withdrawn. When you lift the stylus, RedBoot will continue with the next
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diff changeset
2789 calibration. </para>
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2790 <para>Once the LCD touchscreen has been calibrated, RedBoot will start. The
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diff changeset
2791 calibration step can be skipped by pressing the <guibutton>return/abort</guibutton>
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diff changeset
2792 button on the unit (right most button with a curved arrow icon). Additionally,
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diff changeset
2793 the unit will assume default values if the screen is not touched within about
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diff changeset
2794 15 seconds. </para>
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2795 <para>Once RedBoot has started, you should get information similar to this
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2796 on the LCD screen. It will also appear on the serial port at 38400,8,N,1.
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diff changeset
2797
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diff changeset
2798 <screen>RedBoot(tm) bootstrap and debug environment [ROM]
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diff changeset
2799 Non-certified release, version UNKNOWN - built 06:17:41, Mar 19 2001
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2800 Platform: Compaq iPAQ Pocket PC (StrongARM 1110)
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diff changeset
2801
2729
74dbf4c3f2e1 Update all copyright banners to reflect FSF ownership; fix and improve licence text.
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diff changeset
2802 Copyright (C) 2000, 2001, Free Software Foundation, Inc.
211
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2803
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2804 RAM: 0x00000000-0x01fc0000, 0x0001f200-0x01f70000 available
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2805 FLASH: 0x50000000 - 0x51000000, 64 blocks of 0x00040000 bytes
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diff changeset
2806 each.</screen>
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diff changeset
2807
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diff changeset
2808 Since the LCD touchscreen is only 30 characters wide, some of this
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diff changeset
2809 data will be off the right hand side of the display. The joypad may be
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diff changeset
2810 used to pan left and right in order to see the full lines. </para>
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2811 <para>If you have a Compact Flash ethernet card, RedBoot should find
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diff changeset
2812 it. You'll need to have BOOTP enabled for this unit (see your
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diff changeset
2813 sysadmin for details). If it does, it will print a message like:
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diff changeset
2814
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diff changeset
2815 <screen>... Waiting for network card: .Ready!
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diff changeset
2816 Socket Communications Inc: CF+ LPE Revision E 08/04/99
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diff changeset
2817 IP: 192.168.1.34, Default server: 192.168.1.101</screen></para>
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diff changeset
2818 </sect3>
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diff changeset
2819
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diff changeset
2820 <sect3 id="ipaq-install-rb-permanently">
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diff changeset
2821 <title>Installing RedBoot permanently</title>
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diff changeset
2822 <para>Once you are satisfied with the setup and that RedBoot is operating
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diff changeset
2823 properly in your environment, you can set up your iPAQ unit to have RedBoot
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diff changeset
2824 be the bootstrap application.
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diff changeset
2825
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diff changeset
2826 <caution><title>CAUTION</title>
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diff changeset
2827 <para>This step will destroy your Windows/CE environment.</para>
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2828 <para>Before you take this step, it is strongly recommended you save your WinCE FLASH contents
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diff changeset
2829 as outlined above using the "parrot" loader, or
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diff changeset
2830 by using the Compaq OSloader:<itemizedlist>
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diff changeset
2831
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diff changeset
2832 <listitem><para>Using OSloader on the iPAQ, select the <guimenuitem>Tools->Flash->Save
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diff changeset
2833 to files...</guimenuitem>. menu item.</para>
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diff changeset
2834 </listitem>
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diff changeset
2835
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diff changeset
2836 <listitem><para>Four (4) files, 4MB each in size will be created.</para>
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diff changeset
2837 </listitem>
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diff changeset
2838
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diff changeset
2839 <listitem><para>After each file is created, copy the file to your computer,
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diff changeset
2840 then delete the file from the iPAQ to make room in the WinCE ramdisk for the
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diff changeset
2841 next file.</para></listitem>
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diff changeset
2842 </itemizedlist></para>
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diff changeset
2843
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2844 </caution>You will need to download the version of RedBoot designed as the
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diff changeset
2845 ROM bootstrap. Then install it permanently using these commands:
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diff changeset
2846 <screen>
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diff changeset
2847 RedBoot> <userinput>lo -r -b 0x100000 redboot_ROM.bin</userinput>
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diff changeset
2848 RedBoot> <userinput>fi loc -f 0x50000000 -l 0x40000</userinput>
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diff changeset
2849 RedBoot> <userinput>fis init</userinput>
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diff changeset
2850 RedBoot> <userinput>fi unl -f 0x50040000 -l 0x40000</userinput>
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diff changeset
2851 RedBoot> <userinput>fi cr RedBoot -b 0x100000</userinput>
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diff changeset
2852 RedBoot> <userinput>fi loc -f 0x50040000 -l 0x40000</userinput>
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diff changeset
2853 RedBoot> <userinput>reset</userinput>
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diff changeset
2854 </screen>
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diff changeset
2855
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diff changeset
2856 <warning><title>WARNING</title>
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diff changeset
2857 <para>You must type these commands exactly! Failure to do so may render your
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diff changeset
2858 iPAQ totally useless. Once you've done this, RedBoot should come up every
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diff changeset
2859 time you reset.</para>
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diff changeset
2860 </warning></para>
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diff changeset
2861 </sect3>
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diff changeset
2862
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diff changeset
2863 <sect3>
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diff changeset
2864 <title>Restoring Windows/CE</title>
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diff changeset
2865 <para>To restore Windows/CE from the backup taken in <xref linkend="ipaq-install-rb-permanently">,
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diff changeset
2866 visit <ulink url="http://www.handhelds.org/projects/wincerestoration.html">http://www.handhelds.org/projects/wincerestoration.html</ulink>
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diff changeset
2867 for directions.
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diff changeset
2868 </para>
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diff changeset
2869 </sect3></sect2>
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diff changeset
2870
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diff changeset
2871 <sect2>
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diff changeset
2872 <title>Additional commands</title>
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diff changeset
2873 <para>The <command>exec</command> command which allows the loading
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diff changeset
2874 and execution of Linux kernels,
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diff changeset
2875 is supported for this board (see <xref linkend="executing-programs">). The <command>
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diff changeset
2876 exec</command> parameters used for the iPAQ are:</para>
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diff changeset
2877 <variablelist><varlistentry>
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diff changeset
2878 <term>-b <replaceable>&lt;addr></replaceable></term>
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diff changeset
2879 <listitem><para>Location Linux kernel was loaded to</para></listitem></varlistentry>
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diff changeset
2880 <varlistentry><term>
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diff changeset
2881 -l <replaceable>&lt;len></replaceable></term>
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diff changeset
2882 <listitem><para>Length of kernel</para></listitem></varlistentry>
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diff changeset
2883 <varlistentry><term>
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diff changeset
2884 -c <replaceable>"params"</replaceable></term>
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diff changeset
2885 <listitem><para>Parameters passed to kernel</para></listitem></varlistentry>
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diff changeset
2886 <varlistentry><term>-r <replaceable>&lt;addr></replaceable></term>
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diff changeset
2887 <listitem><para>'initrd' ramdisk location</para></listitem></varlistentry>
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diff changeset
2888 <varlistentry><term>-s <replaceable>&lt;len></replaceable></term>
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2889 <listitem><para>Length of initrd ramdisk</para></listitem></varlistentry>
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diff changeset
2890 </variablelist>
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diff changeset
2891 <para>Linux kernels may be run on the iPAQ using the sources from the anonymous
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diff changeset
2892 CVS repository at the Handhelds project (<ulink url="http://www.handhelds.org/">
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diff changeset
2893 http://www.handhelds.org/</ulink>) with
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diff changeset
2894 the <filename>elinux.patch</filename> patch file applied. This file can be
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diff changeset
2895 found in the
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diff changeset
2896 <filename>misc/</filename> subdirectory of the iPAQ platform HAL in the
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diff changeset
2897 RedBoot sources, normally
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diff changeset
2898 <filename>hal/arm/sa11x0/ipaq/<replaceable>VERSION</replaceable>/misc/</filename>
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diff changeset
2899 </para>
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diff changeset
2900 <para>
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diff changeset
2901 On the iPAQ (and indeed all SA11x0 platforms), Linux expects to be loaded
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2902 at address 0xC0008000 and the entry point is also at 0xC0008000.
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diff changeset
2903 </para>
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2904
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2905 </sect2>
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2906 <sect2>
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2907 <title>Memory Maps</title>
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2908 <para>RedBoot sets up the following memory map on the iPAQ: The first level
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2909 page table is located at physical address 0xC0004000. No second level tables
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2910 are used. <note><title>NOTE</title>
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2911 <para>The virtual memory maps in this section use a C and B column to indicate
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2912 whether or not the region is cached (C) or buffered (B).</para>
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2913 </note> <programlisting>Physical Address Range Description
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diff changeset
2914 ----------------------- ----------------------------------
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2915 0x00000000 - 0x01ffffff 16Mb to 32Mb FLASH (nCS0) [organized as below]
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2916 0x000000 - 0x0003ffff Parrot Loader
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2917 0x040000 - 0x0007ffff RedBoot
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2918 0xf80000 - 0x00fbffff Fconfig data
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diff changeset
2919 0xfc0000 - 0x00ffffff FIS directory
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2920 0x30000000 - 0x3fffffff Compact Flash
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diff changeset
2921 0x48000000 - 0x4bffffff iPAQ internal registers
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2922 0x80000000 - 0xbfffffff SA-1110 Internal Registers
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2923 0xc0000000 - 0xc1ffffff DRAM Bank 0 - 32Mb SDRAM
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2924 0xe0000000 - 0xe7ffffff Cache Clean
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diff changeset
2925
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2926
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diff changeset
2927 Virtual Address Range C B Description
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diff changeset
2928 ----------------------- - - ----------------------------------
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diff changeset
2929 0x00000000 - 0x01ffffff Y Y DRAM - 32Mb
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diff changeset
2930 0x30000000 - 0x3fffffff N N Compact Flash
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2931 0x48000000 - 0x4bffffff N N iPAQ internal registers
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2932 0x50000000 - 0x51ffffff Y Y Up to 32Mb FLASH (nCS0)
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diff changeset
2933 0x80000000 - 0xbfffffff N N SA-1110 Internal Registers
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2934 0xc0000000 - 0xc1ffffff N Y DRAM Bank 0: 32Mb
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2935 0xe0000000 - 0xe7ffffff Y Y Cache Clean </programlisting> </para>
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2936 </sect2>
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diff changeset
2937 <sect2>
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2938 <title>Rebuilding RedBoot</title>
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2939
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2940 <para>These shell variables provide the platform-specific information
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diff changeset
2941 needed for building RedBoot according to the procedure described in
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2942 <xref linkend="Rebuilding-Redboot">:
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diff changeset
2943 <programlisting>
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2944 export TARGET=ipaq
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2945 export ARCH_DIR=arm
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2946 export PLATFORM_DIR=sa11x0/ipaq
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2947 </programlisting>
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2948 </para>
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2949
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2950 <para>The names of configuration files are listed above with the
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2951 description of the associated modes.</para>
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2952
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2953 </sect2></sect1>
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2954
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diff changeset
2955 <?Pub _newpage>
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diff changeset
2956 <sect1 id="cerfcube">
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2957 <title>ARM/StrongARM(SA11X0) Intrinsyc CerfCube</title>
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2958 <indexterm><primary>Intrinsyc CerfCube</primary><secondary>installing and
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2959 testing</secondary></indexterm><indexterm><primary>installing and testing
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2960 </primary><secondary>Intrinsyc CerfCube</secondary></indexterm>
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diff changeset
2961 <sect2>
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2962 <title>Overview</title>
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2963 <para>RedBoot supports the serial port and the builtin
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2964 ethernet connection for communication and downloads.
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2965 </para>
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2966 <para>The default serial port settings are 38400,8,N,1. RedBoot runs from
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2967 and supports flash management for the system flash region. </para>
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2968
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2969 <para>The following RedBoot configurations are supported:
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2970
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diff changeset
2971 <informaltable frame="all">
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diff changeset
2972 <tgroup cols="4" colsep="1" rowsep="1" align="left">
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2973 <thead>
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2974 <row>
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2975 <entry>Configuration</entry>
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diff changeset
2976 <entry>Mode</entry>
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diff changeset
2977 <entry>Description</entry>
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diff changeset
2978 <entry>File</entry>
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diff changeset
2979 </row>
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2980 </thead>
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diff changeset
2981 <tbody>
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diff changeset
2982 <row>
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2983 <entry>ROM</entry>
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diff changeset
2984 <entry>[ROM]</entry>
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2985 <entry>RedBoot running from the board's flash boot
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2986 sector.</entry>
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2987 <entry>redboot_ROM.ecm</entry>
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diff changeset
2988 </row>
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diff changeset
2989 <row>
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2990 <entry>RAM</entry>
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2991 <entry>[RAM]</entry>
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2992 <entry>RedBoot running from RAM with RedBoot in the
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2993 flash boot sector.</entry>
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2994 <entry>redboot_RAM.ecm</entry>
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2995 </row>
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2996 </tbody>
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2997 </tgroup>
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2998 </informaltable>
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2999 </para>
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3000
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3001
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3002 </sect2>
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diff changeset
3003 <sect2>
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3004 <title>Initial Installation</title>
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3005 <para>
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3006 The original boot loader supplied with the CerfCube can be used to install
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3007 RedBoot. Connect to the device using a serial port at 38400/8N1.
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3008 Copy the binary RedBoot ROM mode image to an available TFTP server.
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3009 Issue these commands to the Instrinsyc loader:
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diff changeset
3010 <screen>
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3011 <userinput>download tftp:<replaceable>x.x.x.x</replaceable> redboot_ROM.bin 0xc0000000</userinput>
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3012 <userinput>flashloader 0x00000000 0xc0000000 0x20000</userinput>
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3013 </screen>
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3014 where <replaceable>x.x.x.x</replaceable> is the IP address of the TFTP
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3015 server.
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diff changeset
3016 <note>
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diff changeset
3017 <title>NOTE</title>
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diff changeset
3018 <para>
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3019 Other installation methods may be available via the Intrinsyc loader.
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3020 Contact Intrinsyc for details.
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3021 </para>
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3022 </note>
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3023 </para>
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3024 </sect2>
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3025 <sect2>
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3026 <title>Additional commands</title>
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3027 <para>The <command>exec</command> command which allows the loading
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diff changeset
3028 and execution of Linux kernels,
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3029 is supported for this board (see <xref linkend="executing-programs">). The <command>
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3030 exec</command> parameters used for the CerfCube are:</para>
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diff changeset
3031 <variablelist><varlistentry>
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3032 <term>-b <replaceable>&lt;addr></replaceable></term>
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3033 <listitem><para>Location Linux kernel was loaded to</para></listitem></varlistentry>
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diff changeset
3034 <varlistentry><term>
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diff changeset
3035 -l <replaceable>&lt;len></replaceable></term>
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3036 <listitem><para>Length of kernel</para></listitem></varlistentry>
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diff changeset
3037 <varlistentry><term>
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diff changeset
3038 -c <replaceable>"params"</replaceable></term>
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diff changeset
3039 <listitem><para>Parameters passed to kernel</para></listitem></varlistentry>
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diff changeset
3040 <varlistentry><term>-r <replaceable>&lt;addr></replaceable></term>
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diff changeset
3041 <listitem><para>'initrd' ramdisk location</para></listitem></varlistentry>
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diff changeset
3042 <varlistentry><term>-s <replaceable>&lt;len></replaceable></term>
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3043 <listitem><para>Length of initrd ramdisk</para></listitem></varlistentry>
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3044 </variablelist>
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3045
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3046 </sect2>
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3047 <sect2>
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diff changeset
3048 <title>Memory Maps</title>
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3049 <para>RedBoot sets up the following memory map on the CerfCube: The first level
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3050 page table is located at physical address 0xC0004000. No second level tables
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3051 are used. <note><title>NOTE</title>
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3052 <para>The virtual memory maps in this section use a C and B column to indicate
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3053 whether or not the region is cached (C) or buffered (B).</para>
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3054 </note> <programlisting>Physical Address Range Description
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diff changeset
3055 ----------------------- ----------------------------------
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3056 0x00000000 - 0x01ffffff 16Mb to 32Mb FLASH (nCS0) [organized as below]
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3057 0x000000 - 0x0001ffff RedBoot
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diff changeset
3058 0x020000 - 0x0003ffff RedBoot [RAM version]
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diff changeset
3059 0xfc0000 - 0x00fdffff Fconfig data
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diff changeset
3060 0xfe0000 - 0x00ffffff FIS directory
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diff changeset
3061 0x0f000000 - 0x0fffffff Onboard ethernet
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3062 0x10000000 - 0x17ffffff CerfCube internal registers
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3063 0x20000000 - 0x3fffffff PCMCIA / Compact Flash
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3064 0x80000000 - 0xbfffffff SA-1110 Internal Registers
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diff changeset
3065 0xc0000000 - 0xc1ffffff DRAM Bank 0 - 32Mb SDRAM
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diff changeset
3066 0xe0000000 - 0xe7ffffff Cache Clean
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diff changeset
3067
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diff changeset
3068
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diff changeset
3069 Virtual Address Range C B Description
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diff changeset
3070 ----------------------- - - ----------------------------------
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diff changeset
3071 0x00000000 - 0x01ffffff Y Y DRAM - 32Mb
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diff changeset
3072 0x08000000 - 0x0fffffff N N Onboard ethernet controller
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diff changeset
3073 0x10000000 - 0x17ffffff N N CerfCube internal registers
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diff changeset
3074 0x20000000 - 0x3fffffff N N PCMCIA / Compact Flash
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diff changeset
3075 0x50000000 - 0x51ffffff Y Y Up to 32Mb FLASH (nCS0)
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diff changeset
3076 0x80000000 - 0xbfffffff N N SA-1110 Internal Registers
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diff changeset
3077 0xc0000000 - 0xc1ffffff N Y DRAM Bank 0: 32Mb
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3078 0xe0000000 - 0xe7ffffff Y Y Cache Clean </programlisting> </para>
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3079 </sect2>
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3080
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diff changeset
3081 <sect2>
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diff changeset
3082 <title>Rebuilding RedBoot</title>
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diff changeset
3083
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3084 <para>These shell variables provide the platform-specific information
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diff changeset
3085 needed for building RedBoot according to the procedure described in
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diff changeset
3086 <xref linkend="Rebuilding-Redboot">:
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diff changeset
3087 <programlisting>
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3088 export TARGET=cerf
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diff changeset
3089 export ARCH_DIR=arm
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diff changeset
3090 export PLATFORM_DIR=sa11x0/cerf
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diff changeset
3091 </programlisting>
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3092 </para>
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3093
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3094 <para>The names of configuration files are listed above with the
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diff changeset
3095 description of the associated modes.</para>
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3096
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3097 </sect2></sect1>
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diff changeset
3098
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3099
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3100 <sect1 id="iq80310">
835
d6cfbed66cf9 New XScale ports
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diff changeset
3101 <title>ARM/XScale Cyclone IQ80310</title>
208
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3102 <sect2>
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3103 <title>Overview</title>
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3104 <para><indexterm><primary>Cyclone IQ80310</primary><secondary>installing and
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3105 testing</secondary></indexterm><indexterm><primary>installing and testing
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3106 </primary><secondary>Cyclone IQ80310</secondary></indexterm>RedBoot supports
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3107 both serial ports and the built-in ethernet port for communication and downloads.
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3108 The default serial port settings are 115200,8,N,1. RedBoot also supports flash
210
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3109 management for the onboard 8MB flash.</para>
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3110
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3111 <para>The following RedBoot configurations are supported:
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3112
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diff changeset
3113 <informaltable frame="all">
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3114 <tgroup cols="4" colsep="1" rowsep="1" align="left">
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3115 <thead>
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3116 <row>
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3117 <entry>Configuration</entry>
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3118 <entry>Mode</entry>
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diff changeset
3119 <entry>Description</entry>
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diff changeset
3120 <entry>File</entry>
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3121 </row>
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3122 </thead>
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diff changeset
3123 <tbody>
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3124 <row>
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3125 <entry>ROM</entry>
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3126 <entry>[ROM]</entry>
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3127 <entry>RedBoot running from the board's flash boot
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3128 sector.</entry>
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diff changeset
3129 <entry>redboot_ROM.ecm</entry>
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diff changeset
3130 </row>
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diff changeset
3131 <row>
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3132 <entry>RAM</entry>
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3133 <entry>[RAM]</entry>
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3134 <entry>RedBoot running from RAM with RedBoot in the
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diff changeset
3135 flash boot sector.</entry>
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diff changeset
3136 <entry>redboot_RAM.ecm</entry>
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diff changeset
3137 </row>
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3138 <row>
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diff changeset
3139 <entry>ROMA</entry>
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3140 <entry>[ROM]</entry>
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3141 <entry>RedBoot running from flash address 0x40000, with
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diff changeset
3142 ARM bootloader in flash boot sector.</entry>
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diff changeset
3143 <entry>redboot_ROMA.ecm</entry>
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diff changeset
3144 </row>
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diff changeset
3145 <row>
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diff changeset
3146 <entry>RAMA</entry>
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diff changeset
3147 <entry>[RAM]</entry>
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3148 <entry>RedBoot running from RAM with ARM bootloader in
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diff changeset
3149 flash boot sector.</entry>
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diff changeset
3150 <entry>redboot_RAMA.ecm</entry>
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3151 </row>
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3152 </tbody>
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3153 </tgroup>
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3154 </informaltable>
208
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3155 </para>
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3156 </sect2>
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3157 <sect2>
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3158 <title>Initial Installation Method</title>
210
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diff changeset
3159
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3160 <para>The board manufacturer provides a DOS application which is
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diff changeset
3161 capable of programming the flash over the PCI bus, and this is
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diff changeset
3162 required for initial installations of RedBoot. Please see the board
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diff changeset
3163 manual for information on using this utility. In general, the process
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3164 involves programming one of the two flash based RedBoot images to
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diff changeset
3165 flash. The ROM mode RedBoot (which runs from the flash boot sector)
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3166 should be programmed to flash address 0x00000000. The ROMA RedBoot
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3167 mode (which is started by the ARM bootloader) should be programmed to
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3168 flash address 0x00004000.
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diff changeset
3169 </para>
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diff changeset
3170
208
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3171 <para> To install RedBoot to run from the flash boot sector, use the manufacturer's
210
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3172 flash utility to install the ROM mode image at address zero.
208
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3173 </para>
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3174 <para>To install RedBoot to run from address 0x40000 with the ARM bootloader
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3175 in the flash boot sector, use the manufacturer's flash utility to install
210
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3176 the ROMA mode image at address 0x40000. </para>
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3177
208
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3178 <para>After booting the initial installation of RedBoot, this warning may
211
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diff changeset
3179 be printed: <screen>flash configuration checksum error or invalid key
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diff changeset
3180 </screen>This is normal, and indicates that the flash must be configured
208
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diff changeset
3181 for use by RedBoot. Even if the above message is not printed, it may be a
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diff changeset
3182 good idea to reinitialize the flash anyway. Do this with the <command>
211
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diff changeset
3183 fis</command> command: <screen>RedBoot> <userinput>fis init</userinput>
210
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diff changeset
3184 About to initialize [format] flash image system - continue (y/n)? <userinput>y</userinput>
208
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diff changeset
3185 *** Initialize flash Image System
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diff changeset
3186 Warning: device contents not erased, some blocks may not be usable
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diff changeset
3187 ... Unlock from 0x007e0000-0x00800000: .
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diff changeset
3188 ... Erase from 0x007e0000-0x00800000: .
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diff changeset
3189 ... Program from 0xa1fd0000-0xa1fd0400 at 0x007e0000: .
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diff changeset
3190 ... Lock from 0x007e0000-0x00800000: .
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diff changeset
3191 Followed by the fconfig command:
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diff changeset
3192 RedBoot> <userinput>fconfig</userinput>
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diff changeset
3193 Run script at boot: <userinput>false</userinput>
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diff changeset
3194 Use BOOTP for network configuration: <userinput>false</userinput>
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diff changeset
3195 Local IP address: <userinput>192.168.1.153</userinput>
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diff changeset
3196 Default server IP address: <userinput>192.168.1.10</userinput>
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diff changeset
3197 GDB connection port: <userinput>1000</userinput>
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diff changeset
3198 Network debug at boot time: <userinput>false</userinput>
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diff changeset
3199 Update RedBoot non-volatile configuration - continue (y/n)? <userinput>y</userinput>
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diff changeset
3200 ... Unlock from 0x007c0000-0x007e0000: .
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diff changeset
3201 ... Erase from 0x007c0000-0x007e0000: .
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3202 ... Program from 0xa0013018-0xa0013418 at 0x007c0000: .
211
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3203 ... Lock from 0x007c0000-0x007e0000: .</screen></para>
210
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diff changeset
3204
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diff changeset
3205 <note><para>When later updating RedBoot in situ, it is important to
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diff changeset
3206 use a matching ROM and RAM mode pair of images. So use either RAM/ROM
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diff changeset
3207 or RAMA/ROMA images. Do not mix them.</para></note>
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diff changeset
3208
208
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diff changeset
3209 </sect2>
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diff changeset
3210 <sect2>
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3211 <title>Error codes</title>
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diff changeset
3212 <para>RedBoot uses the two digit LED display to indicate errors during board
211
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3213 initialization. Possible error codes are: <literallayout>88 - Unknown Error
208
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diff changeset
3214 55 - I2C Error
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diff changeset
3215 FF - SDRAM Error
211
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diff changeset
3216 01 - No Error</literallayout></para>
208
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diff changeset
3217 </sect2>
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diff changeset
3218 <sect2>
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diff changeset
3219 <title>Using RedBoot with ARM Bootloader </title>
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diff changeset
3220 <para>RedBoot can coexist with ARM tools in flash on the IQ80310 board. In
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diff changeset
3221 this configuration, the ARM bootloader will occupy the flash boot sector while
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diff changeset
3222 RedBoot is located at flash address 0x40000. The sixteen position rotary switch
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diff changeset
3223 is used to tell the ARM bootloader to jump to the RedBoot image located at
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diff changeset
3224 address 0x40000. RedBoot is selected by switch position 0 or 1. Other switch
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diff changeset
3225 positions are used by the ARM firmware and RedBoot will not be started. </para>
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3226 </sect2>
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diff changeset
3227 <sect2>
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3228 <title>Special RedBoot Commands </title>
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diff changeset
3229 <para>A special RedBoot command, <command>diag</command>, is used to
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diff changeset
3230 access a set of hardware diagnostics provided by the board
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diff changeset
3231 manufacturer. To access the diagnostic menu, enter diag at the RedBoot prompt:
211
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diff changeset
3232 <screen>
208
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diff changeset
3233 RedBoot> <userinput>diag</userinput>
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diff changeset
3234 Entering Hardware Diagnostics - Disabling Data Cache!
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diff changeset
3235 1 - Memory Tests
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diff changeset
3236 2 - Repeating Memory Tests
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diff changeset
3237 3 - 16C552 DUART Serial Port Tests
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diff changeset
3238 4 - Rotary Switch S1 Test for positions 0-3
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diff changeset
3239 5 - seven Segment LED Tests
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diff changeset
3240 6 - Backplane Detection Test
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diff changeset
3241 7 - Battery Status Test
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diff changeset
3242 8 - External Timer Test
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diff changeset
3243 9 - i82559 Ethernet Configuration
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diff changeset
3244 10 - i82559 Ethernet Test
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diff changeset
3245 11 - Secondary PCI Bus Test
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diff changeset
3246 12 - Primary PCI Bus Test
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diff changeset
3247 13 - i960Rx/303 PCI Interrupt Test
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diff changeset
3248 14 - Internal Timer Test
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diff changeset
3249 15 - GPIO Test
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3250 0 - quit Enter the menu item number (0 to quit):
211
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diff changeset
3251 </screen>
208
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diff changeset
3252 Tests for various hardware subsystems are provided, and some
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diff changeset
3253 tests require special hardware in order to execute normally. The Ethernet
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diff changeset
3254 Configuration item may be used to set the board ethernet address.</para>
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diff changeset
3255 </sect2>
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diff changeset
3256 <sect2>
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diff changeset
3257 <title>IQ80310 Hardware Tests</title>
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diff changeset
3258 <para><screen>1 - Memory Tests
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diff changeset
3259 2 - Repeating Memory Tests
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diff changeset
3260 3 - 16C552 DUART Serial Port Tests
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diff changeset
3261 4 - Rotary Switch S1 Test for positions 0-3
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diff changeset
3262 5 - 7 Segment LED Tests
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diff changeset
3263 6 - Backplane Detection Test
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diff changeset
3264 7 - Battery Status Test
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diff changeset
3265 8 - External Timer Test
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diff changeset
3266 9 - i82559 Ethernet Configuration
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diff changeset
3267 10 - i82559 Ethernet Test
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diff changeset
3268 11 - i960Rx/303 PCI Interrupt Test
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diff changeset
3269 12 - Internal Timer Test
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diff changeset
3270 13 - Secondary PCI Bus Test
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diff changeset
3271 14 - Primary PCI Bus Test
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diff changeset
3272 15 - Battery Backup SDRAM Memory Test
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diff changeset
3273 16 - GPIO Test
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diff changeset
3274 17 - Repeat-On-Fail Memory Test
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diff changeset
3275 18 - Coyonosa Cache Loop (No return)
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diff changeset
3276 19 - Show Software and Hardware Revision
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diff changeset
3277 0 - quit
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diff changeset
3278 Enter the menu item number (0 to quit): </screen></para>
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3279 <para>Tests for various hardware subsystems are provided, and some tests require
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diff changeset
3280 special hardware in order to execute normally. The Ethernet Configuration
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diff changeset
3281 item may be used to set the board ethernet address.</para>
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diff changeset
3282 </sect2>
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diff changeset
3283 <sect2>
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3284 <title>Rebuilding RedBoot </title>
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diff changeset
3285
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diff changeset
3286 <para>These shell variables provide the platform-specific information
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parents: 208
diff changeset
3287 needed for building RedBoot according to the procedure described in
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parents: 208
diff changeset
3288 <xref linkend="Rebuilding-Redboot">:
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parents: 208
diff changeset
3289 <programlisting>
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parents: 208
diff changeset
3290 export TARGET=iq80310
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diff changeset
3291 export ARCH_DIR=arm
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diff changeset
3292 export PLATFORM_DIR=iq80310
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diff changeset
3293 </programlisting>
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parents: 208
diff changeset
3294 </para>
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parents: 208
diff changeset
3295
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parents: 208
diff changeset
3296 <para>The names of configuration files are listed above with the
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parents: 208
diff changeset
3297 description of the associated modes.</para>
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parents: 208
diff changeset
3298
208
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diff changeset
3299 </sect2>
210
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parents: 208
diff changeset
3300
208
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diff changeset
3301 <sect2>
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diff changeset
3302 <title>Interrupts</title>
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diff changeset
3303 <para>RedBoot uses an interrupt vector table which is located at address 0xA000A004.
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parents:
diff changeset
3304 Entries in this table are pointers to functions with this protoype:: <programlisting>
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parents:
diff changeset
3305 int irq_handler( unsigned vector, unsigned data )</programlisting>On an IQ80310
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parents:
diff changeset
3306 board, the vector argument is one of 49 interrupts defined in <computeroutput>
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parents:
diff changeset
3307 hal/arm/iq80310/current/include/hal_platform_ints.h:</computeroutput>: <programlisting>
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diff changeset
3308 // *** 80200 CPU ***
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parents:
diff changeset
3309 #define CYGNUM_HAL_INTERRUPT_reserved0 0
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parents:
diff changeset
3310 #define CYGNUM_HAL_INTERRUPT_PMU_PMN0_OVFL 1 // See Ch.12 - Performance Mon.
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diff changeset
3311 #define CYGNUM_HAL_INTERRUPT_PMU_PMN1_OVFL 2 // PMU counter 0/1 overflow
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parents:
diff changeset
3312 #define CYGNUM_HAL_INTERRUPT_PMU_CCNT_OVFL 3 // PMU clock overflow
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parents:
diff changeset
3313 #define CYGNUM_HAL_INTERRUPT_BCU_INTERRUPT 4 // See Ch.11 - Bus Control Unit
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parents:
diff changeset
3314 #define CYGNUM_HAL_INTERRUPT_NIRQ 5 // external IRQ
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parents:
diff changeset
3315 #define CYGNUM_HAL_INTERRUPT_NFIQ 6 // external FIQ
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diff changeset
3316
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diff changeset
3317
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diff changeset
3318 // *** XINT6 interrupts ***
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diff changeset
3319 #define CYGNUM_HAL_INTERRUPT_DMA_0 7
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parents:
diff changeset
3320 #define CYGNUM_HAL_INTERRUPT_DMA_1 8
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diff changeset
3321 #define CYGNUM_HAL_INTERRUPT_DMA_2 9
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diff changeset
3322 #define CYGNUM_HAL_INTERRUPT_GTSC 10 // Global Time Stamp Counter
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diff changeset
3323 #define CYGNUM_HAL_INTERRUPT_PEC 11 // Performance Event Counter
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diff changeset
3324 #define CYGNUM_HAL_INTERRUPT_AAIP 12 // application accelerator unit
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diff changeset
3325
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diff changeset
3326
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diff changeset
3327 // *** XINT7 interrupts ***
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diff changeset
3328 // I2C interrupts
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diff changeset
3329 #define CYGNUM_HAL_INTERRUPT_I2C_TX_EMPTY 13
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diff changeset
3330 #define CYGNUM_HAL_INTERRUPT_I2C_RX_FULL 14
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diff changeset
3331 #define CYGNUM_HAL_INTERRUPT_I2C_BUS_ERR 15
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diff changeset
3332 #define CYGNUM_HAL_INTERRUPT_I2C_STOP 16
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diff changeset
3333 #define CYGNUM_HAL_INTERRUPT_I2C_LOSS 17
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diff changeset
3334 #define CYGNUM_HAL_INTERRUPT_I2C_ADDRESS 18
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diff changeset
3335
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diff changeset
3336
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diff changeset
3337 // Messaging Unit interrupts
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diff changeset
3338 #define CYGNUM_HAL_INTERRUPT_MESSAGE_0 19
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diff changeset
3339 #define CYGNUM_HAL_INTERRUPT_MESSAGE_1 20
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diff changeset
3340 #define CYGNUM_HAL_INTERRUPT_DOORBELL 21
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diff changeset
3341 #define CYGNUM_HAL_INTERRUPT_NMI_DOORBELL 22
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diff changeset
3342 #define CYGNUM_HAL_INTERRUPT_QUEUE_POST 23
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diff changeset
3343 #define CYGNUM_HAL_INTERRUPT_OUTBOUND_QUEUE_FULL 24
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diff changeset
3344 #define CYGNUM_HAL_INTERRUPT_INDEX_REGISTER 25
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parents:
diff changeset
3345 // PCI Address Translation Unit
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diff changeset
3346 #define CYGNUM_HAL_INTERRUPT_BIST 26
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diff changeset
3347
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diff changeset
3348
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diff changeset
3349 // *** External board interrupts (XINT3) ***
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diff changeset
3350 #define CYGNUM_HAL_INTERRUPT_TIMER 27 // external timer
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diff changeset
3351 #define CYGNUM_HAL_INTERRUPT_ETHERNET 28 // onboard enet
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parents:
diff changeset
3352 #define CYGNUM_HAL_INTERRUPT_SERIAL_A 29 // 16x50 uart A
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diff changeset
3353 #define CYGNUM_HAL_INTERRUPT_SERIAL_B 30 // 16x50 uart B
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diff changeset
3354 #define CYGNUM_HAL_INTERRUPT_PCI_S_INTD 31 // secondary PCI INTD
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jlarmour
parents:
diff changeset
3355 // The hardware doesn't (yet?) provide masking or status for these
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jlarmour
parents:
diff changeset
3356 // even though they can trigger cpu interrupts. ISRs will need to
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jlarmour
parents:
diff changeset
3357 // poll the device to see if the device actually triggered the
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parents:
diff changeset
3358 // interrupt.
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parents:
diff changeset
3359 #define CYGNUM_HAL_INTERRUPT_PCI_S_INTC 32 // secondary PCI INTC
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parents:
diff changeset
3360 #define CYGNUM_HAL_INTERRUPT_PCI_S_INTB 33 // secondary PCI INTB
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diff changeset
3361 #define CYGNUM_HAL_INTERRUPT_PCI_S_INTA 34 // secondary PCI INTA
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diff changeset
3362
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parents:
diff changeset
3363
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parents:
diff changeset
3364 // *** NMI Interrupts go to FIQ ***
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diff changeset
3365 #define CYGNUM_HAL_INTERRUPT_MCU_ERR 35
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diff changeset
3366 #define CYGNUM_HAL_INTERRUPT_PATU_ERR 36
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diff changeset
3367 #define CYGNUM_HAL_INTERRUPT_SATU_ERR 37
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diff changeset
3368 #define CYGNUM_HAL_INTERRUPT_PBDG_ERR 38
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diff changeset
3369 #define CYGNUM_HAL_INTERRUPT_SBDG_ERR 39
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diff changeset
3370 #define CYGNUM_HAL_INTERRUPT_DMA0_ERR 40
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diff changeset
3371 #define CYGNUM_HAL_INTERRUPT_DMA1_ERR 41
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diff changeset
3372 #define CYGNUM_HAL_INTERRUPT_DMA2_ERR 42
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diff changeset
3373 #define CYGNUM_HAL_INTERRUPT_MU_ERR 43
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diff changeset
3374 #define CYGNUM_HAL_INTERRUPT_reserved52 44
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diff changeset
3375 #define CYGNUM_HAL_INTERRUPT_AAU_ERR 45
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diff changeset
3376 #define CYGNUM_HAL_INTERRUPT_BIU_ERR 46
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diff changeset
3377
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diff changeset
3378
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jlarmour
parents:
diff changeset
3379 // *** ATU FIQ sources ***
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diff changeset
3380 #define CYGNUM_HAL_INTERRUPT_P_SERR 47
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diff changeset
3381 #define CYGNUM_HAL_INTERRUPT_S_SERR 48</programlisting>The data passed
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parents:
diff changeset
3382 to the ISR is pulled from a data table <computeroutput>(hal_interrupt_data)
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diff changeset
3383 </computeroutput> which immediately follows the interrupt vector table. With
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diff changeset
3384 49 interrupts, the data table starts at address 0xA000A0C8. </para>
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diff changeset
3385 <para>An application may create a normal C function with the above prototype
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diff changeset
3386 to be an ISR. Just poke its address into the table at the correct index and
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parents:
diff changeset
3387 enable the interrupt at its source. The return value of the ISR is ignored
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jlarmour
parents:
diff changeset
3388 by RedBoot.</para>
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jlarmour
parents:
diff changeset
3389 </sect2>
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jlarmour
parents:
diff changeset
3390 <sect2>
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diff changeset
3391 <title>Memory Maps</title>
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diff changeset
3392 <para>The first level page table is located at 0xa0004000. Two second level
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parents:
diff changeset
3393 tables are also used. One second level table is located at 0xa0008000 and
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parents:
diff changeset
3394 maps the first 1MB of flash. The other second level table is at 0xa0008400,
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parents:
diff changeset
3395 and maps the first 1MB of SDRAM. <note><title>NOTE</title>
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diff changeset
3396 <para>The virtual memory maps in this section use a C and B column to indicate
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parents:
diff changeset
3397 whether or not the region is cached (C) or buffered (B).</para>
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diff changeset
3398 </note></para>
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diff changeset
3399 <para><programlisting>Physical Address Range Description
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jlarmour
parents:
diff changeset
3400 ----------------------- ----------------------------------
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diff changeset
3401 0x00000000 - 0x00000fff flash Memory
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jlarmour
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diff changeset
3402 0x00001000 - 0x00001fff 80312 Internal Registers
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jlarmour
parents:
diff changeset
3403 0x00002000 - 0x007fffff flash Memory
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jlarmour
parents:
diff changeset
3404 0x00800000 - 0x7fffffff PCI ATU Outbound Direct Window
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diff changeset
3405 0x80000000 - 0x83ffffff Primary PCI 32-bit Memory
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diff changeset
3406 0x84000000 - 0x87ffffff Primary PCI 64-bit Memory
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jlarmour
parents:
diff changeset
3407 0x88000000 - 0x8bffffff Secondary PCI 32-bit Memory
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diff changeset
3408 0x8c000000 - 0x8fffffff Secondary PCI 64-bit Memory
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diff changeset
3409 0x90000000 - 0x9000ffff Primary PCI IO Space
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diff changeset
3410 0x90010000 - 0x9001ffff Secondary PCI IO Space
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diff changeset
3411 0x90020000 - 0x9fffffff Unused
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parents:
diff changeset
3412 0xa0000000 - 0xbfffffff SDRAM
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parents:
diff changeset
3413 0xc0000000 - 0xefffffff Unused
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jlarmour
parents:
diff changeset
3414 0xf0000000 - 0xffffffff 80200 Internal Registers
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diff changeset
3415
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diff changeset
3416
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diff changeset
3417 Virtual Address Range C B Description
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jlarmour
parents:
diff changeset
3418 ----------------------- - - ----------------------------------
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diff changeset
3419 0x00000000 - 0x00000fff Y Y SDRAM
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diff changeset
3420 0x00001000 - 0x00001fff N N 80312 Internal Registers
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diff changeset
3421 0x00002000 - 0x007fffff Y N flash Memory
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diff changeset
3422 0x00800000 - 0x7fffffff N N PCI ATU Outbound Direct Window
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diff changeset
3423 0x80000000 - 0x83ffffff N N Primary PCI 32-bit Memory
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parents:
diff changeset
3424 0x84000000 - 0x87ffffff N N Primary PCI 64-bit Memory
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jlarmour
parents:
diff changeset
3425 0x88000000 - 0x8bffffff N N Secondary PCI 32-bit Memory
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parents:
diff changeset
3426 0x8c000000 - 0x8fffffff N N Secondary PCI 64-bit Memory
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parents:
diff changeset
3427 0x90000000 - 0x9000ffff N N Primary PCI IO Space
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parents:
diff changeset
3428 0x90010000 - 0x9001ffff N N Secondary PCI IO Space
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jlarmour
parents:
diff changeset
3429 0xa0000000 - 0xbfffffff Y Y SDRAM
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jlarmour
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diff changeset
3430 0xc0000000 - 0xcfffffff Y Y Cache Flush Region
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jlarmour
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diff changeset
3431 0xd0000000 - 0xd0000fff Y N first 4k page of flash
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diff changeset
3432 0xf0000000 - 0xffffffff N N 80200 Internal Registers </programlisting></para>
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jlarmour
parents:
diff changeset
3433 </sect2>
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diff changeset
3434 <sect2>
210
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jlarmour
parents: 208
diff changeset
3435 <title>Platform Resource Usage</title>
208
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diff changeset
3436 <para>The external timer is used as a polled timer to provide timeout support
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diff changeset
3437 for networking and XModem file transfers.</para>
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diff changeset
3438 </sect2></sect1>
210
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jlarmour
parents: 208
diff changeset
3439
208
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diff changeset
3440 <?Pub _newpage>
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diff changeset
3441 <sect1 id="iq80321">
835
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
3442 <title>ARM/XScale Intel IQ80321</title>
208
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3443 <sect2>
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diff changeset
3444 <title>Overview</title>
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diff changeset
3445 <para><indexterm><primary>Intel IQ80321</primary><secondary>installing and
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parents:
diff changeset
3446 testing</secondary></indexterm><indexterm><primary>installing and testing
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parents:
diff changeset
3447 </primary><secondary>Intel IQ80321</secondary></indexterm>RedBoot supports
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parents:
diff changeset
3448 the serial port and the built-in ethernet port for communication and downloads.
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diff changeset
3449 The default serial port settings are 115200,8,N,1. RedBoot also supports flash
210
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3450 management for the onboard 8MB flash.</para>
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3451
211
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3452 <para>The following RedBoot configurations are supported:
210
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diff changeset
3453
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diff changeset
3454 <informaltable frame="all">
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diff changeset
3455 <tgroup cols="4" colsep="1" rowsep="1" align="left">
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diff changeset
3456 <thead>
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diff changeset
3457 <row>
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3458 <entry>Configuration</entry>
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3459 <entry>Mode</entry>
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3460 <entry>Description</entry>
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3461 <entry>File</entry>
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diff changeset
3462 </row>
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3463 </thead>
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diff changeset
3464 <tbody>
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diff changeset
3465 <row>
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3466 <entry>ROM</entry>
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3467 <entry>[ROM]</entry>
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3468 <entry>RedBoot running from the board's flash boot
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diff changeset
3469 sector.</entry>
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diff changeset
3470 <entry>redboot_ROM.ecm</entry>
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diff changeset
3471 </row>
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diff changeset
3472 <row>
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3473 <entry>RAM</entry>
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3474 <entry>[RAM]</entry>
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diff changeset
3475 <entry>RedBoot running from RAM with RedBoot in the
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diff changeset
3476 flash boot sector.</entry>
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diff changeset
3477 <entry>redboot_RAM.ecm</entry>
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diff changeset
3478 </row>
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diff changeset
3479 </tbody>
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diff changeset
3480 </tgroup>
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diff changeset
3481 </informaltable>
208
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3482 </para>
210
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diff changeset
3483
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diff changeset
3484
208
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parents:
diff changeset
3485 </sect2>
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parents:
diff changeset
3486 <sect2>
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parents:
diff changeset
3487 <title>Initial Installation Method</title>
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parents:
diff changeset
3488 <para>The board manufacturer provides a DOS application which is capable of
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jlarmour
parents:
diff changeset
3489 programming the flash over the PCI bus, and this is required for initial installations
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
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parents:
diff changeset
3490 of RedBoot. Please see the board manual for information on using this utility.
210
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diff changeset
3491 In general, the process involves programming the ROM mode RedBoot
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diff changeset
3492 image to flash. RedBoot should be programmed to flash address
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diff changeset
3493 0x00000000 using the DOS utility.
208
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diff changeset
3494 </para>
210
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diff changeset
3495
208
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diff changeset
3496 <para>After booting the initial installation of RedBoot, this warning may
211
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diff changeset
3497 be printed: <screen>flash configuration checksum error or invalid key
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diff changeset
3498 </screen>This is normal, and indicates that the flash must be configured
208
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diff changeset
3499 for use by RedBoot. Even if the above message is not printed, it may be a
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parents:
diff changeset
3500 good idea to reinitialize the flash anyway. Do this with the <command>
211
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diff changeset
3501 fis</command> command: <screen>RedBoot> <userinput>fis init</userinput>
210
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diff changeset
3502 About to initialize [format] FLASH image system - continue (y/n)? <userinput>y</userinput>
208
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diff changeset
3503 *** Initialize FLASH Image System
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jlarmour
parents:
diff changeset
3504 Warning: device contents not erased, some blocks may not be usable
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parents:
diff changeset
3505 ... Unlock from 0xf07e0000-0xf0800000: .
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parents:
diff changeset
3506 ... Erase from 0xf07e0000-0xf0800000: .
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parents:
diff changeset
3507 ... Program from 0x01ddf000-0x01ddf400 at 0xf07e0000: .
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parents:
diff changeset
3508 ... Lock from 0xf07e0000-0xf0800000: .
211
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diff changeset
3509 </screen></para></sect2>
208
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diff changeset
3510 <sect2>
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parents:
diff changeset
3511 <title>Switch Settings</title>
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parents:
diff changeset
3512 <para>The 80321 board is highly configurable through a number of switches and jumpers.
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parents:
diff changeset
3513 RedBoot makes some assumptions about board configuration and attention must be paid
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jlarmour
parents:
diff changeset
3514 to these assumptions for reliable RedBoot operation:
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jlarmour
parents:
diff changeset
3515 <itemizedlist>
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diff changeset
3516 <listitem><para>The onboard ethernet and the secondary slot may be placed in a
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jlarmour
parents:
diff changeset
3517 private space so that they are not seen by a PC BIOS. If the board is to be used
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jlarmour
parents:
diff changeset
3518 in a PC with BIOS, then the ethernet should be placed in this private space so that
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3519 RedBoot and the BIOS do not conflict.
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jlarmour
parents:
diff changeset
3520 </para></listitem>
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parents:
diff changeset
3521 <listitem><para>RedBoot assumes that the board is plugged into a PC with BIOS. This
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3522 requires RedBoot to detect when the BIOS has configured the PCI-X secondary bus. If
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3523 the board is placed in a backplane, RedBoot will never see the BIOS configure the
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3524 secondary bus. To prevent this wait, set switch S7E1-3 to ON when using the board
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jlarmour
parents:
diff changeset
3525 in a backplane.</para></listitem>
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jlarmour
parents:
diff changeset
3526 <listitem><para>For the remaining switch settings, the following is a known good
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3527 configuration:
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jlarmour
parents:
diff changeset
3528 <informaltable frame=all>
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jlarmour
parents:
diff changeset
3529 <tgroup cols=2>
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jlarmour
parents:
diff changeset
3530 <tbody>
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jlarmour
parents:
diff changeset
3531 <row><entry>S1D1</entry><entry>All OFF</entry></row>
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jlarmour
parents:
diff changeset
3532 <row><entry>S7E1</entry><entry>7 is ON, all others OFF</entry></row>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3533 <row><entry>S8E1</entry><entry>2,3,5,6 are ON, all others OFF</entry></row>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3534 <row><entry>S8E2</entry><entry>2,3 are ON, all others OFF</entry></row>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3535 <row><entry>S9E1</entry><entry>3 is ON, all others OFF</entry></row>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3536 <row><entry>S4D1</entry><entry>1,3 are ON, all others OFF</entry></row>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3537 <row><entry>J9E1</entry><entry>2,3 jumpered</entry></row>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3538 <row><entry>J9F1</entry><entry>2,3 jumpered</entry></row>
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jlarmour
parents:
diff changeset
3539 <row><entry>J3F1</entry><entry>Nothing jumpered</entry></row>
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jlarmour
parents:
diff changeset
3540 <row><entry>J3G1</entry><entry>2,3 jumpered</entry></row>
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jlarmour
parents:
diff changeset
3541 <row><entry>J1G2</entry><entry>2,3 jumpered</entry></row>
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jlarmour
parents:
diff changeset
3542 </tbody></tgroup></informaltable></para></listitem>
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jlarmour
parents:
diff changeset
3543 </itemizedlist>
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jlarmour
parents:
diff changeset
3544 </para>
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jlarmour
parents:
diff changeset
3545 </sect2>
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parents:
diff changeset
3546 <sect2>
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jlarmour
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diff changeset
3547 <title>LED Codes</title>
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parents:
diff changeset
3548 <para>RedBoot uses the two digit LED display to indicate status during board
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3549 initialization. Possible codes are:</para>
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diff changeset
3550
211
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diff changeset
3551 <literallayout width=72>
208
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diff changeset
3552 LED Actions
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jlarmour
parents:
diff changeset
3553 -------------------------------------------------------------
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jlarmour
parents:
diff changeset
3554 Power-On/Reset
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jlarmour
parents:
diff changeset
3555 88
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jlarmour
parents:
diff changeset
3556 Set the CPSR
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jlarmour
parents:
diff changeset
3557 Enable coprocessor access
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jlarmour
parents:
diff changeset
3558 Drain write and fill buffer
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jlarmour
parents:
diff changeset
3559 Setup PBIU chip selects
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jlarmour
parents:
diff changeset
3560 A1
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jlarmour
parents:
diff changeset
3561 Enable the Icache
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jlarmour
parents:
diff changeset
3562 A2
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jlarmour
parents:
diff changeset
3563 Move FLASH chip select from 0x0 to 0xF0000000
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jlarmour
parents:
diff changeset
3564 Jump to new FLASH location
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jlarmour
parents:
diff changeset
3565 A3
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3566 Setup and enable the MMU
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jlarmour
parents:
diff changeset
3567 A4
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jlarmour
parents:
diff changeset
3568 I2C interface initialization
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jlarmour
parents:
diff changeset
3569 90
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jlarmour
parents:
diff changeset
3570 Wait for I2C initialization to complete
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3571 91
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3572 Send address (via I2C) to the DIMM
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jlarmour
parents:
diff changeset
3573 92
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3574 Wait for transmit complete
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jlarmour
parents:
diff changeset
3575 93
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jlarmour
parents:
diff changeset
3576 Read SDRAM PD data from DIMM
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jlarmour
parents:
diff changeset
3577 94
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jlarmour
parents:
diff changeset
3578 Read remainder of EEPROM data.
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jlarmour
parents:
diff changeset
3579 An error will result in one of the following
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3580 error codes on the LEDs:
211
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jlarmour
parents: 210
diff changeset
3581 77 BAD EEPROM checksum
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jlarmour
parents: 210
diff changeset
3582 55 I2C protocol error
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jlarmour
parents: 210
diff changeset
3583 FF bank size error
208
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jlarmour
parents:
diff changeset
3584 A5
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jlarmour
parents:
diff changeset
3585 Setup DDR memory interface
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jlarmour
parents:
diff changeset
3586 A6
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jlarmour
parents:
diff changeset
3587 Enable branch target buffer
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jlarmour
parents:
diff changeset
3588 Drain the write & fill buffers
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jlarmour
parents:
diff changeset
3589 Flush Icache, Dcache and BTB
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jlarmour
parents:
diff changeset
3590 Flush instuction and data TLBs
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jlarmour
parents:
diff changeset
3591 Drain the write & fill buffers
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jlarmour
parents:
diff changeset
3592 SL
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jlarmour
parents:
diff changeset
3593 ECC Scrub Loop
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jlarmour
parents:
diff changeset
3594 SE
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jlarmour
parents:
diff changeset
3595 A7
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jlarmour
parents:
diff changeset
3596 Clean, drain, flush the main Dcache
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jlarmour
parents:
diff changeset
3597 A8
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jlarmour
parents:
diff changeset
3598 Clean, drain, flush the mini Dcache
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jlarmour
parents:
diff changeset
3599 Flush Dcache
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jlarmour
parents:
diff changeset
3600 Drain the write & fill buffers
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jlarmour
parents:
diff changeset
3601 A9
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jlarmour
parents:
diff changeset
3602 Enable ECC
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jlarmour
parents:
diff changeset
3603 AA
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jlarmour
parents:
diff changeset
3604 Save SDRAM size
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jlarmour
parents:
diff changeset
3605 Move MMU tables into RAM
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jlarmour
parents:
diff changeset
3606 AB
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jlarmour
parents:
diff changeset
3607 Clean, drain, flush the main Dcache
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jlarmour
parents:
diff changeset
3608 Clean, drain, flush the mini Dcache
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jlarmour
parents:
diff changeset
3609 Drain the write & fill buffers
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jlarmour
parents:
diff changeset
3610 AC
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jlarmour
parents:
diff changeset
3611 Set the TTB register to DRAM mmu_table
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jlarmour
parents:
diff changeset
3612 AD
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jlarmour
parents:
diff changeset
3613 Set mode to IRQ mode
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jlarmour
parents:
diff changeset
3614 A7
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jlarmour
parents:
diff changeset
3615 Move SWI & Undefined "vectors" to RAM (at 0x0)
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3616 A6
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jlarmour
parents:
diff changeset
3617 Switch to supervisor mode
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jlarmour
parents:
diff changeset
3618 A5
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jlarmour
parents:
diff changeset
3619 Move remaining "vectors" to RAM (at 0x0)
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jlarmour
parents:
diff changeset
3620 A4
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jlarmour
parents:
diff changeset
3621 Copy DATA to RAM
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jlarmour
parents:
diff changeset
3622 Initialize interrupt exception environment
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3623 Initialize stack
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jlarmour
parents:
diff changeset
3624 Clear BSS section
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jlarmour
parents:
diff changeset
3625 A3
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jlarmour
parents:
diff changeset
3626 Call platform specific hardware initialization
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3627 A2
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jlarmour
parents:
diff changeset
3628 Run through static constructors
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3629 A1
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jlarmour
parents:
diff changeset
3630 Start up the eCos kernel or RedBoot
211
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jlarmour
parents: 210
diff changeset
3631 </literallayout>
208
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jlarmour
parents:
diff changeset
3632 </sect2>
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jlarmour
parents:
diff changeset
3633 <sect2>
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jlarmour
parents:
diff changeset
3634 <title>Special RedBoot Commands </title>
210
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jlarmour
parents: 208
diff changeset
3635 <para>A special RedBoot command, <command>diag</command>, is used to
d2c90368aeef Merge from eCos master repository on 2002-05-23-21:39:14-BST
jlarmour
parents: 208
diff changeset
3636 access a set of hardware diagnostics. To access the diagnostic menu,
d2c90368aeef Merge from eCos master repository on 2002-05-23-21:39:14-BST
jlarmour
parents: 208
diff changeset
3637 enter <command>diag</command> at the RedBoot prompt:
211
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parents: 210
diff changeset
3638 <screen>
208
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jlarmour
parents:
diff changeset
3639 RedBoot> <userinput>diag</userinput>
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jlarmour
parents:
diff changeset
3640 Entering Hardware Diagnostics - Disabling Data Cache!
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jlarmour
parents:
diff changeset
3641
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jlarmour
parents:
diff changeset
3642 IQ80321 Hardware Tests
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jlarmour
parents:
diff changeset
3643
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jlarmour
parents:
diff changeset
3644 1 - Memory Tests
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jlarmour
parents:
diff changeset
3645 2 - Repeating Memory Tests
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jlarmour
parents:
diff changeset
3646 3 - Repeat-On-Fail Memory Tests
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jlarmour
parents:
diff changeset
3647 4 - Rotary Switch S1 Test
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jlarmour
parents:
diff changeset
3648 5 - 7 Segment LED Tests
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jlarmour
parents:
diff changeset
3649 6 - i82544 Ethernet Configuration
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jlarmour
parents:
diff changeset
3650 7 - Baterry Status Test
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jlarmour
parents:
diff changeset
3651 8 - Battery Backup SDRAM Memory Test
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jlarmour
parents:
diff changeset
3652 9 - Timer Test
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3653 10 - PCI Bus test
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3654 11 - CPU Cache Loop (No Return)
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3655 0 - quit
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jlarmour
parents:
diff changeset
3656 Enter the menu item number (0 to quit):
211
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jlarmour
parents: 210
diff changeset
3657 </screen>
208
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jlarmour
parents:
diff changeset
3658 Tests for various hardware subsystems are provided, and some tests require
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3659 special hardware in order to execute normally. The Ethernet Configuration
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3660 item may be used to set the board ethernet address.</para>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3661 <sect3>
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jlarmour
parents:
diff changeset
3662 <title>Memory Tests</title>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3663 <para>This test is used to test installed DDR SDRAM memory. Five different
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3664 tests are run over the given address ranges. If errors are encountered, the
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3665 test is aborted and information about the failure is printed. When selected,
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3666 the user will be prompted to enter the base address of the test range and its
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3667 size. The numbers must be in hex with no leading &ldquo;0x&rdquo;
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3668 </para>
211
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jlarmour
parents: 210
diff changeset
3669 <screen>
210
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jlarmour
parents: 208
diff changeset
3670 Enter the menu item number (0 to quit): <userinput>1</userinput>
d2c90368aeef Merge from eCos master repository on 2002-05-23-21:39:14-BST
jlarmour
parents: 208
diff changeset
3671
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jlarmour
parents: 208
diff changeset
3672 Base address of memory to test (in hex): <userinput>100000</userinput>
d2c90368aeef Merge from eCos master repository on 2002-05-23-21:39:14-BST
jlarmour
parents: 208
diff changeset
3673
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jlarmour
parents: 208
diff changeset
3674 Size of memory to test (in hex): <userinput>200000</userinput>
208
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jlarmour
parents:
diff changeset
3675
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3676 Testing memory from 0x00100000 to 0x002fffff.
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3677
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3678 Walking 1's test:
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3679 0000000100000002000000040000000800000010000000200000004000000080
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3680 0000010000000200000004000000080000001000000020000000400000008000
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3681 0001000000020000000400000008000000100000002000000040000000800000
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3682 0100000002000000040000000800000010000000200000004000000080000000
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3683 passed
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3684 32-bit address test: passed
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3685 32-bit address bar test: passed
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3686 8-bit address test: passed
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3687 Byte address bar test: passed
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3688 Memory test done.
211
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jlarmour
parents: 210
diff changeset
3689 </screen>
208
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jlarmour
parents:
diff changeset
3690 </sect3>
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jlarmour
parents:
diff changeset
3691 <sect3>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3692 <title>Repeating Memory Tests</title>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3693 <para>The repeating memory tests are exactly the same as the above memory tests,
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3694 except that the tests are automatically rerun after completion. The only way out
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3695 of this test is to reset the board.
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3696 </para>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3697 </sect3>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3698 <sect3>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3699 <title>Repeat-On-Fail Memory Tests</title>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3700 <para>This is similar to the repeating memory tests except that when an error
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3701 is found, the failing test continuously retries on the failing address.
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3702 </para>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3703 </sect3>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3704 <sect3>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3705 <title>Rotary Switch S1 Test</title>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3706 <para>This tests the operation of the sixteen position rotary switch. When run,
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3707 this test will display the current position of the rotary switch on the LED
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3708 display. Slowly dial through each position and confirm reading on LED.
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3709 </para>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3710 </sect3>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3711 <sect3>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3712 <title>7 Segment LED Tests</title>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3713 <para>This tests the operation of the seven segment displays. When run, each
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3714 LED cycles through 0 through F and a decimal point.
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3715 </para>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3716 </sect3>
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parents:
diff changeset
3717 <sect3>
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parents:
diff changeset
3718 <title>i82544 Ethernet Configuration</title>
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parents:
diff changeset
3719 <para>This test initializes the ethernet controller&rsquo;s serial EEPROM if
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3720 the current contents are invalid. In any case, this test will also allow the
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3721 user to enter a six byte ethernet MAC address into the serial EEPROM.
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parents:
diff changeset
3722 </para>
211
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parents: 210
diff changeset
3723 <screen>
210
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parents: 208
diff changeset
3724 Enter the menu item number (0 to quit): <userinput>6</userinput>
208
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parents:
diff changeset
3725
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parents:
diff changeset
3726
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parents:
diff changeset
3727 Current MAC address: 00:80:4d:46:00:02
210
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parents: 208
diff changeset
3728 Enter desired MAC address: <userinput>00:80:4d:46:00:01</userinput>
208
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jlarmour
parents:
diff changeset
3729 Writing to the Serial EEPROM... Done
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jlarmour
parents:
diff changeset
3730
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jlarmour
parents:
diff changeset
3731 ******** Reset The Board To Have Changes Take Effect ********
211
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parents: 210
diff changeset
3732 </screen>
208
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parents:
diff changeset
3733 </sect3>
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jlarmour
parents:
diff changeset
3734 <sect3>
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jlarmour
parents:
diff changeset
3735 <title>Battery Status Test</title>
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parents:
diff changeset
3736 <para>This tests the current status of the battery. First, the test checks to
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3737 see if the battery is installed and reports that finding. If the battery is
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3738 installed, the test further determines whether the battery status is one or
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3739 more of the following:
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jlarmour
parents:
diff changeset
3740 <itemizedlist>
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jlarmour
parents:
diff changeset
3741 <listitem><para>Battery is charging.</para></listitem>
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jlarmour
parents:
diff changeset
3742 <listitem><para>Battery is fully discharged.</para></listitem>
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parents:
diff changeset
3743 <listitem><para>Battery voltage measures within normal operating range.
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jlarmour
parents:
diff changeset
3744 </para></listitem>
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jlarmour
parents:
diff changeset
3745 </itemizedlist>
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parents:
diff changeset
3746 </para>
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jlarmour
parents:
diff changeset
3747 </sect3>
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jlarmour
parents:
diff changeset
3748 <sect3>
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jlarmour
parents:
diff changeset
3749 <title>Battery Backup SDRAM Memory Test</title>
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parents:
diff changeset
3750 <para>This tests the battery backup of SDRAM memory. This test is a three
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3751 step process:</para>
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jlarmour
parents:
diff changeset
3752 <orderedlist>
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jlarmour
parents:
diff changeset
3753 <listitem><para>Select Battery backup test from main diag menu, then write
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3754 data to SDRAM.</para></listitem>
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parents:
diff changeset
3755 <listitem><para>Turn off power for 60 seconds, then repower the board.
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parents:
diff changeset
3756 </para></listitem>
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parents:
diff changeset
3757 <listitem><para>Select Battery backup test from main diag menu, then check
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3758 data that was written in step 1.
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jlarmour
parents:
diff changeset
3759 </para></listitem>
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parents:
diff changeset
3760 </orderedlist>
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jlarmour
parents:
diff changeset
3761 </sect3>
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jlarmour
parents:
diff changeset
3762 <sect3>
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parents:
diff changeset
3763 <title>Timer Test</title>
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jlarmour
parents:
diff changeset
3764 <para>This tests the internal timer by printing a number of dots at one
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3765 second intervals.</para>
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jlarmour
parents:
diff changeset
3766 </sect3>
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jlarmour
parents:
diff changeset
3767 <sect3>
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jlarmour
parents:
diff changeset
3768 <title>PCI Bus Test</title>
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jlarmour
parents:
diff changeset
3769 <para>This tests the secondary PCI-X bus and socket. This test requires that
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3770 an IQ80310 board be plugged into the secondary slot of the IOP80321 board.
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jlarmour
parents:
diff changeset
3771 The test assumes at least 32MB of installed memory on the IQ80310. That memory
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jlarmour
parents:
diff changeset
3772 is mapped into the IOP80321 address space and the memory tests are run on that
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jlarmour
parents:
diff changeset
3773 memory.
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parents:
diff changeset
3774 </para>
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parents:
diff changeset
3775 </sect3>
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jlarmour
parents:
diff changeset
3776 <sect3>
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parents:
diff changeset
3777 <title>CPU Cache Loop</title>
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parents:
diff changeset
3778 <para>This test puts the CPU into a tight loop run entirely from the ICache.
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jlarmour
parents:
diff changeset
3779 This should prevent all external bus accesses.
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jlarmour
parents:
diff changeset
3780 </para>
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jlarmour
parents:
diff changeset
3781 </sect3>
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jlarmour
parents:
diff changeset
3782 </sect2>
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jlarmour
parents:
diff changeset
3783 <sect2>
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parents:
diff changeset
3784 <title>Rebuilding RedBoot </title>
210
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parents: 208
diff changeset
3785
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parents: 208
diff changeset
3786 <para>These shell variables provide the platform-specific information
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parents: 208
diff changeset
3787 needed for building RedBoot according to the procedure described in
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parents: 208
diff changeset
3788 <xref linkend="Rebuilding-Redboot">:
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parents: 208
diff changeset
3789 <programlisting>
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parents: 208
diff changeset
3790 export TARGET=iq80321
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diff changeset
3791 export ARCH_DIR=arm
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diff changeset
3792 export PLATFORM_DIR=xscale/iq80321
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diff changeset
3793 </programlisting>
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parents: 208
diff changeset
3794 </para>
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diff changeset
3795
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diff changeset
3796 <para>The names of configuration files are listed above with the
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diff changeset
3797 description of the associated modes.</para>
208
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diff changeset
3798 </sect2>
210
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parents: 208
diff changeset
3799
208
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jlarmour
parents:
diff changeset
3800 <sect2>
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jlarmour
parents:
diff changeset
3801 <title>Interrupts</title>
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parents:
diff changeset
3802 <para>RedBoot uses an interrupt vector table which is located at address 0x8004.
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
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parents:
diff changeset
3803 Entries in this table are pointers to functions with this protoype:: <programlisting>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3804 int irq_handler( unsigned vector, unsigned data )</programlisting>On an IQ80321
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3805 board, the vector argument is one of 32 interrupts defined in <computeroutput>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3806 hal/arm/xscale/verde/current/include/hal_var_ints.h:</computeroutput>: <programlisting>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3807 // *** 80200 CPU ***
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jlarmour
parents:
diff changeset
3808 #define CYGNUM_HAL_INTERRUPT_DMA0_EOT 0
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3809 #define CYGNUM_HAL_INTERRUPT_DMA0_EOC 1
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3810 #define CYGNUM_HAL_INTERRUPT_DMA1_EOT 2
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3811 #define CYGNUM_HAL_INTERRUPT_DMA1_EOC 3
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3812 #define CYGNUM_HAL_INTERRUPT_RSVD_4 4
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3813 #define CYGNUM_HAL_INTERRUPT_RSVD_5 5
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3814 #define CYGNUM_HAL_INTERRUPT_AA_EOT 6
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jlarmour
parents:
diff changeset
3815 #define CYGNUM_HAL_INTERRUPT_AA_EOC 7
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parents:
diff changeset
3816 #define CYGNUM_HAL_INTERRUPT_CORE_PMON 8
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3817 #define CYGNUM_HAL_INTERRUPT_TIMER0 9
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
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parents:
diff changeset
3818 #define CYGNUM_HAL_INTERRUPT_TIMER1 10
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parents:
diff changeset
3819 #define CYGNUM_HAL_INTERRUPT_I2C_0 11
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
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parents:
diff changeset
3820 #define CYGNUM_HAL_INTERRUPT_I2C_1 12
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
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parents:
diff changeset
3821 #define CYGNUM_HAL_INTERRUPT_MESSAGING 13
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
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parents:
diff changeset
3822 #define CYGNUM_HAL_INTERRUPT_ATU_BIST 14
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3823 #define CYGNUM_HAL_INTERRUPT_PERFMON 15
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3824 #define CYGNUM_HAL_INTERRUPT_CORE_PMU 16
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3825 #define CYGNUM_HAL_INTERRUPT_BIU_ERR 17
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
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parents:
diff changeset
3826 #define CYGNUM_HAL_INTERRUPT_ATU_ERR 18
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3827 #define CYGNUM_HAL_INTERRUPT_MCU_ERR 19
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3828 #define CYGNUM_HAL_INTERRUPT_DMA0_ERR 20
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3829 #define CYGNUM_HAL_INTERRUPT_DMA1_ERR 22
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parents:
diff changeset
3830 #define CYGNUM_HAL_INTERRUPT_AA_ERR 23
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parents:
diff changeset
3831 #define CYGNUM_HAL_INTERRUPT_MSG_ERR 24
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jlarmour
parents:
diff changeset
3832 #define CYGNUM_HAL_INTERRUPT_SSP 25
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parents:
diff changeset
3833 #define CYGNUM_HAL_INTERRUPT_RSVD_26 26
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
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parents:
diff changeset
3834 #define CYGNUM_HAL_INTERRUPT_XINT0 27
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parents:
diff changeset
3835 #define CYGNUM_HAL_INTERRUPT_XINT1 28
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
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parents:
diff changeset
3836 #define CYGNUM_HAL_INTERRUPT_XINT2 29
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parents:
diff changeset
3837 #define CYGNUM_HAL_INTERRUPT_XINT3 30
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jlarmour
parents:
diff changeset
3838 #define CYGNUM_HAL_INTERRUPT_HPI 31
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parents:
diff changeset
3839 </programlisting>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3840 The data passed to the ISR is pulled from a data table <computeroutput>(hal_interrupt_data)
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3841 </computeroutput> which immediately follows the interrupt vector table. With
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3842 32 interrupts, the data table starts at address 0x8084. </para>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
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parents:
diff changeset
3843 <para>An application may create a normal C function with the above prototype
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3844 to be an ISR. Just poke its address into the table at the correct index and
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
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parents:
diff changeset
3845 enable the interrupt at its source. The return value of the ISR is ignored
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3846 by RedBoot.</para>
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jlarmour
parents:
diff changeset
3847 </sect2>
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jlarmour
parents:
diff changeset
3848 <sect2>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
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diff changeset
3849 <title>Memory Maps</title>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3850 <para>The RAM based page table is located at RAM start + 0x4000. RedBoot may be configured
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3851 for one of two memory maps. The difference between them is the location of RAM and the
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3852 PCI outbound windows. The alternative memory map may be used when
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3853 building RedBoot or eCos by using the <literal>RAM_ALTMAP</literal>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3854 and <literal>ROM_ALTMAP</literal> startup types in the configuration.
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3855 <note><title>NOTE</title>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3856 <para>The virtual memory maps in this section use a C, B, and X column to indicate
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3857 the caching policy for the region..</para>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3858 </note></para>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3859 <para><programlisting>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3860 X C B Description
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3861 - - - ---------------------------------------------
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3862 0 0 0 Uncached/Unbuffered
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3863 0 0 1 Uncached/Buffered
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3864 0 1 0 Cached/Buffered Write Through, Read Allocate
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3865 0 1 1 Cached/Buffered Write Back, Read Allocate
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3866 1 0 0 Invalid -- not used
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3867 1 0 1 Uncached/Buffered No write buffer coalescing
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3868 1 1 0 Mini DCache - Policy set by Aux Ctl Register
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3869 1 1 1 Cached/Buffered Write Back, Read/Write Allocate
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3870
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3871 Physical Address Range Description
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3872 ----------------------- ----------------------------------
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3873 0x00000000 - 0x7fffffff ATU Outbound Direct Window
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3874 0x80000000 - 0x900fffff ATU Outbound Translate Windows
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3875 0xa0000000 - 0xbfffffff SDRAM
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3876 0xf0000000 - 0xf0800000 FLASH (PBIU CS0)
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3877 0xfe800000 - 0xfe800fff UART (PBIU CS1)
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3878 0xfe840000 - 0xfe840fff Left 7-segment LED (PBIU CS3)
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3879 0xfe850000 - 0xfe850fff Right 7-segment LED (PBIU CS2)
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3880 0xfe8d0000 - 0xfe8d0fff Rotary Switch (PBIU CS4)
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3881 0xfe8f0000 - 0xfe8f0fff Baterry Status (PBIU CS5)
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3882 0xfff00000 - 0xffffffff Verde Memory mapped Registers
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3883
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3884
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3885 Default Virtual Map X C B Description
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3886 ----------------------- - - - ----------------------------------
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3887 0x00000000 - 0x1fffffff 1 1 1 SDRAM
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3888 0x20000000 - 0x9fffffff 0 0 0 ATU Outbound Direct Window
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3889 0xa0000000 - 0xb00fffff 0 0 0 ATU Outbound Translate Windows
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3890 0xc0000000 - 0xdfffffff 0 0 0 Uncached alias for SDRAM
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3891 0xe0000000 - 0xe00fffff 1 1 1 Cache flush region (no phys mem)
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3892 0xf0000000 - 0xf0800000 0 1 0 FLASH (PBIU CS0)
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3893 0xfe800000 - 0xfe800fff 0 0 0 UART (PBIU CS1)
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3894 0xfe840000 - 0xfe840fff 0 0 0 Left 7-segment LED (PBIU CS3)
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3895 0xfe850000 - 0xfe850fff 0 0 0 Right 7-segment LED (PBIU CS2)
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3896 0xfe8d0000 - 0xfe8d0fff 0 0 0 Rotary Switch (PBIU CS4)
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3897 0xfe8f0000 - 0xfe8f0fff 0 0 0 Baterry Status (PBIU CS5)
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3898 0xfff00000 - 0xffffffff 0 0 0 Verde Memory mapped Registers
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3899
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3900 Alternate Virtual Map X C B Description
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3901 ----------------------- - - - ----------------------------------
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3902 0x00000000 - 0x000fffff 1 1 1 Alias for 1st MB of SDRAM
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3903 0x00100000 - 0x7fffffff 0 0 0 ATU Outbound Direct Window
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3904 0x80000000 - 0x900fffff 0 0 0 ATU Outbound Translate Windows
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3905 0xa0000000 - 0xbfffffff 1 1 1 SDRAM
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3906 0xc0000000 - 0xdfffffff 0 0 0 Uncached alias for SDRAM
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3907 0xe0000000 - 0xe00fffff 1 1 1 Cache flush region (no phys mem)
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3908 0xf0000000 - 0xf0800000 0 1 0 FLASH (PBIU CS0)
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3909 0xfe800000 - 0xfe800fff 0 0 0 UART (PBIU CS1)
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3910 0xfe840000 - 0xfe840fff 0 0 0 Left 7-segment LED (PBIU CS3)
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3911 0xfe850000 - 0xfe850fff 0 0 0 Right 7-segment LED (PBIU CS2)
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3912 0xfe8d0000 - 0xfe8d0fff 0 0 0 Rotary Switch (PBIU CS4)
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3913 0xfe8f0000 - 0xfe8f0fff 0 0 0 Baterry Status (PBIU CS5)
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3914 0xfff00000 - 0xffffffff 0 0 0 Verde Memory mapped Registers
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3915
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3916 </programlisting></para>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3917 </sect2>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3918 <sect2>
210
d2c90368aeef Merge from eCos master repository on 2002-05-23-21:39:14-BST
jlarmour
parents: 208
diff changeset
3919 <title>Platform Resource Usage</title>
208
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3920 <para>The Verde programmable timer0 is used for timeout support
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3921 for networking and XModem file transfers.</para>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3922 </sect2></sect1>
211
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
3923
835
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
3924 <?Pub _newpage>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
3925 <sect1 id="IXDP425">
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
3926 <title>ARM/Intel XScale IXDP425 Network Processor Evaluation Board</title>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
3927 <sect2>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
3928 <title>Overview</title>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
3929 <para><indexterm><primary>Intel IXDP425</primary><secondary>installing and
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
3930 testing</secondary></indexterm><indexterm><primary>installing and testing
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
3931 </primary><secondary>Intel IXDP</secondary></indexterm>RedBoot supports
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
3932 the builtin high-speed and console UARTs and a PCI based i82559 ethernet
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
3933 card for communication and downloads. The default serial port settings are
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
3934 115200,8,N,1. RedBoot also supports flash management for the 16MB boot flash
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
3935 on the mainboard.</para>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
3936
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
3937 <para>The following RedBoot configurations are supported:
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
3938
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
3939 <informaltable frame="all">
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
3940 <tgroup cols="4" colsep="1" rowsep="1" align="left">
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
3941 <thead>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
3942 <row>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
3943 <entry>Configuration</entry>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
3944 <entry>Mode</entry>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
3945 <entry>Description</entry>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
3946 <entry>File</entry>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
3947 </row>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
3948 </thead>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
3949 <tbody>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
3950 <row>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
3951 <entry>ROM</entry>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
3952 <entry>[ROM]</entry>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
3953 <entry>RedBoot running from flash
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
3954 sector.</entry>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
3955 <entry>redboot_ROM.ecm</entry>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
3956 </row>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
3957 <row>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
3958 <entry>RAM</entry>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
3959 <entry>[RAM]</entry>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
3960 <entry>RedBoot running from RAM with RedBoot in the
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
3961 flash boot sector.</entry>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
3962 <entry>redboot_RAM.ecm</entry>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
3963 </row>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
3964 </tbody>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
3965 </tgroup>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
3966 </informaltable>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
3967 </para>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
3968
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
3969 </sect2>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
3970 <sect2>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
3971 <title>Initial Installation Method</title>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
3972 <para>The IXDP425 flash is socketed, so initial installation may be done using
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
3973 an appropriate device programmer. JTAG based initial may also be used. In either
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
3974 case, the ROM mode RedBoot is programmed into the boot flash at address 0x00000000.
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
3975 </para>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
3976
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
3977 <para>After booting the initial installation of RedBoot, this warning may
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
3978 be printed: <screen>flash configuration checksum error or invalid key
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
3979 </screen>This is normal, and indicates that the flash should be configured
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
3980 for use by RedBoot. See <xref linkend="Persistent-State-Flash"> for more
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
3981 details.
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
3982 </para></sect2>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
3983 <sect2>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
3984 <title>LED Codes</title>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
3985 <para>RedBoot uses the 4 digit LED display to indicate status during board
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
3986 initialization. Possible codes are:</para>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
3987
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
3988 <literallayout width=72>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
3989 LED Actions
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
3990 -------------------------------------------------------------
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
3991 Power-On/Reset
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
3992 Set the CPSR
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
3993 Enable coprocessor access
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
3994 Drain write and fill buffer
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
3995 Setup expansion bus chip selects
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
3996 1001
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
3997 Enable Icache
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
3998 1002
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
3999 Initialize SDRAM controller
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4000 1003
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4001 Switch flash (CS0) from 0x00000000 to 0x50000000
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4002 1004
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4003 Copy MMU table to RAM
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4004 1005
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4005 Setup TTB and domain permissions
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4006 1006
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4007 Enable MMU
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4008 1007
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4009 Enable DCache
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4010 1008
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4011 Enable branch target buffer
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4012 1009
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4013 Drain write and fill buffer
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4014 Flush caches
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4015 100A
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4016 Start up the eCos kernel or RedBoot
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4017 0001
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4018
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4019 </literallayout>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4020 </sect2>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4021 <sect2>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4022 <title>Rebuilding RedBoot </title>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4023
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4024 <para>These shell variables provide the platform-specific information
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4025 needed for building RedBoot according to the procedure described in
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4026 <xref linkend="Rebuilding-Redboot">:
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4027 <programlisting>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4028 export TARGET=ixdp425
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4029 export ARCH_DIR=arm
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4030 export PLATFORM_DIR=xscale/ixdp425
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4031 </programlisting>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4032 </para>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4033
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4034 <para>The names of configuration files are listed above with the
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4035 description of the associated modes.</para>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4036 </sect2>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4037
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4038 <sect2>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4039 <title>Interrupts</title>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4040 <para>RedBoot uses an interrupt vector table which is located at address 0x8004.
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4041 Entries in this table are pointers to functions with this protoype:: <programlisting>
1058
4de388a3615b Fix mistakes for some XScale boards.
msalter
parents: 1044
diff changeset
4042 int irq_handler( unsigned vector, unsigned data )</programlisting>On the IXDP425
835
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4043 board, the vector argument is one of many interrupts defined in <computeroutput>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4044 hal/arm/xscale/ixp425/current/include/hal_var_ints.h:</computeroutput>: <programlisting>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4045 #define CYGNUM_HAL_INTERRUPT_NPEA 0
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4046 #define CYGNUM_HAL_INTERRUPT_NPEB 1
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4047 #define CYGNUM_HAL_INTERRUPT_NPEC 2
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4048 #define CYGNUM_HAL_INTERRUPT_QM1 3
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4049 #define CYGNUM_HAL_INTERRUPT_QM2 4
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4050 #define CYGNUM_HAL_INTERRUPT_TIMER0 5
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4051 #define CYGNUM_HAL_INTERRUPT_GPIO0 6
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4052 #define CYGNUM_HAL_INTERRUPT_GPIO1 7
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4053 #define CYGNUM_HAL_INTERRUPT_PCI_INT 8
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4054 #define CYGNUM_HAL_INTERRUPT_PCI_DMA1 9
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4055 #define CYGNUM_HAL_INTERRUPT_PCI_DMA2 10
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4056 #define CYGNUM_HAL_INTERRUPT_TIMER1 11
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4057 #define CYGNUM_HAL_INTERRUPT_USB 12
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4058 #define CYGNUM_HAL_INTERRUPT_UART2 13
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4059 #define CYGNUM_HAL_INTERRUPT_TIMESTAMP 14
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4060 #define CYGNUM_HAL_INTERRUPT_UART1 15
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4061 #define CYGNUM_HAL_INTERRUPT_WDOG 16
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4062 #define CYGNUM_HAL_INTERRUPT_AHB_PMU 17
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4063 #define CYGNUM_HAL_INTERRUPT_XSCALE_PMU 18
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4064 #define CYGNUM_HAL_INTERRUPT_GPIO2 19
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4065 #define CYGNUM_HAL_INTERRUPT_GPIO3 20
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4066 #define CYGNUM_HAL_INTERRUPT_GPIO4 21
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4067 #define CYGNUM_HAL_INTERRUPT_GPIO5 22
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4068 #define CYGNUM_HAL_INTERRUPT_GPIO6 23
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4069 #define CYGNUM_HAL_INTERRUPT_GPIO7 24
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4070 #define CYGNUM_HAL_INTERRUPT_GPIO8 25
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4071 #define CYGNUM_HAL_INTERRUPT_GPIO9 26
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4072 #define CYGNUM_HAL_INTERRUPT_GPIO10 27
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4073 #define CYGNUM_HAL_INTERRUPT_GPIO11 28
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4074 #define CYGNUM_HAL_INTERRUPT_GPIO12 29
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4075 #define CYGNUM_HAL_INTERRUPT_SW_INT1 30
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4076 #define CYGNUM_HAL_INTERRUPT_SW_INT2 31
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4077 </programlisting>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4078 The data passed to the ISR is pulled from a data table <computeroutput>(hal_interrupt_data)
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4079 </computeroutput> which immediately follows the interrupt vector table. With
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4080 32 interrupts, the data table starts at address 0x8084. </para>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4081 <para>An application may create a normal C function with the above prototype
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4082 to be an ISR. Just poke its address into the table at the correct index and
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4083 enable the interrupt at its source. The return value of the ISR is ignored
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4084 by RedBoot.</para>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4085 </sect2>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4086 <sect2>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4087 <title>Memory Maps</title>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4088 <para>The RAM based page table is located at RAM start + 0x4000.
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4089 <note><title>NOTE</title>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4090 <para>The virtual memory maps in this section use a C, B, and X column to indicate
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4091 the caching policy for the region..</para>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4092 </note></para>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4093 <para><programlisting>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4094 X C B Description
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4095 - - - ---------------------------------------------
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4096 0 0 0 Uncached/Unbuffered
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4097 0 0 1 Uncached/Buffered
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4098 0 1 0 Cached/Buffered Write Through, Read Allocate
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4099 0 1 1 Cached/Buffered Write Back, Read Allocate
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4100 1 0 0 Invalid -- not used
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4101 1 0 1 Uncached/Buffered No write buffer coalescing
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4102 1 1 0 Mini DCache - Policy set by Aux Ctl Register
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4103 1 1 1 Cached/Buffered Write Back, Read/Write Allocate
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4104
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4105 Virtual Address Physical Address XCB Size (MB) Description
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4106 --------------- ---------------- --- --------- -----------
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4107 0x00000000 0x00000000 010 256 SDRAM (cached)
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4108 0x10000000 0x10000000 010 256 SDRAM (alias)
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4109 0x20000000 0x00000000 000 256 SDRAM (uncached)
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4110 0x48000000 0x48000000 000 64 PCI Data
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4111 0x50000000 0x50000000 010 16 Flash (CS0)
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4112 0x51000000 0x51000000 000 112 CS1 - CS7
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4113 0x60000000 0x60000000 000 64 Queue Manager
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4114 0xC0000000 0xC0000000 000 1 PCI Controller
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4115 0xC4000000 0xC4000000 000 1 Exp. Bus Config
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4116 0xC8000000 0xC8000000 000 1 Misc IXP425 IO
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4117 0xCC000000 0xCC000000 000 1 SDRAM Config
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4118
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4119 </programlisting></para>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4120 </sect2>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4121 <sect2>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4122 <title>Platform Resource Usage</title>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4123 <para>The IXP425 programmable OStimer0 is used for timeout support
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4124 for networking and XModem file transfers.</para>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4125 </sect2></sect1>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4126
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4127 <?Pub _newpage>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4128 <sect1 id="GRG">
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4129 <title>ARM/Intel XScale Generic Residential Gateway</title>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4130 <sect2>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4131 <title>Overview</title>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4132 <para><indexterm><primary>Intel GRG</primary><secondary>installing and
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4133 testing</secondary></indexterm><indexterm><primary>installing and testing
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4134 </primary><secondary>Intel GRG</secondary></indexterm>RedBoot supports
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4135 the console UART and a PCI based i82559 ethernet card for communication
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4136 and downloads. The default serial port settings are 115200,8,N,1. RedBoot
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4137 also supports flash management for the 16MB onboard flash.</para>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4138
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4139 <para>The following RedBoot configurations are supported:
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4140
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4141 <informaltable frame="all">
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4142 <tgroup cols="4" colsep="1" rowsep="1" align="left">
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4143 <thead>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4144 <row>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4145 <entry>Configuration</entry>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4146 <entry>Mode</entry>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4147 <entry>Description</entry>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4148 <entry>File</entry>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4149 </row>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4150 </thead>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4151 <tbody>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4152 <row>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4153 <entry>ROM</entry>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4154 <entry>[ROM]</entry>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4155 <entry>RedBoot running from flash
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4156 sector.</entry>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4157 <entry>redboot_ROM.ecm</entry>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4158 </row>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4159 <row>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4160 <entry>RAM</entry>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4161 <entry>[RAM]</entry>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4162 <entry>RedBoot running from RAM with RedBoot in the
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4163 flash boot sector.</entry>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4164 <entry>redboot_RAM.ecm</entry>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4165 </row>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4166 </tbody>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4167 </tgroup>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4168 </informaltable>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4169 </para>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4170
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4171 </sect2>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4172 <sect2>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4173 <title>Initial Installation Method</title>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4174 <para>The GRG flash is socketed, so initial installation may be done using
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4175 an appropriate device programmer. JTAG based initial may also be used. In either
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4176 case, the ROM mode RedBoot is programmed into the boot flash at address 0x00000000.
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4177 </para>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4178
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4179 <para>After booting the initial installation of RedBoot, this warning may
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4180 be printed: <screen>flash configuration checksum error or invalid key
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4181 </screen>This is normal, and indicates that the flash should be configured
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4182 for use by RedBoot. See <xref linkend="Persistent-State-Flash"> for more
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4183 details.
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4184 </para></sect2>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4185 <sect2>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4186 <title>Rebuilding RedBoot </title>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4187
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4188 <para>These shell variables provide the platform-specific information
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4189 needed for building RedBoot according to the procedure described in
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4190 <xref linkend="Rebuilding-Redboot">:
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4191 <programlisting>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4192 export TARGET=grg
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4193 export ARCH_DIR=arm
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4194 export PLATFORM_DIR=xscale/grg
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4195 </programlisting>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4196 </para>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4197
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4198 <para>The names of configuration files are listed above with the
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4199 description of the associated modes.</para>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4200 </sect2>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4201
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4202 <sect2>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4203 <title>Interrupts</title>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4204 <para>RedBoot uses an interrupt vector table which is located at address 0x8004.
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4205 Entries in this table are pointers to functions with this protoype:: <programlisting>
1058
4de388a3615b Fix mistakes for some XScale boards.
msalter
parents: 1044
diff changeset
4206 int irq_handler( unsigned vector, unsigned data )</programlisting>On the GRG
835
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4207 board, the vector argument is one of many interrupts defined in <computeroutput>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4208 hal/arm/xscale/ixp425/current/include/hal_var_ints.h:</computeroutput>: <programlisting>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4209 #define CYGNUM_HAL_INTERRUPT_NPEA 0
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4210 #define CYGNUM_HAL_INTERRUPT_NPEB 1
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4211 #define CYGNUM_HAL_INTERRUPT_NPEC 2
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4212 #define CYGNUM_HAL_INTERRUPT_QM1 3
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4213 #define CYGNUM_HAL_INTERRUPT_QM2 4
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4214 #define CYGNUM_HAL_INTERRUPT_TIMER0 5
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4215 #define CYGNUM_HAL_INTERRUPT_GPIO0 6
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4216 #define CYGNUM_HAL_INTERRUPT_GPIO1 7
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4217 #define CYGNUM_HAL_INTERRUPT_PCI_INT 8
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4218 #define CYGNUM_HAL_INTERRUPT_PCI_DMA1 9
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4219 #define CYGNUM_HAL_INTERRUPT_PCI_DMA2 10
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4220 #define CYGNUM_HAL_INTERRUPT_TIMER1 11
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4221 #define CYGNUM_HAL_INTERRUPT_USB 12
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4222 #define CYGNUM_HAL_INTERRUPT_UART2 13
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4223 #define CYGNUM_HAL_INTERRUPT_TIMESTAMP 14
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4224 #define CYGNUM_HAL_INTERRUPT_UART1 15
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4225 #define CYGNUM_HAL_INTERRUPT_WDOG 16
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4226 #define CYGNUM_HAL_INTERRUPT_AHB_PMU 17
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4227 #define CYGNUM_HAL_INTERRUPT_XSCALE_PMU 18
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4228 #define CYGNUM_HAL_INTERRUPT_GPIO2 19
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4229 #define CYGNUM_HAL_INTERRUPT_GPIO3 20
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4230 #define CYGNUM_HAL_INTERRUPT_GPIO4 21
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4231 #define CYGNUM_HAL_INTERRUPT_GPIO5 22
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4232 #define CYGNUM_HAL_INTERRUPT_GPIO6 23
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4233 #define CYGNUM_HAL_INTERRUPT_GPIO7 24
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4234 #define CYGNUM_HAL_INTERRUPT_GPIO8 25
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4235 #define CYGNUM_HAL_INTERRUPT_GPIO9 26
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4236 #define CYGNUM_HAL_INTERRUPT_GPIO10 27
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4237 #define CYGNUM_HAL_INTERRUPT_GPIO11 28
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4238 #define CYGNUM_HAL_INTERRUPT_GPIO12 29
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4239 #define CYGNUM_HAL_INTERRUPT_SW_INT1 30
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4240 #define CYGNUM_HAL_INTERRUPT_SW_INT2 31
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4241 </programlisting>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4242 The data passed to the ISR is pulled from a data table <computeroutput>(hal_interrupt_data)
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4243 </computeroutput> which immediately follows the interrupt vector table. With
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4244 32 interrupts, the data table starts at address 0x8084. </para>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4245 <para>An application may create a normal C function with the above prototype
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4246 to be an ISR. Just poke its address into the table at the correct index and
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4247 enable the interrupt at its source. The return value of the ISR is ignored
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4248 by RedBoot.</para>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4249 </sect2>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4250 <sect2>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4251 <title>Memory Maps</title>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4252 <para>The RAM based page table is located at RAM start + 0x4000.
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4253 <note><title>NOTE</title>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4254 <para>The virtual memory maps in this section use a C, B, and X column to indicate
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4255 the caching policy for the region..</para>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4256 </note></para>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4257 <para><programlisting>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4258 X C B Description
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4259 - - - ---------------------------------------------
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4260 0 0 0 Uncached/Unbuffered
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4261 0 0 1 Uncached/Buffered
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4262 0 1 0 Cached/Buffered Write Through, Read Allocate
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4263 0 1 1 Cached/Buffered Write Back, Read Allocate
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4264 1 0 0 Invalid -- not used
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4265 1 0 1 Uncached/Buffered No write buffer coalescing
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4266 1 1 0 Mini DCache - Policy set by Aux Ctl Register
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4267 1 1 1 Cached/Buffered Write Back, Read/Write Allocate
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4268
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4269 Virtual Address Physical Address XCB Size (MB) Description
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4270 --------------- ---------------- --- --------- -----------
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4271 0x00000000 0x00000000 010 32 SDRAM (cached)
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4272 0x10000000 0x00000000 010 32 SDRAM (alias)
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4273 0x20000000 0x00000000 000 32 SDRAM (uncached)
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4274 0x48000000 0x48000000 000 64 PCI Data
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4275 0x50000000 0x50000000 010 16 Flash (CS0)
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4276 0x51000000 0x51000000 000 112 CS1 - CS7
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4277 0x60000000 0x60000000 000 64 Queue Manager
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4278 0xC0000000 0xC0000000 000 1 PCI Controller
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4279 0xC4000000 0xC4000000 000 1 Exp. Bus Config
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4280 0xC8000000 0xC8000000 000 1 Misc IXP425 IO
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4281 0xCC000000 0xCC000000 000 1 SDRAM Config
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4282
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4283 </programlisting></para>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4284 </sect2>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4285 <sect2>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4286 <title>Platform Resource Usage</title>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4287 <para>The IXP425 programmable OStimer0 is used for timeout support
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4288 for networking and XModem file transfers.</para>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4289 </sect2></sect1>
d6cfbed66cf9 New XScale ports
msalter
parents: 632
diff changeset
4290
1044
c7f6f3f06207 Add PrPMC1100 port
msalter
parents: 1016
diff changeset
4291 <?Pub _newpage>
c7f6f3f06207 Add PrPMC1100 port
msalter
parents: 1016
diff changeset
4292 <sect1 id="PrPMC1100">
c7f6f3f06207 Add PrPMC1100 port
msalter
parents: 1016
diff changeset
4293 <title>Motorola PrPMC1100 CPU card</title>
c7f6f3f06207 Add PrPMC1100 port
msalter
parents: 1016
diff changeset
4294 <sect2>
c7f6f3f06207 Add PrPMC1100 port
msalter
parents: 1016
diff changeset
4295 <title>Overview</title>
c7f6f3f06207 Add PrPMC1100 port
msalter
parents: 1016
diff changeset
4296 <para><indexterm><primary>Motorola PrPMC1100</primary><secondary>installing and
c7f6f3f06207 Add PrPMC1100 port
msalter
parents: 1016
diff changeset
4297 testing</secondary></indexterm><indexterm><primary>installing and testing
c7f6f3f06207 Add PrPMC1100 port
msalter
parents: 1016
diff changeset
4298 </primary><secondary>Motorola PrPMC1100</secondary></indexterm>RedBoot supports
c7f6f3f06207 Add PrPMC1100 port
msalter
parents: 1016
diff changeset
4299 the builtin high-speed and console UARTs
c7f6f3f06207 Add PrPMC1100 port
msalter
parents: 1016
diff changeset
4300 .
c7f6f3f06207 Add PrPMC1100 port
msalter
parents: 1016
diff changeset
4301 The console UART is the default and feeds the front panel COM1 connector. The
c7f6f3f06207 Add PrPMC1100 port
msalter
parents: 1016
diff changeset
4302 high-speed UART signals are only available from the PN4 IO connector. Therefore,
c7f6f3f06207 Add PrPMC1100 port
msalter
parents: 1016
diff changeset
4303 usability of this port depends on the carrier board used. The default serial
c7f6f3f06207 Add PrPMC1100 port
msalter
parents: 1016
diff changeset
4304 port settings are 115200,8,N,1. RedBoot also supports flash management for
c7f6f3f06207 Add PrPMC1100 port
msalter
parents: 1016
diff changeset
4305 the 16MB boot flash on the mainboard.</para>
c7f6f3f06207 Add PrPMC1100 port
msalter
parents: 1016
diff changeset
4306
c7f6f3f06207 Add PrPMC1100 port
msalter
parents: 1016
diff changeset
4307 <para>The following RedBoot configurations are supported:
c7f6f3f06207 Add PrPMC1100 port
msalter
parents: 1016
diff changeset
4308
c7f6f3f06207 Add PrPMC1100 port
msalter
parents: 1016
diff changeset
4309 <informaltable frame="all">
c7f6f3f06207 Add PrPMC1100 port
msalter
parents: 1016
diff changeset
4310 <tgroup cols="4" colsep="1" rowsep="1" align="left">
c7f6f3f06207 Add PrPMC1100 port
msalter
parents: 1016
diff changeset
4311 <thead>
c7f6f3f06207 Add PrPMC1100 port
msalter
parents: 1016
diff changeset
4312 <row>
c7f6f3f06207 Add PrPMC1100 port
msalter
parents: 1016
diff changeset
4313 <entry>Configuration</entry>
c7f6f3f06207 Add PrPMC1100 port
msalter
parents: 1016
diff changeset
4314 <entry>Mode</entry>
c7f6f3f06207 Add PrPMC1100 port
msalter
parents: 1016
diff changeset
4315 <entry>Description</entry>
c7f6f3f06207 Add PrPMC1100 port
msalter
parents: 1016
diff changeset
4316 <entry>File</entry>
c7f6f3f06207 Add PrPMC1100 port
msalter
parents: 1016
diff changeset
4317 </row>
c7f6f3f06207 Add PrPMC1100 port
msalter
parents: 1016
diff changeset
4318 </thead>
c7f6f3f06207 Add PrPMC1100 port
msalter
parents: 1016
diff changeset
4319 <tbody>
c7f6f3f06207 Add PrPMC1100 port
msalter
parents: 1016
diff changeset
4320 <row>
c7f6f3f06207 Add PrPMC1100 port
msalter
parents: 1016
diff changeset
4321 <entry>ROM</entry>
c7f6f3f06207 Add PrPMC1100 port
msalter
parents: 1016
diff changeset
4322 <entry>[ROM]</entry>
c7f6f3f06207 Add PrPMC1100 port
msalter
parents: 1016
diff changeset
4323 <entry>RedBoot running from flash
c7f6f3f06207 Add PrPMC1100 port
msalter
parents: 1016
diff changeset
4324 sector.</entry>
c7f6f3f06207 Add PrPMC1100 port
msalter
parents: 1016
diff changeset
4325 <entry>redboot_ROM.ecm</entry>
c7f6f3f06207 Add PrPMC1100 port
msalter
parents: 1016
diff changeset
4326 </row>
c7f6f3f06207 Add PrPMC1100 port
msalter
parents: 1016
diff changeset
4327 <row>
c7f6f3f06207 Add PrPMC1100 port
msalter
parents: 1016
diff changeset
4328 <entry>RAM</entry>
c7f6f3f06207 Add PrPMC1100 port
msalter
parents: 1016
diff changeset
4329 <entry>[RAM]</entry>
c7f6f3f06207 Add PrPMC1100 port
msalter
parents: 1016
diff changeset
4330 <entry>RedBoot running from RAM with RedBoot in the
c7f6f3f06207 Add PrPMC1100 port
msalter
parents: 1016
diff changeset
4331 flash boot sector.</entry>
c7f6f3f06207 Add PrPMC1100 port
msalter
parents: 1016
diff changeset
4332 <entry>redboot_RAM.ecm</entry>
c7f6f3f06207 Add PrPMC1100 port
msalter
parents: 1016
diff changeset
4333 </row>
c7f6f3f06207 Add PrPMC1100 port
msalter
parents: 1016
diff changeset
4334 </tbody>
c7f6f3f06207 Add PrPMC1100 port
msalter
parents: 1016
diff changeset
4335 </tgroup>
c7f6f3f06207 Add PrPMC1100 port
msalter
parents: 1016
diff changeset
4336 </informaltable>
c7f6f3f06207 Add PrPMC1100 port
msalter
parents: 1016
diff changeset
4337 </para>
c7f6f3f06207 Add PrPMC1100 port
msalter
parents: 1016
diff changeset
4338
c7f6f3f06207 Add PrPMC1100 port
msalter
parents: 1016
diff changeset
4339 </sect2>
c7f6f3f06207 Add PrPMC1100 port
msalter
parents: 1016
diff changeset
4340 <sect2>
c7f6f3f06207 Add PrPMC1100 port
msalter
parents: 1016
diff changeset
4341 <title>Initial Installation Method</title>
c7f6f3f06207 Add PrPMC1100 port
msalter
parents: 1016
diff changeset
4342 <para>The PrPMC1100 flash is socketed, so initial installation may be done using
c7f6f3f06207 Add PrPMC1100 port
msalter
parents: 1016
diff changeset
4343 an appropriate device programmer. JTAG based flash programming may also be used.
c7f6f3f06207 Add PrPMC1100 port
msalter
parents: 1016
diff changeset
4344 In either case, the ROM mode RedBoot is programmed into the boot flash at address
c7f6f3f06207 Add PrPMC1100 port
msalter
parents: 1016
diff changeset
4345 0x00000000.
c7f6f3f06207 Add PrPMC1100 port
msalter
parents: 1016
diff changeset
4346 </para>
c7f6f3f06207 Add PrPMC1100 port
msalter
parents: 1016
diff changeset
4347
c7f6f3f06207 Add PrPMC1100 port
msalter
parents: 1016
diff changeset
4348 <para>After booting the initial installation of RedBoot, this warning may
c7f6f3f06207 Add PrPMC1100 port
msalter
parents: 1016
diff changeset
4349 be printed: <screen>flash configuration checksum error or invalid key
c7f6f3f06207 Add PrPMC1100 port
msalter
parents: 1016
diff changeset
4350 </screen>This is normal, and indicates that the flash should be configured
c7f6f3f06207 Add PrPMC1100 port
msalter
parents: 1016
diff changeset
4351 for use by RedBoot. Even if this message is not seen, it is recommended that
c7f6f3f06207 Add PrPMC1100 port
msalter
parents: 1016
diff changeset
4352 the <command>fconfig</command> be run to initialize the flash configuration
c7f6f3f06207 Add PrPMC1100 port
msalter
parents: 1016
diff changeset
4353 area. See <xref linkend="Persistent-State-Flash"> for more details.
c7f6f3f06207 Add PrPMC1100 port
msalter
parents: 1016
diff changeset
4354 </para></sect2>
c7f6f3f06207 Add PrPMC1100 port
msalter
parents: 1016
diff changeset
4355
c7f6f3f06207 Add PrPMC1100 port
msalter
parents: 1016
diff changeset
4356 <sect2>
c7f6f3f06207 Add PrPMC1100 port
msalter
parents: 1016
diff changeset
4357 <title>Rebuilding RedBoot </title>
c7f6f3f06207 Add PrPMC1100 port
msalter
parents: 1016
diff changeset
4358
c7f6f3f06207 Add PrPMC1100 port
msalter
parents: 1016
diff changeset
4359 <para>These shell variables provide the platform-specific information
c7f6f3f06207 Add PrPMC1100 port
msalter
parents: 1016
diff changeset
4360 needed for building RedBoot according to the procedure described in
c7f6f3f06207 Add PrPMC1100 port
msalter
parents: 1016
diff changeset
4361 <xref linkend="Rebuilding-Redboot">:
c7f6f3f06207 Add PrPMC1100 port
msalter
parents: 1016
diff changeset
4362 <programlisting>
c7f6f3f06207 Add PrPMC1100 port
msalter
parents: 1016
diff changeset
4363 export TARGET=prpmc1100
c7f6f3f06207 Add PrPMC1100 port
msalter
parents: 1016
diff changeset
4364 export ARCH_DIR=arm
c7f6f3f06207 Add PrPMC1100 port
msalter
parents: 1016
diff changeset
4365 export PLATFORM_DIR=xscale/prpmc1100
c7f6f3f06207 Add PrPMC1100 port
msalter
parents: 1016
diff changeset
4366 </programlisting>
c7f6f3f06207 Add PrPMC1100 port
msalter
parents: 1016
diff changeset
4367 </para>
c7f6f3f06207 Add PrPMC1100 port
msalter
parents: 1016
diff changeset
4368
c7f6f3f06207 Add PrPMC1100 port
msalter
parents: 1016
diff changeset
4369 <para>The names of configuration files are listed above with the
c7f6f3f06207 Add PrPMC1100 port
msalter
parents: 1016
diff changeset
4370 description of the associated modes.</para>
c7f6f3f06207 Add PrPMC1100 port
msalter
parents: 1016
diff changeset
4371 </sect2>
c7f6f3f06207 Add PrPMC1100 port
msalter
parents: 1016
diff changeset
4372
c7f6f3f06207 Add PrPMC1100 port
msalter
parents: 1016
diff changeset
4373 <sect2>
c7f6f3f06207 Add PrPMC1100 port
msalter
parents: 1016
diff changeset
4374 <title>Interrupts</title>
c7f6f3f06207 Add PrPMC1100 port
msalter
parents: 1016
diff changeset
4375 <para>RedBoot uses an interrupt vector table which is located at address 0x8004.
c7f6f3f06207 Add PrPMC1100 port
msalter
parents: 1016
diff changeset
4376 Entries in this table are pointers to functions with this protoype:: <programlisting>
1058
4de388a3615b Fix mistakes for some XScale boards.
msalter
parents: 1044
diff changeset
4377 int irq_handler( unsigned vector, unsigned data )</programlisting>On the PrPMC1100
1044
c7f6f3f06207 Add PrPMC1100 port
msalter
parents: 1016
diff changeset
4378 board, the vector argument is one of many interrupts defined in <computeroutput>
1058
4de388a3615b Fix mistakes for some XScale boards.
msalter
parents: 1044
diff changeset
4379 hal/arm/xscale/ixp425/current/include/hal_var_ints.h:</computeroutput>: <programlisting>
1044
c7f6f3f06207 Add PrPMC1100 port
msalter
parents: 1016
diff changeset
4380 #define CYGNUM_HAL_INTERRUPT_NPEA 0
c7f6f3f06207 Add PrPMC1100 port
msalter
parents: 1016
diff changeset
4381 #define CYGNUM_HAL_INTERRUPT_NPEB 1
c7f6f3f06207 Add PrPMC1100 port
msalter
parents: 1016
diff changeset
4382 #define CYGNUM_HAL_INTERRUPT_NPEC 2
c7f6f3f06207 Add PrPMC1100 port
msalter
parents: 1016
diff changeset
4383 #define CYGNUM_HAL_INTERRUPT_QM1 3
c7f6f3f06207 Add PrPMC1100 port
msalter
parents: 1016
diff changeset
4384 #define CYGNUM_HAL_INTERRUPT_QM2 4
c7f6f3f06207 Add PrPMC1100 port
msalter
parents: 1016
diff changeset
4385 #define CYGNUM_HAL_INTERRUPT_TIMER0 5
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parents: 1016
diff changeset
4386 #define CYGNUM_HAL_INTERRUPT_GPIO0 6
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parents: 1016
diff changeset
4387 #define CYGNUM_HAL_INTERRUPT_GPIO1 7
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msalter
parents: 1016
diff changeset
4388 #define CYGNUM_HAL_INTERRUPT_PCI_INT 8
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parents: 1016
diff changeset
4389 #define CYGNUM_HAL_INTERRUPT_PCI_DMA1 9
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msalter
parents: 1016
diff changeset
4390 #define CYGNUM_HAL_INTERRUPT_PCI_DMA2 10
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parents: 1016
diff changeset
4391 #define CYGNUM_HAL_INTERRUPT_TIMER1 11
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parents: 1016
diff changeset
4392 #define CYGNUM_HAL_INTERRUPT_USB 12
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msalter
parents: 1016
diff changeset
4393 #define CYGNUM_HAL_INTERRUPT_UART2 13
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msalter
parents: 1016
diff changeset
4394 #define CYGNUM_HAL_INTERRUPT_TIMESTAMP 14
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msalter
parents: 1016
diff changeset
4395 #define CYGNUM_HAL_INTERRUPT_UART1 15
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parents: 1016
diff changeset
4396 #define CYGNUM_HAL_INTERRUPT_WDOG 16
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parents: 1016
diff changeset
4397 #define CYGNUM_HAL_INTERRUPT_AHB_PMU 17
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msalter
parents: 1016
diff changeset
4398 #define CYGNUM_HAL_INTERRUPT_XSCALE_PMU 18
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msalter
parents: 1016
diff changeset
4399 #define CYGNUM_HAL_INTERRUPT_GPIO2 19
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msalter
parents: 1016
diff changeset
4400 #define CYGNUM_HAL_INTERRUPT_GPIO3 20
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msalter
parents: 1016
diff changeset
4401 #define CYGNUM_HAL_INTERRUPT_GPIO4 21
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parents: 1016
diff changeset
4402 #define CYGNUM_HAL_INTERRUPT_GPIO5 22
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parents: 1016
diff changeset
4403 #define CYGNUM_HAL_INTERRUPT_GPIO6 23
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parents: 1016
diff changeset
4404 #define CYGNUM_HAL_INTERRUPT_GPIO7 24
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parents: 1016
diff changeset
4405 #define CYGNUM_HAL_INTERRUPT_GPIO8 25
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diff changeset
4406 #define CYGNUM_HAL_INTERRUPT_GPIO9 26
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diff changeset
4407 #define CYGNUM_HAL_INTERRUPT_GPIO10 27
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parents: 1016
diff changeset
4408 #define CYGNUM_HAL_INTERRUPT_GPIO11 28
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diff changeset
4409 #define CYGNUM_HAL_INTERRUPT_GPIO12 29
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diff changeset
4410 #define CYGNUM_HAL_INTERRUPT_SW_INT1 30
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diff changeset
4411 #define CYGNUM_HAL_INTERRUPT_SW_INT2 31
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diff changeset
4412 </programlisting>
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diff changeset
4413 The data passed to the ISR is pulled from a data table <computeroutput>(hal_interrupt_data)
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diff changeset
4414 </computeroutput> which immediately follows the interrupt vector table. With
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diff changeset
4415 32 interrupts, the data table starts at address 0x8084. </para>
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parents: 1016
diff changeset
4416 <para>An application may create a normal C function with the above prototype
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parents: 1016
diff changeset
4417 to be an ISR. Just poke its address into the table at the correct index and
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parents: 1016
diff changeset
4418 enable the interrupt at its source. The return value of the ISR is ignored
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parents: 1016
diff changeset
4419 by RedBoot.</para>
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parents: 1016
diff changeset
4420 </sect2>
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parents: 1016
diff changeset
4421 <sect2>
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parents: 1016
diff changeset
4422 <title>Memory Maps</title>
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parents: 1016
diff changeset
4423 <para>The RAM based page table is located at RAM start + 0x4000.
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parents: 1016
diff changeset
4424 <note><title>NOTE</title>
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parents: 1016
diff changeset
4425 <para>The virtual memory maps in this section use a C, B, and X column to indicate
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parents: 1016
diff changeset
4426 the caching policy for the region..</para>
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parents: 1016
diff changeset
4427 </note></para>
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msalter
parents: 1016
diff changeset
4428 <para><programlisting>
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msalter
parents: 1016
diff changeset
4429 X C B Description
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msalter
parents: 1016
diff changeset
4430 - - - ---------------------------------------------
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parents: 1016
diff changeset
4431 0 0 0 Uncached/Unbuffered
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parents: 1016
diff changeset
4432 0 0 1 Uncached/Buffered
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parents: 1016
diff changeset
4433 0 1 0 Cached/Buffered Write Through, Read Allocate
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parents: 1016
diff changeset
4434 0 1 1 Cached/Buffered Write Back, Read Allocate
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parents: 1016
diff changeset
4435 1 0 0 Invalid -- not used
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msalter
parents: 1016
diff changeset
4436 1 0 1 Uncached/Buffered No write buffer coalescing
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parents: 1016
diff changeset
4437 1 1 0 Mini DCache - Policy set by Aux Ctl Register
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msalter
parents: 1016
diff changeset
4438 1 1 1 Cached/Buffered Write Back, Read/Write Allocate
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msalter
parents: 1016
diff changeset
4439
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parents: 1016
diff changeset
4440 Virtual Address Physical Address XCB Size (MB) Description
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msalter
parents: 1016
diff changeset
4441 --------------- ---------------- --- --------- -----------
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parents: 1016
diff changeset
4442 0x00000000 0x00000000 010 256 SDRAM (cached)
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parents: 1016
diff changeset
4443 0x10000000 0x10000000 010 256 SDRAM (alias)
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msalter
parents: 1016
diff changeset
4444 0x20000000 0x00000000 000 256 SDRAM (uncached)
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msalter
parents: 1016
diff changeset
4445 0x48000000 0x48000000 000 64 PCI Data
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parents: 1016
diff changeset
4446 0x50000000 0x50000000 010 16 Flash (CS0)
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parents: 1016
diff changeset
4447 0x51000000 0x51000000 000 112 CS1 - CS7
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msalter
parents: 1016
diff changeset
4448 0x60000000 0x60000000 000 64 Queue Manager
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msalter
parents: 1016
diff changeset
4449 0xC0000000 0xC0000000 000 1 PCI Controller
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msalter
parents: 1016
diff changeset
4450 0xC4000000 0xC4000000 000 1 Exp. Bus Config
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msalter
parents: 1016
diff changeset
4451 0xC8000000 0xC8000000 000 1 Misc CPU IO
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parents: 1016
diff changeset
4452 0xCC000000 0xCC000000 000 1 SDRAM Config
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parents: 1016
diff changeset
4453
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diff changeset
4454 </programlisting></para>
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msalter
parents: 1016
diff changeset
4455 </sect2>
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parents: 1016
diff changeset
4456 <sect2>
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parents: 1016
diff changeset
4457 <title>Platform Resource Usage</title>
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parents: 1016
diff changeset
4458 <para>The CPU programmable OStimer0 is used for timeout support
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msalter
parents: 1016
diff changeset
4459 for networking and XModem file transfers.</para>
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msalter
parents: 1016
diff changeset
4460 </sect2></sect1>
835
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msalter
parents: 632
diff changeset
4461
211
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diff changeset
4462 <!-- ********************** CalmRISC ********************** -->
208
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diff changeset
4463 <?Pub _newpage>
211
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diff changeset
4464 <sect1 id="CalmRISC16">
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diff changeset
4465 <title>CalmRISC/CalmRISC16 Samsung CalmRISC16 Core Evaluation Board </title>
208
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4466 <sect2>
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diff changeset
4467 <title>Overview</title>
211
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diff changeset
4468 <para><indexterm><primary>Samsung CalmRISC16 Core EVB</primary><secondary>installing
208
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diff changeset
4469 and testing</secondary></indexterm><indexterm><primary>installing and testing
211
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diff changeset
4470 </primary><secondary>Samsung CalmRISC16 Core EVB</secondary></indexterm> The
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diff changeset
4471 Samsung CalmRISC16 evaluation platform consists of two boards connected by a
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diff changeset
4472 ribbon cable. One board contains the CPU core and memory. The other board is
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diff changeset
4473 called the MDSChip board and provides the host interface. The calmRISC16 is a
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diff changeset
4474 harvard architecture with separate 22-bit program and data addresses. The
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diff changeset
4475 instruction set provides no instruction for writing to program memory. The
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diff changeset
4476 MDSChip board firmware (called CalmBreaker) provides a pseudo register interface
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diff changeset
4477 so that code running on the core has access to a serial channel and a mechanism
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diff changeset
4478 to write to program memory. The serial channel is fixed at 57600-8-N-1 by the
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diff changeset
4479 firmware. The CalmBreaker firmware also provides a serial protocol which
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diff changeset
4480 allows a host to download a program and to start or stop the core board.</para>
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diff changeset
4481
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diff changeset
4482 <para>The following RedBoot configurations are supported:
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diff changeset
4483
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diff changeset
4484 <informaltable frame="all">
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diff changeset
4485 <tgroup cols="4" colsep="1" rowsep="1" align="left">
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diff changeset
4486 <thead>
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diff changeset
4487 <row>
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diff changeset
4488 <entry>Configuration</entry>
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diff changeset
4489 <entry>Mode</entry>
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diff changeset
4490 <entry>Description</entry>
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diff changeset
4491 <entry>File</entry>
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diff changeset
4492 </row>
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diff changeset
4493 </thead>
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diff changeset
4494 <tbody>
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diff changeset
4495 <row>
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diff changeset
4496 <entry>ROM</entry>
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diff changeset
4497 <entry>[ROM]</entry>
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diff changeset
4498 <entry>RedBoot running via the MDSChip board.</entry>
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diff changeset
4499 <entry>redboot_ROM.ecm</entry>
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diff changeset
4500 </row>
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diff changeset
4501 </tbody>
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diff changeset
4502 </tgroup>
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diff changeset
4503 </informaltable>
208
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diff changeset
4504 </para>
211
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diff changeset
4505
208
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diff changeset
4506 </sect2>
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diff changeset
4507 <sect2>
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4508 <title>Initial Installation Method </title>
211
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diff changeset
4509 <para>The CalmRISC16 core is controlled through the MDSChip board. There is
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diff changeset
4510 no non-volatile storage available for RedBoot, so RedBoot must be downloaded
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diff changeset
4511 to the board on every power cycle. A small utility program is used to download
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diff changeset
4512 S-record files to the eval board. Sources and build instructions for this
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diff changeset
4513 utility are located in the RedBoot sources in:
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diff changeset
4514 <filename class="directory">packages/hal/calmrisc16/ceb/current/support
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diff changeset
4515 </filename></para>
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diff changeset
4516 <para>To download the RedBoot image, first press the reset button on the MDSChip
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diff changeset
4517 board. The green 'Run' LED on the core board should go off. Now, use the
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diff changeset
4518 utility to download the RedBoot image with:
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diff changeset
4519 <screen>$ <userinput>calmbreaker -p /dev/term/b --reset --srec-code -f redboot.elf</userinput>
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diff changeset
4520 </screen>
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diff changeset
4521 Note that the '-p /dev/term/b' specifies the serial port to use and will vary
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diff changeset
4522 from system to system. The download will take about two minutes. After it
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diff changeset
4523 finishes, start RedBoot with:
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diff changeset
4524 <screen>$ <userinput>calmbreaker -p /dev/term/b --run</userinput></screen>
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diff changeset
4525 The 'Run' LED on the core board should be on. Connecting to the MDSboard with
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diff changeset
4526 a terminal and typing enter should result in RedBoot reprinting the command
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diff changeset
4527 prompt.
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diff changeset
4528 </para>
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4529 </sect2>
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diff changeset
4530 <sect2>
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diff changeset
4531 <title>Special RedBoot Commands </title>
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diff changeset
4532 <para>None.</para>
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diff changeset
4533 </sect2>
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diff changeset
4534 <sect2>
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diff changeset
4535 <title>Special Note on Serial Channel </title>
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4536 <para>The MDSChip board uses a relatively slow microcontroller to provide
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diff changeset
4537 the pseudo-register interface to the core board. This pseudo-register
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diff changeset
4538 interface provides access to the serial channel and write access to program
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diff changeset
4539 memory. Those interfaces are slow and the serial channel is easily overrun
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diff changeset
4540 by a fast host. For this reason, GDB must be told to limit the size of code
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diff changeset
4541 download packets to avoid serial overrun. This is done with the following
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
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diff changeset
4542 GDB command:
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diff changeset
4543 <screen>(gdb) <userinput>set download-write-size 25</userinput></screen>
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diff changeset
4544 </para>
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diff changeset
4545 </sect2>
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diff changeset
4546 <sect2>
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diff changeset
4547
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diff changeset
4548 <title>Rebuilding RedBoot</title>
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diff changeset
4549
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diff changeset
4550 <para>These shell variables provide the platform-specific information
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diff changeset
4551 needed for building RedBoot according to the procedure described in
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diff changeset
4552 <xref linkend="Rebuilding-Redboot">:
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diff changeset
4553 <programlisting>
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diff changeset
4554 export TARGET=calm16_ceb
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diff changeset
4555 export ARCH_DIR=calmrisc16
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diff changeset
4556 export PLATFORM_DIR=ceb
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diff changeset
4557 </programlisting>
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diff changeset
4558 </para>
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diff changeset
4559
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diff changeset
4560 <para>The names of configuration files are listed above with the
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diff changeset
4561 description of the associated modes.</para>
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diff changeset
4562
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diff changeset
4563 </sect2>
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diff changeset
4564 </sect1>
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diff changeset
4565
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diff changeset
4566 <?Pub _newpage>
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diff changeset
4567 <sect1 id="CalmRISC32">
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diff changeset
4568 <title>CalmRISC/CalmRISC32 Samsung CalmRISC32 Core Evaluation Board </title>
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diff changeset
4569 <sect2>
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diff changeset
4570 <title>Overview</title>
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diff changeset
4571 <para><indexterm><primary>Samsung CalmRISC32 Core EVB</primary><secondary>installing
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diff changeset
4572 and testing</secondary></indexterm><indexterm><primary>installing and testing
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diff changeset
4573 </primary><secondary>Samsung CalmRISC32 Core EVB</secondary></indexterm> The
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diff changeset
4574 Samsung CalmRISC32 evaluation platform consists of two boards connected by a
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diff changeset
4575 ribbon cable. One board contains the CPU core and memory. The other board is
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diff changeset
4576 called the MDSChip board and provides the host interface. The calmRISC32 is a
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diff changeset
4577 harvard architecture with separate 32-bit program and data addresses. The
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
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diff changeset
4578 instruction set provides no instruction for writing to program memory. The
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diff changeset
4579 MDSChip board firmware (called CalmBreaker) provides a pseudo register interface
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diff changeset
4580 so that code running on the core has access to a serial channel and a mechanism
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diff changeset
4581 to write to program memory. The serial channel is fixed at 57600-8-N-1 by the
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diff changeset
4582 firmware. The CalmBreaker firmware also provides a serial protocol which
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diff changeset
4583 allows a host to download a program and to start or stop the core board.</para>
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diff changeset
4584
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diff changeset
4585 <para>The following RedBoot configurations are supported:
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diff changeset
4586
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diff changeset
4587 <informaltable frame="all">
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diff changeset
4588 <tgroup cols="4" colsep="1" rowsep="1" align="left">
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diff changeset
4589 <thead>
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diff changeset
4590 <row>
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diff changeset
4591 <entry>Configuration</entry>
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diff changeset
4592 <entry>Mode</entry>
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diff changeset
4593 <entry>Description</entry>
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diff changeset
4594 <entry>File</entry>
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diff changeset
4595 </row>
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diff changeset
4596 </thead>
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diff changeset
4597 <tbody>
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diff changeset
4598 <row>
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diff changeset
4599 <entry>ROM</entry>
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diff changeset
4600 <entry>[ROM]</entry>
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diff changeset
4601 <entry>RedBoot running via the MDSChip board.</entry>
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diff changeset
4602 <entry>redboot_ROM.ecm</entry>
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diff changeset
4603 </row>
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diff changeset
4604 </tbody>
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diff changeset
4605 </tgroup>
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diff changeset
4606 </informaltable>
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diff changeset
4607 </para>
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diff changeset
4608
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diff changeset
4609 </sect2>
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diff changeset
4610 <sect2>
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diff changeset
4611 <title>Initial Installation Method </title>
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diff changeset
4612 <para>The calmRISC32 core is controlled through the MDSChip board. There is
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diff changeset
4613 no non-volatile storage available for RedBoot, so RedBoot must be downloaded
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diff changeset
4614 to the board on every power cycle. A small utility program is used to download
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diff changeset
4615 S-record files to the eval board. Sources and build instructions for this
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diff changeset
4616 utility are located in the RedBoot sources in:
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diff changeset
4617 <filename class="directory">packages/hal/calmrisc32/ceb/current/support
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diff changeset
4618 </filename></para>
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diff changeset
4619 <para>To download the RedBoot image, first press the reset button on the MDSChip
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diff changeset
4620 board. The green 'Run' LED on the core board should go off. Now, use the
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diff changeset
4621 utility to download the RedBoot image with:
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diff changeset
4622 <screen>$ <userinput>calmbreaker -p /dev/term/b --reset --srec-code -f redboot.elf</userinput>
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4623 </screen>
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diff changeset
4624 Note that the '-p /dev/term/b' specifies the serial port to use and will vary
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diff changeset
4625 from system to syetm. The download will take about two minutes. After it
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diff changeset
4626 finishes, start RedBoot with:
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diff changeset
4627 <screen>$ <userinput>calmbreaker -p /dev/term/b --run</userinput></screen>
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diff changeset
4628 The 'Run' LED on the core board should be on. Connecting to the MDSboard with
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diff changeset
4629 a terminal and typing enter should result in RedBoot reprinting the command
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diff changeset
4630 prompt.
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4631 </para>
208
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4632 </sect2>
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parents:
diff changeset
4633 <sect2>
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parents:
diff changeset
4634 <title>Special RedBoot Commands </title>
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parents:
diff changeset
4635 <para>None.</para>
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parents:
diff changeset
4636 </sect2>
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4637 <sect2>
211
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diff changeset
4638 <title>Special Note on Serial Channel </title>
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diff changeset
4639 <para>The MDSChip board uses a relatively slow microcontroller to provide
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diff changeset
4640 the pseudo-register interface to the core board. This pseudo-register
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diff changeset
4641 interface provides access to the serial channel and write access to program
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diff changeset
4642 memory. Those interfaces are slow and the serial channel is easily overrun
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diff changeset
4643 by a fast host. For this reason, GDB must be told to limit the size of code
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diff changeset
4644 download packets to avoid serial overrun. This is done with the following
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diff changeset
4645 GDB command:
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diff changeset
4646 <screen>(gdb) <userinput>set download-write-size 25</userinput></screen>
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diff changeset
4647 </para>
208
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parents:
diff changeset
4648 </sect2>
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parents:
diff changeset
4649 <sect2>
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parents:
diff changeset
4650 <title>Rebuilding RedBoot</title>
211
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diff changeset
4651
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diff changeset
4652 <para>These shell variables provide the platform-specific information
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diff changeset
4653 needed for building RedBoot according to the procedure described in
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diff changeset
4654 <xref linkend="Rebuilding-Redboot">:
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diff changeset
4655 <programlisting>
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diff changeset
4656 export TARGET=calm32_ceb
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diff changeset
4657 export ARCH_DIR=calmrisc32
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diff changeset
4658 export PLATFORM_DIR=ceb
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diff changeset
4659 </programlisting>
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diff changeset
4660 </para>
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diff changeset
4661
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diff changeset
4662 <para>The names of configuration files are listed above with the
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diff changeset
4663 description of the associated modes.</para>
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diff changeset
4664
208
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parents:
diff changeset
4665 </sect2>
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parents:
diff changeset
4666 </sect1>
211
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diff changeset
4667
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diff changeset
4668 <!-- ******************************** FRV ********************* -->
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diff changeset
4669
208
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parents:
diff changeset
4670 <?Pub _newpage>
211
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diff changeset
4671 <sect1 id="frv400">
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diff changeset
4672 <title>FRV/FRV400 Fujitsu FR-V 400 (MB-93091)</title>
208
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diff changeset
4673 <sect2>
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diff changeset
4674 <title>Overview</title>
211
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diff changeset
4675
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diff changeset
4676 <para><indexterm><primary>Fujitsu FR-V 400</primary>
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diff changeset
4677 <secondary>installing and testing</secondary></indexterm><indexterm><primary>
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diff changeset
4678 installing and testing
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diff changeset
4679 </primary><secondary>Fujitsu FR-V 400</secondary></indexterm>
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diff changeset
4680 RedBoot supports both serial ports, which are available via
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diff changeset
4681 the stacked serial connectors on the mother board.
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diff changeset
4682 The topmost port is the default and is considered to be port 0 by RedBoot.
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diff changeset
4683 The bottommost port is serial port 1.
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diff changeset
4684 The default serial port settings are 38400,8,N,1.
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diff changeset
4685 </para>
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diff changeset
4686 <para>
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diff changeset
4687 FLASH management is also supported, but only for the FLASH device in IC7.
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diff changeset
4688 This arrangement allows for IC8 to retain either the original Fujitsu board
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diff changeset
4689 firmware, or some application specific contents.</para>
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diff changeset
4690
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diff changeset
4691 <para>The following RedBoot configurations are supported:
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diff changeset
4692
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diff changeset
4693 <informaltable frame="all">
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diff changeset
4694 <tgroup cols="4" colsep="1" rowsep="1" align="left">
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diff changeset
4695 <thead>
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diff changeset
4696 <row>
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diff changeset
4697 <entry>Configuration</entry>
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diff changeset
4698 <entry>Mode</entry>
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diff changeset
4699 <entry>Description</entry>
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diff changeset
4700 <entry>File</entry>
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diff changeset
4701 </row>
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diff changeset
4702 </thead>
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diff changeset
4703 <tbody>
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diff changeset
4704 <row>
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diff changeset
4705 <entry>ROMRAM</entry>
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diff changeset
4706 <entry>[ROMRAM]</entry>
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diff changeset
4707 <entry>RedBoot running from RAM, but contained in the
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diff changeset
4708 board's flash boot sector.</entry>
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diff changeset
4709 <entry>redboot_ROMRAM.ecm</entry>
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diff changeset
4710 </row>
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diff changeset
4711 <row>
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diff changeset
4712 <entry>RAM</entry>
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diff changeset
4713 <entry>[RAM]</entry>
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diff changeset
4714 <entry>RedBoot running from RAM with RedBoot in the
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diff changeset
4715 flash boot sector.</entry>
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diff changeset
4716 <entry>redboot_RAM.ecm</entry>
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diff changeset
4717 </row>
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diff changeset
4718 </tbody>
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diff changeset
4719 </tgroup>
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diff changeset
4720 </informaltable>
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diff changeset
4721 </para>
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diff changeset
4722 </sect2>
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diff changeset
4723
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diff changeset
4724 <sect2>
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diff changeset
4725 <title>Initial Installation Method </title>
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diff changeset
4726
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diff changeset
4727 <para>
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diff changeset
4728 RedBoot can be installed by directly programming the FLASH device in IC7
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diff changeset
4729 or by using the Fujitsu provided software to download and install a
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diff changeset
4730 version into the FLASH device. Complete instructions are provided
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
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diff changeset
4731 separately.
208
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parents:
diff changeset
4732 </para>
211
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diff changeset
4733
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diff changeset
4734 </sect2>
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diff changeset
4735
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diff changeset
4736 <sect2>
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diff changeset
4737 <title>Special RedBoot Commands</title>
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diff changeset
4738
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diff changeset
4739 <para>None.</para>
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diff changeset
4740 </sect2>
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diff changeset
4741
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diff changeset
4742 <sect2>
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diff changeset
4743 <title>Memory Maps</title>
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diff changeset
4744
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diff changeset
4745 <para>The memory map of this platform is fixed by the hardware (cannot
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diff changeset
4746 be changed by software). The only attributes which can be modified are
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diff changeset
4747 control over cacheability, as noted below.
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diff changeset
4748 <screen>
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diff changeset
4749 Address Cache? Resource
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diff changeset
4750 00000000-03EFFFFF Yes SDRAM (via plugin DIMM)
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diff changeset
4751 03F00000-03FFFFFF No SDRAM (used for PCI window)
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diff changeset
4752 10000000-1FFFFFFF No MB86943 PCI bridge
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diff changeset
4753 20000000-201FFFFF No SRAM
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diff changeset
4754 21000000-23FFFFFF No Motherboard resources
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diff changeset
4755 24000000-25FFFFFF No PCI I/O space
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diff changeset
4756 26000000-2FFFFFFF No PCI Memory space
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diff changeset
4757 30000000-FDFFFFFF ?? Unused
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diff changeset
4758 FE000000-FEFFFFFF No I/O devices
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diff changeset
4759 FF000000-FF1FFFFF No IC7 - RedBoot FLASH
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diff changeset
4760 FF200000-FF3FFFFF No IC8 - unused FLASH
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diff changeset
4761 FF400000-FFFFFFFF No Misc other I/O
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diff changeset
4762 </screen>
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diff changeset
4763 </para>
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diff changeset
4764
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diff changeset
4765 <note> <title>NOTE</title>
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diff changeset
4766 <para>
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diff changeset
4767 The only configuration currently suppored requires a 64MB SDRAM
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diff changeset
4768 DIMM to be present on the CPU card. No other memory configuration
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diff changeset
4769 is supported at this time.
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diff changeset
4770 </para>
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diff changeset
4771 </note>
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diff changeset
4772
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diff changeset
4773 </sect2>
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diff changeset
4774
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diff changeset
4775 <sect2>
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diff changeset
4776 <title>Rebuilding RedBoot</title>
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diff changeset
4777
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diff changeset
4778 <para>These shell variables provide the platform-specific information
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diff changeset
4779 needed for building RedBoot according to the procedure described in
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diff changeset
4780 <xref linkend="Rebuilding-Redboot">:
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diff changeset
4781 <programlisting>
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diff changeset
4782 export TARGET=frv400
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diff changeset
4783 export ARCH_DIR=frv
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diff changeset
4784 export PLATFORM_DIR=frv400
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diff changeset
4785 </programlisting>
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diff changeset
4786 </para>
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diff changeset
4787
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diff changeset
4788 <para>The names of configuration files are listed above with the
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
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diff changeset
4789 description of the associated modes.</para>
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diff changeset
4790 </sect2>
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diff changeset
4791
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diff changeset
4792 </sect1>
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diff changeset
4793
1746
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4794 <?Pub _newpage>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4795 <sect1 id="mb93091">
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4796 <title>Fujitsu FR-V Design Kit (MB93091-CBxx)</title>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4797 <sect2>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4798 <title>Overview</title>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4799
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4800 <para><indexterm><primary>Fujitsu FR-V MB93091-CBxx Design
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4801 Kit</primary> <secondary>installing and
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4802 testing</secondary></indexterm><indexterm><primary> installing and
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4803 testing </primary><secondary>Fujitsu FR-V MB93091-CBxx Design
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4804 Kit</secondary></indexterm> RedBoot supports both serial ports, which
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4805 are available via the stacked serial connectors on the mother board in
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4806 the case of the FR400 CPU board, and via serial connectors present on
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4807 the other supported CPU boards themselves. The topmost port is the
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4808 default and is considered to be port 0 by RedBoot. The bottommost
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4809 port is serial port 1. The default serial port settings are
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4810 115200,8,N,1. The serial port supports baud rates up to 460800, which
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4811 can be set using the <command>baud</command> command as described in
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4812 <xref linkend="RedBoot-Commands-and-Examples">.
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4813
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4814 </para>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4815 <para>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4816 FLASH management is also supported, but only for the FLASH device in IC7.
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4817 This arrangement allows for IC8 to retain either the original Fujitsu board
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4818 firmware, or some application specific contents.
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4819 Two basic RedBoot configurations are supported:
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4820
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4821 <informaltable frame="all">
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4822 <tgroup cols="4" colsep="1" rowsep="1" align="left">
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4823 <thead>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4824 <row>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4825 <entry>Configuration</entry>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4826 <entry>Mode</entry>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4827 <entry>Description</entry>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4828 <entry>File</entry>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4829 </row>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4830 </thead>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4831 <tbody>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4832 <row>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4833 <entry>ROMRAM</entry>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4834 <entry>[ROMRAM]</entry>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4835 <entry>RedBoot running from RAM, but contained in the
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4836 board's flash boot sector.</entry>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4837 <entry>redboot_ROMRAM.ecm</entry>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4838 </row>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4839 <row>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4840 <entry>RAM</entry>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4841 <entry>[RAM]</entry>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4842 <entry>RedBoot running from RAM with RedBoot in the
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4843 flash boot sector.</entry>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4844 <entry>redboot_RAM.ecm</entry>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4845 </row>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4846 </tbody>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4847 </tgroup>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4848 </informaltable>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4849 </para>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4850 <para>Since the normal RedBoot configuration does not use the FLASH ROM
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4851 except during startup, it is unnecessary to load a RAM-based RedBoot
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4852 before reprogramming the FLASH.</para>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4853 </sect2>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4854
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4855 <sect2>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4856 <title>Initial Installation Method </title>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4857
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4858 <para>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4859 RedBoot can be installed by directly programming the FLASH device in IC7
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4860 or by using the Fujitsu provided software to download and install a
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4861 version into the FLASH device. Complete instructions are provided
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4862 separately.
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4863 </para>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4864
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4865 </sect2>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4866
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4867 <sect2>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4868 <title>Special RedBoot Commands</title>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4869
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4870 <para>The <command>exec</command> command as described in <xref linkend="RedBoot-Commands-and-Examples">
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4871 is supported by RedBoot on this target, for executing Linux kernels. Only the command line and timeout options
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4872 are relevant to this platform.</para>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4873 </sect2>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4874
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4875 <sect2>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4876 <title>Memory Maps</title>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4877
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4878 <para>The memory map of this platform is fixed by the hardware (cannot
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4879 be changed by software). The only attributes which can be modified are
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4880 control over cacheability, as noted below.
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4881 <screen>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4882 Address Cache? Resource
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4883 00000000-03EFFFFF Yes SDRAM (via plugin DIMM)
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4884 03F00000-03FFFFFF No SDRAM (used for PCI window)
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4885 10000000-1FFFFFFF No MB86943 PCI bridge
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4886 20000000-201FFFFF No SRAM
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4887 21000000-23FFFFFF No Motherboard resources
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4888 24000000-25FFFFFF No PCI I/O space
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4889 26000000-2FFFFFFF No PCI Memory space
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4890 30000000-FDFFFFFF ?? Unused
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4891 FE000000-FEFFFFFF No I/O devices
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4892 FF000000-FF1FFFFF No IC7 - RedBoot FLASH
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4893 FF200000-FF3FFFFF No IC8 - unused FLASH
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4894 FF400000-FFFFFFFF No Misc other I/O
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4895 </screen>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4896 </para>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4897
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4898 <note> <title>NOTE</title>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4899 <para>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4900 The only configuration currently suppored requires a 64MiB SDRAM
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4901 DIMM to be present on the CPU card. No other memory configuration
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4902 is supported at this time.
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4903 </para>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4904 </note>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4905
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4906 </sect2>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4907
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4908 <sect2>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4909 <title>Rebuilding RedBoot</title>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4910
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4911 <para>These shell variables provide the platform-specific information
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4912 needed for building RedBoot according to the procedure described in
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4913 <xref linkend="Rebuilding-Redboot">:
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4914 <programlisting>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4915 export TARGET=mb93091
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4916 export ARCH_DIR=frv
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4917 export PLATFORM_DIR=mb93091
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4918 </programlisting>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4919 </para>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4920
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4921 <para>The names of configuration files are listed above with the
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4922 description of the associated modes.</para>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4923 </sect2>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4924
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4925 <sect2>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4926 <title>Resource Usage</title>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4927
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4928 <para>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4929 The RedBoot image occupies flash addresses 0xFF000000 - 0xFF03FFFF. To
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4930 execute it copies itself out of there to RAM at 0x03E00000. RedBoot
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4931 reserves memory from 0x00000000 to 0x0001FFFF for its own use.
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4932 User programs can use memory from 0x00020000 to 0x03DFFFFF.
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4933 RAM based RedBoot configurations are
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4934 designed to run from RAM at 0x00020000.
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4935 </para>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4936 </sect2>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4937
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4938 </sect1>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4939
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4940 <?Pub _newpage>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4941 <sect1 id="mb93093">
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4942 <title>Fujitsu FR-V Portable Demonstration Kit (MB93093-PD00)</title>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4943 <sect2>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4944 <title>Overview</title>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4945
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4946 <para><indexterm><primary>Fujitsu FR-V Portable Demonstration Kit</primary>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4947 <secondary>installing and testing</secondary></indexterm><indexterm><primary>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4948 installing and testing
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4949 </primary><secondary>Fujitsu FR-V Portable Demonstration Kit</secondary></indexterm>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4950 RedBoot supports the serial port which is available via a special cable connected
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4951 to the CON_UART connector on the board. The default serial port settings are 115200,8,N,1.
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4952 The serial port supports baud rates up to 460800, which can be set using the <command>baud</command>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4953 command as described in <xref linkend="RedBoot-Commands-and-Examples">.
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4954 </para>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4955
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4956 <para>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4957 FLASH management is also supported.
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4958 Two basic RedBoot configurations are supported:
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4959
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4960 <informaltable frame="all">
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4961 <tgroup cols="4" colsep="1" rowsep="1" align="left">
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4962 <thead>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4963 <row>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4964 <entry>Configuration</entry>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4965 <entry>Mode</entry>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4966 <entry>Description</entry>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4967 <entry>File</entry>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4968 </row>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4969 </thead>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4970 <tbody>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4971 <row>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4972 <entry>ROMRAM</entry>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4973 <entry>[ROMRAM]</entry>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4974 <entry>RedBoot running from RAM, but contained in the
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4975 board's flash boot sector.</entry>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4976 <entry>redboot_ROMRAM.ecm</entry>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4977 </row>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4978 <row>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4979 <entry>RAM</entry>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4980 <entry>[RAM]</entry>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4981 <entry>RedBoot running from RAM with RedBoot in the
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4982 flash boot sector.</entry>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4983 <entry>redboot_RAM.ecm</entry>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4984 </row>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4985 </tbody>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4986 </tgroup>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4987 </informaltable>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4988 </para>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4989 <para>Since the normal RedBoot configuration does not use the FLASH ROM
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4990 except during startup, it is unnecessary to load a RAM-based RedBoot
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4991 before reprogramming the FLASH.</para>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4992 </sect2>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4993
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4994 <sect2>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4995 <title>Initial Installation Method </title>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4996
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4997 <para>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4998 The Portable Demonstration Kit should have been shipped with an existing
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
4999 version of RedBoot, which can be upgraded to the current version using
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
5000 the instructions below.
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
5001 </para>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
5002
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
5003 </sect2>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
5004
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
5005 <sect2>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
5006 <title>Special RedBoot Commands</title>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
5007
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
5008 <para>The <command>exec</command> command as described in <xref linkend="RedBoot-Commands-and-Examples">
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
5009 is supported by RedBoot on this target, for executing Linux kernels. Only the command line and timeout options
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
5010 are relevant to this platform.</para>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
5011 </sect2>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
5012
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
5013 <sect2>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
5014 <title>Memory Maps</title>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
5015
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
5016 <para>The memory map of this platform is fixed by the hardware (cannot
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
5017 be changed by software). The only attributes which can be modified are
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
5018 control over cacheability, as noted below.
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
5019 <screen>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
5020 Address Cache? Resource
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
5021 00000000-03EFFFFF Yes SDRAM (via plugin DIMM)
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
5022 03F00000-03FFFFFF No Unused (SDRAM)
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
5023 10000000-1FFFFFFF No AX88796 Ethernet
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
5024 20000000-2FFFFFFF No System FPGA
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
5025 30000000-3FFFFFFF No MB93493 companion chip (unused)
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
5026 40000000-FCFFFFFF ?? Unused
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
5027 FD000000-FDFFFFFF ?? FLASH (ROM3,ROM4) (unused)
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
5028 FE000000-FEFFFFFF No Miscellaneous on-chip I/O
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
5029 FF000000-FFFFFFFF No RedBoot FLASH (16MiB)
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
5030 </screen>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
5031 </para>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
5032
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
5033 <note> <title>NOTE</title>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
5034 <para>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
5035 The only configuration currently suppored requires a 64MiB SDRAM
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
5036 DIMM to be present on the CPU card. No other memory configuration
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
5037 is supported at this time.
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
5038 </para>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
5039 </note>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
5040
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
5041 </sect2>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
5042
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
5043 <sect2>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
5044 <title>Rebuilding RedBoot</title>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
5045
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
5046 <para>These shell variables provide the platform-specific information
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
5047 needed for building RedBoot according to the procedure described in
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
5048 <xref linkend="Rebuilding-Redboot">:
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
5049 <programlisting>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
5050 export TARGET=mb93093
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
5051 export ARCH_DIR=frv
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
5052 export PLATFORM_DIR=mb93093
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
5053 </programlisting>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
5054 </para>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
5055 </sect2>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
5056
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
5057 <sect2>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
5058 <title>Resource Usage</title>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
5059
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
5060 <para>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
5061 The RedBoot image occupies flash addresses 0xFF000000 - 0xFF03FFFF. To
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
5062 execute it copies itself out of there to RAM at 0x03E00000. RedBoot
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
5063 reserves memory from 0x00000000 to 0x0001FFFF for its own use.
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
5064 User programs can use memory from 0x00020000 to 0x03DFFFFF.
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
5065 RAM based RedBoot configurations are
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
5066 designed to run from RAM at 0x00020000.
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
5067 </para>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
5068 </sect2>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
5069
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
5070 </sect1>
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
5071
f8c5906d7c6e Add FR-V ports for MB9309x boards.
msalter
parents: 1318
diff changeset
5072
211
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
5073 <!-- ********************************* IA32 *************************** -->
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
5074 <?Pub _newpage>
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
5075 <sect1 id="x86pc">
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
5076 <title>IA32/x86 x86-Based PC</title>
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
5077 <sect2>
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
5078 <title>Overview</title>
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
5079 <para><indexterm><primary>x86 Based PC</primary><secondary>installing and
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
5080 testing</secondary></indexterm><indexterm><primary>installing and testing
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
5081 </primary><secondary>x86 Based PC</secondary></indexterm>RedBoot supports
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
5082 two serial ports and an Intel i82559 based ethernet card (for example an Intel
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
5083 EtherExpress Pro 10/100) for communication and downloads. The default serial
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
5084 port settings are 38400,8,N,1.</para>
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
5085
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
5086 <para>The following RedBoot configurations are supported:
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
5087
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
5088 <informaltable frame="all">
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
5089 <tgroup cols="4" colsep="1" rowsep="1" align="left">
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
5090 <thead>
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
5091 <row>
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
5092 <entry>Configuration</entry>
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
5093 <entry>Mode</entry>
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
5094 <entry>Description</entry>
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
5095 <entry>File</entry>
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
5096 </row>
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
5097 </thead>
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
5098 <tbody>
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
5099 <row>
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
5100 <entry>Floppy</entry>
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
5101 <entry>[Floppy]</entry>
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
5102 <entry>RedBoot running from a boot floppy disk installed
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
5103 in the A: drive of the PC.</entry>
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
5104 <entry>redboot_ROM.ecm</entry>
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
5105 </row>
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
5106 </tbody>
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
5107 </tgroup>
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
5108 </informaltable>
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
5109 </para>
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
5110
208
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5111 </sect2>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5112 <sect2>
211
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
5113 <title>Initial Installation</title>
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
5114 <para>RedBoot takes the form of a self-booting image that must be written
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
5115 onto a formatted floppy disk. The process will erase any file system or data
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
5116 that already exists on that disk, so proceed with caution.</para>
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
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parents: 210
diff changeset
5117 <para>For Red Hat Linux users, this can be done by:</para>
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
5118 <screen>$ <userinput>dd conv=sync if=install/bin/redboot.bin of=/dev/fd0H1440
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parents: 210
diff changeset
5119 </userinput></screen>
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
5120 <para>For NT Cygwin users, this can be done by first ensuring that the raw
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
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parents: 210
diff changeset
5121 floppy device is mounted as <filename>/dev/fd0</filename>. To check if this
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
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parents: 210
diff changeset
5122 is the case, type the command <command>mount</command> at the Cygwin bash
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
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parents: 210
diff changeset
5123 prompt. If the floppy drive is already mounted, it will be listed as something
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
5124 similar to the following line:</para>
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
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parents: 210
diff changeset
5125 <screen> \\.\a: /dev/fd0 user binmode</screen>
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
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parents: 210
diff changeset
5126 <para>If this line is not listed, then mount the floppy drive using the command:
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5127 </para>
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5128 <screen>$ <userinput>mount -f -b //./a: /dev/fd0</userinput></screen>
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5129 <para>To actually install the boot image on the floppy, use the command:</para>
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5130 <screen>$ <userinput>dd conv=sync if=install/bin/redboot.bin of=/dev/fd0
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5131 </userinput></screen>
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5132 <para>Insert this floppy in the A: drive of the PC to be used as a target
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5133 and ensure that the BIOS is configured to boot from A: by default. On reset,
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5134 the PC will boot from the floppy and be ready to be debugged via either serial
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5135 line, or via the ethernet interface if it is installed.</para>
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5136 <note><title>NOTE</title>
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5137 <para>Unreliable floppy media may cause the write to silently fail. This
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5138 can be determined if the RedBoot image does not correctly
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5139 boot. In such cases, the floppy should be (unconditionally) reformatted
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5140 using the <command>fdformat</command> command on Linux, or
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5141 <command>format a: /u</command> on DOS/Windows.</para>
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5142 </note>
208
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5143 </sect2>
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5144 <sect2>
211
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5145 <title>Flash management</title>
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5146 <para>PC RedBoot does not support any FLASH commands.</para>
208
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5147 </sect2>
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diff changeset
5148 <sect2>
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5149 <title>Special RedBoot Commands </title>
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5150 <para>None.</para>
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5151 </sect2>
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diff changeset
5152 <sect2>
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5153 <title>Memory Maps </title>
211
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5154 <para>All selectors are initialized to map the entire 32-bit address space
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5155 in the familiar protected mode flat model. Page translation is not used.
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5156 RAM up to 640K is mapped to 0x0 to 0xa0000. RAM above 640K is mapped
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5157 from address 0x100000 upwards. Space is reserved between 0xa0000 and
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5158 0x100000 for option ROMs and the BIOS.
208
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5159 </para>
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5160 </sect2>
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diff changeset
5161 <sect2>
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5162 <title>Rebuilding RedBoot</title>
211
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diff changeset
5163
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diff changeset
5164 <para>These shell variables provide the platform-specific information
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diff changeset
5165 needed for building RedBoot according to the procedure described in
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5166 <xref linkend="Rebuilding-Redboot">:
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diff changeset
5167 <programlisting>
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5168 export TARGET=pc
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5169 export ARCH_DIR=i386
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5170 export PLATFORM_DIR=pc
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diff changeset
5171 </programlisting>
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5172 </para>
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5173
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diff changeset
5174 <para>The names of configuration files are listed above with the
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diff changeset
5175 description of the associated modes.</para>
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5176
208
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5177 </sect2>
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5178 </sect1>
211
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diff changeset
5179
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diff changeset
5180 <!-- *************** MIPS ******************* -->
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diff changeset
5181
208
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5182 <?Pub _newpage>
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5183 <sect1 id="atlas">
211
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diff changeset
5184 <title>MIPS/MIPS32(CoreLV 4Kc)+MIPS64(CoreLV 5Kc) Atlas Board</title>
208
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5185 <sect2>
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5186 <title>Overview</title>
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5187 <para><indexterm><primary>MIPS Atlas Board with CoreLV 4KC and CoreLV 5KC
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5188 </primary><secondary>installing and testing</secondary></indexterm><indexterm>
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diff changeset
5189 <primary>installing and testing</primary><secondary>MIPS Atlas Board with
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diff changeset
5190 CoreLV 4KC and CoreLV 5KC</secondary></indexterm>RedBoot supports the DgbSer
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diff changeset
5191 serial port and the built in ethernet port for communication and downloads.
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diff changeset
5192 The default serial port settings are 115200,8,N,1. RedBoot runs from and supports
211
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diff changeset
5193 flash management for the system flash region.</para>
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diff changeset
5194
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5195 <para>The following RedBoot configurations are supported:
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5196
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diff changeset
5197 <informaltable frame="all">
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diff changeset
5198 <tgroup cols="4" colsep="1" rowsep="1" align="left">
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diff changeset
5199 <thead>
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5200 <row>
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5201 <entry>Configuration</entry>
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5202 <entry>Mode</entry>
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diff changeset
5203 <entry>Description</entry>
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diff changeset
5204 <entry>File</entry>
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diff changeset
5205 </row>
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5206 </thead>
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diff changeset
5207 <tbody>
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diff changeset
5208 <row>
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diff changeset
5209 <entry>ROM</entry>
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5210 <entry>[ROM]</entry>
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5211 <entry>RedBoot running from the board's flash boot
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5212 sector.</entry>
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5213 <entry>redboot_ROM.ecm</entry>
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diff changeset
5214 </row>
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diff changeset
5215 <row>
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5216 <entry>RAM</entry>
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5217 <entry>[RAM]</entry>
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diff changeset
5218 <entry>RedBoot running from RAM with RedBoot in the
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diff changeset
5219 flash boot sector.</entry>
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diff changeset
5220 <entry>redboot_RAM.ecm</entry>
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diff changeset
5221 </row>
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5222 </tbody>
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5223 </tgroup>
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5224 </informaltable>
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5225 </para>
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5226
208
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5227 </sect2>
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5228 <sect2>
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5229 <title>Initial Installation</title>
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5230 <para>RedBoot is installed using the code download facility built into the
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5231 Atlas board. See the Atlas User manual for details, and also the Atlas download
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diff changeset
5232 format in <xref linkend="Atlas-download-format">.</para>
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5233 <sect3>
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5234 <title>Quick download instructions</title>
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5235 <para>Here are quick start instructions for downloading the prebuilt RedBoot
211
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diff changeset
5236 image.</para>
208
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5237 <orderedlist>
211
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5238 <listitem><para>Locate the prebuilt files in the bin directory: <filename>
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diff changeset
5239 deleteall.dl</filename> and <filename>redboot.dl</filename>.
208
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5240 </para>
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5241 </listitem>
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5242 <listitem><para>Make sure switch S1-1 is OFF and switch S5-1 is ON. Reset
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diff changeset
5243 the board and verify that the LED display reads <computeroutput>Flash DL</computeroutput>.
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5244 </para>
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diff changeset
5245 </listitem>
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5246 <listitem><para>Make sure your parallel port is connected to the 1284 port
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diff changeset
5247 Of the Atlas board. </para>
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5248 </listitem>
211
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5249 <listitem><para>Send the <filename>deleteall.dl</filename> file to the
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diff changeset
5250 parallel port to erase previous images:
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diff changeset
5251 <screen>$ <userinput>cat deleteall.dl >/dev/lp0</userinput></screen>
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5252 When this is complete, the LED display should read
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diff changeset
5253 <computeroutput>Deleted</computeroutput>.</para>
208
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5254 </listitem>
211
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5255 <listitem><para>Send the ROM mode RedBoot image to the board:
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diff changeset
5256 <screen>$ <userinput>cat redboot.dl >/dev/lp0</userinput></screen>
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diff changeset
5257 When this is complete, the LED display should show the last
208
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5258 address programmed. This will be something like: <computeroutput>1fc17000
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parents:
diff changeset
5259 </computeroutput>. </para>
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diff changeset
5260 </listitem>
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5261 <listitem><para>Change switch S5-1 to OFF and reset the board. The LED display
211
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diff changeset
5262 should read <computeroutput>RedBoot</computeroutput>. </para>
208
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diff changeset
5263 </listitem>
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parents:
diff changeset
5264 <listitem><para>Run the RedBoot <command>fis init</command>
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parents:
diff changeset
5265 and <command>fconfig</command> commands to initialize the flash.
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
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parents:
diff changeset
5266 See <xref linkend="Atlas-Additional-fconfig-options">, <xref linkend="Flash-Image-System">
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parents:
diff changeset
5267 and <xref linkend="Persistent-State-Flash"> for details. </para>
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parents:
diff changeset
5268 </listitem>
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jlarmour
parents:
diff changeset
5269 </orderedlist>
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jlarmour
parents:
diff changeset
5270 </sect3>
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parents:
diff changeset
5271 <sect3 id="Atlas-download-format">
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
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parents:
diff changeset
5272 <title>Atlas download format</title>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
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parents:
diff changeset
5273 <para>In order to download RedBoot to the Atlas board, it must be converted
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5274 to the Atlas download format. There are different ways of doing this depending
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
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parents:
diff changeset
5275 on which version of the developer's kit is shipped with the board. </para>
211
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diff changeset
5276 <para>The <citetitle>Atlas Developer's Kit</citetitle> CD contains an <application>
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diff changeset
5277 srec2flash</application> utility. The source code for this utility is part
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
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parents: 210
diff changeset
5278 of the <filename>yamon/yamon-src-01.01.tar.gz</filename> tarball
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
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diff changeset
5279 on the Dev Kit CD. The path in the expanded tarball is <filename
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
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diff changeset
5280 class="directory">yamon/bin/tools</filename>. To use
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
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diff changeset
5281 <application>srec2flash</application> to convert the S-record file:
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
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diff changeset
5282 <screen>$ <userinput>srec2flash -EL -S29 redboot.srec >redboot.dl</userinput></screen>
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diff changeset
5283 The <citetitle>Atlas/Malta Developer's Kit</citetitle> CD
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
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diff changeset
5284 contains an <application>srecconv.pl</application> utility which requires
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
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diff changeset
5285 Perl. This utilty is part of the <filename>yamon/yamon-src-02.00.tar.gz</filename>
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
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diff changeset
5286 tarball on the Dev Kit CD. The path in the expanded tarball
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
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diff changeset
5287 is <filename class="directory">yamon/bin/tools</filename>. To use <application>
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
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diff changeset
5288 srecconv</application> to convert the S-record file:
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
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diff changeset
5289 <screen>$ <userinput>cp redboot_ROM.srec redboot_ROM.rec</userinput>
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
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diff changeset
5290 $ <userinput>srecconv.pl -ES L -A 29 redboot_ROM</userinput></screen>
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diff changeset
5291 The resulting file is named <filename>redboot_ROM.fl</filename>.</para>
208
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diff changeset
5292 </sect3></sect2>
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diff changeset
5293 <sect2>
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diff changeset
5294 <title>Flash management</title>
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diff changeset
5295 <sect3 id="Atlas-Additional-fconfig-options">
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
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diff changeset
5296 <title>Additional config options</title>
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diff changeset
5297 <para>The ethernet MAC address is stored in flash manually using the <command>
211
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
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diff changeset
5298 fconfig</command> command. You can use the YAMON <command>setenv
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
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diff changeset
5299 ethaddr</command> command to print out the board ethernet address.
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
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diff changeset
5300 Typically, it is: <screen>00:0d:a0:00:<replaceable>xx:xx</replaceable></screen> where
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diff changeset
5301 <replaceable>xx.xx</replaceable> is the hex representation of the
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
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diff changeset
5302 board serial number.</para>
208
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diff changeset
5303 </sect3>
210
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diff changeset
5304 </sect2>
208
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diff changeset
5305 <sect2>
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diff changeset
5306 <title>Additional commands</title>
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diff changeset
5307 <para>The <command>exec</command> command which allows the
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5308 loading and execution of Linux kernels, is supported for this architecture
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5309 (see <xref linkend="executing-programs">). The
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5310 <command>exec</command> parameters used for MIPS boards are:</para>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5311 <variablelist><varlistentry>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
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diff changeset
5312 <term>-b <replaceable>&lt;addr></replaceable></term>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
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parents:
diff changeset
5313 <listitem><para>Location to store command line and environment passed to kernel</para></listitem></varlistentry>
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jlarmour
parents:
diff changeset
5314 <varlistentry><term>
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jlarmour
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diff changeset
5315 -w <replaceable>&lt;time></replaceable></term>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
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diff changeset
5316 <listitem><para>Wait time in seconds before starting kernel</para></listitem></varlistentry>
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jlarmour
parents:
diff changeset
5317 <varlistentry><term>
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jlarmour
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diff changeset
5318 -c <replaceable>"params"</replaceable></term>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5319 <listitem><para>Parameters passed to kernel</para></listitem></varlistentry>
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diff changeset
5320 <varlistentry><term><replaceable>&lt;addr></replaceable></term>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
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diff changeset
5321 <listitem><para>Kernel entry point, defaulting to the entry point of the last image
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5322 loaded</para></listitem></varlistentry>
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jlarmour
parents:
diff changeset
5323 </variablelist>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
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diff changeset
5324 <para>Linux kernels on MIPS platforms expect the entry point to be called with arguments
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5325 in the registers equivalent to a C call with prototype:
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
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diff changeset
5326 <programlisting>void Linux(int argc, char **argv, char **envp);</programlisting></para>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
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diff changeset
5327 <para>RedBoot will place the appropriate data at the offset specified by the
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5328 <parameter>-b</parameter> parameter, or by default at address 0x80080000, and will set the
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5329 arguments accordingly when calling into the kernel.</para>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5330 <para>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
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diff changeset
5331 The default entry point, if no image with explicit entry point has been loaded and
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5332 none is specified, is 0x80000750.
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5333 </para>
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jlarmour
parents:
diff changeset
5334 </sect2>
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jlarmour
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diff changeset
5335
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5336 <sect2>
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jlarmour
parents:
diff changeset
5337 <title>Interrupts</title>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
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diff changeset
5338 <para>RedBoot uses an interrupt vector table which is located at address 0x80000400.
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5339 Entries in this table are pointers to functions with this protoype: <programlisting>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5340 int irq_handler( unsigned vector, unsigned data )</programlisting>On an atlas
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5341 board, the vector argument is one of 25 interrupts defined in <computeroutput>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5342 hal/mips/atlas/<replaceable>VERSION</replaceable>/include/plf_intr.h</computeroutput>: <programlisting>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5343 #define CYGNUM_HAL_INTERRUPT_SER 0
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5344 #define CYGNUM_HAL_INTERRUPT_TIM0 1
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5345 #define CYGNUM_HAL_INTERRUPT_2 2
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5346 #define CYGNUM_HAL_INTERRUPT_3 3
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5347 #define CYGNUM_HAL_INTERRUPT_RTC 4
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5348 #define CYGNUM_HAL_INTERRUPT_COREHI 5
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5349 #define CYGNUM_HAL_INTERRUPT_CORELO 6
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5350 #define CYGNUM_HAL_INTERRUPT_7 7
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5351 #define CYGNUM_HAL_INTERRUPT_PCIA 8
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5352 #define CYGNUM_HAL_INTERRUPT_PCIB 9
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5353 #define CYGNUM_HAL_INTERRUPT_PCIC 10
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5354 #define CYGNUM_HAL_INTERRUPT_PCID 11
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5355 #define CYGNUM_HAL_INTERRUPT_ENUM 12
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5356 #define CYGNUM_HAL_INTERRUPT_DEG 13
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5357 #define CYGNUM_HAL_INTERRUPT_ATXFAIL 14
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5358 #define CYGNUM_HAL_INTERRUPT_INTA 15
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5359 #define CYGNUM_HAL_INTERRUPT_INTB 16
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5360 #define CYGNUM_HAL_INTERRUPT_INTC 17
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5361 #define CYGNUM_HAL_INTERRUPT_INTD 18
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5362 #define CYGNUM_HAL_INTERRUPT_SERR 19
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5363 #define CYGNUM_HAL_INTERRUPT_HW1 20
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jlarmour
parents:
diff changeset
5364 #define CYGNUM_HAL_INTERRUPT_HW2 21
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5365 #define CYGNUM_HAL_INTERRUPT_HW3 22
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5366 #define CYGNUM_HAL_INTERRUPT_HW4 23
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5367 #define CYGNUM_HAL_INTERRUPT_HW5 24</programlisting>The data
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5368 passed to the ISR is pulled from a data table (<computeroutput>hal_interrupt_data
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5369 </computeroutput>) which immediately follows the interrupt vector table. With
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5370 25 interrupts, the data table starts at address 0x80000464 on atlas.</para>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5371 <para>An application may create a normal C function with the above prototype
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5372 to be an ISR. Just poke its address into the table at the correct index and
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5373 enable the interrupt at its source. The return value of the ISR is ignored
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5374 by RedBoot. </para>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5375 </sect2>
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jlarmour
parents:
diff changeset
5376 <sect2>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5377 <title>Memory Maps </title>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5378 <para>Memory Maps RedBoot sets up the following memory map on the Atlas board.
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
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parents:
diff changeset
5379 <programlisting>Physical Address Range Description
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5380 ----------------------- -------------
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5381 0x00000000 - 0x07ffffff SDRAM
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5382 0x08000000 - 0x17ffffff PCI Memory Space
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5383 0x18000000 - 0x1bdfffff PCI I/O Space
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5384 0x1be00000 - 0x1bffffff System Controller
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5385 0x1c000000 - 0x1dffffff System flash
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5386 0x1e000000 - 0x1e3fffff Monitor flash
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5387 0x1f000000 - 0x1fbfffff FPGA</programlisting></para>
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parents:
diff changeset
5388 </sect2>
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jlarmour
parents:
diff changeset
5389 <sect2>
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jlarmour
parents:
diff changeset
5390 <title>Rebuilding RedBoot</title>
211
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diff changeset
5391
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diff changeset
5392 <para>These shell variables provide the platform-specific information
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diff changeset
5393 needed for building RedBoot according to the procedure described in
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diff changeset
5394 <xref linkend="Rebuilding-Redboot">:
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diff changeset
5395 <programlisting>
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diff changeset
5396 export TARGET=atlas_mips32_4kc
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diff changeset
5397 export TARGET=atlas_mips64_5kc
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diff changeset
5398 export ARCH_DIR=mips
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diff changeset
5399 export PLATFORM_DIR=atlas
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diff changeset
5400 </programlisting>
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diff changeset
5401
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diff changeset
5402 Use one of the TARGET settings only.
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diff changeset
5403
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diff changeset
5404 </para>
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diff changeset
5405
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diff changeset
5406 <para>The names of configuration files are listed above with the
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diff changeset
5407 description of the associated modes.</para>
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diff changeset
5408
208
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5409 </sect2>
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diff changeset
5410 </sect1>
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jlarmour
parents:
diff changeset
5411 <?Pub _newpage>
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5412 <sect1 id="malta">
211
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diff changeset
5413 <title>MIPS/MIPS32(CoreLV 4Kc)+MIPS64(CoreLV 5Kc) Malta Board </title>
208
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5414 <sect2>
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parents:
diff changeset
5415 <title>Overview</title>
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parents:
diff changeset
5416 <para><indexterm><primary>MIPS Malta Board with CoreLV 4KC and CoreLV 5KC
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parents:
diff changeset
5417 </primary><secondary>installing and testing</secondary></indexterm><indexterm>
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parents:
diff changeset
5418 <primary>installing and testing</primary><secondary>MIPS Malta Board with
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parents:
diff changeset
5419 CoreLV 4KC and CoreLV 5KC</secondary></indexterm>RedBoot supports both front
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parents:
diff changeset
5420 facing serial ports and the built in ethernet port for communication and downloads.
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diff changeset
5421 The default serial port settings are 38400,8,N,1. RedBoot runs from and supports
211
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diff changeset
5422 flash management for the system flash region.</para>
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diff changeset
5423
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diff changeset
5424 <para>The following RedBoot configurations are supported:
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diff changeset
5425
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diff changeset
5426 <informaltable frame="all">
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diff changeset
5427 <tgroup cols="4" colsep="1" rowsep="1" align="left">
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diff changeset
5428 <thead>
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diff changeset
5429 <row>
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diff changeset
5430 <entry>Configuration</entry>
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diff changeset
5431 <entry>Mode</entry>
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diff changeset
5432 <entry>Description</entry>
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diff changeset
5433 <entry>File</entry>
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diff changeset
5434 </row>
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diff changeset
5435 </thead>
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diff changeset
5436 <tbody>
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diff changeset
5437 <row>
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diff changeset
5438 <entry>ROM</entry>
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diff changeset
5439 <entry>[ROM]</entry>
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diff changeset
5440 <entry>RedBoot running from the board's flash boot
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diff changeset
5441 sector.</entry>
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diff changeset
5442 <entry>redboot_ROM.ecm</entry>
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diff changeset
5443 </row>
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diff changeset
5444 <row>
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diff changeset
5445 <entry>RAM</entry>
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diff changeset
5446 <entry>[RAM]</entry>
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diff changeset
5447 <entry>RedBoot running from RAM with RedBoot in the
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diff changeset
5448 flash boot sector.</entry>
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diff changeset
5449 <entry>redboot_RAM.ecm</entry>
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diff changeset
5450 </row>
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diff changeset
5451 </tbody>
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diff changeset
5452 </tgroup>
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diff changeset
5453 </informaltable>
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diff changeset
5454 </para>
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diff changeset
5455
208
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diff changeset
5456 </sect2>
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jlarmour
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diff changeset
5457 <sect2>
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diff changeset
5458 <title>Initial Installation</title>
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diff changeset
5459 <para>RedBoot is installed using the code download facility built into the
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parents:
diff changeset
5460 Malta board. See the Malta User manual for details, and also the Malta download
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parents:
diff changeset
5461 format in <xref linkend="Malta-download-format">.</para>
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parents:
diff changeset
5462 <sect3>
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jlarmour
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diff changeset
5463 <title>Quick download instructions</title>
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diff changeset
5464 <para>Here are quick start instructions for downloading the prebuilt RedBoot
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jlarmour
parents:
diff changeset
5465 image. </para>
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jlarmour
parents:
diff changeset
5466 <orderedlist>
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diff changeset
5467 <listitem><para>Locate the prebuilt files in the bin directory: <filename>
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parents:
diff changeset
5468 deleteall.fl</filename> and <filename>redboot_ROM.fl</filename>. </para>
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diff changeset
5469 </listitem>
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diff changeset
5470 <listitem><para>Make sure switch S5-1 is ON. Reset the board and verify that
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jlarmour
parents:
diff changeset
5471 the LED display reads <computeroutput>Flash DL</computeroutput>. </para>
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parents:
diff changeset
5472 </listitem>
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diff changeset
5473 <listitem><para>Make sure your parallel port is connected to the 1284 port
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jlarmour
parents:
diff changeset
5474 Of the Atlas board. </para>
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diff changeset
5475 </listitem>
211
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diff changeset
5476 <listitem><para>Send the <filename>deleteall.fl</filename> file to the
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diff changeset
5477 parallel port to erase previous images:
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diff changeset
5478 <screen>$ <userinput>cat deleteall.fl >/dev/lp0</userinput></screen>
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diff changeset
5479 When this is complete, the LED display should read
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diff changeset
5480 <computeroutput>Deleted</computeroutput>.</para>
208
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diff changeset
5481 </listitem>
211
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diff changeset
5482 <listitem><para>Send the RedBoot image to the board:
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diff changeset
5483 <screen>$ <userinput>cat redboot_ROM.fl >/dev/lp0</userinput></screen>
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diff changeset
5484 When this is complete, the LED display should show the last address
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diff changeset
5485 programmed. This will be something like:
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diff changeset
5486 <computeroutput>1fc17000</computeroutput>. </para>
208
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diff changeset
5487 </listitem>
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diff changeset
5488 <listitem><para>Change switch S5-1 to OFF and reset the board. The LED display
211
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diff changeset
5489 should read <computeroutput>RedBoot</computeroutput>. </para>
208
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diff changeset
5490 </listitem>
211
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diff changeset
5491 <listitem><para>Run the RedBoot <command>fis init</command> and <command>
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diff changeset
5492 fconfig</command> commands to initialize the flash. See <xref linkend="Flash-Image-System">
208
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diff changeset
5493 and <xref linkend="Persistent-State-Flash"> for details. </para>
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parents:
diff changeset
5494 </listitem>
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jlarmour
parents:
diff changeset
5495 </orderedlist>
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jlarmour
parents:
diff changeset
5496 </sect3>
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jlarmour
parents:
diff changeset
5497 <sect3 id="malta-download-format">
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parents:
diff changeset
5498 <title>Malta download format</title>
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diff changeset
5499 <para>In order to download RedBoot to the Malta board, it must be converted
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
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parents:
diff changeset
5500 to the Malta download format.</para>
211
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diff changeset
5501 <para>The <citetitle>Atlas/Malta Developer's Kit</citetitle> CD contains an <application>
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diff changeset
5502 srecconv.pl</application> utility which requires Perl. This utility is part
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diff changeset
5503 of the <filename>yamon/yamon-src-02.00.tar.gz</filename> tarball
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diff changeset
5504 on the Dev Kit CD. The path in the expanded tarball is <filename
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diff changeset
5505 class="directory">yamon/bin/tools</filename>. To use
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diff changeset
5506 <application>srecconv</application> to convert the S-record file:
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diff changeset
5507 <screen>$ <userinput>cp redboot_ROM.srec redboot_ROM.rec</userinput>
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diff changeset
5508 $ <userinput>srecconv.pl -ES L -A 29 redboot_ROM</userinput></screen>
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diff changeset
5509 The resulting file is named <filename>redboot_ROM.fl</filename>.</para>
208
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diff changeset
5510 </sect3></sect2>
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jlarmour
parents:
diff changeset
5511
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parents:
diff changeset
5512 <sect2>
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diff changeset
5513 <title>Additional commands</title>
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diff changeset
5514 <para>The <command>exec</command> command which allows the
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5515 loading and execution of Linux kernels, is supported for this architecture
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parents:
diff changeset
5516 (see <xref linkend="executing-programs">). The
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
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parents:
diff changeset
5517 <command>exec</command> parameters used for MIPS boards are:</para>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5518 <variablelist><varlistentry>
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jlarmour
parents:
diff changeset
5519 <term>-b <replaceable>&lt;addr></replaceable></term>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
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parents:
diff changeset
5520 <listitem><para>Location to store command line and environment passed to kernel</para></listitem></varlistentry>
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diff changeset
5521 <varlistentry><term>
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diff changeset
5522 -w <replaceable>&lt;time></replaceable></term>
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diff changeset
5523 <listitem><para>Wait time in seconds before starting kernel</para></listitem></varlistentry>
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parents:
diff changeset
5524 <varlistentry><term>
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parents:
diff changeset
5525 -c <replaceable>"params"</replaceable></term>
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diff changeset
5526 <listitem><para>Parameters passed to kernel</para></listitem></varlistentry>
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diff changeset
5527 <varlistentry><term><replaceable>&lt;addr></replaceable></term>
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diff changeset
5528 <listitem><para>Kernel entry point, defaulting to the entry point of the last image
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parents:
diff changeset
5529 loaded</para></listitem></varlistentry>
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diff changeset
5530 </variablelist>
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5531 <para>Linux kernels on MIPS platforms expect the entry point to be called with arguments
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diff changeset
5532 in the registers equivalent to a C call with prototype:
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5533 <programlisting>void Linux(int argc, char **argv, char **envp);</programlisting></para>
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5534 <para>RedBoot will place the appropriate data at the offset specified by the
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diff changeset
5535 <parameter>-b</parameter> parameter, or by default at address 0x80080000, and will set the
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5536 arguments accordingly when calling into the kernel.</para>
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5537 <para>
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5538 The default entry point, if no image with explicit entry point has been loaded and
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diff changeset
5539 none is specified, is 0x80000750.
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5540 </para>
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5541 </sect2>
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5542
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5543 <sect2>
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5544 <title>Interrupts</title>
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5545 <para>RedBoot uses an interrupt vector table which is located at address 0x80000200.
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diff changeset
5546 Entries in this table are pointers to functions with this protoype: <programlisting>
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5547 int irq_handler( unsigned vector, unsigned data )</programlisting>On the malta
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diff changeset
5548 board, the vector argument is one of 22 interrupts defined in <computeroutput>
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diff changeset
5549 hal/mips/malta/<replaceable>VERSION</replaceable>/include/plf_intr.h</computeroutput>: <programlisting>
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5550
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5551 #define CYGNUM_HAL_INTERRUPT_SOUTH_BRIDGE_INTR 0
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diff changeset
5552 #define CYGNUM_HAL_INTERRUPT_SOUTH_BRIDGE_SMI 1
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diff changeset
5553 #define CYGNUM_HAL_INTERRUPT_CBUS_UART 2
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diff changeset
5554 #define CYGNUM_HAL_INTERRUPT_COREHI 3
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diff changeset
5555 #define CYGNUM_HAL_INTERRUPT_CORELO 4
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diff changeset
5556 #define CYGNUM_HAL_INTERRUPT_COMPARE 5
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5557 #define CYGNUM_HAL_INTERRUPT_TIMER 6
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diff changeset
5558 #define CYGNUM_HAL_INTERRUPT_KEYBOARD 7
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diff changeset
5559 #define CYGNUM_HAL_INTERRUPT_CASCADE 8
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diff changeset
5560 #define CYGNUM_HAL_INTERRUPT_TTY1 9
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diff changeset
5561 #define CYGNUM_HAL_INTERRUPT_TTY0 10
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5562 #define CYGNUM_HAL_INTERRUPT_11 11
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diff changeset
5563 #define CYGNUM_HAL_INTERRUPT_FLOPPY 12
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diff changeset
5564 #define CYGNUM_HAL_INTERRUPT_PARALLEL 13
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diff changeset
5565 #define CYGNUM_HAL_INTERRUPT_REAL_TIME_CLOCK 14
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diff changeset
5566 #define CYGNUM_HAL_INTERRUPT_I2C 15
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diff changeset
5567 #define CYGNUM_HAL_INTERRUPT_PCI_AB 16
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diff changeset
5568 #define CYGNUM_HAL_INTERRUPT_PCI_CD 17
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diff changeset
5569 #define CYGNUM_HAL_INTERRUPT_MOUSE 18
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diff changeset
5570 #define CYGNUM_HAL_INTERRUPT_19 19
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diff changeset
5571 #define CYGNUM_HAL_INTERRUPT_IDE_PRIMARY 20
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diff changeset
5572 #define CYGNUM_HAL_INTERRUPT_IDE_SECONDARY 21</programlisting>The data
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diff changeset
5573 passed to the ISR is pulled from a data table (<computeroutput>hal_interrupt_data
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diff changeset
5574 </computeroutput>) which immediately follows the interrupt vector table. With
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diff changeset
5575 22 interrupts, the data table starts at address 0x80000258.</para>
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diff changeset
5576 <para>An application may create a normal C function with the above prototype
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diff changeset
5577 to be an ISR. Just poke its address into the table at the correct index and
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diff changeset
5578 enable the interrupt at its source. The return value of the ISR is ignored
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diff changeset
5579 by RedBoot. </para>
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diff changeset
5580 </sect2>
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diff changeset
5581 <sect2>
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5582 <title>Memory Maps </title>
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diff changeset
5583 <para>Memory Maps RedBoot sets up the following memory map on the Malta board.<note>
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diff changeset
5584 <title>NOTE</title>
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diff changeset
5585 <para>The virtual memory maps in this section use a C and B column to indicate
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diff changeset
5586 whether or not the region is cached (C) or buffered (B).</para>
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diff changeset
5587 </note><programlisting>Physical Address Range C B Description
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jlarmour
parents:
diff changeset
5588 ----------------------- - - -----------
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diff changeset
5589 0x80000000 - 0x81ffffff Y Y SDRAM
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parents:
diff changeset
5590 0x9e000000 - 0x9e3fffff Y N System flash (cached)
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diff changeset
5591 0x9fc00000 - 0x9fffffff Y N System flash (mirrored)
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diff changeset
5592 0xa8000000 - 0xb7ffffff N N PCI Memory Space
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diff changeset
5593 0xb4000000 - 0xb40fffff N N Galileo System Controller
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diff changeset
5594 0xb8000000 - 0xb80fffff N N Southbridge / ISA
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parents:
diff changeset
5595 0xb8100000 - 0xbbdfffff N N PCI I/O Space
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diff changeset
5596 0xbe000000 - 0xbe3fffff N N System flash (noncached)
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parents:
diff changeset
5597 0xbf000000 - 0xbfffffff N N Board logic FPGA</programlisting></para>
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diff changeset
5598 </sect2>
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diff changeset
5599 <sect2>
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5600 <title>Rebuilding RedBoot</title>
211
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diff changeset
5601
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diff changeset
5602 <para>These shell variables provide the platform-specific information
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diff changeset
5603 needed for building RedBoot according to the procedure described in
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diff changeset
5604 <xref linkend="Rebuilding-Redboot">:
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diff changeset
5605 <programlisting>
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diff changeset
5606 export TARGET=malta_mips32_4kc
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diff changeset
5607 export ARCH_DIR=mips
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diff changeset
5608 export PLATFORM_DIR=malta
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diff changeset
5609 </programlisting>
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diff changeset
5610 </para>
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diff changeset
5611
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diff changeset
5612 <para>The names of configuration files are listed above with the
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diff changeset
5613 description of the associated modes.</para>
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diff changeset
5614
208
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diff changeset
5615 </sect2></sect1>
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diff changeset
5616 <?Pub _newpage>
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diff changeset
5617 <sect1 id="ocelot">
211
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diff changeset
5618 <title>MIPS/RM7000 PMC-Sierra Ocelot</title>
208
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5619 <sect2>
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diff changeset
5620 <title>Overview</title>
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diff changeset
5621 <para><indexterm><primary>PMC-Sierra MIPS RM7000 Ocelot</primary><secondary>installing
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parents:
diff changeset
5622 and testing</secondary></indexterm><indexterm><primary>installing and testing
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parents:
diff changeset
5623 </primary><secondary>PMC-Sierra MIPS RM7000 Ocelot</secondary></indexterm>RedBoot
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diff changeset
5624 uses the front facing serial port. The default serial port settings are 38400,8,N,1.
211
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diff changeset
5625 RedBoot also supports ethernet. Management of onboard flash is also supported.</para>
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diff changeset
5626
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diff changeset
5627 <para>The following RedBoot configurations are supported:
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diff changeset
5628
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diff changeset
5629 <informaltable frame="all">
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diff changeset
5630 <tgroup cols="4" colsep="1" rowsep="1" align="left">
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diff changeset
5631 <thead>
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diff changeset
5632 <row>
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diff changeset
5633 <entry>Configuration</entry>
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diff changeset
5634 <entry>Mode</entry>
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diff changeset
5635 <entry>Description</entry>
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diff changeset
5636 <entry>File</entry>
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diff changeset
5637 </row>
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diff changeset
5638 </thead>
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diff changeset
5639 <tbody>
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diff changeset
5640 <row>
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diff changeset
5641 <entry>ROM</entry>
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diff changeset
5642 <entry>[ROM]</entry>
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diff changeset
5643 <entry>RedBoot running from the board's flash boot
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diff changeset
5644 sector.</entry>
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diff changeset
5645 <entry>redboot_ROM.ecm</entry>
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diff changeset
5646 </row>
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diff changeset
5647 <row>
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diff changeset
5648 <entry>RAM</entry>
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diff changeset
5649 <entry>[RAM]</entry>
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diff changeset
5650 <entry>RedBoot running from RAM with RedBoot in the
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diff changeset
5651 flash boot sector.</entry>
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diff changeset
5652 <entry>redboot_RAM.ecm</entry>
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diff changeset
5653 </row>
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diff changeset
5654 </tbody>
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diff changeset
5655 </tgroup>
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diff changeset
5656 </informaltable>
208
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parents:
diff changeset
5657 </para>
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jlarmour
parents:
diff changeset
5658 </sect2>
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jlarmour
parents:
diff changeset
5659
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jlarmour
parents:
diff changeset
5660 <sect2>
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jlarmour
parents:
diff changeset
5661 <title>Additional commands</title>
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jlarmour
parents:
diff changeset
5662 <para>The <command>exec</command> command which allows the
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jlarmour
parents:
diff changeset
5663 loading and execution of Linux kernels, is supported for this architecture
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jlarmour
parents:
diff changeset
5664 (see <xref linkend="executing-programs">). The
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jlarmour
parents:
diff changeset
5665 <command>exec</command> parameters used for MIPS boards are:</para>
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jlarmour
parents:
diff changeset
5666 <variablelist><varlistentry>
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jlarmour
parents:
diff changeset
5667 <term>-b <replaceable>&lt;addr></replaceable></term>
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jlarmour
parents:
diff changeset
5668 <listitem><para>Location to store command line and environment passed to kernel</para></listitem></varlistentry>
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jlarmour
parents:
diff changeset
5669 <varlistentry><term>
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jlarmour
parents:
diff changeset
5670 -w <replaceable>&lt;time></replaceable></term>
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jlarmour
parents:
diff changeset
5671 <listitem><para>Wait time in seconds before starting kernel</para></listitem></varlistentry>
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jlarmour
parents:
diff changeset
5672 <varlistentry><term>
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jlarmour
parents:
diff changeset
5673 -c <replaceable>"params"</replaceable></term>
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jlarmour
parents:
diff changeset
5674 <listitem><para>Parameters passed to kernel</para></listitem></varlistentry>
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jlarmour
parents:
diff changeset
5675 <varlistentry><term><replaceable>&lt;addr></replaceable></term>
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jlarmour
parents:
diff changeset
5676 <listitem><para>Kernel entry point, defaulting to the entry point of the last image
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jlarmour
parents:
diff changeset
5677 loaded</para></listitem></varlistentry>
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jlarmour
parents:
diff changeset
5678 </variablelist>
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jlarmour
parents:
diff changeset
5679 <para>Linux kernels on MIPS platforms expect the entry point to be called with arguments
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5680 in the registers equivalent to a C call with prototype:
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jlarmour
parents:
diff changeset
5681 <programlisting>void Linux(int argc, char **argv, char **envp);</programlisting></para>
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jlarmour
parents:
diff changeset
5682 <para>RedBoot will place the appropriate data at the offset specified by the
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5683 <parameter>-b</parameter> parameter, or by default at address 0x80080000, and will set the
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5684 arguments accordingly when calling into the kernel.</para>
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jlarmour
parents:
diff changeset
5685 <para>
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jlarmour
parents:
diff changeset
5686 The default entry point, if no image with explicit entry point has been loaded and
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jlarmour
parents:
diff changeset
5687 none is specified, is 0x80000750.
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jlarmour
parents:
diff changeset
5688 </para>
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jlarmour
parents:
diff changeset
5689 </sect2>
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jlarmour
parents:
diff changeset
5690
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jlarmour
parents:
diff changeset
5691 <sect2>
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jlarmour
parents:
diff changeset
5692 <title>Memory Maps </title>
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jlarmour
parents:
diff changeset
5693 <para>RedBoot sets up the following memory map on the Ocelot board. </para>
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jlarmour
parents:
diff changeset
5694 <para>Note that these addresses are accessed through kseg0/1 and thus translate
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jlarmour
parents:
diff changeset
5695 to the actual address range 0x80000000-0xbfffffff, depending on the need for
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5696 caching/non-caching access to the bus.<note><title>NOTE</title>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5697 <para>The virtual memory maps in this section use a C and B column to indicate
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5698 whether or not the region is cached (C) or buffered (B).</para>
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jlarmour
parents:
diff changeset
5699 </note><programlisting>Physical Address Range Description
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5700 ----------------------- -----------
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5701 0x00000000 - 0x0fffffff SDRAM
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5702 0x10000000 - 0x10ffffff PCI I/O space
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5703 0x12000000 - 0x13ffffff PCI Memory space
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5704 0x14000000 - 0x1400ffff Galileo system controller
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5705 0x1c000000 - 0x1c0000ff PLD (board logic)
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5706 0x1fc00000 - 0x1fc7ffff flash</programlisting></para>
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jlarmour
parents:
diff changeset
5707 </sect2>
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jlarmour
parents:
diff changeset
5708 <sect2>
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jlarmour
parents:
diff changeset
5709 <title>Rebuilding RedBoot</title>
211
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jlarmour
parents: 210
diff changeset
5710
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parents: 210
diff changeset
5711 <para>These shell variables provide the platform-specific information
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
5712 needed for building RedBoot according to the procedure described in
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
5713 <xref linkend="Rebuilding-Redboot">:
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jlarmour
parents: 210
diff changeset
5714 <programlisting>
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jlarmour
parents: 210
diff changeset
5715 export TARGET=ocelot
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
5716 export ARCH_DIR=mips
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diff changeset
5717 export PLATFORM_DIR=rm7000/ocelot
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parents: 210
diff changeset
5718 </programlisting>
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jlarmour
parents: 210
diff changeset
5719 </para>
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parents: 210
diff changeset
5720
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parents: 210
diff changeset
5721 <para>The names of configuration files are listed above with the
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
5722 description of the associated modes.</para>
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
5723
208
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jlarmour
parents:
diff changeset
5724 </sect2></sect1>
211
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jlarmour
parents: 210
diff changeset
5725
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jlarmour
parents: 210
diff changeset
5726
208
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jlarmour
parents:
diff changeset
5727 <?Pub _newpage>
211
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jlarmour
parents: 210
diff changeset
5728 <sect1 id="vrc4375">
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jlarmour
parents: 210
diff changeset
5729 <title>MIPS/VR4375 NEC DDB-VRC4375</title>
208
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jlarmour
parents:
diff changeset
5730 <sect2>
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jlarmour
parents:
diff changeset
5731 <title>Overview</title>
211
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
5732
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jlarmour
parents: 210
diff changeset
5733 <para><indexterm><primary>NEC DDB-VRC4375</primary>
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parents: 210
diff changeset
5734 <secondary>installing and testing</secondary></indexterm><indexterm><primary>
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
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parents: 210
diff changeset
5735 installing and testing</primary><secondary>NEC DDB-VRC4375
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
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parents: 210
diff changeset
5736 </secondary></indexterm>RedBoot supports only serial port 1, which is connected to the upper
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
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parents: 210
diff changeset
5737 of the stacked serial connectors on the board. The default serial
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
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parents: 210
diff changeset
5738 port settings are 38400,8,N,1. FLASH management is also supported.</para>
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
5739
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
5740 <para>The following RedBoot configurations are supported:
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
5741
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
5742 <informaltable frame="all">
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
5743 <tgroup cols="4" colsep="1" rowsep="1" align="left">
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jlarmour
parents: 210
diff changeset
5744 <thead>
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jlarmour
parents: 210
diff changeset
5745 <row>
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
5746 <entry>Configuration</entry>
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
5747 <entry>Mode</entry>
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
5748 <entry>Description</entry>
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
5749 <entry>File</entry>
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
5750 </row>
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jlarmour
parents: 210
diff changeset
5751 </thead>
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jlarmour
parents: 210
diff changeset
5752 <tbody>
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jlarmour
parents: 210
diff changeset
5753 <row>
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jlarmour
parents: 210
diff changeset
5754 <entry>ROMRAM</entry>
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
5755 <entry>[ROMRAM]</entry>
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
5756 <entry>RedBoot running from RAM, but contained in the
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
5757 board's flash boot sector.</entry>
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
5758 <entry>redboot_ROMRAM.ecm</entry>
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
5759 </row>
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jlarmour
parents: 210
diff changeset
5760 <row>
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
5761 <entry>RAM</entry>
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
5762 <entry>[RAM]</entry>
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
5763 <entry>RedBoot running from RAM with RedBoot in the
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
5764 flash boot sector.</entry>
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
5765 <entry>redboot_RAM.ecm</entry>
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
5766 </row>
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jlarmour
parents: 210
diff changeset
5767 </tbody>
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jlarmour
parents: 210
diff changeset
5768 </tgroup>
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jlarmour
parents: 210
diff changeset
5769 </informaltable>
208
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jlarmour
parents:
diff changeset
5770 </para>
211
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
5771
208
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jlarmour
parents:
diff changeset
5772 </sect2>
211
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
5773
208
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jlarmour
parents:
diff changeset
5774 <sect2>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5775 <title>Initial Installation Method </title>
211
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
5776
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
5777 <para>A device programmer should be used to program a socketed FLASH part
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
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parents: 210
diff changeset
5778 (AMD 29F040). The board as delivered is configured for a 512K
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
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parents: 210
diff changeset
5779 EPROM. To install a FLASH ROM, Jumpers J30, J31 and J36 need to be
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
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parents: 210
diff changeset
5780 changed as described in the board's User Manual.</para>
208
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jlarmour
parents:
diff changeset
5781 </sect2>
211
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
5782
208
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jlarmour
parents:
diff changeset
5783 <sect2>
211
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parents: 210
diff changeset
5784 <title>Special RedBoot Commands</title>
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jlarmour
parents: 210
diff changeset
5785
208
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jlarmour
parents:
diff changeset
5786 <para>None.</para>
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jlarmour
parents:
diff changeset
5787 </sect2>
211
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
5788
208
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jlarmour
parents:
diff changeset
5789 <sect2>
211
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diff changeset
5790 <title>Memory Maps</title>
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diff changeset
5791
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diff changeset
5792 <para>RedBoot sets up the memory map primarily as described in the board's
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diff changeset
5793 User Manual. There are some minor differences, noted in the following
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diff changeset
5794 table:
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diff changeset
5795 <screen>
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diff changeset
5796 Physical Virtual Resource
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diff changeset
5797 Addresses Addresses
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parents: 210
diff changeset
5798 00000000-01FFFFFF 80000000-81FFFFFF Base SDRAM (cached)
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diff changeset
5799 00000000-01FFFFFF A0000000-A1FFFFFF Base SDRAM (uncached)
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diff changeset
5800 0C000000-0C0BFFFF AC000000-AC0B0000 PCI IO space
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parents: 210
diff changeset
5801 0F000000-0F0001FF AF000000-AF0001FF VRC4375 Registers
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diff changeset
5802 1C000000-1C0FFFFF BC000000-BC0FFFFF VRC4372 Registers
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parents: 210
diff changeset
5803 1C100000-1DFFFFFF BC100000-BDFFFFFF PCI Memory space
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diff changeset
5804 1FC00000-1FC7FFFF BFC00000-BFC7FFFF FLASH ROM
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diff changeset
5805 80000000-8000000D C0000000-C000000D RTC
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parents: 210
diff changeset
5806 8000000E-80007FFF C000000E-C0007FFF NVRAM
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diff changeset
5807 81000000-81FFFFFF C1000000-C1FFFFFF Z85C30 DUART
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parents: 210
diff changeset
5808 82000000-82FFFFFF C2000000-C2FFFFFF Z8536 Timer
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parents: 210
diff changeset
5809 83000000-83FFFFFF C3000000-C3FFFFFF 8255 Parallel port
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diff changeset
5810 87000000-87FFFFFF C7000000-C7FFFFFF Seven segment display</screen>
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diff changeset
5811 </para>
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diff changeset
5812
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diff changeset
5813 <note> <title>NOTE</title>
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diff changeset
5814 <para>
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diff changeset
5815 By default the VRC4375 SIMM control registers are not programmed
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diff changeset
5816 since the values used must depend on the SIMMs installed. If SIMMs
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diff changeset
5817 are to be used, correct values must be placed in these registers
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parents: 210
diff changeset
5818 before accessing the SIMM address range.
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diff changeset
5819 </para>
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diff changeset
5820 </note>
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diff changeset
5821
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parents: 210
diff changeset
5822 <note> <title>NOTE</title>
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parents: 210
diff changeset
5823 <para>
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parents: 210
diff changeset
5824 The allocation of address ranges to devices in the PCI IO and
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parents: 210
diff changeset
5825 memory spaces is handled by the eCos PCI support library. They do
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diff changeset
5826 not correspond to those described in the board User Manual.
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diff changeset
5827 </para>
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diff changeset
5828 </note>
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diff changeset
5829
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parents: 210
diff changeset
5830 <note> <title>NOTE</title>
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diff changeset
5831 <para>
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diff changeset
5832 The MMU has been set up to relocate the VRC4372 supported devices
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diff changeset
5833 mapped at physical addresses 0x8xxxxxxx to virtual addresses
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diff changeset
5834 0xCxxxxxxx.
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parents: 210
diff changeset
5835 </para>
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diff changeset
5836 </note>
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diff changeset
5837
208
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jlarmour
parents:
diff changeset
5838 </sect2>
211
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parents: 210
diff changeset
5839
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parents: 210
diff changeset
5840 <sect2>
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parents: 210
diff changeset
5841 <title>Ethernet Driver</title>
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parents: 210
diff changeset
5842
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parents: 210
diff changeset
5843 <para>
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parents: 210
diff changeset
5844 The ethernet driver is in two parts:
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parents: 210
diff changeset
5845 </para>
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parents: 210
diff changeset
5846
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parents: 210
diff changeset
5847 <para>
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parents: 210
diff changeset
5848 A generic ether driver for the Intel i21143 device is located in
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
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diff changeset
5849 <filename class="directory">devs/eth/intel/i21143</filename>. Its package name is <computeroutput>CYGPKG_DEVS_ETH_INTEL_I21143</computeroutput>.
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parents: 210
diff changeset
5850 </para>
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parents: 210
diff changeset
5851
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parents: 210
diff changeset
5852 <para>
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parents: 210
diff changeset
5853 The platform-specific ether driver is <filename
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parents: 210
diff changeset
5854 class="directory">devs/eth/mips/vrc4375</filename>. Its package is
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diff changeset
5855 <computeroutput>CYGPKG_DEVS_ETH_MIPS_VRC4375</computeroutput>. This
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diff changeset
5856 tells the generic driver the address in IO memory of the chip, for
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diff changeset
5857 example, and other configuration details. The ESA (MAC address) is by
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diff changeset
5858 default collected from on-board serial EEPROM, unless configured
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diff changeset
5859 statically within this package.
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diff changeset
5860 </para>
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parents: 210
diff changeset
5861 </sect2>
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diff changeset
5862
208
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jlarmour
parents:
diff changeset
5863 <sect2>
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jlarmour
parents:
diff changeset
5864 <title>Rebuilding RedBoot</title>
211
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parents: 210
diff changeset
5865
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diff changeset
5866 <para>These shell variables provide the platform-specific information
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jlarmour
parents: 210
diff changeset
5867 needed for building RedBoot according to the procedure described in
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parents: 210
diff changeset
5868 <xref linkend="Rebuilding-Redboot">:
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parents: 210
diff changeset
5869 <programlisting>
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jlarmour
parents: 210
diff changeset
5870 export TARGET=vrc4373
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parents: 210
diff changeset
5871 export ARCH_DIR=mips
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diff changeset
5872 export PLATFORM_DIR=vrc4373
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diff changeset
5873 </programlisting>
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parents: 210
diff changeset
5874 </para>
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diff changeset
5875
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diff changeset
5876 <para>The names of configuration files are listed above with the
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
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parents: 210
diff changeset
5877 description of the associated modes.</para>
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parents: 210
diff changeset
5878
208
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jlarmour
parents:
diff changeset
5879 </sect2>
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jlarmour
parents:
diff changeset
5880 </sect1>
211
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diff changeset
5881
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jlarmour
parents: 210
diff changeset
5882 <!-- ************************** PowerPC ********************** -->
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parents: 210
diff changeset
5883
208
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jlarmour
parents:
diff changeset
5884 <?Pub _newpage>
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jlarmour
parents:
diff changeset
5885 <sect1 id="viper">
211
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diff changeset
5886 <title>PowerPC/MPC860T Analogue & Micro PowerPC 860T</title>
208
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jlarmour
parents:
diff changeset
5887 <sect2>
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jlarmour
parents:
diff changeset
5888 <title>Overview</title>
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jlarmour
parents:
diff changeset
5889 <para><indexterm><primary>Analogue & Micro PowerPC 860T</primary><secondary>installing
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5890 and testing</secondary></indexterm><indexterm><primary>installing and testing
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5891 </primary><secondary>Analogue & Micro PowerPC 860T</secondary></indexterm>RedBoot uses
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5892 the SMC1 serial port. The default serial port settings are 38400,8,N,1.
213
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diff changeset
5893 Ethernet is also supported using the RJ-45 connector. Management of
3a5832bf0564 Merge from eCos master repository on 2002-05-31-16:13:14-BST
jlarmour
parents: 211
diff changeset
5894 onboard flash is also supported.</para>
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parents: 211
diff changeset
5895
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parents: 211
diff changeset
5896 <para>The following RedBoot configurations are supported:
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parents: 211
diff changeset
5897
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parents: 211
diff changeset
5898 <informaltable frame="all">
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parents: 211
diff changeset
5899 <tgroup cols="4" colsep="1" rowsep="1" align="left">
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parents: 211
diff changeset
5900 <thead>
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parents: 211
diff changeset
5901 <row>
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parents: 211
diff changeset
5902 <entry>Configuration</entry>
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parents: 211
diff changeset
5903 <entry>Mode</entry>
3a5832bf0564 Merge from eCos master repository on 2002-05-31-16:13:14-BST
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diff changeset
5904 <entry>Description</entry>
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diff changeset
5905 <entry>File</entry>
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parents: 211
diff changeset
5906 </row>
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diff changeset
5907 </thead>
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diff changeset
5908 <tbody>
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parents: 211
diff changeset
5909 <row>
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diff changeset
5910 <entry>ROMRAM</entry>
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diff changeset
5911 <entry>[ROMRAM]</entry>
3a5832bf0564 Merge from eCos master repository on 2002-05-31-16:13:14-BST
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diff changeset
5912 <entry>RedBoot running from RAM, but contained in the
3a5832bf0564 Merge from eCos master repository on 2002-05-31-16:13:14-BST
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diff changeset
5913 board's flash boot sector.</entry>
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parents: 211
diff changeset
5914 <entry>redboot_ROMRAM.ecm</entry>
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diff changeset
5915 </row>
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diff changeset
5916 </tbody>
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diff changeset
5917 </tgroup>
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diff changeset
5918 </informaltable>
208
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jlarmour
parents:
diff changeset
5919 </para>
213
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parents: 211
diff changeset
5920
208
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jlarmour
parents:
diff changeset
5921 </sect2>
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jlarmour
parents:
diff changeset
5922 <sect2>
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jlarmour
parents:
diff changeset
5923 <title>Initial Installation Method </title>
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jlarmour
parents:
diff changeset
5924 <para>RedBoot must be installed at the A & M factory.
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5925 </para>
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jlarmour
parents:
diff changeset
5926 </sect2>
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jlarmour
parents:
diff changeset
5927 <sect2>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5928 <title>Special RedBoot Commands </title>
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diff changeset
5929 <para>None.</para>
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diff changeset
5930 </sect2>
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diff changeset
5931 <sect2>
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diff changeset
5932 <title>Memory Maps </title>
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diff changeset
5933 <para>Memory Maps RedBoot sets up the following memory map on the MBX board.<programlisting>
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parents:
diff changeset
5934 Physical Address Range Description
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parents:
diff changeset
5935 ----------------------- -----------
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diff changeset
5936 0x00000000 - 0x007fffff DRAM
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diff changeset
5937 0xfe000000 - 0xfe0fffff flash (AMD29LV8008B)
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parents:
diff changeset
5938 0xff000000 - 0xff0fffff MPC registers</programlisting></para>
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parents:
diff changeset
5939 </sect2>
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parents:
diff changeset
5940 <sect2>
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5941 <title>Rebuilding RedBoot</title>
211
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5942
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5943 <para>These shell variables provide the platform-specific information
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diff changeset
5944 needed for building RedBoot according to the procedure described in
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diff changeset
5945 <xref linkend="Rebuilding-Redboot">:
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diff changeset
5946 <programlisting>
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diff changeset
5947 export TARGET=viper
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diff changeset
5948 export ARCH_DIR=powerpc
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5949 export PLATFORM_DIR=viper
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diff changeset
5950 </programlisting>
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5951 </para>
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5952
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5953 <para>The names of configuration files are listed above with the
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diff changeset
5954 description of the associated modes.</para>
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diff changeset
5955
208
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5956 </sect2>
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5957 </sect1>
211
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diff changeset
5958
208
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5959 <?Pub _newpage>
211
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diff changeset
5960 <sect1 id="mbx">
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diff changeset
5961 <title>PowerPC/MPC8XX Motorola MBX</title>
208
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5962 <sect2>
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5963 <title>Overview</title>
211
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diff changeset
5964 <para><indexterm><primary>Motorola PowerPC MBX</primary><secondary>installing
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diff changeset
5965 and testing</secondary></indexterm><indexterm><primary>installing and testing
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diff changeset
5966 </primary><secondary>Motorola PowerPC MBX</secondary></indexterm>RedBoot uses
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diff changeset
5967 the SMC1/COM1 serial port. The default serial port settings are 38400,8,N,1.
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diff changeset
5968 Ethernet is also supported using the 10-base T connector. </para>
213
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diff changeset
5969 <para>Management of onboard flash is also supported.</para>
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diff changeset
5970
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diff changeset
5971 <para>The following RedBoot configurations are supported:
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diff changeset
5972
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diff changeset
5973 <informaltable frame="all">
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diff changeset
5974 <tgroup cols="4" colsep="1" rowsep="1" align="left">
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diff changeset
5975 <thead>
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diff changeset
5976 <row>
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diff changeset
5977 <entry>Configuration</entry>
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diff changeset
5978 <entry>Mode</entry>
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diff changeset
5979 <entry>Description</entry>
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diff changeset
5980 <entry>File</entry>
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diff changeset
5981 </row>
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diff changeset
5982 </thead>
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diff changeset
5983 <tbody>
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diff changeset
5984 <row>
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diff changeset
5985 <entry>ROM</entry>
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diff changeset
5986 <entry>[ROM]</entry>
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diff changeset
5987 <entry>RedBoot running from the board's flash boot
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diff changeset
5988 sector.</entry>
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diff changeset
5989 <entry>redboot_ROM.ecm</entry>
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diff changeset
5990 </row>
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diff changeset
5991 <row>
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diff changeset
5992 <entry>RAM</entry>
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diff changeset
5993 <entry>[RAM]</entry>
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diff changeset
5994 <entry>RedBoot running from RAM with RedBoot in the
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diff changeset
5995 flash boot sector.</entry>
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diff changeset
5996 <entry>redboot_RAM.ecm</entry>
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diff changeset
5997 </row>
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diff changeset
5998 </tbody>
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diff changeset
5999 </tgroup>
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diff changeset
6000 </informaltable>
208
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6001 </para>
213
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diff changeset
6002
208
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diff changeset
6003 </sect2>
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diff changeset
6004 <sect2>
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6005 <title>Initial Installation Method </title>
211
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diff changeset
6006 <para>Device programmer is used to program the XU1 socketed flash part (AM29F040B)
213
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diff changeset
6007 with the ROM mode image of RedBoot. Use the on-board EPPC-Bug monitor to update
211
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diff changeset
6008 RedBoot. </para>
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diff changeset
6009 <para>This assumes that you have EPPC-Bug in the on-board flash. This can
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diff changeset
6010 be determined by setting up the board according to the following instructions
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diff changeset
6011 and powering up the board. </para>
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diff changeset
6012 <para>The EPPC-Bug prompt should appear on the SMC1 connector at 9600 baud,
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diff changeset
6013 8N1. </para>
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diff changeset
6014 <orderedlist>
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6015 <listitem><para>Set jumper 3 to 2-3 [allow XU1 flash to be programmed] </para>
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diff changeset
6016 </listitem>
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6017 <listitem><para>Set jumper 4 to 2-3 [boot EPPC-Bug] </para>
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diff changeset
6018 </listitem>
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6019 </orderedlist>
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diff changeset
6020 <para>If it is available, program the flash by following these steps: </para>
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diff changeset
6021 <orderedlist>
213
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diff changeset
6022 <listitem><para>Prepare EPPC-Bug for download: <screen>EPPC-Bug><userinput>lo 0</userinput>
211
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diff changeset
6023 </screen>At this point the monitor is ready for input. It will not
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diff changeset
6024 return the prompt until the file has been downloaded. </para>
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diff changeset
6025 </listitem>
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6026 <listitem><para>Use the terminal emulator's ASCII download feature (or a simple
213
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diff changeset
6027 clipboard copy/paste operation) to download the
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diff changeset
6028 <filename>redboot.ppcbug</filename> file.</para>
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diff changeset
6029 <para>Note that on Linux, <application>Minicom</application>'s ASCII
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diff changeset
6030 download feature seems to be broken. A workaround is to load the file
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diff changeset
6031 into <application>emacs</application> (or another editor) and copy the
211
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diff changeset
6032 full contents to the clipboard. Then press the mouse paste-button (usually
213
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diff changeset
6033 the middle one) over the <application>Minicom</application> window. </para>
211
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diff changeset
6034 </listitem>
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6035 <listitem><para>Program the flash with the downloaded data: <screen>
213
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diff changeset
6036 EPPC-Bug><userinput>pflash 40000 60000 fc000000</userinput></screen></para>
211
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diff changeset
6037 </listitem>
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6038 <listitem><para>Switch off the power, and change jumper 4 to 1-2. Turn on
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diff changeset
6039 the power again. The board should now boot using the newly programmed RedBoot.
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diff changeset
6040 </para>
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6041 </listitem>
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6042 </orderedlist>
208
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6043 </sect2>
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diff changeset
6044 <sect2>
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6045 <title>Special RedBoot Commands </title>
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6046 <para>None.</para>
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diff changeset
6047 </sect2>
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6048 <sect2>
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6049 <title>Memory Maps </title>
211
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6050 <para>Memory Maps RedBoot sets up the following memory map on the MBX board.<programlisting>
208
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6051 Physical Address Range Description
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6052 ----------------------- -----------
211
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diff changeset
6053 0x00000000 - 0x003fffff DRAM
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diff changeset
6054 0xfa100000 - 0xfa100003 LEDs
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diff changeset
6055 0xfe000000 - 0xfe07ffff flash (AMD29F040B)
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diff changeset
6056 0xff000000 - 0xff0fffff MPC registers</programlisting></para>
208
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6057 </sect2>
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diff changeset
6058 <sect2>
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6059 <title>Rebuilding RedBoot</title>
211
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diff changeset
6060
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diff changeset
6061 <para>These shell variables provide the platform-specific information
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diff changeset
6062 needed for building RedBoot according to the procedure described in
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diff changeset
6063 <xref linkend="Rebuilding-Redboot">:
208
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6064 <programlisting>
211
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6065 export TARGET=mbx
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6066 export ARCH_DIR=powerpc
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6067 export PLATFORM_DIR=mbx
208
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6068 </programlisting>
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6069 </para>
211
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6070
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6071 <para>The names of configuration files are listed above with the
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6072 description of the associated modes.</para>
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6073
208
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6074 </sect2>
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6075 </sect1>
211
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6076
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6077
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6078
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6079
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diff changeset
6080 <!-- ********************** SuperH ************************ -->
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6081
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6082
208
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6083
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6084 <?Pub _newpage>
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6085 <sect1 id="edk7708">
211
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6086 <title>SuperH/SH3(SH7708) Hitachi EDK7708</title>
208
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6087 <sect2>
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6088 <title>Overview</title>
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6089 <para><indexterm><primary>Hitachi SH EDK7708</primary><secondary>installing
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6090 and testing</secondary></indexterm><indexterm><primary>installing and testing
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6091 </primary><secondary>Hitachi SH EDK7708</secondary></indexterm>RedBoot uses
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6092 the serial port. The default serial port settings are 38400,8,N,1.</para>
213
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6093 <para>Management of onboard flash is also supported.</para>
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6094
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6095 <para>The following RedBoot configurations are supported:
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6096
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6097 <informaltable frame="all">
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6098 <tgroup cols="4" colsep="1" rowsep="1" align="left">
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6099 <thead>
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6100 <row>
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6101 <entry>Configuration</entry>
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6102 <entry>Mode</entry>
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6103 <entry>Description</entry>
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6104 <entry>File</entry>
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6105 </row>
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6106 </thead>
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6107 <tbody>
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6108 <row>
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6109 <entry>ROM</entry>
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6110 <entry>[ROM]</entry>
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6111 <entry>RedBoot running from the board's flash boot
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6112 sector.</entry>
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6113 <entry>redboot_ROM.ecm</entry>
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diff changeset
6114 </row>
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6115 <row>
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6116 <entry>RAM</entry>
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6117 <entry>[RAM]</entry>
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6118 <entry>RedBoot running from RAM with RedBoot in the
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6119 flash boot sector.</entry>
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6120 <entry>redboot_RAM.ecm</entry>
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6121 </row>
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6122 </tbody>
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6123 </tgroup>
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6124 </informaltable>
208
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6125 </para>
213
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6126
208
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6127 </sect2>
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6128 <sect2>
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6129 <title>Initial Installation Method </title>
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6130 <para>Program the ROM RedBoot image into flash using an eprom programmer.</para>
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6131
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6132 </sect2>
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6133
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6134 <sect2>
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6135 <title>Memory Maps </title>
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6136 <para>RedBoot sets up the following memory map on the EDK7708 board.<programlisting>
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diff changeset
6137 Physical Address Range Description
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6138 ----------------------- -----------
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6139 0x80000000 - 0x8001ffff Flash (AT29LV1024)
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6140 0x88000000 - 0x881fffff DRAM
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6141 0xa4000000 - 0xa40000ff LED ON
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diff changeset
6142 0xb8000000 - 0xb80000ff LED ON
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6143 </programlisting></para>
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6144 </sect2>
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6145 <sect2>
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6146 <title>Rebuilding RedBoot</title>
211
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6147
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6148 <para>These shell variables provide the platform-specific information
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6149 needed for building RedBoot according to the procedure described in
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6150 <xref linkend="Rebuilding-Redboot">:
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6151 <programlisting>
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6152 export TARGET=edk7708
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6153 export ARCH_DIR=sh
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6154 export PLATFORM_DIR=edk7708
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6155 </programlisting>
208
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6156 </para>
211
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6157
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6158 <para>The names of configuration files are listed above with the
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6159 description of the associated modes.</para>
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6160
208
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6161 </sect2>
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6162 </sect1>
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6163
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6164 <?Pub _newpage>
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6165 <sect1 id="se7709">
211
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6166 <title>SuperH/SH3(SH7709) Hitachi Solution Engine 7709</title>
208
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6167 <sect2>
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6168 <title>Overview</title>
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6169 <para><indexterm><primary>Hitachi SH SE7709</primary><secondary>installing
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diff changeset
6170 and testing</secondary></indexterm><indexterm><primary>installing and testing
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6171 </primary><secondary>Hitachi SH SE7709</secondary></indexterm>This
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diff changeset
6172 description covers the MS7709SE01 variant. See <xref linkend="se77x9">
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6173 for instructions for the MS7729SE01 and MS7709SSE0101 variants.</para>
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6174
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6175 <para>RedBoot uses
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6176 the COM1 and COM2 serial ports. The default serial port settings are 38400,8,N,1.
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6177 Ethernet is also supported using the 10-base T connector. </para>
213
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6178 <para>Management of onboard flash is also supported.</para>
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diff changeset
6179
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6180 <para>The following RedBoot configurations are supported:
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diff changeset
6181
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diff changeset
6182 <informaltable frame="all">
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diff changeset
6183 <tgroup cols="4" colsep="1" rowsep="1" align="left">
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6184 <thead>
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6185 <row>
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6186 <entry>Configuration</entry>
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6187 <entry>Mode</entry>
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6188 <entry>Description</entry>
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6189 <entry>File</entry>
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diff changeset
6190 </row>
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diff changeset
6191 </thead>
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diff changeset
6192 <tbody>
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diff changeset
6193 <row>
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6194 <entry>ROM</entry>
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6195 <entry>[ROM]</entry>
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6196 <entry>RedBoot running from the board's flash boot
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6197 sector.</entry>
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6198 <entry>redboot_ROM.ecm</entry>
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diff changeset
6199 </row>
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diff changeset
6200 <row>
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diff changeset
6201 <entry>RAM</entry>
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6202 <entry>[RAM]</entry>
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6203 <entry>RedBoot running from RAM with RedBoot in the
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diff changeset
6204 flash boot sector.</entry>
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diff changeset
6205 <entry>redboot_RAM.ecm</entry>
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diff changeset
6206 </row>
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jlarmour
parents: 211
diff changeset
6207 </tbody>
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jlarmour
parents: 211
diff changeset
6208 </tgroup>
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jlarmour
parents: 211
diff changeset
6209 </informaltable>
208
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jlarmour
parents:
diff changeset
6210 </para>
213
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parents: 211
diff changeset
6211
208
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jlarmour
parents:
diff changeset
6212 </sect2>
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jlarmour
parents:
diff changeset
6213 <sect2>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
6214 <title>Initial Installation Method </title>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
6215 <para>The Solution Engine ships with the Hitachi boot monitor in EPROM
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
6216 which allows for initial programming of RedBoot:</para>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
6217
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
6218 <orderedlist>
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jlarmour
parents:
diff changeset
6219 <listitem><para>Set switch SW4-1 to ON [boot from EPROM]</para>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
6220 </listitem>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
6221 <listitem><para>Connect a serial cable to CN1 (SCI) and power up the board.</para>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
6222 </listitem>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
6223 <listitem><para>After the boot monitor banner, invoke the flash
213
3a5832bf0564 Merge from eCos master repository on 2002-05-31-16:13:14-BST
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parents: 211
diff changeset
6224 download/program command:<screen>Ready &gt;<userinput>fl</userinput></screen></para>
208
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jlarmour
parents:
diff changeset
6225 </listitem>
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jlarmour
parents:
diff changeset
6226 <listitem><para>The monitor should now ask for input:
211
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parents: 210
diff changeset
6227 <screen>Flash ROM data copy to RAM
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jlarmour
parents: 210
diff changeset
6228 Please Send A S-format Record</screen>At this point copy the
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
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parents: 210
diff changeset
6229 RedBoot ROM SREC file to the serial port:<screen>
213
3a5832bf0564 Merge from eCos master repository on 2002-05-31-16:13:14-BST
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parents: 211
diff changeset
6230 $ <userinput>cat redboot_SE7709RP_ROM.eprom.srec &gt /dev/ttyS0</userinput></screen>
3a5832bf0564 Merge from eCos master repository on 2002-05-31-16:13:14-BST
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parents: 211
diff changeset
6231 Eventually you
211
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parents: 210
diff changeset
6232 should see something like<screen>Start Addrs = A1000000
208
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
6233 End Addrs = A1xxxxxx
211
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
6234 Transfer complete</screen> from the monitor.
208
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jlarmour
parents:
diff changeset
6235 </para></listitem>
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jlarmour
parents:
diff changeset
6236 <listitem><para>Set switch SW4-1 to OFF [boot from flash] and reboot the board. You
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
6237 should now see the RedBoot banner.</para>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
6238 </listitem>
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jlarmour
parents:
diff changeset
6239 </orderedlist>
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jlarmour
parents:
diff changeset
6240 </sect2>
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jlarmour
parents:
diff changeset
6241 <sect2>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
6242 <title>Special RedBoot Commands </title>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
6243 <para>The <command>exec</command> command which allows the loading
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
6244 and execution of Linux kernels
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
6245 is supported for this board (see <xref linkend="executing-programs">). The <command>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
6246 exec</command> parameters used for the SE77x9 are:</para>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
6247 <variablelist>
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jlarmour
parents:
diff changeset
6248 <varlistentry>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
6249 <term>-b <replaceable>&lt;addr></replaceable></term>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
6250 <listitem><para>Parameter block address. This is normally the first
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
6251 page of the kernel image and defaults to 0x8c101000</para></listitem></varlistentry>
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jlarmour
parents:
diff changeset
6252
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
6253 <varlistentry><term>-i <replaceable>&lt;addr></replaceable></term>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
6254 <listitem><para>Start address of initrd
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
6255 image</para></listitem></varlistentry>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
6256
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
6257 <varlistentry><term>-j <replaceable>&lt;size></replaceable></term>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
6258 <listitem><para>Size of initrd image</para></listitem></varlistentry>
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jlarmour
parents:
diff changeset
6259
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jlarmour
parents:
diff changeset
6260 <varlistentry><term>-c <replaceable>"args"</replaceable></term>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
6261 <listitem><para>Kernel arguments string</para></listitem></varlistentry>
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jlarmour
parents:
diff changeset
6262
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jlarmour
parents:
diff changeset
6263 <varlistentry><term>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
6264 -m <replaceable>&lt;flags></replaceable></term>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
6265 <listitem><para>Mount rdonly flags. If set to a non-zero value the
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
6266 root partition will be mounted read-only.</para></listitem></varlistentry>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
6267
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jlarmour
parents:
diff changeset
6268 <varlistentry><term>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
6269 -f <replaceable>&lt;flags></replaceable></term>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
6270 <listitem><para>RAM disk flags. Should normally be 0x4000</para></listitem></varlistentry>
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jlarmour
parents:
diff changeset
6271
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jlarmour
parents:
diff changeset
6272 <varlistentry><term>-r <replaceable>&lt;device number></replaceable></term>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
6273 <listitem><para>Root device specification. /dev/ram is 0x0101</para></listitem></varlistentry>
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jlarmour
parents:
diff changeset
6274
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jlarmour
parents:
diff changeset
6275 <varlistentry><term>-l <replaceable>&lt;type></replaceable></term>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
6276 <listitem><para>Loader type</para></listitem></varlistentry>
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jlarmour
parents:
diff changeset
6277
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
6278 </variablelist>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
6279
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
6280 <para>Finally the kernel entry address can be specified as an optional
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
6281 argument. The default is 0x8c102000</para>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
6282
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
6283 <para>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
6284 For the the SE77x9, Linux by default expects to be loaded at
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
6285 0x8c001000 which conflicts with the data space used by RedBoot.
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
6286 To work around this, either change the CONFIG_MEMORY_START kernel
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
6287 option to a higher address, or use the compressed kernel image and load
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
6288 it at a higher address. For example, setting CONFIG_MEMORY_START to
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
6289 0x8c100000, the kernel expects to be loaded at address 0x8c101000 with
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
6290 the entry point at 0x8c102000.
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
6291 </para>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
6292
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
6293 </sect2>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
6294 <sect2>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
6295 <title>Memory Maps </title>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
6296 <para>RedBoot sets up the following memory map on the SE77x9 board.<programlisting>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
6297 Physical Address Range Description
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
6298 ----------------------- -----------
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
6299 0x80000000 - 0x803fffff Flash (MBM29LV160)
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
6300 0x81000000 - 0x813fffff EPROM (M27C800)
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
6301 0x8c000000 - 0x8dffffff DRAM
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
6302 0xb0000000 - 0xb03fffff Ethernet (DP83902A)
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
6303 0xb0800000 - 0xb08fffff 16C552A
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
6304 0xb1000000 - 0xb100ffff Switches
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
6305 0xb1800000 - 0xb18fffff LEDs
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
6306 0xb8000000 - 0xbbffffff PCMCIA (MaruBun)
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
6307 </programlisting></para>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
6308 </sect2>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
6309 <sect2>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
6310 <title>Ethernet Driver</title>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
6311 <para>The ethernet driver uses a hardwired ESA which can, at present,
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
6312 only be changed in CDL.</para>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
6313 </sect2>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
6314 <sect2>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
6315 <title>Rebuilding RedBoot</title>
211
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jlarmour
parents: 210
diff changeset
6316
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
6317 <para>These shell variables provide the platform-specific information
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
6318 needed for building RedBoot according to the procedure described in
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
6319 <xref linkend="Rebuilding-Redboot">:
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
6320 <programlisting>
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
6321 export TARGET=se77x9
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
6322 export ARCH_DIR=sh
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
6323 export PLATFORM_DIR=se77x9
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
6324 </programlisting>
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jlarmour
parents: 210
diff changeset
6325 </para>
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jlarmour
parents: 210
diff changeset
6326
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
6327 <para>The names of configuration files are listed above with the
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
6328 description of the associated modes.</para>
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
6329 </sect2>
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
6330 </sect1>
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
6331
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
6332 <?Pub _newpage>
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
6333 <sect1 id="hs7729pci">
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
6334 <title>SuperH/SH3(SH7729) Hitachi HS7729PCI</title>
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
6335 <sect2>
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
6336 <title>Overview</title>
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
6337 <para><indexterm><primary>Hitachi SH HS7729PCI</primary><secondary>installing
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
6338 and testing</secondary></indexterm><indexterm><primary>installing and testing
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
6339 </primary><secondary>Hitachi SH HS7729PCI</secondary></indexterm>RedBoot uses
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6340 the COM1 and COM2 serial ports (and the debug port on the
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6341 motherboard).
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6342 The default serial port settings are 38400,8,N,1.
213
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6343 Ethernet is also supported using a D-Link DFE-530TX PCI plugin
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6344 card. Management of onboard flash is also supported. </para>
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6345
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6346 <para>The following RedBoot configurations are supported:
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6347
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6348 <informaltable frame="all">
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6349 <tgroup cols="4" colsep="1" rowsep="1" align="left">
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6350 <thead>
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diff changeset
6351 <row>
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6352 <entry>Configuration</entry>
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diff changeset
6353 <entry>Mode</entry>
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6354 <entry>Description</entry>
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6355 <entry>File</entry>
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6356 </row>
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6357 </thead>
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6358 <tbody>
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6359 <row>
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6360 <entry>ROM</entry>
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6361 <entry>[ROM]</entry>
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6362 <entry>RedBoot running from the board's flash boot
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6363 sector.</entry>
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6364 <entry>redboot_ROM.ecm</entry>
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6365 </row>
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diff changeset
6366 <row>
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diff changeset
6367 <entry>RAM</entry>
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6368 <entry>[RAM]</entry>
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6369 <entry>RedBoot running from RAM with RedBoot in the
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6370 flash boot sector.</entry>
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6371 <entry>redboot_RAM.ecm</entry>
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6372 </row>
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6373 </tbody>
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6374 </tgroup>
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6375 </informaltable>
211
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6376 </para>
213
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diff changeset
6377
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diff changeset
6378
211
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6379 </sect2>
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6380 <sect2>
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6381 <title>Initial Installation Method </title>
213
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6382 <para>A ROM mode RedBoot image must be programmed
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6383 into the two EPROMs. Two files with a split version of the ROM mode
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6384 image is
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diff changeset
6385 provided: it is also possible to recreate these from the
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6386 <filename>redboot.bin</filename>
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6387 file, but requires the <application>split_word.c</application> program in
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diff changeset
6388 <filename
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6389 class="directory">hal/sh/hs7729pci/<replaceable>VERSION</replaceable>/misc</filename>
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6390 to be built and executed with the <filename>redboot.bin</filename>
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diff changeset
6391 filename as sole argument.</para>
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diff changeset
6392
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6393 <para>After doing this it is advised that another ROM mode image of
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diff changeset
6394 RedBoot is programmed into the on-board flash, and that copy be used
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diff changeset
6395 for booting the board. This allows for software programmed updates of
211
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diff changeset
6396 RedBoot instead of having to reprogram the EPROMs.</para>
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diff changeset
6397
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diff changeset
6398 <orderedlist>
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6399 <listitem><para>Program the EPROMs with RedBoot. The .lo image should
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6400 go in socket M1 and the .hi image in socket M2.
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6401 </para>
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6402 </listitem>
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6403 <listitem><para>Set switch SW1-6 to ON [boot from EPROM]</para>
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6404 </listitem>
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6405 <listitem><para>Follow the instructions under Flash management for
213
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diff changeset
6406 updating the flash copy of RedBoot, but force the flash destination
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diff changeset
6407 address with
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6408 <screen><userinput>-f 0x80400000</userinput></screen> due to setting of
211
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diff changeset
6409 the SW1-6 switch.</para>
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diff changeset
6410 </listitem>
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6411 <listitem><para>Set switch SW1-6 to OFF [boot from flash] and reboot the board. You
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6412 should now see the RedBoot banner. At this time you may want to issue
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diff changeset
6413 the command <command>fis init</command> to initialize
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diff changeset
6414 the flash table with the correct addresses.</para>
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diff changeset
6415 </listitem>
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6416 </orderedlist>
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diff changeset
6417
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6418
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6419 </sect2>
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diff changeset
6420 <sect2>
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6421 <title>Special RedBoot Commands </title>
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diff changeset
6422 <para>The <command>exec</command> command which allows the loading
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diff changeset
6423 and execution of Linux kernels
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6424 is supported for this board (see <xref linkend="executing-programs">). The <command>
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diff changeset
6425 exec</command> parameters used for the HS7729PCI are:</para>
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6426 <variablelist>
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diff changeset
6427 <varlistentry>
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6428 <term>-b <replaceable>&lt;addr></replaceable></term>
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6429 <listitem><para>Parameter block address. This is normally the first
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6430 page of the kernel image and defaults to 0x8c101000</para></listitem></varlistentry>
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diff changeset
6431
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6432 <varlistentry><term>-i <replaceable>&lt;addr></replaceable></term>
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diff changeset
6433 <listitem><para>Start address of initrd
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diff changeset
6434 image</para></listitem></varlistentry>
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diff changeset
6435
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6436 <varlistentry><term>-j <replaceable>&lt;size></replaceable></term>
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6437 <listitem><para>Size of initrd image</para></listitem></varlistentry>
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diff changeset
6438
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diff changeset
6439 <varlistentry><term>-c <replaceable>"args"</replaceable></term>
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6440 <listitem><para>Kernel arguments string</para></listitem></varlistentry>
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diff changeset
6441
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diff changeset
6442 <varlistentry><term>
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diff changeset
6443 -m <replaceable>&lt;flags></replaceable></term>
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6444 <listitem><para>Mount rdonly flags. If set to a non-zero value the
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diff changeset
6445 root partition will be mounted read-only.</para></listitem></varlistentry>
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diff changeset
6446
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diff changeset
6447 <varlistentry><term>
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diff changeset
6448 -f <replaceable>&lt;flags></replaceable></term>
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diff changeset
6449 <listitem><para>RAM disk flags. Should normally be 0x4000</para></listitem></varlistentry>
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diff changeset
6450
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diff changeset
6451 <varlistentry><term>-r <replaceable>&lt;device number></replaceable></term>
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diff changeset
6452 <listitem><para>Root device specification. /dev/ram is 0x0101</para></listitem></varlistentry>
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diff changeset
6453
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diff changeset
6454 <varlistentry><term>-l <replaceable>&lt;type></replaceable></term>
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6455 <listitem><para>Loader type</para></listitem></varlistentry>
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diff changeset
6456
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diff changeset
6457 </variablelist>
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diff changeset
6458
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diff changeset
6459 <para>Finally the kernel entry address can be specified as an optional
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diff changeset
6460 argument. The default is 0x8c102000</para>
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diff changeset
6461
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diff changeset
6462 <para>
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6463 On the HS7729PCI, Linux expects to be loaded at address 0x8c101000 with
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diff changeset
6464 the entry point at 0x8c102000. This is configurable in the kernel
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diff changeset
6465 using the CONFIG_MEMORY_START option.
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diff changeset
6466 </para>
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diff changeset
6467
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6468 </sect2>
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diff changeset
6469 <sect2>
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6470 <title>Memory Maps </title>
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6471 <para>RedBoot sets up the following memory map on the HS7729PCI board.<programlisting>
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diff changeset
6472 Physical Address Range Description
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diff changeset
6473 ----------------------- -----------
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diff changeset
6474 0x80000000 - 0x803fffff Flash (MBM29LV160)
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diff changeset
6475 0x80400000 - 0x807fffff EPROM (M27C800)
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diff changeset
6476 0x82000000 - 0x82ffffff SRAM
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6477 0x89000000 - 0x89ffffff SRAM
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diff changeset
6478 0x8c000000 - 0x8fffffff SDRAM
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diff changeset
6479 0xa8000000 - 0xa800ffff SuperIO (FDC37C935A)
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6480 0xa8400000 - 0xa87fffff USB function (ML60851C)
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6481 0xa8800000 - 0xa8bfffff USB host (SL11HT)
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diff changeset
6482 0xa8c00000 - 0xa8c3ffff Switches
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diff changeset
6483 0xa8c40000 - 0xa8c7ffff LEDs
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diff changeset
6484 0xa8c80000 - 0xa8cfffff Interrupt controller
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diff changeset
6485 0xb0000000 - 0xb3ffffff PCI (SD0001)
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6486 0xb8000000 - 0xbbffffff PCMCIA (MaruBun)
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6487 </programlisting></para>
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6488 </sect2>
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6489 <sect2>
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6490 <title>Rebuilding RedBoot</title>
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6491
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6492 <para>These shell variables provide the platform-specific information
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6493 needed for building RedBoot according to the procedure described in
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6494 <xref linkend="Rebuilding-Redboot">:
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diff changeset
6495 <programlisting>
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6496 export TARGET=hs7729pci
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6497 export ARCH_DIR=sh
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6498 export PLATFORM_DIR=hs7729pci
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6499 </programlisting>
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6500 </para>
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6501
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6502 <para>The names of configuration files are listed above with the
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6503 description of the associated modes.</para>
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6504 </sect2>
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6505 </sect1>
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6506
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diff changeset
6507 <?Pub _newpage>
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diff changeset
6508 <sect1 id="se77x9">
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6509 <title>SuperH/SH3(SH77X9) Hitachi Solution Engine 77X9</title>
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6510 <sect2>
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6511 <title>Overview</title>
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6512 <para><indexterm><primary>Hitachi SH SE77X9</primary><secondary>installing
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6513 and testing</secondary></indexterm><indexterm><primary>installing and testing
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6514 </primary><secondary>Hitachi SH SE77X9</secondary></indexterm>This
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6515 description covers the MS7729SE01 and MS7709SSE0101 variants. See <xref linkend="se7709">
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diff changeset
6516 for instructions for the MS7709SE01 variant.</para>
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diff changeset
6517
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6518 <para>RedBoot uses
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6519 the COM1 and COM2 serial ports. The default serial port settings are 38400,8,N,1.
213
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6520 Ethernet is also supported using the 10-base T connector. Management
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6521 of onboard flash is also supported.</para>
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6522
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6523 <para>The following RedBoot configurations are supported:
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6524
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diff changeset
6525 <informaltable frame="all">
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diff changeset
6526 <tgroup cols="4" colsep="1" rowsep="1" align="left">
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6527 <thead>
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6528 <row>
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6529 <entry>Configuration</entry>
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diff changeset
6530 <entry>Mode</entry>
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diff changeset
6531 <entry>Description</entry>
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diff changeset
6532 <entry>File</entry>
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6533 </row>
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6534 </thead>
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diff changeset
6535 <tbody>
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diff changeset
6536 <row>
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6537 <entry>ROM</entry>
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6538 <entry>[ROM]</entry>
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6539 <entry>RedBoot running from the board's flash boot
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6540 sector.</entry>
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6541 <entry>redboot_ROM.ecm</entry>
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diff changeset
6542 </row>
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6543 <row>
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6544 <entry>RAM</entry>
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6545 <entry>[RAM]</entry>
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6546 <entry>RedBoot running from RAM with RedBoot in the
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6547 flash boot sector.</entry>
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6548 <entry>redboot_RAM.ecm</entry>
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6549 </row>
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6550 </tbody>
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6551 </tgroup>
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6552 </informaltable>
211
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6553 </para>
213
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6554
211
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6555 </sect2>
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6556 <sect2>
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6557 <title>Initial Installation Method </title>
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6558 <para>The Solution Engine ships with the Hitachi boot monitor in EPROM
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6559 which allows for initial programming of RedBoot:</para>
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6560
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6561 <orderedlist>
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6562 <listitem><para>Set switches SW4-3 and SW4-4 to ON [boot from EPROM]</para>
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6563 </listitem>
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6564 <listitem><para>Connect a serial cable to COM2 and power up the board.</para>
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6565 </listitem>
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6566 <listitem><para>After the boot monitor banner, invoke the flash
213
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6567 download/program command:<screen>Ready &gt;<userinput>fl</userinput></screen></para>
211
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6568 </listitem>
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6569 <listitem><para>The monitor should now ask for input:
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6570 <screen>Flash ROM data copy to RAM
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6571 Please Send A S-format Record</screen>At this point copy the
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diff changeset
6572 RedBoot ROM SREC file to the serial port:<screen>
213
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6573 $ <userinput>cat redboot_ROM.eprom.srec &gt /dev/ttyS0</userinput></screen>
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diff changeset
6574 Eventually you
211
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6575 should see something like<screen>Start Addrs = A1000000
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6576 End Addrs = A1xxxxxx
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6577 Transfer complete</screen> from the monitor.
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6578 </para></listitem>
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6579 <listitem><para>Set switch SW4-3 to OFF [boot from flash] and reboot the board. You
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6580 should now see the RedBoot banner.</para>
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6581 </listitem>
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6582 </orderedlist>
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6583 </sect2>
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6584 <sect2>
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6585 <title>Special RedBoot Commands </title>
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6586 <para>The <command>exec</command> command which allows the loading
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6587 and execution of Linux kernels
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6588 is supported for this board (see <xref linkend="executing-programs">). The <command>
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6589 exec</command> parameters used for the SE77x9 are:</para>
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6590 <variablelist>
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6591 <varlistentry>
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6592 <term>-b <replaceable>&lt;addr></replaceable></term>
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6593 <listitem><para>Parameter block address. This is normally the first
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diff changeset
6594 page of the kernel image and defaults to 0x8c101000</para></listitem></varlistentry>
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6595
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6596 <varlistentry><term>-i <replaceable>&lt;addr></replaceable></term>
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diff changeset
6597 <listitem><para>Start address of initrd
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diff changeset
6598 image</para></listitem></varlistentry>
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diff changeset
6599
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6600 <varlistentry><term>-j <replaceable>&lt;size></replaceable></term>
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6601 <listitem><para>Size of initrd image</para></listitem></varlistentry>
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diff changeset
6602
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diff changeset
6603 <varlistentry><term>-c <replaceable>"args"</replaceable></term>
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6604 <listitem><para>Kernel arguments string</para></listitem></varlistentry>
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diff changeset
6605
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diff changeset
6606 <varlistentry><term>
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6607 -m <replaceable>&lt;flags></replaceable></term>
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6608 <listitem><para>Mount rdonly flags. If set to a non-zero value the
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diff changeset
6609 root partition will be mounted read-only.</para></listitem></varlistentry>
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diff changeset
6610
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diff changeset
6611 <varlistentry><term>
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6612 -f <replaceable>&lt;flags></replaceable></term>
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6613 <listitem><para>RAM disk flags. Should normally be 0x4000</para></listitem></varlistentry>
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6614
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6615 <varlistentry><term>-r <replaceable>&lt;device number></replaceable></term>
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6616 <listitem><para>Root device specification. /dev/ram is 0x0101</para></listitem></varlistentry>
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6617
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6618 <varlistentry><term>-l <replaceable>&lt;type></replaceable></term>
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6619 <listitem><para>Loader type</para></listitem></varlistentry>
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6620
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6621 </variablelist>
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6622
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6623 <para>Finally the kernel entry address can be specified as an optional
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6624 argument. The default is 0x8c102000</para>
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6625
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6626 <para>
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6627 On the SE77x9, Linux expects to be loaded at address 0x8c101000 with
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6628 the entry point at 0x8c102000. This is configurable in the kernel
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6629 using the CONFIG_MEMORY_START option.
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6630 </para>
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6631
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6632 </sect2>
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6633 <sect2>
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6634 <title>Memory Maps </title>
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6635 <para>RedBoot sets up the following memory map on the SE77x9 board.<programlisting>
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6636 Physical Address Range Description
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6637 ----------------------- -----------
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6638 0x80000000 - 0x803fffff Flash (MBM29LV160)
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6639 0x81000000 - 0x813fffff EPROM (M27C800)
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6640 0x8c000000 - 0x8dffffff SDRAM
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6641 0xb0000000 - 0xb03fffff Ethernet (DP83902A)
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6642 0xb0400000 - 0xb07fffff SuperIO (FDC37C935A)
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6643 0xb0800000 - 0xb0bfffff Switches
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6644 0xb0c00000 - 0xbfffffff LEDs
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6645 0xb1800000 - 0xb1bfffff PCMCIA (MaruBun)
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6646 </programlisting></para>
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6647 </sect2>
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6648 <sect2>
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6649 <title>Ethernet Driver</title>
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6650 <para>The ethernet driver uses a hardwired ESA which can, at present,
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6651 only be changed in CDL.</para>
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6652 </sect2>
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6653 <sect2>
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6654 <title>Rebuilding RedBoot</title>
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6655
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6656 <para>These shell variables provide the platform-specific information
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6657 needed for building RedBoot according to the procedure described in
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6658 <xref linkend="Rebuilding-Redboot">:
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6659 <programlisting>
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6660 export TARGET=se77x9
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6661 export ARCH_DIR=sh
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6662 export PLATFORM_DIR=se77x9
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6663 </programlisting>
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6664 </para>
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6665
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6666 <para>The names of configuration files are listed above with the
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diff changeset
6667 description of the associated modes.</para>
208
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6668 </sect2>
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6669 </sect1>
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6670
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diff changeset
6671 <?Pub _newpage>
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6672 <sect1 id="se7751">
211
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6673 <title>SuperH/SH4(SH7751) Hitachi Solution Engine 7751</title>
208
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6674 <sect2>
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6675 <title>Overview</title>
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diff changeset
6676 <para><indexterm><primary>Hitachi SH SE7751</primary><secondary>installing
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parents:
diff changeset
6677 and testing</secondary></indexterm><indexterm><primary>installing and testing
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parents:
diff changeset
6678 </primary><secondary>Hitachi SH SE7751</secondary></indexterm>RedBoot uses
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parents:
diff changeset
6679 the COM1 serial port. The default serial port settings are 38400,8,N,1.
213
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diff changeset
6680 Ethernet is also supported using the 10-base T connector. Management
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diff changeset
6681 of onboard flash is also supported.</para>
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6682
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6683 <para>The following RedBoot configurations are supported:
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6684
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diff changeset
6685 <informaltable frame="all">
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diff changeset
6686 <tgroup cols="4" colsep="1" rowsep="1" align="left">
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6687 <thead>
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6688 <row>
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6689 <entry>Configuration</entry>
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6690 <entry>Mode</entry>
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diff changeset
6691 <entry>Description</entry>
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diff changeset
6692 <entry>File</entry>
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6693 </row>
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6694 </thead>
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diff changeset
6695 <tbody>
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diff changeset
6696 <row>
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6697 <entry>ROM</entry>
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6698 <entry>[ROM]</entry>
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6699 <entry>RedBoot running from the board's flash boot
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6700 sector.</entry>
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6701 <entry>redboot_ROM.ecm</entry>
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diff changeset
6702 </row>
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6703 <row>
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6704 <entry>RAM</entry>
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6705 <entry>[RAM]</entry>
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diff changeset
6706 <entry>RedBoot running from RAM with RedBoot in the
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diff changeset
6707 flash boot sector.</entry>
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diff changeset
6708 <entry>redboot_RAM.ecm</entry>
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diff changeset
6709 </row>
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6710 </tbody>
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6711 </tgroup>
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6712 </informaltable>
208
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6713 </para>
213
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6714
208
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6715 </sect2>
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6716 <sect2>
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6717 <title>Initial Installation Method </title>
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diff changeset
6718 <para>The Solution Engine ships with the Hitachi boot monitor in EPROM
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parents:
diff changeset
6719 which allows for initial programming of RedBoot:</para>
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diff changeset
6720
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6721 <orderedlist>
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6722 <listitem><para>Set switches SW5-3 and SW5-4 to ON [boot from EPROM]</para>
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6723 </listitem>
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6724 <listitem><para>Connect a serial cable to COM1 and power up the board.</para>
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6725 </listitem>
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6726 <listitem><para>After the boot monitor banner, invoke the flash
213
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diff changeset
6727 download/program command:<screen>Ready &gt;<userinput>fl</userinput></screen></para>
208
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6728 </listitem>
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6729 <listitem><para>The monitor should now ask for input:
211
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diff changeset
6730 <screen>Flash ROM data copy to RAM
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diff changeset
6731 Please Send A S-format Record</screen>At this point copy the
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diff changeset
6732 RedBoot ROM SREC file to the serial port:<screen>
213
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diff changeset
6733 $ <userinput>cat redboot_ROM.eprom.srec &gt /dev/ttyS0</userinput></screen>
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diff changeset
6734 Eventually you
211
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6735 should see something like<screen>Start Addrs = A1000000
208
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6736 End Addrs = A1xxxxxx
211
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diff changeset
6737 Transfer complete</screen> from the monitor.
208
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6738 </para></listitem>
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6739 <listitem><para>Set switch SW5-3 to OFF [boot from flash] and reboot the board. You
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6740 should now see the RedBoot banner.</para>
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diff changeset
6741 </listitem>
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6742 </orderedlist>
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6743 </sect2>
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6744 <sect2>
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6745 <title>Special RedBoot Commands </title>
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6746 <para>The <command>exec</command> command which allows the loading
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diff changeset
6747 and execution of Linux kernels
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diff changeset
6748 is supported for this board (see <xref linkend="executing-programs">). The <command>
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6749 exec</command> parameters used for the SE7751 are:</para>
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parents:
diff changeset
6750 <variablelist>
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6751 <varlistentry>
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6752 <term>-b <replaceable>&lt;addr></replaceable></term>
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6753 <listitem><para>Parameter block address. This is normally the first
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6754 page of the kernel image and defaults to 0x8c101000</para></listitem></varlistentry>
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6755
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6756 <varlistentry><term>-i <replaceable>&lt;addr></replaceable></term>
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6757 <listitem><para>Start address of initrd
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diff changeset
6758 image</para></listitem></varlistentry>
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diff changeset
6759
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6760 <varlistentry><term>-j <replaceable>&lt;size></replaceable></term>
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diff changeset
6761 <listitem><para>Size of initrd image</para></listitem></varlistentry>
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6762
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6763 <varlistentry><term>-c <replaceable>"args"</replaceable></term>
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diff changeset
6764 <listitem><para>Kernel arguments string</para></listitem></varlistentry>
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diff changeset
6765
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diff changeset
6766 <varlistentry><term>
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diff changeset
6767 -m <replaceable>&lt;flags></replaceable></term>
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6768 <listitem><para>Mount rdonly flags. If set to a non-zero value the
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diff changeset
6769 root partition will be mounted read-only.</para></listitem></varlistentry>
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diff changeset
6770
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diff changeset
6771 <varlistentry><term>
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6772 -f <replaceable>&lt;flags></replaceable></term>
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6773 <listitem><para>RAM disk flags. Should normally be 0x4000</para></listitem></varlistentry>
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diff changeset
6774
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6775 <varlistentry><term>-r <replaceable>&lt;device number></replaceable></term>
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diff changeset
6776 <listitem><para>Root device specification. /dev/ram is 0x0101</para></listitem></varlistentry>
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diff changeset
6777
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diff changeset
6778 <varlistentry><term>-l <replaceable>&lt;type></replaceable></term>
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diff changeset
6779 <listitem><para>Loader type</para></listitem></varlistentry>
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diff changeset
6780
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diff changeset
6781 </variablelist>
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diff changeset
6782
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diff changeset
6783 <para>Finally the kernel entry address can be specified as an optional
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diff changeset
6784 argument. The default is 0x8c102000</para>
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diff changeset
6785
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diff changeset
6786 <para>
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6787 On the SE7751, Linux expects to be loaded at address 0x8c101000 with
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diff changeset
6788 the entry point at 0x8c102000. This is configurable in the kernel
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diff changeset
6789 using the CONFIG_MEMORY_START option.
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diff changeset
6790 </para>
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6791
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diff changeset
6792 </sect2>
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diff changeset
6793 <sect2>
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6794 <title>Memory Maps </title>
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6795 <para>RedBoot sets up the following memory map on the SE7751 board.<programlisting>
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diff changeset
6796 Physical Address Range Description
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diff changeset
6797 ----------------------- -----------
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6798 0x80000000 - 0x803fffff Flash (MBM29LV160)
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diff changeset
6799 0x81000000 - 0x813fffff EPROM (M27C800)
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diff changeset
6800 0x8c000000 - 0x8fffffff SDRAM
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diff changeset
6801 0xb8000000 - 0xb8ffffff PCMCIA (MaruBun)
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diff changeset
6802 0xb9000000 - 0xb9ffffff Switches
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diff changeset
6803 0xba000000 - 0xbaffffff LEDs
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diff changeset
6804 0xbd000000 - 0xbdffffff PCI MEM space
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diff changeset
6805 0xbe200000 - 0xbe23ffff PCI Ctrl space
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diff changeset
6806 0xbe240000 - 0xbe27ffff PCI IO space
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diff changeset
6807 </programlisting></para>
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diff changeset
6808 </sect2>
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diff changeset
6809 <sect2>
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diff changeset
6810 <title>Ethernet Driver</title>
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diff changeset
6811 <para>The ethernet driver uses a hardwired ESA which can, at present,
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diff changeset
6812 only be changed in CDL.</para>
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diff changeset
6813 </sect2>
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diff changeset
6814 <sect2>
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6815 <title>Rebuilding RedBoot</title>
211
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diff changeset
6816
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diff changeset
6817 <para>These shell variables provide the platform-specific information
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diff changeset
6818 needed for building RedBoot according to the procedure described in
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diff changeset
6819 <xref linkend="Rebuilding-Redboot">:
208
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diff changeset
6820 <programlisting>
211
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diff changeset
6821 export TARGET=se7751
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diff changeset
6822 export ARCH_DIR=sh
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diff changeset
6823 export PLATFORM_DIR=se7751
208
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diff changeset
6824 </programlisting>
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diff changeset
6825 </para>
211
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parents: 210
diff changeset
6826
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diff changeset
6827 <para>The names of configuration files are listed above with the
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diff changeset
6828 description of the associated modes.</para>
208
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diff changeset
6829 </sect2>
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diff changeset
6830 </sect1>
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diff changeset
6831
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diff changeset
6832 </chapter>