comparison packages/hal/powerpc/arch/current/include/arch.inc @ 208:e0c0827131d1 ecos

Merge from eCos master repository on 2002-05-20-20:11:54-BST
author jlarmour
date Mon, 20 May 2002 22:19:26 +0000
parents 435cced73e2f
children d2c90368aeef
comparison
equal deleted inserted replaced
207:74c807ddde34 208:e0c0827131d1
3 ## arch.inc 3 ## arch.inc
4 ## 4 ##
5 ## PowerPC architecture assembler header file 5 ## PowerPC architecture assembler header file
6 ## 6 ##
7 ##============================================================================= 7 ##=============================================================================
8 #####COPYRIGHTBEGIN#### 8 #####ECOSGPLCOPYRIGHTBEGIN####
9 # 9 # -------------------------------------------
10 # ------------------------------------------- 10 # This file is part of eCos, the Embedded Configurable Operating System.
11 # The contents of this file are subject to the Red Hat eCos Public License 11 # Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
12 # Version 1.1 (the "License"); you may not use this file except in 12 #
13 # compliance with the License. You may obtain a copy of the License at 13 # eCos is free software; you can redistribute it and/or modify it under
14 # http://www.redhat.com/ 14 # the terms of the GNU General Public License as published by the Free
15 # 15 # Software Foundation; either version 2 or (at your option) any later version.
16 # Software distributed under the License is distributed on an "AS IS" 16 #
17 # basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the 17 # eCos is distributed in the hope that it will be useful, but WITHOUT ANY
18 # License for the specific language governing rights and limitations under 18 # WARRANTY; without even the implied warranty of MERCHANTABILITY or
19 # the License. 19 # FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
20 # 20 # for more details.
21 # The Original Code is eCos - Embedded Configurable Operating System, 21 #
22 # released September 30, 1998. 22 # You should have received a copy of the GNU General Public License along
23 # 23 # with eCos; if not, write to the Free Software Foundation, Inc.,
24 # The Initial Developer of the Original Code is Red Hat. 24 # 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
25 # Portions created by Red Hat are 25 #
26 # Copyright (C) 1998, 1999, 2000 Red Hat, Inc. 26 # As a special exception, if other files instantiate templates or use macros
27 # All Rights Reserved. 27 # or inline functions from this file, or you compile this file and link it
28 # ------------------------------------------- 28 # with other works to produce a work based on this file, this file does not
29 # 29 # by itself cause the resulting work to be covered by the GNU General Public
30 #####COPYRIGHTEND#### 30 # License. However the source code for this file must still be made available
31 # in accordance with section (3) of the GNU General Public License.
32 #
33 # This exception does not invalidate any other reasons why a work based on
34 # this file might be covered by the GNU General Public License.
35 #
36 # Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
37 # at http://sources.redhat.com/ecos/ecos-license
38 # -------------------------------------------
39 #####ECOSGPLCOPYRIGHTEND####
31 ##============================================================================= 40 ##=============================================================================
32 #######DESCRIPTIONBEGIN#### 41 #######DESCRIPTIONBEGIN####
33 ## 42 ##
34 ## Author(s): nickg 43 ## Author(s): nickg
35 ## Contributors:nickg 44 ## Contributors:nickg
86 .equ r30, 30 95 .equ r30, 30
87 .equ r31, 31 96 .equ r31, 31
88 97
89 .equ sp, r1 98 .equ sp, r1
90 99
100 #ifdef CYGHWR_HAL_POWERPC_FPU
101 .equ f0, 0
102 .equ f1, 1
103 .equ f2, 2
104 .equ f3, 3
105 .equ f4, 4
106 .equ f5, 5
107 .equ f6, 6
108 .equ f7, 7
109 .equ f8, 8
110 .equ f9, 9
111 .equ f10, 10
112 .equ f11, 11
113 .equ f12, 12
114 .equ f13, 13
115 .equ f14, 14
116 .equ f15, 15
117 .equ f16, 16
118 .equ f17, 17
119 .equ f18, 18
120 .equ f19, 19
121 .equ f20, 20
122 .equ f21, 21
123 .equ f22, 22
124 .equ f23, 23
125 .equ f24, 24
126 .equ f25, 25
127 .equ f26, 26
128 .equ f27, 27
129 .equ f28, 28
130 .equ f29, 29
131 .equ f30, 30
132 .equ f31, 31
133 #endif
134
135
91 #------------------------------------------------------------------------------ 136 #------------------------------------------------------------------------------
92 # Some useful coding macros 137 # Some useful coding macros
93 138
94 # Load immediate word, has to be done with 2 instructions 139 # Load immediate word, has to be done with 2 instructions
95 .macro lwi reg,val 140 .macro lwi reg,val
112 #define FUNC_END(name) \ 157 #define FUNC_END(name) \
113 /* nothing for now */ 158 /* nothing for now */
114 159
115 ##----------------------------------------------------------------------------- 160 ##-----------------------------------------------------------------------------
116 ## PowerPC FPU state handling 161 ## PowerPC FPU state handling
117 ## Empty for now. 162 ## The PowerPC ABI defines f14-f31 as callee saved. There is thus no need to
163 ## save them when calling C functions
164
165 #ifdef CYGDBG_HAL_COMMON_INTERRUPTS_SAVE_MINIMUM_CONTEXT
166 # define MAX_SAVE_FREG 13
167 #else
168 # define MAX_SAVE_FREG 31
169 #endif
118 170
119 .macro hal_fpu_save regs 171 .macro hal_fpu_save regs
172 #ifdef CYGHWR_HAL_POWERPC_FPU
173 .set _freg, 0
174 .rept MAX_SAVE_FREG+1
175 stfd _freg,(CYGARC_PPCREG_FREGS+_freg*8)(\regs)
176 .set _freg, _freg+1
177 .endr
178 #endif
120 .endm 179 .endm
121 180
122 .macro hal_fpu_load regs 181 .macro hal_fpu_load regs
182 #ifdef CYGHWR_HAL_POWERPC_FPU
183 .set _freg, 0
184 .rept MAX_SAVE_FREG+1
185 stfd _freg,(CYGARC_PPCREG_FREGS+_freg*8)(\regs)
186 .set _freg, _freg+1
187 .endr
188 #endif
123 .endm 189 .endm
124 190
125 ##----------------------------------------------------------------------------- 191 ##-----------------------------------------------------------------------------
126 ## CPU specific macros. These provide a common assembler interface to 192 ## CPU specific macros. These provide a common assembler interface to
127 ## operations that may have CPU specific implementations on different 193 ## operations that may have CPU specific implementations on different