view packages/hal/sh/sh2/current/include/mod_regs_cmt.h @ 3292:7f8e529b4d82 default tip

Fix FREESCALE_EDMA_NBYTES_MLOFFYES_MLOFF() so it works with negative offsets.
author vae
date Wed, 29 Apr 2015 23:31:48 +0000
parents 74dbf4c3f2e1
children
line wrap: on
line source

//=============================================================================
//
//      mod_regs_cmt.h
//
//      CMT (Compare Match Timer) Module register definitions
//
//=============================================================================
// ####ECOSGPLCOPYRIGHTBEGIN####                                            
// -------------------------------------------                              
// This file is part of eCos, the Embedded Configurable Operating System.   
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
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//=============================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s):   jskov
// Contributors:jskov
// Date:        2002-04-17
//              
//####DESCRIPTIONEND####
//
//=============================================================================

//--------------------------------------------------------------------------
// Compare Match Timer

#define CYGARC_REG_CMSTR              0xffff83d0
#define CYGARC_REG_CMCSR0             0xffff83d2
#define CYGARC_REG_CMCNT0             0xffff83d4
#define CYGARC_REG_CMCOR0             0xffff83d6
#define CYGARC_REG_CMCSR1             0xffff83d8
#define CYGARC_REG_CMCNT1             0xffff83da
#define CYGARC_REG_CMCOR1             0xffff83dc


#define CYGARC_REG_CMSTR_STR1         0x0002 // start compare time 1
#define CYGARC_REG_CMSTR_STR0         0x0001 // start compare time 0

#define CYGARC_REG_CMCSR_CMF          0x0080 // compare match flag
#define CYGARC_REG_CMCSR_CMIE         0x0040 // compare match interrupt enable
#define CYGARC_REG_CMCSR_CLK_8        0x0000 // system clock / 8
#define CYGARC_REG_CMCSR_CLK_32       0x0001 // system clock / 32
#define CYGARC_REG_CMCSR_CLK_128      0x0002 // system clock / 128
#define CYGARC_REG_CMCSR_CLK_512      0x0003 // system clock / 512