Mercurial > ecos
changeset 1616:126cd98e4832
* src/ec555.S: Corrected typo in initialisation of SYPCR to make sure
watchdog no longer ticks when FREEZE is asserted. Changed initialisation
of TBSCR to make sure timebase continues ticking when FREEZE is asserted.
* src/ec555.S: Removed definition of memory segments. We do not need them
afterall.
* include/pkgconf/mlt_powerpc_ec555_f02_s01_ram.h:
* include/pkgconf/mlt_powerpc_ec555_f02_s01_ram.ldi:
* include/pkgconf/mlt_powerpc_ec555_f02_s01_rom.ldi:
* include/pkgconf/mlt_powerpc_ec555_f04_s02_ram.h:
* include/pkgconf/mlt_powerpc_ec555_f04_s02_ram.ldi:
* include/pkgconf/mlt_powerpc_ec555_f04_s02_rom.ldi:
* include/pkgconf/mlt_powerpc_ec555_f08_s04_ram.h:
* include/pkgconf/mlt_powerpc_ec555_f08_s04_ram.ldi:
* include/pkgconf/mlt_powerpc_ec555_f08_s04_rom.ldi:
* include/pkgconf/mlt_powerpc_ec555_f08_s08_ram.h:
* include/pkgconf/mlt_powerpc_ec555_f08_s08_ram.ldi:
* include/pkgconf/mlt_powerpc_ec555_f08_s08_rom.ldi: Reserved a block of
64K at the beginning of external ram for use by RedBoot. Only really
necessary if network support is wanted.
* include/pkgconf/mlt_powerpc_ec555_ram.h:
* include/pkgconf/mlt_powerpc_ec555_ram.ldi:
* include/pkgconf/mlt_powerpc_ec555_rom.h:
* include/pkgconf/mlt_powerpc_ec555_rom.ldi: Permanently removed
* include/pkgconf/mlt_powerpc_ec555_f02_s01_ram.h: New file
* include/pkgconf/mlt_powerpc_ec555_f04_s02_ram.h: New file
* include/pkgconf/mlt_powerpc_ec555_f08_s04_ram.h: New file
* include/pkgconf/mlt_powerpc_ec555_f08_s08_ram.h: New file
* include/pkgconf/mlt_powerpc_ec555_f02_s01_ram.ldi: New file
* include/pkgconf/mlt_powerpc_ec555_f04_s02_ram.ldi: New file
* include/pkgconf/mlt_powerpc_ec555_f08_s04_ram.ldi: New file
* include/pkgconf/mlt_powerpc_ec555_f08_s08_ram.ldi: New file
* include/pkgconf/mlt_powerpc_ec555_f02_s01_rom.h: New file
* include/pkgconf/mlt_powerpc_ec555_f04_s02_rom.h: New file
* include/pkgconf/mlt_powerpc_ec555_f08_s04_rom.h: New file
* include/pkgconf/mlt_powerpc_ec555_f08_s08_rom.h: New file
* include/pkgconf/mlt_powerpc_ec555_f02_s01_rom.ldi: New file
* include/pkgconf/mlt_powerpc_ec555_f04_s02_rom.ldi: New file
* include/pkgconf/mlt_powerpc_ec555_f08_s04_rom.ldi: New file
* include/pkgconf/mlt_powerpc_ec555_f08_s08_rom.ldi: New file
* cdl/hal_powerpc_ec555.cdl, src/ec555.S, plf_misc.c: Added support
for all four different variants of the ec555 board. Notice that we
had to change the memory map. 16 MB flashes simply did not fit in
the one we defined previously.
line wrap: on
line diff
--- a/packages/hal/powerpc/ec555/current/ChangeLog +++ b/packages/hal/powerpc/ec555/current/ChangeLog @@ -1,3 +1,50 @@ +2004-04-19 Bob Koninckx <bob.koninckx@o-3s.com> + * src/ec555.S: Corrected typo in initialisation of SYPCR to make sure + watchdog no longer ticks when FREEZE is asserted. Changed initialisation + of TBSCR to make sure timebase continues ticking when FREEZE is asserted. + * src/ec555.S: Removed definition of memory segments. We do not need them + afterall. + * include/pkgconf/mlt_powerpc_ec555_f02_s01_ram.h: + * include/pkgconf/mlt_powerpc_ec555_f02_s01_ram.ldi: + * include/pkgconf/mlt_powerpc_ec555_f02_s01_rom.ldi: + * include/pkgconf/mlt_powerpc_ec555_f04_s02_ram.h: + * include/pkgconf/mlt_powerpc_ec555_f04_s02_ram.ldi: + * include/pkgconf/mlt_powerpc_ec555_f04_s02_rom.ldi: + * include/pkgconf/mlt_powerpc_ec555_f08_s04_ram.h: + * include/pkgconf/mlt_powerpc_ec555_f08_s04_ram.ldi: + * include/pkgconf/mlt_powerpc_ec555_f08_s04_rom.ldi: + * include/pkgconf/mlt_powerpc_ec555_f08_s08_ram.h: + * include/pkgconf/mlt_powerpc_ec555_f08_s08_ram.ldi: + * include/pkgconf/mlt_powerpc_ec555_f08_s08_rom.ldi: Reserved a block of + 64K at the beginning of external ram for use by RedBoot. Only really + necessary if network support is wanted. + * include/pkgconf/mlt_powerpc_ec555_ram.h: + * include/pkgconf/mlt_powerpc_ec555_ram.ldi: + * include/pkgconf/mlt_powerpc_ec555_rom.h: + * include/pkgconf/mlt_powerpc_ec555_rom.ldi: Permanently removed + +2004-04-08 Bob Koninckx <bob.koninckx@o-3s.com> + * include/pkgconf/mlt_powerpc_ec555_f02_s01_ram.h: New file + * include/pkgconf/mlt_powerpc_ec555_f04_s02_ram.h: New file + * include/pkgconf/mlt_powerpc_ec555_f08_s04_ram.h: New file + * include/pkgconf/mlt_powerpc_ec555_f08_s08_ram.h: New file + * include/pkgconf/mlt_powerpc_ec555_f02_s01_ram.ldi: New file + * include/pkgconf/mlt_powerpc_ec555_f04_s02_ram.ldi: New file + * include/pkgconf/mlt_powerpc_ec555_f08_s04_ram.ldi: New file + * include/pkgconf/mlt_powerpc_ec555_f08_s08_ram.ldi: New file + * include/pkgconf/mlt_powerpc_ec555_f02_s01_rom.h: New file + * include/pkgconf/mlt_powerpc_ec555_f04_s02_rom.h: New file + * include/pkgconf/mlt_powerpc_ec555_f08_s04_rom.h: New file + * include/pkgconf/mlt_powerpc_ec555_f08_s08_rom.h: New file + * include/pkgconf/mlt_powerpc_ec555_f02_s01_rom.ldi: New file + * include/pkgconf/mlt_powerpc_ec555_f04_s02_rom.ldi: New file + * include/pkgconf/mlt_powerpc_ec555_f08_s04_rom.ldi: New file + * include/pkgconf/mlt_powerpc_ec555_f08_s08_rom.ldi: New file + * cdl/hal_powerpc_ec555.cdl, src/ec555.S, plf_misc.c: Added support + for all four different variants of the ec555 board. Notice that we + had to change the memory map. 16 MB flashes simply did not fit in + the one we defined previously. + 2003-12-16 Gary Thomas <gary@mlbassoc.com> * misc/redboot_ROM.ecm:
--- a/packages/hal/powerpc/ec555/current/cdl/hal_powerpc_ec555.cdl +++ b/packages/hal/powerpc/ec555/current/cdl/hal_powerpc_ec555.cdl @@ -89,6 +89,17 @@ cdl_package CYGPKG_HAL_POWERPC_EC555 { equivalent technology." } + cdl_option CYGHWR_HAL_EC555_BOARD_VARIANT { + display "Board type" + flavor data + legal_values {"F02_S01" "F04_S02" "F08_S04" "F08_S08"} + default_value {"F02_S01"} + description " + The ec555 board comes in four different flavours, 2MB flash-1MB RAM, + 4MB flash-2MB RAM, 8MB flash-4MB RAM and 8MB flash-8MB RAM. This option + selects the board variant." + } + cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS { display "Number of communication channels on the board" flavor data @@ -253,8 +264,16 @@ cdl_package CYGPKG_HAL_POWERPC_EC555 { flavor data no_define define -file system.h CYGHWR_MEMORY_LAYOUT_LDI - calculated { CYG_HAL_STARTUP == "RAM" ? "<pkgconf/mlt_powerpc_ec555_ram.ldi>" : \ - "<pkgconf/mlt_powerpc_ec555_rom.ldi>" } + calculated { CYG_HAL_STARTUP == "RAM" ? \ + CYGHWR_HAL_EC555_BOARD_VARIANT == "F02_S01" ? "<pkgconf/mlt_powerpc_ec555_f02_s01_ram.ldi>" : \ + CYGHWR_HAL_EC555_BOARD_VARIANT == "F04_S02" ? "<pkgconf/mlt_powerpc_ec555_f04_s02_ram.ldi>" : \ + CYGHWR_HAL_EC555_BOARD_VARIANT == "F08_S04" ? "<pkgconf/mlt_powerpc_ec555_f08_s04_ram.ldi>" : \ + "<pkgconf/mlt_powerpc_ec555_f08_s08_ram.ldi>" : \ + CYGHWR_HAL_EC555_BOARD_VARIANT == "F02_S01" ? "<pkgconf/mlt_powerpc_ec555_f02_s01_rom.ldi>" : \ + CYGHWR_HAL_EC555_BOARD_VARIANT == "F04_S02" ? "<pkgconf/mlt_powerpc_ec555_f04_s02_rom.ldi>" : \ + CYGHWR_HAL_EC555_BOARD_VARIANT == "F08_S04" ? "<pkgconf/mlt_powerpc_ec555_f08_s04_rom.ldi>" : \ + "<pkgconf/mlt_powerpc_ec555_f08_s08_rom.ldi>" + } } cdl_option CYGHWR_MEMORY_LAYOUT_H { @@ -262,8 +281,16 @@ cdl_package CYGPKG_HAL_POWERPC_EC555 { flavor data no_define define -file system.h CYGHWR_MEMORY_LAYOUT_H - calculated { CYG_HAL_STARTUP == "RAM" ? "<pkgconf/mlt_powerpc_ec555_ram.h>" : \ - "<pkgconf/mlt_powerpc_ec555_rom.h>" } + calculated { CYG_HAL_STARTUP == "RAM" ? \ + CYGHWR_HAL_EC555_BOARD_VARIANT == "F02_S01" ? "<pkgconf/mlt_powerpc_ec555_f02_s01_ram.h>" : \ + CYGHWR_HAL_EC555_BOARD_VARIANT == "F04_S02" ? "<pkgconf/mlt_powerpc_ec555_f04_s02_ram.h>" : \ + CYGHWR_HAL_EC555_BOARD_VARIANT == "F08_S04" ? "<pkgconf/mlt_powerpc_ec555_f08_s04_ram.h>" : \ + "<pkgconf/mlt_powerpc_ec555_f08_s08_ram.h>" : \ + CYGHWR_HAL_EC555_BOARD_VARIANT == "F02_S01" ? "<pkgconf/mlt_powerpc_ec555_f02_s01_rom.h>" : \ + CYGHWR_HAL_EC555_BOARD_VARIANT == "F04_S02" ? "<pkgconf/mlt_powerpc_ec555_f04_s02_rom.h>" : \ + CYGHWR_HAL_EC555_BOARD_VARIANT == "F08_S04" ? "<pkgconf/mlt_powerpc_ec555_f08_s04_rom.h>" : \ + "<pkgconf/mlt_powerpc_ec555_f08_s08_rom.h>" + } } }
new file mode 100644 --- /dev/null +++ b/packages/hal/powerpc/ec555/current/include/pkgconf/mlt_powerpc_ec555_f02_s01_ram.h @@ -0,0 +1,54 @@ +// eCos memory layout - Fri Oct 20 10:25:48 2000 + +// This is a generated file - do not edit + +#ifndef __ASSEMBLER__ +#include <cyg/infra/cyg_type.h> +#include <stddef.h> +#endif + +#define CYGMEM_REGION_rom (0x000000) +#define CYGMEM_REGION_rom_SIZE (0x06ffff) +#define CYGMEM_REGION_rom_ATTR (CYGMEM_REGION_ATTR_RO) + +#define CYGMEM_REGION_ram (0x1000000) +#define CYGMEM_REGION_ram_SIZE (0x0fffff) +#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W) + +#define CYGMEM_REGION_iram (0x3f9800) +#define CYGMEM_REGION_iram_SIZE (0x006800) +#define CYGMEM_REGION_iram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W) + +#define CYGMEM_REGION_eflash (0x2000000) +#define CYGMEM_REGION_eflash_SIZE (0x1fffff) +#define CYGMEM_REGION_eflash_ATTR (CYGMEM_REGION_ATTR_RO) + +#ifndef __ASSEMBLER__ +extern char CYG_LABEL_NAME (__reserved_vectors) []; +#endif +#define CYGMEM_SECTION_reserved_vectors (CYG_LABEL_NAME (__reserved_vectors)) +#define CYGMEM_SECTION_reserved_vectors_SIZE (0x2000) + +#ifndef __ASSEMBLER__ +extern char CYG_LABEL_NAME (__reserved_vsr_table) []; +#endif +#define CYGMEM_SECTION_reserved_vsr_table (CYG_LABEL_NAME (__reserved_vsr_table)) +#define CYGMEM_SECTION_reserved_vsr_table_SIZE (0x200) + +#ifndef __ASSEMBLER__ +extern char CYG_LABEL_NAME (__reserved_virtual_table) []; +#endif +#define CYGMEM_SECTION_reserved_virtual_table (CYG_LABEL_NAME (__reserved_virtual_table)) +#define CYGMEM_SECTION_reserved_virtual_table_SIZE (0x100) + +#ifndef __ASSEMBLER__ +extern char CYG_LABEL_NAME (__reserved_for_rom) []; +#endif +#define CYGMEM_SECTION_reserved_for_rom (CYG_LABEL_NAME (__reserved_for_rom)) +#define CYGMEM_SECTION_reserved_for_rom_SIZE (0x10000) + +#ifndef __ASSEMBLER__ +extern char CYG_LABEL_NAME (__heap1) []; +#endif +#define CYGMEM_SECTION_heap1 (CYG_LABEL_NAME (__heap1)) +#define CYGMEM_SECTION_heap1_SIZE (0x1100000 - (size_t) CYG_LABEL_NAME (__heap1))
new file mode 100644 --- /dev/null +++ b/packages/hal/powerpc/ec555/current/include/pkgconf/mlt_powerpc_ec555_f02_s01_ram.ldi @@ -0,0 +1,37 @@ + +#include <cyg/infra/cyg_type.inc> + +MEMORY +{ + rom : ORIGIN = 0x00000000, LENGTH = 0x0006ffff /* internal flash */ + ram(WA) : ORIGIN = 0x01000000, LENGTH = 0x000fffff /* external RAM */ + iram(WA) : ORIGIN = 0x003f9800, LENGTH = 0x00006800 /* internal RAM */ + eflash(RXIW) : ORIGIN = 0x02000000, LENGTH = 0x001fffff /* external FLASH */ +} + +SECTIONS +{ + SECTIONS_BEGIN + CYG_LABEL_DEFN(__reserved_vectors) = 0x00000000; + + . = 0x3f9800; + CYG_LABEL_DEFN(__reserved_vsr_table) = ALIGN (0x10); + . = CYG_LABEL_DEFN(__reserved_vsr_table) + 0x200; + CYG_LABEL_DEFN(__reserved_virtual_table) = ALIGN (0x10); + . = 0x01000000; + CYG_LABEL_DEFN(__reserved_for_rom) = ALIGN (0x10); + . = CYG_LABEL_DEFN(__reserved_for_rom) + 0x10000; + + SECTION_vectors (ram, 0x01010000, LMA_EQ_VMA) + SECTION_text (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_fini (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_rodata1 (ram, ALIGN (0x8), LMA_EQ_VMA) + SECTION_rodata (ram, ALIGN (0x8), LMA_EQ_VMA) + SECTION_fixup (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_gcc_except_table (ram, ALIGN (0x1), LMA_EQ_VMA) + SECTION_data (ram, ALIGN (0x8), LMA_EQ_VMA) + SECTION_sbss (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_bss (ram, ALIGN (0x10), LMA_EQ_VMA) + CYG_LABEL_DEFN(__heap1) = ALIGN (0x8); + SECTIONS_END +}
new file mode 100644 --- /dev/null +++ b/packages/hal/powerpc/ec555/current/include/pkgconf/mlt_powerpc_ec555_f02_s01_rom.h @@ -0,0 +1,48 @@ +// eCos memory layout - Fri Oct 20 10:25:48 2000 + +// This is a generated file - do not edit + +#ifndef __ASSEMBLER__ +#include <cyg/infra/cyg_type.h> +#include <stddef.h> +#endif + +#define CYGMEM_REGION_rom (0x000000) +#define CYGMEM_REGION_rom_SIZE (0x06ffff) +#define CYGMEM_REGION_rom_ATTR (CYGMEM_REGION_ATTR_RO) + +#define CYGMEM_REGION_ram (0x1000000) +#define CYGMEM_REGION_ram_SIZE (0x0fffff) +#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W) + +#define CYGMEM_REGION_iram (0x3f9800) +#define CYGMEM_REGION_iram_SIZE (0x006800) +#define CYGMEM_REGION_iram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W) + +#define CYGMEM_REGION_eflash (0x2000000) +#define CYGMEM_REGION_eflash_SIZE (0x1fffff) +#define CYGMEM_REGION_eflash_ATTR (CYGMEM_REGION_ATTR_RO) + +#ifndef __ASSEMBLER__ +extern char CYG_LABEL_NAME (__reserved_vectors) []; +#endif +#define CYGMEM_SECTION_reserved_vectors (CYG_LABEL_NAME (__reserved_vectors)) +#define CYGMEM_SECTION_reserved_vectors_SIZE (0x2000) + +#ifndef __ASSEMBLER__ +extern char CYG_LABEL_NAME (__reserved_vsr_table) []; +#endif +#define CYGMEM_SECTION_reserved_vsr_table (CYG_LABEL_NAME (__reserved_vsr_table)) +#define CYGMEM_SECTION_reserved_vsr_table_SIZE (0x200) + +#ifndef __ASSEMBLER__ +extern char CYG_LABEL_NAME (__reserved_virtual_table) []; +#endif +#define CYGMEM_SECTION_reserved_virtual_table (CYG_LABEL_NAME (__reserved_virtual_table)) +#define CYGMEM_SECTION_reserved_virtual_table_SIZE (0x100) + +#ifndef __ASSEMBLER__ +extern char CYG_LABEL_NAME (__heap1) []; +#endif +#define CYGMEM_SECTION_heap1 (CYG_LABEL_NAME (__heap1)) +#define CYGMEM_SECTION_heap1_SIZE (0x1100000 - (size_t) CYG_LABEL_NAME (__heap1))
new file mode 100644 --- /dev/null +++ b/packages/hal/powerpc/ec555/current/include/pkgconf/mlt_powerpc_ec555_f02_s01_rom.ldi @@ -0,0 +1,42 @@ + +#include <cyg/infra/cyg_type.inc> + +MEMORY +{ + rom : ORIGIN = 0x00000000, LENGTH = 0x0006ffff /* internal flash */ + ram(WA) : ORIGIN = 0x01000000, LENGTH = 0x000fffff /* external RAM */ + iram(WA) : ORIGIN = 0x003f9800, LENGTH = 0x00006800 /* internal RAM */ + eflash(RXIW) : ORIGIN = 0x02000000, LENGTH = 0x001fffff /* external FLASH */ +} + +SECTIONS +{ + SECTIONS_BEGIN + + CYG_LABEL_DEFN(__reserved_vectors) = 0x00000000; + + SECTION_vectors (rom, 0x00000000, LMA_EQ_VMA) + SECTION_text (rom, ALIGN (0x4), LMA_EQ_VMA) + SECTION_fini (rom, ALIGN (0x8), LMA_EQ_VMA) + SECTION_rodata1 (rom, ALIGN (0x8), LMA_EQ_VMA) + SECTION_rodata (rom, ALIGN (0x4), LMA_EQ_VMA) + SECTION_fixup (rom, ALIGN (0x4), LMA_EQ_VMA) + SECTION_gcc_except_table (rom, ALIGN (0x1), LMA_EQ_VMA) + + . = 0x3f9800; + CYG_LABEL_DEFN(__reserved_vsr_table) = ALIGN (0x10); + . = CYG_LABEL_DEFN(__reserved_vsr_table) + 0x200; + CYG_LABEL_DEFN(__reserved_virtual_table) = ALIGN (0x10); + . = CYG_LABEL_DEFN(__reserved_virtual_table) + 0x100; + + SECTION_data (iram, ALIGN (0x10), FOLLOWING (.gcc_except_table)) + SECTION_sbss (iram, ALIGN (0x4), LMA_EQ_VMA) + + . = 0x1000000; + + SECTION_bss (ram, ALIGN (0x10), LMA_EQ_VMA) + + CYG_LABEL_DEFN(__heap1) = ALIGN(0x8); + + SECTIONS_END +}
new file mode 100644 --- /dev/null +++ b/packages/hal/powerpc/ec555/current/include/pkgconf/mlt_powerpc_ec555_f04_s02_ram.h @@ -0,0 +1,54 @@ +// eCos memory layout - Fri Oct 20 10:25:48 2000 + +// This is a generated file - do not edit + +#ifndef __ASSEMBLER__ +#include <cyg/infra/cyg_type.h> +#include <stddef.h> +#endif + +#define CYGMEM_REGION_rom (0x000000) +#define CYGMEM_REGION_rom_SIZE (0x06ffff) +#define CYGMEM_REGION_rom_ATTR (CYGMEM_REGION_ATTR_RO) + +#define CYGMEM_REGION_ram (0x1000000) +#define CYGMEM_REGION_ram_SIZE (0x1fffff) +#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W) + +#define CYGMEM_REGION_iram (0x3f9800) +#define CYGMEM_REGION_iram_SIZE (0x006800) +#define CYGMEM_REGION_iram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W) + +#define CYGMEM_REGION_eflash (0x2000000) +#define CYGMEM_REGION_eflash_SIZE (0x3fffff) +#define CYGMEM_REGION_eflash_ATTR (CYGMEM_REGION_ATTR_RO) + +#ifndef __ASSEMBLER__ +extern char CYG_LABEL_NAME (__reserved_vectors) []; +#endif +#define CYGMEM_SECTION_reserved_vectors (CYG_LABEL_NAME (__reserved_vectors)) +#define CYGMEM_SECTION_reserved_vectors_SIZE (0x2000) + +#ifndef __ASSEMBLER__ +extern char CYG_LABEL_NAME (__reserved_vsr_table) []; +#endif +#define CYGMEM_SECTION_reserved_vsr_table (CYG_LABEL_NAME (__reserved_vsr_table)) +#define CYGMEM_SECTION_reserved_vsr_table_SIZE (0x200) + +#ifndef __ASSEMBLER__ +extern char CYG_LABEL_NAME (__reserved_virtual_table) []; +#endif +#define CYGMEM_SECTION_reserved_virtual_table (CYG_LABEL_NAME (__reserved_virtual_table)) +#define CYGMEM_SECTION_reserved_virtual_table_SIZE (0x100) + +#ifndef __ASSEMBLER__ +extern char CYG_LABEL_NAME (__reserved_for_rom) []; +#endif +#define CYGMEM_SECTION_reserved_for_rom (CYG_LABEL_NAME (__reserved_for_rom)) +#define CYGMEM_SECTION_reserved_for_rom_SIZE (0x10000) + +#ifndef __ASSEMBLER__ +extern char CYG_LABEL_NAME (__heap1) []; +#endif +#define CYGMEM_SECTION_heap1 (CYG_LABEL_NAME (__heap1)) +#define CYGMEM_SECTION_heap1_SIZE (0x1200000 - (size_t) CYG_LABEL_NAME (__heap1))
new file mode 100644 --- /dev/null +++ b/packages/hal/powerpc/ec555/current/include/pkgconf/mlt_powerpc_ec555_f04_s02_ram.ldi @@ -0,0 +1,37 @@ + +#include <cyg/infra/cyg_type.inc> + +MEMORY +{ + rom : ORIGIN = 0x00000000, LENGTH = 0x0006ffff /* internal flash */ + ram(WA) : ORIGIN = 0x01000000, LENGTH = 0x001fffff /* external RAM */ + iram(WA) : ORIGIN = 0x003f9800, LENGTH = 0x00006800 /* internal RAM */ + eflash(RXIW) : ORIGIN = 0x02000000, LENGTH = 0x003fffff /* external FLASH */ +} + +SECTIONS +{ + SECTIONS_BEGIN + CYG_LABEL_DEFN(__reserved_vectors) = 0x00000000; + + . = 0x3f9800; + CYG_LABEL_DEFN(__reserved_vsr_table) = ALIGN (0x10); + . = CYG_LABEL_DEFN(__reserved_vsr_table) + 0x200; + CYG_LABEL_DEFN(__reserved_virtual_table) = ALIGN (0x10); + . = 0x01000000; + CYG_LABEL_DEFN(__reserved_for_rom) = ALIGN (0x10); + . = CYG_LABEL_DEFN(__reserved_for_rom) + 0x10000; + + SECTION_vectors (ram, 0x01010000, LMA_EQ_VMA) + SECTION_text (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_fini (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_rodata1 (ram, ALIGN (0x8), LMA_EQ_VMA) + SECTION_rodata (ram, ALIGN (0x8), LMA_EQ_VMA) + SECTION_fixup (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_gcc_except_table (ram, ALIGN (0x1), LMA_EQ_VMA) + SECTION_data (ram, ALIGN (0x8), LMA_EQ_VMA) + SECTION_sbss (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_bss (ram, ALIGN (0x10), LMA_EQ_VMA) + CYG_LABEL_DEFN(__heap1) = ALIGN (0x8); + SECTIONS_END +}
new file mode 100644 --- /dev/null +++ b/packages/hal/powerpc/ec555/current/include/pkgconf/mlt_powerpc_ec555_f04_s02_rom.h @@ -0,0 +1,48 @@ +// eCos memory layout - Fri Oct 20 10:25:48 2000 + +// This is a generated file - do not edit + +#ifndef __ASSEMBLER__ +#include <cyg/infra/cyg_type.h> +#include <stddef.h> +#endif + +#define CYGMEM_REGION_rom (0x000000) +#define CYGMEM_REGION_rom_SIZE (0x06ffff) +#define CYGMEM_REGION_rom_ATTR (CYGMEM_REGION_ATTR_RO) + +#define CYGMEM_REGION_ram (0x1000000) +#define CYGMEM_REGION_ram_SIZE (0x1fffff) +#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W) + +#define CYGMEM_REGION_iram (0x3f9800) +#define CYGMEM_REGION_iram_SIZE (0x006800) +#define CYGMEM_REGION_iram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W) + +#define CYGMEM_REGION_eflash (0x2000000) +#define CYGMEM_REGION_eflash_SIZE (0x3fffff) +#define CYGMEM_REGION_eflash_ATTR (CYGMEM_REGION_ATTR_RO) + +#ifndef __ASSEMBLER__ +extern char CYG_LABEL_NAME (__reserved_vectors) []; +#endif +#define CYGMEM_SECTION_reserved_vectors (CYG_LABEL_NAME (__reserved_vectors)) +#define CYGMEM_SECTION_reserved_vectors_SIZE (0x2000) + +#ifndef __ASSEMBLER__ +extern char CYG_LABEL_NAME (__reserved_vsr_table) []; +#endif +#define CYGMEM_SECTION_reserved_vsr_table (CYG_LABEL_NAME (__reserved_vsr_table)) +#define CYGMEM_SECTION_reserved_vsr_table_SIZE (0x200) + +#ifndef __ASSEMBLER__ +extern char CYG_LABEL_NAME (__reserved_virtual_table) []; +#endif +#define CYGMEM_SECTION_reserved_virtual_table (CYG_LABEL_NAME (__reserved_virtual_table)) +#define CYGMEM_SECTION_reserved_virtual_table_SIZE (0x100) + +#ifndef __ASSEMBLER__ +extern char CYG_LABEL_NAME (__heap1) []; +#endif +#define CYGMEM_SECTION_heap1 (CYG_LABEL_NAME (__heap1)) +#define CYGMEM_SECTION_heap1_SIZE (0x1200000 - (size_t) CYG_LABEL_NAME (__heap1))
new file mode 100644 --- /dev/null +++ b/packages/hal/powerpc/ec555/current/include/pkgconf/mlt_powerpc_ec555_f04_s02_rom.ldi @@ -0,0 +1,42 @@ + +#include <cyg/infra/cyg_type.inc> + +MEMORY +{ + rom : ORIGIN = 0x00000000, LENGTH = 0x0006ffff /* internal flash */ + ram(WA) : ORIGIN = 0x01000000, LENGTH = 0x001fffff /* external RAM */ + iram(WA) : ORIGIN = 0x003f9800, LENGTH = 0x00006800 /* internal RAM */ + eflash(RXIW) : ORIGIN = 0x02000000, LENGTH = 0x003fffff /* external FLASH */ +} + +SECTIONS +{ + SECTIONS_BEGIN + + CYG_LABEL_DEFN(__reserved_vectors) = 0x00000000; + + SECTION_vectors (rom, 0x00000000, LMA_EQ_VMA) + SECTION_text (rom, ALIGN (0x4), LMA_EQ_VMA) + SECTION_fini (rom, ALIGN (0x8), LMA_EQ_VMA) + SECTION_rodata1 (rom, ALIGN (0x8), LMA_EQ_VMA) + SECTION_rodata (rom, ALIGN (0x4), LMA_EQ_VMA) + SECTION_fixup (rom, ALIGN (0x4), LMA_EQ_VMA) + SECTION_gcc_except_table (rom, ALIGN (0x1), LMA_EQ_VMA) + + . = 0x3f9800; + CYG_LABEL_DEFN(__reserved_vsr_table) = ALIGN (0x10); + . = CYG_LABEL_DEFN(__reserved_vsr_table) + 0x200; + CYG_LABEL_DEFN(__reserved_virtual_table) = ALIGN (0x10); + . = CYG_LABEL_DEFN(__reserved_virtual_table) + 0x100; + + SECTION_data (iram, ALIGN (0x10), FOLLOWING (.gcc_except_table)) + SECTION_sbss (iram, ALIGN (0x4), LMA_EQ_VMA) + + . = 0x1000000; + + SECTION_bss (ram, ALIGN (0x10), LMA_EQ_VMA) + + CYG_LABEL_DEFN(__heap1) = ALIGN(0x8); + + SECTIONS_END +}
new file mode 100644 --- /dev/null +++ b/packages/hal/powerpc/ec555/current/include/pkgconf/mlt_powerpc_ec555_f08_s04_ram.h @@ -0,0 +1,54 @@ +// eCos memory layout - Fri Oct 20 10:25:48 2000 + +// This is a generated file - do not edit + +#ifndef __ASSEMBLER__ +#include <cyg/infra/cyg_type.h> +#include <stddef.h> +#endif + +#define CYGMEM_REGION_rom (0x000000) +#define CYGMEM_REGION_rom_SIZE (0x06ffff) +#define CYGMEM_REGION_rom_ATTR (CYGMEM_REGION_ATTR_RO) + +#define CYGMEM_REGION_ram (0x1000000) +#define CYGMEM_REGION_ram_SIZE (0x3fffff) +#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W) + +#define CYGMEM_REGION_iram (0x3f9800) +#define CYGMEM_REGION_iram_SIZE (0x006800) +#define CYGMEM_REGION_iram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W) + +#define CYGMEM_REGION_eflash (0x2000000) +#define CYGMEM_REGION_eflash_SIZE (0x7fffff) +#define CYGMEM_REGION_eflash_ATTR (CYGMEM_REGION_ATTR_RO) + +#ifndef __ASSEMBLER__ +extern char CYG_LABEL_NAME (__reserved_vectors) []; +#endif +#define CYGMEM_SECTION_reserved_vectors (CYG_LABEL_NAME (__reserved_vectors)) +#define CYGMEM_SECTION_reserved_vectors_SIZE (0x2000) + +#ifndef __ASSEMBLER__ +extern char CYG_LABEL_NAME (__reserved_vsr_table) []; +#endif +#define CYGMEM_SECTION_reserved_vsr_table (CYG_LABEL_NAME (__reserved_vsr_table)) +#define CYGMEM_SECTION_reserved_vsr_table_SIZE (0x200) + +#ifndef __ASSEMBLER__ +extern char CYG_LABEL_NAME (__reserved_virtual_table) []; +#endif +#define CYGMEM_SECTION_reserved_virtual_table (CYG_LABEL_NAME (__reserved_virtual_table)) +#define CYGMEM_SECTION_reserved_virtual_table_SIZE (0x100) + +#ifndef __ASSEMBLER__ +extern char CYG_LABEL_NAME (__reserved_for_rom) []; +#endif +#define CYGMEM_SECTION_reserved_for_rom (CYG_LABEL_NAME (__reserved_for_rom)) +#define CYGMEM_SECTION_reserved_for_rom_SIZE (0x10000) + +#ifndef __ASSEMBLER__ +extern char CYG_LABEL_NAME (__heap1) []; +#endif +#define CYGMEM_SECTION_heap1 (CYG_LABEL_NAME (__heap1)) +#define CYGMEM_SECTION_heap1_SIZE (0x1400000 - (size_t) CYG_LABEL_NAME (__heap1))
new file mode 100644 --- /dev/null +++ b/packages/hal/powerpc/ec555/current/include/pkgconf/mlt_powerpc_ec555_f08_s04_ram.ldi @@ -0,0 +1,37 @@ + +#include <cyg/infra/cyg_type.inc> + +MEMORY +{ + rom : ORIGIN = 0x00000000, LENGTH = 0x0006ffff /* internal flash */ + ram(WA) : ORIGIN = 0x01000000, LENGTH = 0x003fffff /* external RAM */ + iram(WA) : ORIGIN = 0x003f9800, LENGTH = 0x00006800 /* internal RAM */ + eflash(RXIW) : ORIGIN = 0x02000000, LENGTH = 0x007fffff /* external FLASH */ +} + +SECTIONS +{ + SECTIONS_BEGIN + CYG_LABEL_DEFN(__reserved_vectors) = 0x00000000; + + . = 0x3f9800; + CYG_LABEL_DEFN(__reserved_vsr_table) = ALIGN (0x10); + . = CYG_LABEL_DEFN(__reserved_vsr_table) + 0x200; + CYG_LABEL_DEFN(__reserved_virtual_table) = ALIGN (0x10); + . = 0x01000000; + CYG_LABEL_DEFN(__reserved_for_rom) = ALIGN (0x10); + . = CYG_LABEL_DEFN(__reserved_for_rom) + 0x10000; + + SECTION_vectors (ram, 0x01010000, LMA_EQ_VMA) + SECTION_text (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_fini (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_rodata1 (ram, ALIGN (0x8), LMA_EQ_VMA) + SECTION_rodata (ram, ALIGN (0x8), LMA_EQ_VMA) + SECTION_fixup (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_gcc_except_table (ram, ALIGN (0x1), LMA_EQ_VMA) + SECTION_data (ram, ALIGN (0x8), LMA_EQ_VMA) + SECTION_sbss (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_bss (ram, ALIGN (0x10), LMA_EQ_VMA) + CYG_LABEL_DEFN(__heap1) = ALIGN (0x8); + SECTIONS_END +}
new file mode 100644 --- /dev/null +++ b/packages/hal/powerpc/ec555/current/include/pkgconf/mlt_powerpc_ec555_f08_s04_rom.h @@ -0,0 +1,48 @@ +// eCos memory layout - Fri Oct 20 10:25:48 2000 + +// This is a generated file - do not edit + +#ifndef __ASSEMBLER__ +#include <cyg/infra/cyg_type.h> +#include <stddef.h> +#endif + +#define CYGMEM_REGION_rom (0x000000) +#define CYGMEM_REGION_rom_SIZE (0x06ffff) +#define CYGMEM_REGION_rom_ATTR (CYGMEM_REGION_ATTR_RO) + +#define CYGMEM_REGION_ram (0x1000000) +#define CYGMEM_REGION_ram_SIZE (0x3fffff) +#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W) + +#define CYGMEM_REGION_iram (0x3f9800) +#define CYGMEM_REGION_iram_SIZE (0x006800) +#define CYGMEM_REGION_iram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W) + +#define CYGMEM_REGION_eflash (0x2000000) +#define CYGMEM_REGION_eflash_SIZE (0x7fffff) +#define CYGMEM_REGION_eflash_ATTR (CYGMEM_REGION_ATTR_RO) + +#ifndef __ASSEMBLER__ +extern char CYG_LABEL_NAME (__reserved_vectors) []; +#endif +#define CYGMEM_SECTION_reserved_vectors (CYG_LABEL_NAME (__reserved_vectors)) +#define CYGMEM_SECTION_reserved_vectors_SIZE (0x2000) + +#ifndef __ASSEMBLER__ +extern char CYG_LABEL_NAME (__reserved_vsr_table) []; +#endif +#define CYGMEM_SECTION_reserved_vsr_table (CYG_LABEL_NAME (__reserved_vsr_table)) +#define CYGMEM_SECTION_reserved_vsr_table_SIZE (0x200) + +#ifndef __ASSEMBLER__ +extern char CYG_LABEL_NAME (__reserved_virtual_table) []; +#endif +#define CYGMEM_SECTION_reserved_virtual_table (CYG_LABEL_NAME (__reserved_virtual_table)) +#define CYGMEM_SECTION_reserved_virtual_table_SIZE (0x100) + +#ifndef __ASSEMBLER__ +extern char CYG_LABEL_NAME (__heap1) []; +#endif +#define CYGMEM_SECTION_heap1 (CYG_LABEL_NAME (__heap1)) +#define CYGMEM_SECTION_heap1_SIZE (0x1400000 - (size_t) CYG_LABEL_NAME (__heap1))
new file mode 100644 --- /dev/null +++ b/packages/hal/powerpc/ec555/current/include/pkgconf/mlt_powerpc_ec555_f08_s04_rom.ldi @@ -0,0 +1,42 @@ + +#include <cyg/infra/cyg_type.inc> + +MEMORY +{ + rom : ORIGIN = 0x00000000, LENGTH = 0x0006ffff /* internal flash */ + ram(WA) : ORIGIN = 0x01000000, LENGTH = 0x003fffff /* external RAM */ + iram(WA) : ORIGIN = 0x003f9800, LENGTH = 0x00006800 /* internal RAM */ + eflash(RXIW) : ORIGIN = 0x02000000, LENGTH = 0x007fffff /* external FLASH */ +} + +SECTIONS +{ + SECTIONS_BEGIN + + CYG_LABEL_DEFN(__reserved_vectors) = 0x00000000; + + SECTION_vectors (rom, 0x00000000, LMA_EQ_VMA) + SECTION_text (rom, ALIGN (0x4), LMA_EQ_VMA) + SECTION_fini (rom, ALIGN (0x8), LMA_EQ_VMA) + SECTION_rodata1 (rom, ALIGN (0x8), LMA_EQ_VMA) + SECTION_rodata (rom, ALIGN (0x4), LMA_EQ_VMA) + SECTION_fixup (rom, ALIGN (0x4), LMA_EQ_VMA) + SECTION_gcc_except_table (rom, ALIGN (0x1), LMA_EQ_VMA) + + . = 0x3f9800; + CYG_LABEL_DEFN(__reserved_vsr_table) = ALIGN (0x10); + . = CYG_LABEL_DEFN(__reserved_vsr_table) + 0x200; + CYG_LABEL_DEFN(__reserved_virtual_table) = ALIGN (0x10); + . = CYG_LABEL_DEFN(__reserved_virtual_table) + 0x100; + + SECTION_data (iram, ALIGN (0x10), FOLLOWING (.gcc_except_table)) + SECTION_sbss (iram, ALIGN (0x4), LMA_EQ_VMA) + + . = 0x1000000; + + SECTION_bss (ram, ALIGN (0x10), LMA_EQ_VMA) + + CYG_LABEL_DEFN(__heap1) = ALIGN(0x8); + + SECTIONS_END +}
new file mode 100644 --- /dev/null +++ b/packages/hal/powerpc/ec555/current/include/pkgconf/mlt_powerpc_ec555_f08_s08_ram.h @@ -0,0 +1,54 @@ +// eCos memory layout - Fri Oct 20 10:25:48 2000 + +// This is a generated file - do not edit + +#ifndef __ASSEMBLER__ +#include <cyg/infra/cyg_type.h> +#include <stddef.h> +#endif + +#define CYGMEM_REGION_rom (0x000000) +#define CYGMEM_REGION_rom_SIZE (0x06ffff) +#define CYGMEM_REGION_rom_ATTR (CYGMEM_REGION_ATTR_RO) + +#define CYGMEM_REGION_ram (0x1000000) +#define CYGMEM_REGION_ram_SIZE (0x7fffff) +#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W) + +#define CYGMEM_REGION_iram (0x3f9800) +#define CYGMEM_REGION_iram_SIZE (0x006800) +#define CYGMEM_REGION_iram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W) + +#define CYGMEM_REGION_eflash (0x2000000) +#define CYGMEM_REGION_eflash_SIZE (0xffffff) +#define CYGMEM_REGION_eflash_ATTR (CYGMEM_REGION_ATTR_RO) + +#ifndef __ASSEMBLER__ +extern char CYG_LABEL_NAME (__reserved_vectors) []; +#endif +#define CYGMEM_SECTION_reserved_vectors (CYG_LABEL_NAME (__reserved_vectors)) +#define CYGMEM_SECTION_reserved_vectors_SIZE (0x2000) + +#ifndef __ASSEMBLER__ +extern char CYG_LABEL_NAME (__reserved_vsr_table) []; +#endif +#define CYGMEM_SECTION_reserved_vsr_table (CYG_LABEL_NAME (__reserved_vsr_table)) +#define CYGMEM_SECTION_reserved_vsr_table_SIZE (0x200) + +#ifndef __ASSEMBLER__ +extern char CYG_LABEL_NAME (__reserved_virtual_table) []; +#endif +#define CYGMEM_SECTION_reserved_virtual_table (CYG_LABEL_NAME (__reserved_virtual_table)) +#define CYGMEM_SECTION_reserved_virtual_table_SIZE (0x100) + +#ifndef __ASSEMBLER__ +extern char CYG_LABEL_NAME (__reserved_for_rom) []; +#endif +#define CYGMEM_SECTION_reserved_for_rom (CYG_LABEL_NAME (__reserved_for_rom)) +#define CYGMEM_SECTION_reserved_for_rom_SIZE (0x10000) + +#ifndef __ASSEMBLER__ +extern char CYG_LABEL_NAME (__heap1) []; +#endif +#define CYGMEM_SECTION_heap1 (CYG_LABEL_NAME (__heap1)) +#define CYGMEM_SECTION_heap1_SIZE (0x1800000 - (size_t) CYG_LABEL_NAME (__heap1))
new file mode 100644 --- /dev/null +++ b/packages/hal/powerpc/ec555/current/include/pkgconf/mlt_powerpc_ec555_f08_s08_ram.ldi @@ -0,0 +1,37 @@ + +#include <cyg/infra/cyg_type.inc> + +MEMORY +{ + rom : ORIGIN = 0x00000000, LENGTH = 0x0006ffff /* internal flash */ + ram(WA) : ORIGIN = 0x01000000, LENGTH = 0x007fffff /* external RAM */ + iram(WA) : ORIGIN = 0x003f9800, LENGTH = 0x00006800 /* internal RAM */ + eflash(RXIW) : ORIGIN = 0x02000000, LENGTH = 0x00ffffff /* external FLASH */ +} + +SECTIONS +{ + SECTIONS_BEGIN + CYG_LABEL_DEFN(__reserved_vectors) = 0x00000000; + + . = 0x3f9800; + CYG_LABEL_DEFN(__reserved_vsr_table) = ALIGN (0x10); + . = CYG_LABEL_DEFN(__reserved_vsr_table) + 0x200; + CYG_LABEL_DEFN(__reserved_virtual_table) = ALIGN (0x10); + . = 0x01000000; + CYG_LABEL_DEFN(__reserved_for_rom) = ALIGN (0x10); + . = CYG_LABEL_DEFN(__reserved_for_rom) + 0x10000; + + SECTION_vectors (ram, 0x01010000, LMA_EQ_VMA) + SECTION_text (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_fini (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_rodata1 (ram, ALIGN (0x8), LMA_EQ_VMA) + SECTION_rodata (ram, ALIGN (0x8), LMA_EQ_VMA) + SECTION_fixup (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_gcc_except_table (ram, ALIGN (0x1), LMA_EQ_VMA) + SECTION_data (ram, ALIGN (0x8), LMA_EQ_VMA) + SECTION_sbss (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_bss (ram, ALIGN (0x10), LMA_EQ_VMA) + CYG_LABEL_DEFN(__heap1) = ALIGN (0x8); + SECTIONS_END +}
new file mode 100644 --- /dev/null +++ b/packages/hal/powerpc/ec555/current/include/pkgconf/mlt_powerpc_ec555_f08_s08_rom.h @@ -0,0 +1,48 @@ +// eCos memory layout - Fri Oct 20 10:25:48 2000 + +// This is a generated file - do not edit + +#ifndef __ASSEMBLER__ +#include <cyg/infra/cyg_type.h> +#include <stddef.h> +#endif + +#define CYGMEM_REGION_rom (0x000000) +#define CYGMEM_REGION_rom_SIZE (0x06ffff) +#define CYGMEM_REGION_rom_ATTR (CYGMEM_REGION_ATTR_RO) + +#define CYGMEM_REGION_ram (0x1000000) +#define CYGMEM_REGION_ram_SIZE (0x7fffff) +#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W) + +#define CYGMEM_REGION_iram (0x3f9800) +#define CYGMEM_REGION_iram_SIZE (0x006800) +#define CYGMEM_REGION_iram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W) + +#define CYGMEM_REGION_eflash (0x2000000) +#define CYGMEM_REGION_eflash_SIZE (0xffffff) +#define CYGMEM_REGION_eflash_ATTR (CYGMEM_REGION_ATTR_RO) + +#ifndef __ASSEMBLER__ +extern char CYG_LABEL_NAME (__reserved_vectors) []; +#endif +#define CYGMEM_SECTION_reserved_vectors (CYG_LABEL_NAME (__reserved_vectors)) +#define CYGMEM_SECTION_reserved_vectors_SIZE (0x2000) + +#ifndef __ASSEMBLER__ +extern char CYG_LABEL_NAME (__reserved_vsr_table) []; +#endif +#define CYGMEM_SECTION_reserved_vsr_table (CYG_LABEL_NAME (__reserved_vsr_table)) +#define CYGMEM_SECTION_reserved_vsr_table_SIZE (0x200) + +#ifndef __ASSEMBLER__ +extern char CYG_LABEL_NAME (__reserved_virtual_table) []; +#endif +#define CYGMEM_SECTION_reserved_virtual_table (CYG_LABEL_NAME (__reserved_virtual_table)) +#define CYGMEM_SECTION_reserved_virtual_table_SIZE (0x100) + +#ifndef __ASSEMBLER__ +extern char CYG_LABEL_NAME (__heap1) []; +#endif +#define CYGMEM_SECTION_heap1 (CYG_LABEL_NAME (__heap1)) +#define CYGMEM_SECTION_heap1_SIZE (0x1800000 - (size_t) CYG_LABEL_NAME (__heap1))
new file mode 100644 --- /dev/null +++ b/packages/hal/powerpc/ec555/current/include/pkgconf/mlt_powerpc_ec555_f08_s08_rom.ldi @@ -0,0 +1,42 @@ + +#include <cyg/infra/cyg_type.inc> + +MEMORY +{ + rom : ORIGIN = 0x00000000, LENGTH = 0x0006ffff /* internal flash */ + ram(WA) : ORIGIN = 0x01000000, LENGTH = 0x007fffff /* external RAM */ + iram(WA) : ORIGIN = 0x003f9800, LENGTH = 0x00006800 /* internal RAM */ + eflash(RXIW) : ORIGIN = 0x02000000, LENGTH = 0x00ffffff /* external FLASH */ +} + +SECTIONS +{ + SECTIONS_BEGIN + + CYG_LABEL_DEFN(__reserved_vectors) = 0x00000000; + + SECTION_vectors (rom, 0x00000000, LMA_EQ_VMA) + SECTION_text (rom, ALIGN (0x4), LMA_EQ_VMA) + SECTION_fini (rom, ALIGN (0x8), LMA_EQ_VMA) + SECTION_rodata1 (rom, ALIGN (0x8), LMA_EQ_VMA) + SECTION_rodata (rom, ALIGN (0x4), LMA_EQ_VMA) + SECTION_fixup (rom, ALIGN (0x4), LMA_EQ_VMA) + SECTION_gcc_except_table (rom, ALIGN (0x1), LMA_EQ_VMA) + + . = 0x3f9800; + CYG_LABEL_DEFN(__reserved_vsr_table) = ALIGN (0x10); + . = CYG_LABEL_DEFN(__reserved_vsr_table) + 0x200; + CYG_LABEL_DEFN(__reserved_virtual_table) = ALIGN (0x10); + . = CYG_LABEL_DEFN(__reserved_virtual_table) + 0x100; + + SECTION_data (iram, ALIGN (0x10), FOLLOWING (.gcc_except_table)) + SECTION_sbss (iram, ALIGN (0x4), LMA_EQ_VMA) + + . = 0x1000000; + + SECTION_bss (ram, ALIGN (0x10), LMA_EQ_VMA) + + CYG_LABEL_DEFN(__heap1) = ALIGN(0x8); + + SECTIONS_END +}
--- a/packages/hal/powerpc/ec555/current/src/ec555.S +++ b/packages/hal/powerpc/ec555/current/src/ec555.S @@ -65,11 +65,41 @@ ## The following probably belongs in the variant hal rather than the board specifics ... #ifdef CYGPKG_DEVICES_WATCHDOG_MPC5xx #include <pkgconf/devices_watchdog_mpc5xx.h> -#define CYG_SYPCR 0x0000ff8d | (CYGNUM_DEVICES_WATCHDOG_POWERPC_MPC5XX_RELOAD << 16) | CYGDAT_DEVICES_WATCHDOG_POWERPC_MPC5XX_PRESCALE +#define CYG_SYPCR 0x0000ff8e | (CYGNUM_DEVICES_WATCHDOG_POWERPC_MPC5XX_RELOAD << 16) | CYGDAT_DEVICES_WATCHDOG_POWERPC_MPC5XX_PRESCALE #else #define CYG_SYPCR 0x0000ff88 #endif +#define ADDRESS_MASK_1MB 0xfff00000 +#define ADDRESS_MASK_2MB 0xffe00000 +#define ADDRESS_MASK_4MB 0xffc00000 +#define ADDRESS_MASK_8MB 0xff800000 +#define ADDRESS_MASK_16MB 0xff000000 + +#define EC555_RAM_BASE_ADDRESS 0x01000000 +#define EC555_FLASH_BASE_ADDRESS 0x02000000 +#define EC555_CS2_BASE_ADDRESS 0x04000000 +#define EC555_CS3_BASE_ADDRESS 0x08000000 + +#if defined(CYGHWR_HAL_EC555_BOARD_VARIANT_F02_S01) +#define EC555_RAM_ADDRESS_MASK ADDRESS_MASK_1MB +#define EC555_FLASH_ADDRESS_MASK ADDRESS_MASK_2MB +#elif defined(CYGHWR_HAL_EC555_BOARD_VARIANT_F04_S02) +#define EC555_RAM_ADDRESS_MASK ADDRESS_MASK_2MB +#define EC555_FLASH_ADDRESS_MASK ADDRESS_MASK_4MB +#elif defined(CYGHWR_HAL_EC555_BOARD_VARIANT_F08_S04) +#define EC555_RAM_ADDRESS_MASK ADDRESS_MASK_4MB +#define EC555_FLASH_ADDRESS_MASK ADDRESS_MASK_8MB +#elif defined(CYGHWR_HAL_EC555_BOARD_VARIANT_F08_S08) +#define EC555_RAM_ADDRESS_MASK ADDRESS_MASK_8MB +#define EC555_FLASH_ADDRESS_MASK ADDRESS_MASK_16MB +#else +#error "EC555 Board variant unspecified" +#endif + +#define EC555_CS2_ADDRESS_MASK 0xffff8000 +#define EC555_CS3_ADDRESS_MASK 0xffff8000 + #------------------------------------------------------------------------------ .globl hal_hardware_init @@ -118,43 +148,53 @@ hal_hardware_init: // Set up the memory map // Do NOT write protect the flash memory, flash drivers won't work // if we do - lwi r4, 0x00800003 + + // flash banks + lwi r4, (EC555_FLASH_BASE_ADDRESS | 0x00000003) stw r4, (CYGARC_REG_IMM_BR0-CYGARC_REG_IMM_BASE)(r3) - lwi r4, 0xffc00530 + lwi r4, (EC555_FLASH_ADDRESS_MASK | 0x00000530) stw r4, (CYGARC_REG_IMM_OR0-CYGARC_REG_IMM_BASE)(r3) - lwi r4, 0x00400011 + + // ram banks + lwi r4, (EC555_RAM_BASE_ADDRESS | 0x00000011) stw r4, (CYGARC_REG_IMM_BR1-CYGARC_REG_IMM_BASE)(r3) - lwi r4, 0xfff00000 + lwi r4, (EC555_RAM_ADDRESS_MASK | 0x00000000) stw r4, (CYGARC_REG_IMM_OR1-CYGARC_REG_IMM_BASE)(r3) #endif #ifdef CYGPKG_DEVS_ETH_POWERPC_EC555 - - lwi r4, (CYGNUM_DEVS_ETH_POWERPC_EC555_ETH0_BASE & 0xffff0000) | 0x00000803 #if (CYGNUM_DEVS_ETH_POWERPC_EC555_ETH0_CS == 2) + lwi r4, (EC555_CS2_BASE_ADDRESS | 0x00000803) stw r4, (CYGARC_REG_IMM_BR2-CYGARC_REG_IMM_BASE)(r3) lwi r4, 0xffff8e60 stw r4, (CYGARC_REG_IMM_OR2-CYGARC_REG_IMM_BASE)(r3) - lwi r4, 0 + + lwi r4, EC555_CS3_BASE_ADDRESS stw r4, (CYGARC_REG_IMM_BR3-CYGARC_REG_IMM_BASE)(r3) + lwi r4, EC555_CS3_ADDRESS_MASK + stw r4, (CYGARC_REG_IMM_OR3-CYGARC_REG_IMM_BASE)(r3) #elif (CYGNUM_DEVS_ETH_POWERPC_EC555_ETH0_CS == 3) + lwi r4, EC555_CS2_BASE_ADDRESS + stw r4, (CYGARC_REG_IMM_BR2-CYGARC_REG_IMM_BASE)(r3) + lwi r4, EC555_CS2_ADDRESS_MASK + stw r4, (CYGARC_REG_IMM_OR2-CYGARC_REG_IMM_BASE)(r3) + + lwi r4, (EC555_CS3_BASE_ADDRESS | 0x00000803) stw r4, (CYGARC_REG_IMM_BR3-CYGARC_REG_IMM_BASE)(r3) lwi r4, 0xffff8e60 stw r4, (CYGARC_REG_IMM_OR3-CYGARC_REG_IMM_BASE)(r3) - lwi r4, 0 - stw r4, (CYGARC_REG_IMM_BR2-CYGARC_REG_IMM_BASE)(r3) #else #error "Invalid chip select for ethernet card specified" #endif - #else - lwi r4, 0x00c00000 + lwi r4, EC555_CS2_BASE_ADDRESS stw r4, (CYGARC_REG_IMM_BR2-CYGARC_REG_IMM_BASE)(r3) - lwi r4, 0xffff8000 + lwi r4, EC555_CS2_ADDRESS_MASK stw r4, (CYGARC_REG_IMM_OR2-CYGARC_REG_IMM_BASE)(r3) - lwi r4, 0x00e00000 + + lwi r4, EC555_CS3_BASE_ADDRESS stw r4, (CYGARC_REG_IMM_BR3-CYGARC_REG_IMM_BASE)(r3) - lwi r4, 0xffff8000 + lwi r4, EC555_CS3_ADDRESS_MASK stw r4, (CYGARC_REG_IMM_OR3-CYGARC_REG_IMM_BASE)(r3) #endif @@ -167,8 +207,8 @@ hal_hardware_init: lwi r4, 0 stw r4, (CYGARC_REG_IMM_DMOR-CYGARC_REG_IMM_BASE)(r3) - // Enable the time base and set the freeze flag - lwi r4, 0xc3 + // Enable the time base, but do _not_ set the freeze flag + lwi r4, 0xc1 sth r4, (CYGARC_REG_IMM_TBSCR-CYGARC_REG_IMM_BASE)(r3) // RTC is clocked by 4MHz crystal, set the freeze flag