Mercurial > ecos
changeset 3137:25656c49d55e
* ecos.db: Add Kinetis KwikStik platform HAL and target definition.
* hal/cortexm/kinetis/var/current/include/var_io.h: Allow platform overrides.
* hal/cortexm/kinetis/var/current/include/var_io_devs.h: Add K40 SLCD base.
* hal/cortexm/kinetis/kwikstik/current/*: New KwikStik platform HAL package.
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--- a/packages/ChangeLog +++ b/packages/ChangeLog @@ -1,13 +1,18 @@ +2012-03-30 John Dallaway <john@dallaway.org.uk> + + * NEWS, ecos.db: Add Freescale KwikStik HAL package and target. + Patch from Tomas Frydrych. + 2012-03-12 Christophe Coutand <ecos@hotmail.co.uk> - ecos.db: Add Actel SmartFusion A2Fvvv variant HAL, board support - package for Actel A2F200 inluding Actel serial, ethernet, spi and - i2c drivers as well as spi flash driver. + * ecos.db: Add Actel SmartFusion A2Fvvv variant HAL, board support + package for Actel A2F200 inluding Actel serial, ethernet, spi and + i2c drivers as well as spi flash driver. 2012-02-22 Ilija Kocho <ilijak@siva.com.mk> - ecos.db: Add TWR-K60N512-FXM, Freescale DSPI driver, - Freescale EDMA library, Micron CellularRAM support. + * ecos.db: Add TWR-K60N512-FXM, Freescale DSPI driver, + Freescale EDMA library, Micron CellularRAM support. 2011-10-30 Ilija Kocho <ilijak@siva.com.mk>
--- a/packages/NEWS +++ b/packages/NEWS @@ -1,3 +1,5 @@ +* Freescale KwikStik platform HAL by Tomas Frydrych. +* Actel SmartFusion variant HAL and BSP by Christophe Coutand. * Freescale Kinetis variant HAL and BSP for TWR-K60N512 and TWR-K40X256 including Freescale UART and Ethernet drivers by Ilija Kocho. * SPI flash driver for Silicon Storage Technology (SST25xx devices)
--- a/packages/ecos.db +++ b/packages/ecos.db @@ -10,7 +10,7 @@ ## ####ECOSGPLCOPYRIGHTBEGIN#### ## ------------------------------------------- ## This file is part of eCos, the Embedded Configurable Operating System. -## Copyright (C) 1998, 1999, 2000, 2001, 2002, 2004, 2005, 2008, 2009, 2010, 2011 Free Software Foundation, Inc. +## Copyright (C) 1998, 1999, 2000, 2001, 2002, 2004, 2005, 2008, 2009, 2010, 2011, 2012 Free Software Foundation, Inc. ## ## eCos is free software; you can redistribute it and/or modify it under ## the terms of the GNU General Public License as published by the Free @@ -5829,6 +5829,7 @@ target linux { CYGPKG_DEVS_WALLCLOCK_SYNTH CYGPKG_DEVS_FRAMEBUF_SYNTH CYGPKG_DEVS_ADC_SYNTH + CYGPKG_DEVS_DISK_ECOSYNTH } description " The linux target provides the @@ -7164,7 +7165,7 @@ target ek-lm3s811 { } target lpc1766stk { - alias { "Olimex LPC-1766-STK" lpc1766stk } + alias { "Olimex LPC-1766-STK" } packages { CYGPKG_HAL_CORTEXM CYGPKG_HAL_CORTEXM_LPC17XX CYGPKG_HAL_CORTEXM_LPC17XX_LPC1766STK @@ -7230,6 +7231,16 @@ package CYGPKG_HAL_CORTEXM_KINETIS_TWR_K eCos on the Freescale Tower development system equpped with TWR-FXM module." } +package CYGPKG_HAL_CORTEXM_KINETIS_KWIKSTIK { + alias { "Freescale KwikStik HAL" hal_cortexm_kwikstik } + directory hal/cortexm/kinetis/kwikstik + script hal_cortexm_kinetis_kwikstik.cdl + hardware + description " + The KwikStik HAL package provides the support needed to run + eCos on the Freescale KwikStik development board." +} + target freescale_twr_k60n512 { alias { "Freescale Kinetis TWR-K60N512" twr_k60n512 } packages { CYGPKG_HAL_CORTEXM @@ -7268,6 +7279,19 @@ target freescale_twr_k40x256 { to run eCos on the Freescale TWR-K40X256 development system." } +target freescale_kwikstik { + alias { "Freescale Kinetis KwikStik" kwikstik } + packages { CYGPKG_HAL_CORTEXM + CYGPKG_HAL_CORTEXM_KINETIS + CYGPKG_HAL_CORTEXM_KINETIS_KWIKSTIK + CYGPKG_IO_SERIAL_FREESCALE_UART_HDR + CYGPKG_IO_SERIAL_FREESCALE_UART + CYGPKG_DEVICES_WALLCLOCK_KINETIS_RTC + } + description "The freescale_kwikstik target provides the packages needed + to run eCos on the Freescale KwikStik development board." +} + target freescale_twr_k60n512_fxm { alias { "Freescale Kinetis TWR-K60N512-FXM" twr_k60n512_fxm } packages { CYGPKG_HAL_CORTEXM
new file mode 100644 --- /dev/null +++ b/packages/hal/cortexm/kinetis/kwikstik/current/ChangeLog @@ -0,0 +1,32 @@ +2011-12-15 Tomas Frydrych <tomas@sleepfive.com> + + * cdl/hal_cortexm_kinetis_kwikstik.cdl: + * include/plf_arch.h: + * include/plf_intr.h: + * include/plf_io.h: + * src/kwikstik_misc.c: + New package -- Freescale Kwikstik board, based on twr_k40x256 board. + +//=========================================================================== +// ####GPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 2011, 2012 Free Software Foundation, Inc. +// +// This program is free software; you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation; either version 2 or (at your option) any +// later version. +// +// This program is distributed in the hope that it will be useful, but +// WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +// General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program; if not, write to the +// Free Software Foundation, Inc., 51 Franklin Street, +// Fifth Floor, Boston, MA 02110-1301, USA. +// ------------------------------------------- +// ####GPLCOPYRIGHTEND#### +//===========================================================================
new file mode 100644 --- /dev/null +++ b/packages/hal/cortexm/kinetis/kwikstik/current/cdl/hal_cortexm_kinetis_kwikstik.cdl @@ -0,0 +1,294 @@ +##========================================================================== +## +## hal_cortexm_kinetis_kwikstik.cdl +## +## Cortex-M Freescale KwikStik platform HAL configuration data +## +##========================================================================== +## ####ECOSGPLCOPYRIGHTBEGIN#### +## ------------------------------------------- +## This file is part of eCos, the Embedded Configurable Operating System. +## Copyright (C) 2011, 2012 Free Software Foundation, Inc. +## +## eCos is free software; you can redistribute it and/or modify it under +## the terms of the GNU General Public License as published by the Free +## Software Foundation; either version 2 or (at your option) any later +## version. +## +## eCos is distributed in the hope that it will be useful, but WITHOUT +## ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +## for more details. +## +## You should have received a copy of the GNU General Public License +## along with eCos; if not, write to the Free Software Foundation, Inc., +## 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. +## +## As a special exception, if other files instantiate templates or use +## macros or inline functions from this file, or you compile this file +## and link it with other works to produce a work based on this file, +## this file does not by itself cause the resulting work to be covered by +## the GNU General Public License. However the source code for this file +## must still be made available in accordance with section (3) of the GNU +## General Public License v2. +## +## This exception does not invalidate any other reasons why a work based +## on this file might be covered by the GNU General Public License. +## ------------------------------------------- +## ####ECOSGPLCOPYRIGHTEND#### +##========================================================================== +#######DESCRIPTIONBEGIN#### +## +## Author(s): Tomas Frydrych <tomas@sleepfive.com> +## Contributor(s): jld +## Date: 2011-12-15 +## Original: hal_cortexm_kinetis_twr_k40x256.cdl by Ilija Kocho +## +######DESCRIPTIONEND#### +## +##========================================================================== + +cdl_package CYGPKG_HAL_CORTEXM_KINETIS_KWIKSTIK { + display "Freescale Kinetis KwikStik Platform" + parent CYGPKG_HAL_CORTEXM_KINETIS + define_header hal_cortexm_kinetis_kwikstik.h + include_dir cyg/hal + hardware + + requires { is_active(CYGPKG_HAL_FREESCALE_EDMA) implies + (CYGNUM_HAL_FREESCALE_EDMA_CHAN_NUM == 16) } + + requires { CYGHWR_HAL_CORTEXM_KINETIS_SUBFAM == 40 } + requires { CYGHWR_HAL_CORTEXM_SYSTICK_CLK_SOURCE == "INTERNAL" } + requires { CYGOPT_HAL_CORTEXM_KINETIS_MCG_REF_EXT_IS == "XTAL" || + CYGOPT_HAL_CORTEXM_KINETIS_MCG_REF_EXT_IS == "RTC" } + requires { CYGHWR_HAL_CORTEXM_KINETIS_FLEXNVM == 1 } + requires { CYGHWR_HAL_CORTEXM_KINETIS_FLASH_NAME == 256 } + requires { CYGHWR_HAL_KINETIS_FLEXRAM_SIZE == 4096 } + + implements CYGINT_IO_SERIAL_FREESCALE_UART5 + implements CYGINT_HAL_FREESCALE_UART5 + implements CYGINT_HAL_CORTEXM_KINETIS_RTC + + + description " + The Freescale KwikStik Platform HAL package provides + the support needed to run eCos on the KwikStik development + system. This package can also be used for other boards that + employ a controller from Kinetis families." + + compile kwikstik_misc.c + + define_proc { + puts $::cdl_system_header "#define CYGBLD_HAL_PLATFORM_H <pkgconf/hal_cortexm_kinetis_kwikstik.h>" + puts $::cdl_header "#define HAL_PLATFORM_CPU \"Cortex-M4\"" + puts $::cdl_header "#define HAL_PLATFORM_BOARD \"Freescale KwikStik\"" + puts $::cdl_header "#define HAL_PLATFORM_EXTRA \"\"" + } + + cdl_component CYG_HAL_STARTUP_ENV { + display "Startup type" + flavor data + no_define + calculated { + !CYG_HAL_STARTUP_PLF ? CYG_HAL_STARTUP : + ((CYG_HAL_STARTUP_PLF == "ByVariant") ? + (CYG_HAL_STARTUP . "(Variant)") : + (CYG_HAL_STARTUP . "(Platform)")) + } + description " + Startup type configuration defines the system memory layout. + Startup type can be defined by the variant (CYG_HAL_STARTUP_VAR) + or a platform (CYG_HAL_STARTUP_PLF). If CYG_HAL_STARTUP_PLF + is defined and not equal to 'ByVariant' then it shall + override CYG_HAL_STARTUP_VAR." + } + + cdl_option CYGHWR_HAL_CORTEXM_KINETIS_PLF_XTAL_OR_OSC_FREQ { + display "Platform Reference Clock Frequency" + flavor data + parent CYGOPT_HAL_CORTEXM_KINETIS_MCG_REF_EXT + active_if { CYGOPT_HAL_CORTEXM_KINETIS_MCG_REF_EXT_IS == "OSC" || + CYGOPT_HAL_CORTEXM_KINETIS_MCG_REF_EXT_IS == "XTAL" } + default_value 4000000 + legal_values { 32768 4000000 } + } + + cdl_option CYGHWR_HAL_CORTEXM_KINETIS_PLF_OSC_CAP { + display "Platform requred XTAL || C \[pF\]" + flavor bool + default_value { CYGOPT_HAL_CORTEXM_KINETIS_MCG_REF_EXT_IS == "XTAL" } + parent CYGOPT_HAL_CORTEXM_KINETIS_MCG_REF_EXT + active_if { CYGOPT_HAL_CORTEXM_KINETIS_MCG_REF_EXT_IS == "XTAL" } + requires { CYGHWR_HAL_CORTEXM_KINETIS_OSC_CAP == 0 } + } + + cdl_option CYGHWR_HAL_CORTEXM_KINETIS_PLF_RTC { + display "Platform requred RTC XTAL || C \[pF\]" + flavor bool + default_value 0 + parent CYGHWR_HAL_CORTEXM_KINETIS_RTC + requires { CYGHWR_HAL_CORTEXM_KINETIS_RTC_OSC_CAP == 20 } + } + + cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS { + display "Number of communication channels on the board" + flavor data + legal_values 0 to 2 + default_value 1 + } + + cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_DEBUG_CHANNEL { + display "Debug serial port" + active_if CYGPRI_HAL_VIRTUAL_VECTOR_DEBUG_CHANNEL_CONFIGURABLE + flavor data + legal_values 0 to CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS-1 + default_value 0 + description " + The TWR board has one serial port fitted to RS232 connector. + This optionchooses which port will be used to connect to a host + running GDB." + } + + cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL { + display "Diagnostic serial port" + active_if CYGPRI_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_CONFIGURABLE + flavor data + legal_values 0 to CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS-1 + default_value 0 + description " + The TWR has one serial port fitted to RS232 connector. + This option chooses which port will be used for diagnostic output." + } + + cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_BAUD { + display "Console serial port baud rate" + flavor data + legal_values 9600 19200 38400 57600 115200 + default_value 38400 + description " + This option controls the default baud rate used for the + console connection. + Note: this should match the value chosen for the GDB port if the + diagnostic and GDB port are the same." + } + + cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_DEBUG_CHANNEL_BAUD { + display "GDB serial port baud rate" + flavor data + legal_values 9600 19200 38400 57600 115200 + default_value 38400 + description " + This option controls the default baud rate used for the + GDB connection. + Note: this should match the value chosen for the console + port if the console and GDB port are the same." + } + + cdl_component CYGHWR_HAL_DEVS_IRQ_PRIO_SCHEME { + display "Interrupt priority scheme" + flavor none + description "Consolidated interrupt priority scheme setting." + } + + cdl_component CYGBLD_GLOBAL_OPTIONS { + display "Global build options" + flavor none + no_define + parent CYGPKG_NONE + description " + Global build options including control over + compiler flags, linker flags and choice of toolchain." + + + cdl_option CYGBLD_GLOBAL_COMMAND_PREFIX { + display "Global command prefix" + flavor data + no_define + default_value { "arm-eabi" } + description " + This option specifies the command prefix used when + invoking the build tools." + } + + cdl_option CYGBLD_GLOBAL_CFLAGS { + display "Global compiler flags" + flavor data + no_define + default_value { CYGBLD_GLOBAL_WARNFLAGS . "-mcpu=cortex-m3 -mthumb -g -O2 -ffunction-sections -fdata-sections -fno-rtti -fno-exceptions" } + description " + This option controls the global compiler flags which are used to + compile all packages by default. Individual packages may define + options which override these global flags." + } + + cdl_option CYGBLD_GLOBAL_LDFLAGS { + display "Global linker flags" + flavor data + no_define + default_value { "-mcpu=cortex-m3 -mthumb -Wl,--gc-sections -Wl,-static -Wl,-n -g -nostdlib" } + description " + This option controls the global linker flags. Individual + packages may define options which override these global flags." + } + } + + cdl_option CYGSEM_HAL_ROM_MONITOR { + display "Behave as a ROM monitor" + flavor bool + default_value 0 + parent CYGPKG_HAL_ROM_MONITOR + requires { CYG_HAL_STARTUP == "ROM" || CYG_HAL_STARTUP == "JTAG" } + requires { CYGDBG_HAL_CRCTABLE_LOCATION == "ROM" } + description " + Enable this option if this program is to be used as a + ROM monitor, i.e. applications will be loaded into RAM on the + board, and this ROM monitor may process exceptions or interrupts + generated from the application. This enables features such as + utilizing a separate interrupt stack when exceptions are generated." + } + + cdl_option CYGSEM_HAL_USE_ROM_MONITOR { + display "Work with a ROM monitor" + flavor booldata + legal_values { "Generic" "GDB_stubs" } + default_value { CYG_HAL_STARTUP == "RAM" ? "GDB_stubs" : 0 } + parent CYGPKG_HAL_ROM_MONITOR + requires { CYG_HAL_STARTUP == "RAM" } + description " + Support can be enabled for different varieties of ROM monitor. + This support changes various eCos semantics such as the encoding + of diagnostic output, or the overriding of hardware interrupt + vectors. + Firstly there is \"Generic\" support which prevents the HAL + from overriding the hardware vectors that it does not use, to + instead allow an installed ROM monitor to handle them. This is + the most basic support which is likely to be common to most + implementations of ROM monitor. + \"GDB_stubs\" provides support when GDB stubs are included in + the ROM monitor or boot ROM." + } + + + cdl_component CYGBLD_HAL_CORTEXM_KWIKSTIK_GDB_STUBS { + display "Create StubROM SREC and binary files" + active_if CYGBLD_BUILD_COMMON_GDB_STUBS + no_define + calculated 1 + requires { CYG_HAL_STARTUP == "ROM" } + + make -priority 325 { + <PREFIX>/bin/stubrom.srec : <PREFIX>/bin/gdb_module.img + $(OBJCOPY) -O srec $< $@ + } + make -priority 325 { + <PREFIX>/bin/stubrom.bin : <PREFIX>/bin/gdb_module.img + $(OBJCOPY) -O binary $< $@ + } + + description " + This component causes the ELF image generated by the + build process to be converted to S-Record and binary + files." + } +}
new file mode 100644 --- /dev/null +++ b/packages/hal/cortexm/kinetis/kwikstik/current/include/plf_arch.h @@ -0,0 +1,63 @@ +#ifndef CYGONCE_HAL_PLF_ARCH_H +#define CYGONCE_HAL_PLF_ARCH_H +//============================================================================= +// +// plf_arch.h +// +// Platform specific architecture overrides +// +//============================================================================= +// ####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 2011 Free Software Foundation, Inc. +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later +// version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT +// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License +// along with eCos; if not, write to the Free Software Foundation, Inc., +// 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. +// +// As a special exception, if other files instantiate templates or use +// macros or inline functions from this file, or you compile this file +// and link it with other works to produce a work based on this file, +// this file does not by itself cause the resulting work to be covered by +// the GNU General Public License. However the source code for this file +// must still be made available in accordance with section (3) of the GNU +// General Public License v2. +// +// This exception does not invalidate any other reasons why a work based +// on this file might be covered by the GNU General Public License. +// ------------------------------------------- +// ####ECOSGPLCOPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): Tomas Frydrych <tomas@sleepfive.com> +// Original: Cloned from plf_arch.h for twr-k40x256 board by Ilija Kocho +// Date: 2011-12-15 +// Purpose: Kwikstick platform specific architecture overrides +// Description: +// Usage: #include <cyg/hal/plf_arch.h> +// +//####DESCRIPTIONEND#### +// +//============================================================================= + +#include <pkgconf/hal.h> +#include <pkgconf/hal_cortexm_kinetis_kwikstik.h> + + +//============================================================================= + +//----------------------------------------------------------------------------- +// end of plf_arch.h +#endif // CYGONCE_HAL_PLF_ARCH_H
new file mode 100644 --- /dev/null +++ b/packages/hal/cortexm/kinetis/kwikstik/current/include/plf_intr.h @@ -0,0 +1,63 @@ +#ifndef CYGONCE_HAL_PLF_INTR_H +#define CYGONCE_HAL_PLF_INTR_H +//============================================================================= +// +// plf_intr.h +// +// Platform specific interrupt overrides +// +//============================================================================= +// ####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 2011 Free Software Foundation, Inc. +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later +// version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT +// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License +// along with eCos; if not, write to the Free Software Foundation, Inc., +// 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. +// +// As a special exception, if other files instantiate templates or use +// macros or inline functions from this file, or you compile this file +// and link it with other works to produce a work based on this file, +// this file does not by itself cause the resulting work to be covered by +// the GNU General Public License. However the source code for this file +// must still be made available in accordance with section (3) of the GNU +// General Public License v2. +// +// This exception does not invalidate any other reasons why a work based +// on this file might be covered by the GNU General Public License. +// ------------------------------------------- +// ####ECOSGPLCOPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): Tomas Frydrych <tomas@sleepfive.com> +// Original: Cloned from plf_intr.h for twr-k40x256 board by Ilija Kocho +// Date: 2011-12-15 +// Purpose: Kwikstik platform specific interrupt overrides +// Description: +// Usage: #include <cyg/hal/plf_intr.h> +// +//####DESCRIPTIONEND#### +// +//============================================================================= + +#include <pkgconf/hal.h> +#include <pkgconf/hal_cortexm_kinetis_kwikstik.h> + + +//============================================================================= + +//----------------------------------------------------------------------------- +// end of plf_intr.h +#endif // CYGONCE_HAL_PLF_INTR_H
new file mode 100644 --- /dev/null +++ b/packages/hal/cortexm/kinetis/kwikstik/current/include/plf_io.h @@ -0,0 +1,114 @@ +#ifndef CYGONCE_HAL_PLF_IO_H +#define CYGONCE_HAL_PLF_IO_H +//============================================================================= +// +// plf_io.h +// +// Platform specific registers +// +//============================================================================= +// ####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 2011 Free Software Foundation, Inc. +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later +// version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT +// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License +// along with eCos; if not, write to the Free Software Foundation, Inc., +// 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. +// +// As a special exception, if other files instantiate templates or use +// macros or inline functions from this file, or you compile this file +// and link it with other works to produce a work based on this file, +// this file does not by itself cause the resulting work to be covered by +// the GNU General Public License. However the source code for this file +// must still be made available in accordance with section (3) of the GNU +// General Public License v2. +// +// This exception does not invalidate any other reasons why a work based +// on this file might be covered by the GNU General Public License. +// ------------------------------------------- +// ####ECOSGPLCOPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): Tomas Frydrych <tomas@sleepfive.com> +// Original: Based on plf_io.h for twr-k40x256 board by Ilija Kocho +// Date: 2011-12-15 +// Purpose: Kwikstik platform specific registers +// Description: +// Usage: #include <cyg/hal/plf_io.h> +// +//####DESCRIPTIONEND#### +// +//============================================================================= + +#include <pkgconf/hal.h> +#include <pkgconf/hal_cortexm_kinetis_kwikstik.h> + + +// UART PINs + +#ifndef CYGHWR_HAL_FREESCALE_UART5_PIN_RX +# define CYGHWR_HAL_FREESCALE_UART5_PIN_RX CYGHWR_HAL_KINETIS_PIN(E, 9, 3, 0) +# define CYGHWR_HAL_FREESCALE_UART5_PIN_TX CYGHWR_HAL_KINETIS_PIN(E, 8, 3, 0) +# define CYGHWR_HAL_FREESCALE_UART5_PIN_RTS CYGHWR_HAL_KINETIS_PORT_PIN_NONE +# define CYGHWR_HAL_FREESCALE_UART5_PIN_CTS CYGHWR_HAL_KINETIS_PORT_PIN_NONE + +# define CYGHWR_IO_FREESCALE_UART5_PIN_RX CYGHWR_HAL_FREESCALE_UART5_PIN_RX +# define CYGHWR_IO_FREESCALE_UART5_PIN_TX CYGHWR_HAL_FREESCALE_UART5_PIN_TX +# define CYGHWR_IO_FREESCALE_UART5_PIN_RTS CYGHWR_HAL_FREESCALE_UART5_PIN_RTS +# define CYGHWR_IO_FREESCALE_UART5_PIN_CTS CYGHWR_HAL_FREESCALE_UART5_PIN_CTS +#endif + +// LCD +#define CYGHWR_HAL_KINETIS_SIM_SCGC3_SLCD_M 0x40000000 +#define CYGHWR_HAL_KINETIS_SIM_SCGC3_SLCD_S 30 + +#ifndef CYGHWR_HAL_KINETIS_SIM_SCGC3_ALL_M +#define CYGHWR_HAL_KINETIS_SIM_SCGC3_ALL_M \ + (CYGHWR_HAL_KINETIS_SIM_SCGC3_RNGB_M | \ + CYGHWR_HAL_KINETIS_SIM_SCGC3_FLEXCAN1_M | \ + CYGHWR_HAL_KINETIS_SIM_SCGC3_SPI2_M | \ + CYGHWR_HAL_KINETIS_SIM_SCGC3_SDHC_M | \ + CYGHWR_HAL_KINETIS_SIM_SCGC3_FTM2_M | \ + CYGHWR_HAL_KINETIS_SIM_SCGC3_ADC1_M | \ + CYGHWR_HAL_KINETIS_SIM_SCGC3_SLCD_M) +#endif + +// I2C pins +#ifndef CYGHWR_HAL_I2C0_PIN_SDA +# define CYGHWR_HAL_I2C0_PIN_SDA CYGHWR_HAL_KINETIS_PIN(B, 1, 2, 0) +# define CYGHWR_HAL_I2C0_PIN_SCL CYGHWR_HAL_KINETIS_PIN(B, 0, 2, 0) +# define CYGHWR_HAL_I2C1_PIN_SDA CYGHWR_HAL_KINETIS_PIN(C, 11, 2, 0) +# define CYGHWR_HAL_I2C1_PIN_SCL CYGHWR_HAL_KINETIS_PIN(C, 10, 2, 0) +#endif + +//============================================================================= +// Memory access checks. +// +// Accesses to areas not backed by real devices or memory can cause +// the CPU to hang. These macros allow the GDB stubs to avoid making +// accidental accesses to these areas. + +__externC int cyg_hal_stub_permit_data_access( CYG_ADDRESS addr, cyg_uint32 count ); + +#define CYG_HAL_STUB_PERMIT_DATA_READ(_addr_, _count_) cyg_hal_stub_permit_data_access( _addr_, _count_ ) + +#define CYG_HAL_STUB_PERMIT_DATA_WRITE(_addr_, _count_ ) cyg_hal_stub_permit_data_access( _addr_, _count_ ) + +//============================================================================= + + +//----------------------------------------------------------------------------- +// end of plf_io.h +#endif // CYGONCE_HAL_PLF_IO_H
new file mode 100644 --- /dev/null +++ b/packages/hal/cortexm/kinetis/kwikstik/current/src/kwikstik_misc.c @@ -0,0 +1,255 @@ +//========================================================================== +// +// kwikstik_misc.c +// +// Cortex-M4 Kwikstik HAL functions +// +//========================================================================== +// ####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 2011 Free Software Foundation, Inc. +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later +// version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT +// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License +// along with eCos; if not, write to the Free Software Foundation, Inc., +// 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. +// +// As a special exception, if other files instantiate templates or use +// macros or inline functions from this file, or you compile this file +// and link it with other works to produce a work based on this file, +// this file does not by itself cause the resulting work to be covered by +// the GNU General Public License. However the source code for this file +// must still be made available in accordance with section (3) of the GNU +// General Public License v2. +// +// This exception does not invalidate any other reasons why a work based +// on this file might be covered by the GNU General Public License. +// ------------------------------------------- +// ####ECOSGPLCOPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): Tomas Frydrych <tomas@sleepfive.com> +// Original: Cloned from twr_k40x256_misc.c by Ilija Kocho +// Date: 2011-12-15 +// Description: Miscellaneous code for platform hal. +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#include <pkgconf/hal.h> +#include <pkgconf/hal_cortexm.h> +#include <pkgconf/hal_cortexm_kinetis.h> +#include <pkgconf/hal_cortexm_kinetis_kwikstik.h> +#ifdef CYGPKG_KERNEL +#include <pkgconf/kernel.h> +#endif + +#include <cyg/infra/diag.h> +#include <cyg/infra/cyg_type.h> +#include <cyg/infra/cyg_trac.h> // tracing macros +#include <cyg/infra/cyg_ass.h> // assertion macros + +#include <cyg/hal/hal_arch.h> // HAL header +#include <cyg/hal/hal_intr.h> // HAL header + +static inline void hal_gpio_init(void); + +// DATA and BSS locations +__externC cyg_uint32 __ram_data_start; +__externC cyg_uint32 __ram_data_end; +__externC cyg_uint32 __rom_data_start; +__externC cyg_uint32 __sram_data_start; +__externC cyg_uint32 __sram_data_end; +__externC cyg_uint32 __srom_data_start; +__externC cyg_uint32 __bss_start; +__externC cyg_uint32 __bss_end; + + +//========================================================================== +// System init +// +// This is run to set up the basic system, including GPIO setting, +// clock feeds, power supply, and memory initialization. This code +// runs before the DATA is copied from ROM and the BSS cleared, hence +// it cannot make use of static variables or data tables. + +__externC void CYGOPT_HAL_KINETIS_MISC_FLASH_SECTION_ATTR +hal_system_init( void ) +{ +#if defined(CYG_HAL_STARTUP_ROM) || defined(CYG_HAL_STARTUP_SRAM) + hal_wdog_disable(); + hal_gpio_init(); + hal_start_clocks(); +#endif +#if defined(CYG_HAL_STARTUP_SRAM) && !defined(CYGHWR_HAL_CORTEXM_KINETIS_SRAM_UNIFIED) + // Note: For CYG_HAL_STARTUP_SRAM, the SRAM_L bank simulates ROM + // Relocate data from ROM to RAM + { + register cyg_uint32 *ram_p, *rom_p; + for( ram_p = &__ram_data_start, rom_p = &__rom_data_start; + ram_p < &__ram_data_end; + ram_p++, rom_p++ ) + *ram_p = *rom_p; + } + + // Relocate data from ROM to SRAM + { + register cyg_uint32 *ram_p, *sram_p; + for( ram_p = &__sram_data_start, sram_p = &__srom_data_start; + ram_p < &__sram_data_end; + ram_p++, sram_p++ ) + *ram_p = *sram_p; + } +#endif +} + +//=========================================================================== +// hal_gpio_init +//=========================================================================== +static inline void CYGOPT_HAL_KINETIS_MISC_FLASH_SECTION_ATTR +hal_gpio_init(void) +{ + cyghwr_hal_kinetis_sim_t *sim_p = CYGHWR_HAL_KINETIS_SIM_P; + cyghwr_hal_kinetis_mpu_t *mpu_p = CYGHWR_HAL_KINETIS_MPU_P; + + // Enable clocks on all ports. + sim_p->scgc1 = CYGHWR_HAL_KINETIS_SIM_SCGC1_ALL_M; + sim_p->scgc2 = CYGHWR_HAL_KINETIS_SIM_SCGC2_ALL_M; + sim_p->scgc3 = CYGHWR_HAL_KINETIS_SIM_SCGC3_ALL_M; + sim_p->scgc4 = CYGHWR_HAL_KINETIS_SIM_SCGC4_ALL_M; + sim_p->scgc5 = CYGHWR_HAL_KINETIS_SIM_SCGC5_ALL_M; + sim_p->scgc6 = CYGHWR_HAL_KINETIS_SIM_SCGC6_ALL_M; + sim_p->scgc7 = CYGHWR_HAL_KINETIS_SIM_SCGC7_ALL_M; + + // Disable MPU + mpu_p->cesr = 0; +} + + + +//========================================================================== + +__externC void hal_platform_init( void ) +{ +} + +//========================================================================== + +#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + +#include CYGHWR_MEMORY_LAYOUT_H + +//-------------------------------------------------------------------------- +// Accesses to areas not backed by real devices or memory can cause +// the CPU to hang. +// +// The following table defines the memory areas that GDB is allowed to +// touch. All others are disallowed. +// This table needs to be kept up to date with the set of memory areas +// that are available on the board. + +static struct { + CYG_ADDRESS start; // Region start address + CYG_ADDRESS end; // End address (last byte) +} hal_data_access[] = +{ + { CYGMEM_REGION_ram, CYGMEM_REGION_ram+CYGMEM_REGION_ram_SIZE-1 }, // Main RAM +#ifdef CYGMEM_REGION_sram + { CYGMEM_REGION_sram, CYGMEM_REGION_sram+CYGMEM_REGION_sram_SIZE-1 }, // On-chip SRAM +#endif +#ifdef CYGMEM_REGION_flash + { CYGMEM_REGION_flash, CYGMEM_REGION_flash+CYGMEM_REGION_flash_SIZE-1 }, // On-chip flash +#endif +#ifdef CYGMEM_REGION_rom + { CYGMEM_REGION_rom, CYGMEM_REGION_rom+CYGMEM_REGION_rom_SIZE-1 }, // External flash +#endif +#ifdef CYGMEM_REGION_flexnvm + { CYGMEM_REGION_flexnvm, CYGMEM_REGION_flexnvm+CYGMEM_REGION_flexnvm_SIZE-1 }, // On-chip flexnvm (DFlash) +#endif +#ifdef CYGMEM_REGION_flexram + { CYGMEM_REGION_flexram, CYGMEM_REGION_flexram+CYGMEM_REGION_flexram_SIZE-1 }, // On-chip flexram +#endif +#ifdef CYGMEM_REGION_eeeprom0 + { CYGMEM_REGION_eeeprom0, CYGMEM_REGION_eeeprom0+CYGMEM_REGION_eeeprom0_SIZE-1 }, // On-chip Enhanced EEPROM +#endif +#ifdef CYGMEM_REGION_eeeprom1 + { CYGMEM_REGION_eeeprom1, CYGMEM_REGION_eeeprom0+CYGMEM_REGION_eeeprom1_SIZE-1 }, // On-chip Enhanced EEPROM +#endif + { 0xE0000000, 0x00000000-1 }, // Cortex-M peripherals + { 0x40000000, 0x60000000-1 }, // Chip specific peripherals +}; + +__externC int cyg_hal_stub_permit_data_access( CYG_ADDRESS addr, cyg_uint32 count ) +{ + int i; + for( i = 0; i < sizeof(hal_data_access)/sizeof(hal_data_access[0]); i++ ) { + if( (addr >= hal_data_access[i].start) && + (addr+count) <= hal_data_access[i].end) + return true; + } + return false; +} + +#endif // CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + +//========================================================================== + +#ifdef CYGPKG_REDBOOT +#include <redboot.h> +#include CYGHWR_MEMORY_LAYOUT_H + +//-------------------------------------------------------------------------- +// Memory layout +// +// We report the on-chip SRAM and external SRAM. + +void +cyg_plf_memory_segment(int seg, unsigned char **start, unsigned char **end) +{ + switch (seg) { + case 0: + *start = (unsigned char *)CYGMEM_REGION_ram; + *end = (unsigned char *)(CYGMEM_REGION_ram + CYGMEM_REGION_ram_SIZE); + break; +#ifdef CYGMEM_REGION_sram +#define CASE_CYGMEM_REGION_SRAM 1 + case CASE_CYGMEM_REGION_SRAM: + *start = (unsigned char *)CYGMEM_REGION_sram; + *end = (unsigned char *)(CYGMEM_REGION_sram + CYGMEM_REGION_sram_SIZE); + break; +#else +#define CASE_CYGMEM_REGION_SRAM 0 +#endif +#ifdef CYGMEM_REGION_flexram +#define CASE_CYGMEM_REGION_FLEXRAM (CASE_CYGMEM_REGION_SRAM + 1) + case CASE_CYGMEM_REGION_FLEXRAM: + *start = (unsigned char *)CYGMEM_REGION_flexram; + *end = (unsigned char *)(CYGMEM_REGION_flexram + + CYGMEM_REGION_flexram_SIZE); + break; +#else +#define CASE_CYGMEM_REGION_FLEXRAM (CASE_CYGMEM_REGION_SRAM) +#endif + default: + *start = *end = NO_MEMORY; + break; + } +} // cyg_plf_memory_segment() + +#endif // CYGPKG_REDBOOT + + +//========================================================================== +// EOF kwikstik_misc.c
--- a/packages/hal/cortexm/kinetis/var/current/ChangeLog +++ b/packages/hal/cortexm/kinetis/var/current/ChangeLog @@ -1,3 +1,12 @@ +2012-01-11 Tomas Frydrych <tomas@sleepfive.com> + + * include/var_io.h: + Allow for overriding of CYGHWR_HAL_KINETIS_SIM_SCGC?_ALL_M mask + from platform definitions. + + * include/var_io_devs.h: + Define base pointer for SLCD controller + 2012-01-05 Ilija Kocho <ilijak@siva.com.mk> * cdl/kinetis_irq_scheme.cdl @@ -56,7 +65,7 @@ 2011-10-19 Ilija Kocho <ilijak@siva.co // ####GPLCOPYRIGHTBEGIN#### // ------------------------------------------- // This file is part of eCos, the Embedded Configurable Operating System. -// Copyright (C) 2011 Free Software Foundation, Inc. +// Copyright (C) 2011, 2012 Free Software Foundation, Inc. // // This program is free software; you can redistribute it and/or modify // it under the terms of the GNU General Public License as published by
--- a/packages/hal/cortexm/kinetis/var/current/include/var_io.h +++ b/packages/hal/cortexm/kinetis/var/current/include/var_io.h @@ -10,7 +10,7 @@ // ####ECOSGPLCOPYRIGHTBEGIN#### // ------------------------------------------- // This file is part of eCos, the Embedded Configurable Operating System. -// Copyright (C) 2011 Free Software Foundation, Inc. +// Copyright (C) 2011, 2012 Free Software Foundation, Inc. // // eCos is free software; you can redistribute it and/or modify it under // the terms of the GNU General Public License as published by the Free @@ -565,8 +565,10 @@ typedef volatile struct cyghwr_hal_kinet #define CYGHWR_HAL_KINETIS_SIM_SCGC1_UART5_M 0x800 #define CYGHWR_HAL_KINETIS_SIM_SCGC1_UART5_S 11 +#ifndef CYGHWR_HAL_KINETIS_SIM_SCGC1_ALL_M #define CYGHWR_HAL_KINETIS_SIM_SCGC1_ALL_M \ (CYGHWR_HAL_KINETIS_SIM_SCGC1_UART4_M | CYGHWR_HAL_KINETIS_SIM_SCGC1_UART5_M) +#endif // SCGC2 Bit Fields #define CYGHWR_HAL_KINETIS_SIM_SCGC2_ENET_M 0x1 @@ -576,10 +578,12 @@ typedef volatile struct cyghwr_hal_kinet #define CYGHWR_HAL_KINETIS_SIM_SCGC2_DAC1_M 0x2000 #define CYGHWR_HAL_KINETIS_SIM_SCGC2_DAC1_S 13 +#ifndef CYGHWR_HAL_KINETIS_SIM_SCGC2_ALL_M #define CYGHWR_HAL_KINETIS_SIM_SCGC2_ALL_M \ (CYGHWR_HAL_KINETIS_SIM_SCGC2_ENET_M | \ CYGHWR_HAL_KINETIS_SIM_SCGC2_DAC0_M | \ CYGHWR_HAL_KINETIS_SIM_SCGC2_DAC1_M) +#endif // SCGC3 Bit Fields #define CYGHWR_HAL_KINETIS_SIM_SCGC3_RNGB_M 0x1 @@ -595,6 +599,7 @@ typedef volatile struct cyghwr_hal_kinet #define CYGHWR_HAL_KINETIS_SIM_SCGC3_ADC1_M 0x8000000 #define CYGHWR_HAL_KINETIS_SIM_SCGC3_ADC1_S 27 +#ifndef CYGHWR_HAL_KINETIS_SIM_SCGC3_ALL_M #define CYGHWR_HAL_KINETIS_SIM_SCGC3_ALL_M \ (CYGHWR_HAL_KINETIS_SIM_SCGC3_RNGB_M | \ CYGHWR_HAL_KINETIS_SIM_SCGC3_FLEXCAN1_M | \ @@ -602,6 +607,7 @@ typedef volatile struct cyghwr_hal_kinet CYGHWR_HAL_KINETIS_SIM_SCGC3_SDHC_M | \ CYGHWR_HAL_KINETIS_SIM_SCGC3_FTM2_M | \ CYGHWR_HAL_KINETIS_SIM_SCGC3_ADC1_M) +#endif // SCGC4 Bit Fields #define CYGHWR_HAL_KINETIS_SIM_SCGC4_EWM_M 0x2 @@ -629,6 +635,7 @@ typedef volatile struct cyghwr_hal_kinet #define CYGHWR_HAL_KINETIS_SIM_SCGC4_LLWU_M 0x10000000 #define CYGHWR_HAL_KINETIS_SIM_SCGC4_LLWU_S 28 +#ifndef CYGHWR_HAL_KINETIS_SIM_SCGC4_ALL_M #define CYGHWR_HAL_KINETIS_SIM_SCGC4_ALL_M \ (CYGHWR_HAL_KINETIS_SIM_SCGC4_EWM_M |CYGHWR_HAL_KINETIS_SIM_SCGC4_CMT_M | \ CYGHWR_HAL_KINETIS_SIM_SCGC4_I2C0_M |CYGHWR_HAL_KINETIS_SIM_SCGC4_I2C1_M | \ @@ -636,6 +643,7 @@ typedef volatile struct cyghwr_hal_kinet CYGHWR_HAL_KINETIS_SIM_SCGC4_UART2_M | CYGHWR_HAL_KINETIS_SIM_SCGC4_UART3_M |\ CYGHWR_HAL_KINETIS_SIM_SCGC4_USBOTG_M | CYGHWR_HAL_KINETIS_SIM_SCGC4_CMP_M | \ CYGHWR_HAL_KINETIS_SIM_SCGC4_VREF_M | CYGHWR_HAL_KINETIS_SIM_SCGC4_LLWU_M) +#endif // SCGC5 Bit Fields #define CYGHWR_HAL_KINETIS_SIM_SCGC5_LPTIMER_M 0x1 @@ -655,6 +663,7 @@ typedef volatile struct cyghwr_hal_kinet #define CYGHWR_HAL_KINETIS_SIM_SCGC5_PORTE_M 0x2000 #define CYGHWR_HAL_KINETIS_SIM_SCGC5_PORTE_S 13 +#ifndef CYGHWR_HAL_KINETIS_SIM_SCGC5_ALL_M #define CYGHWR_HAL_KINETIS_SIM_SCGC5_ALL_M \ (CYGHWR_HAL_KINETIS_SIM_SCGC5_LPTIMER_M | \ CYGHWR_HAL_KINETIS_SIM_SCGC5_REGFILE_M | \ @@ -664,6 +673,7 @@ typedef volatile struct cyghwr_hal_kinet CYGHWR_HAL_KINETIS_SIM_SCGC5_PORTC_M | \ CYGHWR_HAL_KINETIS_SIM_SCGC5_PORTD_M | \ CYGHWR_HAL_KINETIS_SIM_SCGC5_PORTE_M) +#endif // SCGC6 Bit Fields #define CYGHWR_HAL_KINETIS_SIM_SCGC6_FTFL_M 0x1 @@ -695,6 +705,7 @@ typedef volatile struct cyghwr_hal_kinet #define CYGHWR_HAL_KINETIS_SIM_SCGC6_RTC_M 0x20000000 #define CYGHWR_HAL_KINETIS_SIM_SCGC6_RTC_S 29 +#ifndef CYGHWR_HAL_KINETIS_SIM_SCGC6_ALL_M #define CYGHWR_HAL_KINETIS_SIM_SCGC6_ALL_M \ (CYGHWR_HAL_KINETIS_SIM_SCGC6_FTFL_M | \ CYGHWR_HAL_KINETIS_SIM_SCGC6_DMAMUX_M | \ @@ -710,6 +721,7 @@ typedef volatile struct cyghwr_hal_kinet CYGHWR_HAL_KINETIS_SIM_SCGC6_FTM1_M | \ CYGHWR_HAL_KINETIS_SIM_SCGC6_ADC0_M | \ CYGHWR_HAL_KINETIS_SIM_SCGC6_RTC_M) +#endif // SCGC7 Bit Fields #define CYGHWR_HAL_KINETIS_SIM_SCGC7_FLEXBUS_M 0x1 @@ -719,10 +731,12 @@ typedef volatile struct cyghwr_hal_kinet #define CYGHWR_HAL_KINETIS_SIM_SCGC7_MPU_M 0x4 #define CYGHWR_HAL_KINETIS_SIM_SCGC7_MPU_S 2 +#ifndef CYGHWR_HAL_KINETIS_SIM_SCGC7_ALL_M #define CYGHWR_HAL_KINETIS_SIM_SCGC7_ALL_M \ (CYGHWR_HAL_KINETIS_SIM_SCGC7_FLEXBUS_M | \ CYGHWR_HAL_KINETIS_SIM_SCGC7_DMA_M | \ CYGHWR_HAL_KINETIS_SIM_SCGC7_MPU_M) +#endif // CLKDIV1 Bit Fields #define CYGHWR_HAL_KINETIS_SIM_CLKDIV1_OUTDIV4_M 0xF0000
--- a/packages/hal/cortexm/kinetis/var/current/include/var_io_devs.h +++ b/packages/hal/cortexm/kinetis/var/current/include/var_io_devs.h @@ -10,7 +10,7 @@ // ####ECOSGPLCOPYRIGHTBEGIN#### // ------------------------------------------- // This file is part of eCos, the Embedded Configurable Operating System. -// Copyright (C) 2011 Free Software Foundation, Inc. +// Copyright (C) 2011, 2012 Free Software Foundation, Inc. // // eCos is free software; you can redistribute it and/or modify it under // the terms of the GNU General Public License as published by the Free @@ -71,6 +71,13 @@ // Peripheral clock [Hz]; __externC cyg_uint32 hal_get_peripheral_clock(void); +//---------------------------------------------------------------------------- +// SLCD +// Only for the K40 variant +#if CYGHWR_HAL_CORTEXM_KINETIS_SUBFAM == 40 +#define CYGADDR_HAL_FREESCALE_SLCD_BASE (0x400BE000) +#endif + //----------------------------------------------------------------------------- // Freescale UART // Borrow some HAL resources to Freescale UART driver