Mercurial > ecos
changeset 2960:31c9ab39babe
* doc/eth_phy.sgml, include/eth_phy.h: Add Ethernet Gigabit Mode
* cdl/phy_eth_drivers.cdl: Add new PHY support
* src/IP101A.c, src/IP101A.h: Contributed by Edgar Grimberg
* src/VSC8244.c, src/VSC8244.h: Contributed by Christophe Coutand
* src/VSC8641.c, src/VSC8641.h: Contributed by Sachin Sushil Chaddha
| author | jld |
|---|---|
| date | Tue, 15 Jun 2010 08:25:04 +0000 |
| parents | eb303059b6e5 |
| children | 4d0db334c7fc |
| files | packages/devs/eth/phy/current/ChangeLog packages/devs/eth/phy/current/cdl/phy_eth_drivers.cdl packages/devs/eth/phy/current/doc/eth_phy.sgml packages/devs/eth/phy/current/include/eth_phy.h packages/devs/eth/phy/current/src/IP101A.c packages/devs/eth/phy/current/src/IP101A.h packages/devs/eth/phy/current/src/VSC8244.c packages/devs/eth/phy/current/src/VSC8244.h packages/devs/eth/phy/current/src/VSC8641.c packages/devs/eth/phy/current/src/VSC8641.h |
| diffstat | 10 files changed, 654 insertions(+), 10 deletions(-) [+] |
line wrap: on
line diff
--- a/packages/devs/eth/phy/current/ChangeLog +++ b/packages/devs/eth/phy/current/ChangeLog @@ -1,3 +1,11 @@ +2010-06-10 Christophe Coutand <ccoutand@stmi.com> + + * doc/eth_phy.sgml, include/eth_phy.h: Add Ethernet Gigabit Mode + * cdl/phy_eth_drivers.cdl: Add new PHY support + * src/IP101A.c, src/IP101A.h: Contributed by Edgar Grimberg + * src/VSC8244.c, src/VSC8244.h: Contributed by Christophe Coutand + * src/VSC8641.c, src/VSC8641.h: Contributed by Sachin Sushil Chaddha + 2008-12-30 John Dallaway <john@dallaway.org.uk> * cdl/phy_eth_drivers.cdl: Reference per-package documentation. @@ -80,7 +88,7 @@ 2003-08-19 Gary Thomas <gary@mlbassoc. // ####GPLCOPYRIGHTBEGIN#### // ------------------------------------------- // This file is part of eCos, the Embedded Configurable Operating System. -// Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc. +// Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003, 2010 Free Software Foundation, Inc. // // This program is free software; you can redistribute it and/or modify // it under the terms of the GNU General Public License as published by
--- a/packages/devs/eth/phy/current/cdl/phy_eth_drivers.cdl +++ b/packages/devs/eth/phy/current/cdl/phy_eth_drivers.cdl @@ -8,7 +8,7 @@ ## ####ECOSGPLCOPYRIGHTBEGIN#### ## ------------------------------------------- ## This file is part of eCos, the Embedded Configurable Operating System. -## Copyright (C) 2003 Free Software Foundation, Inc. +## Copyright (C) 2003, 2010 Free Software Foundation, Inc. ## ## eCos is free software; you can redistribute it and/or modify it under ## the terms of the GNU General Public License as published by the Free @@ -168,4 +168,31 @@ cdl_package CYGPKG_DEVS_ETH_PHY { Include support for the Micrel KSZ8041 PHY" } + cdl_option CYGHWR_DEVS_ETH_PHY_IP101A { + display "IC+ IP101A" + flavor bool + default_value 0 + compile -library=libextras.a IP101A.c + description " + Include support for IC+ IP101A" + } + + cdl_option CYGHWR_DEVS_ETH_PHY_VSC8641 { + display "Vitesse VSC8641" + flavor bool + default_value 0 + compile -library=libextras.a VSC8641.c + description " + Include support for Vitesse VSC8641" + } + + cdl_option CYGHWR_DEVS_ETH_PHY_VSC8244 { + display "Vitesse VSC8244" + flavor bool + default_value 0 + compile -library=libextras.a VSC8244.c + description " + Include support for Vitesse VSC8244" + } + }
--- a/packages/devs/eth/phy/current/doc/eth_phy.sgml +++ b/packages/devs/eth/phy/current/doc/eth_phy.sgml @@ -9,7 +9,7 @@ <!-- =============================================================== --> <!-- ####ECOSDOCCOPYRIGHTBEGIN#### --> <!-- =============================================================== --> -<!-- Copyright (C) 1997, 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc. --> +<!-- Copyright (C) 1997, 1998, 1999, 2000, 2001, 2002, 2010 Free Software Foundation, Inc. --> <!-- This material may be distributed only subject to the terms --> <!-- and conditions set forth in the Open Publication License, v1.0 --> <!-- or later (the latest version is presently available at --> @@ -157,9 +157,10 @@ this information may be useful to the MA provide data, etc. The status bitmask contains these bits: <programlisting> -#define ETH_PHY_STAT_LINK 0x0001 // Link up/down -#define ETH_PHY_STAT_100MB 0x0002 // Connection is 100Mb/10Mb -#define ETH_PHY_STAT_FDX 0x0004 // Connection is full/half duplex +#define ETH_PHY_STAT_LINK 0x0001 // Link up/down +#define ETH_PHY_STAT_100MB 0x0002 // Connection is 100Mb/10Mb +#define ETH_PHY_STAT_FDX 0x0004 // Connection is full/half duplex +#define ETH_PHY_STAT_1000MB 0x0008 // Connection is 1Gb </programlisting> Note: the usage here is that if the bit is set, then the condition exists. For example, if the
--- a/packages/devs/eth/phy/current/include/eth_phy.h +++ b/packages/devs/eth/phy/current/include/eth_phy.h @@ -10,7 +10,7 @@ // ####ECOSGPLCOPYRIGHTBEGIN#### // ------------------------------------------- // This file is part of eCos, the Embedded Configurable Operating System. -// Copyright (C) 2003 Free Software Foundation, Inc. +// Copyright (C) 2003, 2010 Free Software Foundation, Inc. // // eCos is free software; you can redistribute it and/or modify it under // the terms of the GNU General Public License as published by the Free @@ -84,9 +84,10 @@ static eth_phy_access_t _l = {PHY_BIT_LE static eth_phy_access_t _l = {PHY_REG_LEVEL_ACCESS_TYPE, false, _init, _reset, \ {.reg_level_ops = {_put_reg, _get_reg}}} -#define ETH_PHY_STAT_LINK 0x0001 // Link up/down -#define ETH_PHY_STAT_100MB 0x0002 // Connection is 100Mb/10Mb -#define ETH_PHY_STAT_FDX 0x0004 // Connection is full/half duplex +#define ETH_PHY_STAT_LINK 0x0001 // Link up/down +#define ETH_PHY_STAT_100MB 0x0002 // Connection is 100Mb/10Mb +#define ETH_PHY_STAT_FDX 0x0004 // Connection is full/half duplex +#define ETH_PHY_STAT_1000MB 0x0008 // Connection is 1Gb externC bool _eth_phy_init(eth_phy_access_t *f); externC void _eth_phy_reset(eth_phy_access_t *f);
new file mode 100644 --- /dev/null +++ b/packages/devs/eth/phy/current/src/IP101A.c @@ -0,0 +1,117 @@ +//========================================================================== +// +// phy/ip101a.c +// +// Ethernet PHY driver +// +//========================================================================== +// ####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, +// 2008, 2009 Free Software Foundation, Inc. +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later +// version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT +// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License +// along with eCos; if not, write to the Free Software Foundation, Inc., +// 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. +// +// As a special exception, if other files instantiate templates or use +// macros or inline functions from this file, or you compile this file +// and link it with other works to produce a work based on this file, +// this file does not by itself cause the resulting work to be covered by +// the GNU General Public License. However the source code for this file +// must still be made available in accordance with section (3) of the GNU +// General Public License v2. +// +// This exception does not invalidate any other reasons why a work based +// on this file might be covered by the GNU General Public License. +// ------------------------------------------- +// ####ECOSGPLCOPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): Edgar Grimberg +// Contributors: +// Date: 2009-11-01 +// Purpose: +// Description: hardware driver for Ethernet PHY IC+ IP101A +// +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#include <pkgconf/system.h> +#include <pkgconf/devs_eth_phy.h> + +#include <cyg/infra/cyg_type.h> + +#include <cyg/hal/hal_arch.h> +#include <cyg/hal/drv_api.h> +#include <cyg/hal/hal_if.h> +#include <cyg/hal/hal_tables.h> + +#include <cyg/io/eth_phy.h> +#include <cyg/io/eth_phy_dev.h> + +#include "IP101A.h" + +static bool ip101a_stat(eth_phy_access_t *f, int *state) +{ + unsigned short phy_state; + int tries; + int auto_completed = 1; + + // Read negotiated state from the Quick Poll Detailed Status Register + if (_eth_phy_read(f, MII_STAT_REG, f->phy_addr, &phy_state)) + { + if ((phy_state & IP101A_AUTO_COMPLETED) == 0) + { + auto_completed = 0; + eth_phy_printf("... waiting for auto-negotiation"); + for (tries = 0; tries < CYGINT_DEVS_ETH_PHY_AUTO_NEGOTIATION_TIME; tries++) + { + if (_eth_phy_read(f, MII_STAT_REG, f->phy_addr, &phy_state)) + { + if ((phy_state & IP101A_AUTO_COMPLETED) != 0) + { + auto_completed = 1; + break; + } + } + CYGACC_CALL_IF_DELAY_US(1000000); // 1 second + eth_phy_printf("."); + } + eth_phy_printf("\n"); + } + + if(auto_completed) + { + _eth_phy_read(f, MII_PHY_STAT_REG, f->phy_addr, &phy_state); + + if(phy_state & IP101A_LINK_STATUS2) + *state |= ETH_PHY_STAT_LINK; + if(phy_state & IP101A_SPEED_100MB) + *state |= ETH_PHY_STAT_100MB; + if(phy_state & IP101A_DUPLEX_MODE) + *state |= ETH_PHY_STAT_FDX; + return true; + } + + } + return false; +} + + +_eth_phy_dev("IC+ IP101A", 0x02430c54, ip101a_stat) +
new file mode 100644 --- /dev/null +++ b/packages/devs/eth/phy/current/src/IP101A.h @@ -0,0 +1,92 @@ +#ifndef CYGONCE_PHY_IP101A_HEADER_ +#define CYGONCE_PHY_IP101A_HEADER_ +//========================================================================== +// +// phy/ip101a.h +// +// Ethernet PHY driver +// +//========================================================================== +// ####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, +// 2008, 2009 Free Software Foundation, Inc. +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later +// version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT +// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License +// along with eCos; if not, write to the Free Software Foundation, Inc., +// 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. +// +// As a special exception, if other files instantiate templates or use +// macros or inline functions from this file, or you compile this file +// and link it with other works to produce a work based on this file, +// this file does not by itself cause the resulting work to be covered by +// the GNU General Public License. However the source code for this file +// must still be made available in accordance with section (3) of the GNU +// General Public License v2. +// +// This exception does not invalidate any other reasons why a work based +// on this file might be covered by the GNU General Public License. +// ------------------------------------------- +// ####ECOSGPLCOPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): Edgar Grimberg +// Contributors: +// Date: 2009-11-01 +// Purpose: +// Description: Hardware driver for Ethernet PHY IC+ IP101A +// +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#define MII_CTRL_REG 0x00 +#define MII_STAT_REG 0x01 +#define MII_PHY_ID1_REG 0x02 +#define MII_PHY_ID2_REG 0x03 +#define MII_AUTO_NEG_ADV_REG 0x04 +#define MII_AUTO_NEG_LPA_REG 0x05 +#define MII_AUTO_NEG_EXP_REG 0x06 +#define MII_PHY_CTRL_REG 0x10 +#define MII_PHY_IRQ_REG 0x11 +#define MII_PHY_STAT_REG 0x12 +#define MII_PHY_CTRL2_REG 0x1E + +#define MII_PHY_IRQ_INTR 0x8000 +#define MII_PHY_IRQ_ALL_MASK 0x0800 +#define MII_PHY_IRQ_SPEED_MASK 0x0400 +#define MII_PHY_IRQ_DUPLEX_MASK 0x0200 +#define MII_PHY_IRQ_LINK_MASK 0x0100 +#define MII_PHY_IRQ_ARBITER_MASK 0x0080 +#define MII_PHY_IRQ_ARBITER_CHANGE 0x0040 +#define MII_PHY_IRQ_SPEED_CHANGE 0x0004 +#define MII_PHY_IRQ_DUPLEX_CHANGE 0x0002 +#define MII_PHY_IRQ_LINK_CHANGE 0x0001 + +#define IP101A_CTRL_DUPLEX 0x0100 +#define IP101A_CTRL_100MB 0x2000 +#define IP101A_CTRL_AUTO_NEG 0x1000 +#define IP101A_CTRL_AUTO_NEG_RST 0x0200 + +#define IP101A_LINK_STATUS 0x0004 +#define IP101A_AUTO_COMPLETED 0x20 + +#define IP101A_DUPLEX_MODE 0x2000 +#define IP101A_SPEED_100MB 0x4000 +#define IP101A_LINK_STATUS2 0x0400 + +#endif // CYGONCE_PHY_IP101A_HEADER_ +
new file mode 100644 --- /dev/null +++ b/packages/devs/eth/phy/current/src/VSC8244.c @@ -0,0 +1,122 @@ +//========================================================================== +// +// phy/VSC8244.c +// +// Ethernet PHY driver +// +//========================================================================== +// ####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, +// 2008, 2009 Free Software Foundation, Inc. +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later +// version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT +// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License +// along with eCos; if not, write to the Free Software Foundation, Inc., +// 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. +// +// As a special exception, if other files instantiate templates or use +// macros or inline functions from this file, or you compile this file +// and link it with other works to produce a work based on this file, +// this file does not by itself cause the resulting work to be covered by +// the GNU General Public License. However the source code for this file +// must still be made available in accordance with section (3) of the GNU +// General Public License v2. +// +// This exception does not invalidate any other reasons why a work based +// on this file might be covered by the GNU General Public License. +// ------------------------------------------- +// ####ECOSGPLCOPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): ccoutand +// Contributors: +// Date: 2009-11-01 +// Purpose: +// Description: Hardware driver for Ethernet PHY Vitesse VSC8244 +// +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#include <pkgconf/system.h> +#include <pkgconf/devs_eth_phy.h> + +#include <cyg/infra/cyg_type.h> + +#include <cyg/hal/hal_arch.h> +#include <cyg/hal/drv_api.h> +#include <cyg/hal/hal_if.h> +#include <cyg/hal/hal_tables.h> + +#include <cyg/io/eth_phy.h> +#include <cyg/io/eth_phy_dev.h> + +#include "VSC8244.h" + +static bool VSC8244_stat(eth_phy_access_t *f, int *state) +{ + unsigned short phy_state; + int tries; + int auto_completed = 1; + int link_up = 0; + + // Read negotiated state from the Quick Poll Detailed Status Register + if (_eth_phy_read(f, VSC8244_MII_STAT_REG, f->phy_addr, &phy_state)) + { + + if ((phy_state & VSC8244_AUTO_COMPLETED) == 0) + { + auto_completed = 0; + eth_phy_printf("... waiting for auto-negotiation"); + for (tries = 0; tries < CYGINT_DEVS_ETH_PHY_AUTO_NEGOTIATION_TIME; tries++) + { + if (_eth_phy_read(f, VSC8244_MII_STAT_REG, f->phy_addr, &phy_state)) + { + if ((phy_state & VSC8244_AUTO_COMPLETED) != 0) + { + auto_completed = 1; + break; + } + } + CYGACC_CALL_IF_DELAY_US(1000000); // 1 second + eth_phy_printf("."); + } + eth_phy_printf("\n"); + } + + if(phy_state & VSC8244_MII_PHY_STAT_LINK_UP) + link_up = 1; + + if(auto_completed) + { + _eth_phy_read(f, VSC8244_MII_PHY_STAT_REG, f->phy_addr, &phy_state); + + if(link_up) + *state |= ETH_PHY_STAT_LINK; + if(phy_state & VSC8244_MII_PHY_STAT_1000MB ) + *state |= ETH_PHY_STAT_1000MB; + if(phy_state & VSC8244_MII_PHY_STAT_100MB) + *state |= ETH_PHY_STAT_100MB; + if(phy_state & VSC8244_MII_PHY_STAT_DUPLEX_FULL) + *state |= ETH_PHY_STAT_FDX; + return true; + } + + } + return false; +} + +_eth_phy_dev("Vitesse VSC8244", 0x000FC6C2, VSC8244_stat)
new file mode 100644 --- /dev/null +++ b/packages/devs/eth/phy/current/src/VSC8244.h @@ -0,0 +1,67 @@ +#ifndef CYGONCE_PHY_VSC8244_HEADER_ +#define CYGONCE_PHY_VSC8244_HEADER_ +//========================================================================== +// +// phy/VSC8244.h +// +// Ethernet PHY driver +// +//========================================================================== +// ####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, +// 2008, 2009 Free Software Foundation, Inc. +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later +// version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT +// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License +// along with eCos; if not, write to the Free Software Foundation, Inc., +// 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. +// +// As a special exception, if other files instantiate templates or use +// macros or inline functions from this file, or you compile this file +// and link it with other works to produce a work based on this file, +// this file does not by itself cause the resulting work to be covered by +// the GNU General Public License. However the source code for this file +// must still be made available in accordance with section (3) of the GNU +// General Public License v2. +// +// This exception does not invalidate any other reasons why a work based +// on this file might be covered by the GNU General Public License. +// ------------------------------------------- +// ####ECOSGPLCOPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): ccoutand +// Contributors: +// Date: 2009-11-01 +// Purpose: +// Description: Hardware driver for Ethernet PHY Vitesse VSC8244 +// +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#define VSC8244_MII_PHY_STAT_DUPLEX_FULL 0x20 +#define VSC8244_MII_PHY_STAT_1000MB 0x10 +#define VSC8244_MII_PHY_STAT_100MB 0x08 + +#define VSC8244_MII_PHY_STAT_LINK_UP 0x04 + +#define VSC8244_MII_STAT_REG 0x01 +#define VSC8244_MII_PHY_STAT_REG 0x1C + +#define VSC8244_AUTO_COMPLETED 0x20 + +#endif // CYGONCE_PHY_VSC8244_HEADER_
new file mode 100644 --- /dev/null +++ b/packages/devs/eth/phy/current/src/VSC8641.c @@ -0,0 +1,123 @@ +//========================================================================== +// +// phy/VSC8641.c +// +// Ethernet PHY driver +// +//========================================================================== +// ####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, +// 2008, 2009 Free Software Foundation, Inc. +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later +// version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT +// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License +// along with eCos; if not, write to the Free Software Foundation, Inc., +// 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. +// +// As a special exception, if other files instantiate templates or use +// macros or inline functions from this file, or you compile this file +// and link it with other works to produce a work based on this file, +// this file does not by itself cause the resulting work to be covered by +// the GNU General Public License. However the source code for this file +// must still be made available in accordance with section (3) of the GNU +// General Public License v2. +// +// This exception does not invalidate any other reasons why a work based +// on this file might be covered by the GNU General Public License. +// ------------------------------------------- +// ####ECOSGPLCOPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): Sachin Sushil Chaddha +// Contributors: +// Date: 2009-11-01 +// Purpose: +// Description: Hardware driver for Ethernet PHY Vitesse VSC8641 +// +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#include <pkgconf/system.h> +#include <pkgconf/devs_eth_phy.h> + +#include <cyg/infra/cyg_type.h> + +#include <cyg/hal/hal_arch.h> +#include <cyg/hal/drv_api.h> +#include <cyg/hal/hal_if.h> +#include <cyg/hal/hal_tables.h> + +#include <cyg/io/eth_phy.h> +#include <cyg/io/eth_phy_dev.h> + +#include "VSC8641.h" + +static bool VSC8641_stat(eth_phy_access_t *f, int *state) +{ + unsigned short phy_state; + int tries; + int auto_completed = 1; + int link_up = 0; + + // Read negotiated state from the Quick Poll Detailed Status Register + if (_eth_phy_read(f, VSC8641_MII_STAT_REG, f->phy_addr, &phy_state)) + { + + if ((phy_state & VSC8641_AUTO_COMPLETED) == 0) + { + auto_completed = 0; + eth_phy_printf("... waiting for auto-negotiation"); + for (tries = 0; tries < CYGINT_DEVS_ETH_PHY_AUTO_NEGOTIATION_TIME; tries++) + { + if (_eth_phy_read(f, VSC8641_MII_STAT_REG, f->phy_addr, &phy_state)) + { + if ((phy_state & VSC8641_AUTO_COMPLETED) != 0) + { + auto_completed = 1; + break; + } + } + CYGACC_CALL_IF_DELAY_US(1000000); // 1 second + eth_phy_printf("."); + } + eth_phy_printf("\n"); + } + + if(phy_state & VSC8641_MII_PHY_STAT_LINK_UP) + link_up = 1; + + if(auto_completed) + { + _eth_phy_read(f, VSC8641_MII_PHY_STAT_REG, f->phy_addr, &phy_state); + + if(link_up) + *state |= ETH_PHY_STAT_LINK; + if(phy_state & VSC8641_MII_PHY_STAT_1000MB ) + *state |= ETH_PHY_STAT_1000MB; + if(phy_state & VSC8641_MII_PHY_STAT_100MB) + *state |= ETH_PHY_STAT_100MB; + if(phy_state & VSC8641_MII_PHY_STAT_DUPLEX_FULL) + *state |= ETH_PHY_STAT_FDX; + return true; + } + + } + return false; +} + + +_eth_phy_dev("Vitesse VSC8641", 0x00070431, VSC8641_stat)
new file mode 100644 --- /dev/null +++ b/packages/devs/eth/phy/current/src/VSC8641.h @@ -0,0 +1,86 @@ +#ifndef CYGONCE_PHY_VSC8641_HEADER_ +#define CYGONCE_PHY_VSC8641_HEADER_ +//========================================================================== +// +// phy/VSC8641.h +// +// Ethernet PHY driver +// +//========================================================================== +// ####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, +// 2008, 2009 Free Software Foundation, Inc. +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later +// version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT +// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License +// along with eCos; if not, write to the Free Software Foundation, Inc., +// 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. +// +// As a special exception, if other files instantiate templates or use +// macros or inline functions from this file, or you compile this file +// and link it with other works to produce a work based on this file, +// this file does not by itself cause the resulting work to be covered by +// the GNU General Public License. However the source code for this file +// must still be made available in accordance with section (3) of the GNU +// General Public License v2. +// +// This exception does not invalidate any other reasons why a work based +// on this file might be covered by the GNU General Public License. +// ------------------------------------------- +// ####ECOSGPLCOPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): ccoutand +// Contributors: +// Date: 2009-11-01 +// Purpose: +// Description: Hardware driver for Ethernet PHY Vitesse VSC8641 +// +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#define VSC8641_MII_MDE_CTRL_REG 0x00 +#define VSC8641_MII_STAT_REG 0x01 +#define VSC8641_MII_AUTO_NEG_ADV_REG 0x04 +#define VSC8641_MII_AUTO_NEG_NXT_REG 0x07 +#define VSC8641_MII_PHY_IRQ_MSK_REG 0x19 + +#define VSC8641_MII_PHY_STAT_REG 0x1C +#define VSC8641_MII_INT_STAT_REG 0x1A + +#define VSC8641_MII_PHY_EPA 0x1F +#define VSC8641_MII_PHY_RGMII_SKEW 0x1C + +#define VSC8641_AUTO_COMPLETED 0x20 + +#define VSC8641_CTRL_AUTO_NEG 0x1000 +#define VSC8641_CTRL_AUTO_NEG_RST 0x0200 +#define VSC8641_CTRL_1000MB 0x0040 +#define VSC8641_CTRL_100MB 0x2000 +#define VSC8641_CTRL_FULL_DUPLEX 0x0100 + +#define VSC8641_IRQ_SPEED_CHANGE 0x4000 +#define VSC8641_IRQ_FDX_STATE_CHANGE 0x1000 +#define VSC8641_IRQ_LINK_CHANGE 0x2000 + +#define VSC8641_MII_PHY_STAT_DUPLEX_FULL 0x20 +#define VSC8641_MII_PHY_STAT_1000MB 0x10 +#define VSC8641_MII_PHY_STAT_100MB 0x08 + +#define VSC8641_MII_PHY_STAT_LINK_UP 0x04 + +#endif // CYGONCE_PHY_VSC8641_HEADER_