changeset 1423:440ddbf97b39

2003-09-21 Jonathan Larmour <jifl@eCosCentric.com> * cdl/hal_sh.cdl: CYGHWR_HAL_SH_FPU_REGS is only needed if there's an FPU. * include/hal_var_bank.h (HAL_THREAD_INIT_CONTEXT_FPU): Use FPSCR init value from HAL register definitions. 2003-09-19 John Dallaway <jld@ecoscentric.com> * cdl/hal_sh.cdl: Specify default CDL values for sh4_202_md target. 2003-09-11 Nick Garnett <nickg@ecoscentric.com> * include/hal_var_bank.h (HAL_THREAD_INIT_CONTEXT_FPU): Changed initial value of fpscr to do round-to-nearest rather than round-to-zero. 2003-09-08 Nick Garnett <nickg@ecoscentric.com> * src/vectors.S (cyg_hal_default_exception_vsr): Added code to switch to interrupt stack when fielding exceptions from RedBoot or some other ROM monitor. Without this we get potential stack overflows when debugging via the network. 2003-09-05 Nick Garnett <nickg@ecoscentric.com> * include/hal_arch.h: * include/hal_var_bank.h: * include/hal_var_bank.inc: * src/context.S: Added support for floating point state save and restore and GDB * src/hal_misc.c (hal_delay_us): Fixed implementation of this routine so that it actually works. * src/hal_syscall.c: Added support for all supportable syscalls. * src/sh_stub.c: Added check in __is_bsp_syscall() for trap 34 traps using the TRA register. * src/vectors.S: Set startup stack size to the same as the interrupt stack size. In some configurations of RedBoot the previous value was too small. * include/sh_stub.h: Fixed HAL_STUB_PLATFORM_STUBS_FIXUP() to only rewind for a breakpoint. Traps are not rewound. * cdl/hal_sh.cdl: Added option for SH architecture FP register count.
author nickg
date Fri, 05 Dec 2003 17:06:23 +0000
parents d5f61a251ca3
children 5268028c09c4
files packages/hal/sh/arch/current/ChangeLog packages/hal/sh/arch/current/cdl/hal_sh.cdl packages/hal/sh/arch/current/include/hal_arch.h packages/hal/sh/arch/current/include/hal_var_bank.h packages/hal/sh/arch/current/include/hal_var_bank.inc packages/hal/sh/arch/current/include/sh_stub.h packages/hal/sh/arch/current/src/context.S packages/hal/sh/arch/current/src/hal_misc.c packages/hal/sh/arch/current/src/hal_syscall.c packages/hal/sh/arch/current/src/sh_stub.c packages/hal/sh/arch/current/src/vectors.S
diffstat 11 files changed, 422 insertions(+), 34 deletions(-) [+]
line wrap: on
line diff
--- a/packages/hal/sh/arch/current/ChangeLog
+++ b/packages/hal/sh/arch/current/ChangeLog
@@ -3,6 +3,60 @@ 2003-12-05  Andrew Lunn  <andrew.lunn@as
 	* include/hal_intr_excevt.h: 
 	* include/hal_intr_vecs.h: hal_delay_us() is a C function.
 
+2003-09-21  Jonathan Larmour  <jifl@eCosCentric.com>
+
+	* cdl/hal_sh.cdl: CYGHWR_HAL_SH_FPU_REGS is only needed if there's an
+	FPU.
+
+	* include/hal_var_bank.h (HAL_THREAD_INIT_CONTEXT_FPU): Use FPSCR
+	init value from HAL register definitions.
+
+2003-09-19  John Dallaway  <jld@ecoscentric.com>
+
+	* cdl/hal_sh.cdl: Specify default CDL values for sh4_202_md target.
+
+2003-09-11  Nick Garnett  <nickg@ecoscentric.com>
+
+	* include/hal_var_bank.h (HAL_THREAD_INIT_CONTEXT_FPU): Changed
+	initial value of fpscr to do round-to-nearest rather than
+	round-to-zero.
+
+2003-09-08  Nick Garnett  <nickg@ecoscentric.com>
+
+	* src/vectors.S (cyg_hal_default_exception_vsr): Added code to
+	switch to interrupt stack when fielding exceptions from RedBoot or
+	some other ROM monitor. Without this we get potential stack
+	overflows when debugging via the network.
+
+2003-09-05  Nick Garnett  <nickg@ecoscentric.com>
+
+	* include/hal_arch.h:
+	* include/hal_var_bank.h:
+	* include/hal_var_bank.inc:
+	* src/context.S:
+	Added support for floating point state save and restore and GDB 
+
+	* src/hal_misc.c (hal_delay_us): Fixed implementation of this
+	routine so that it actually works.
+
+	* src/hal_syscall.c:
+	Added support for all supportable syscalls.
+
+	* src/sh_stub.c:
+	Added check in __is_bsp_syscall() for trap 34 traps using the TRA
+	register.
+
+	* src/vectors.S: Set startup stack size to the same as the
+	interrupt stack size. In some configurations of RedBoot the
+	previous value was too small.
+	
+	* include/sh_stub.h:
+	Fixed HAL_STUB_PLATFORM_STUBS_FIXUP() to only rewind for a
+	breakpoint. Traps are not rewound.
+	
+	* cdl/hal_sh.cdl: Added option for SH architecture FP register
+	count.
+
 2003-07-29  Gary Thomas  <gary@mlbassoc.com> on behalf of
 2003-07-29  Yoshinori Sato <ysato@users.sourceforge.jp>	
 
--- a/packages/hal/sh/arch/current/cdl/hal_sh.cdl
+++ b/packages/hal/sh/arch/current/cdl/hal_sh.cdl
@@ -9,6 +9,7 @@
 ## -------------------------------------------
 ## This file is part of eCos, the Embedded Configurable Operating System.
 ## Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
+## Copyright (C) 2003 Nick Garnett 
 ##
 ## eCos is free software; you can redistribute it and/or modify it under
 ## the terms of the GNU General Public License as published by the Free
@@ -41,7 +42,7 @@
 ######DESCRIPTIONBEGIN####
 #
 # Author(s):      jskov
-# Original data:  jskov
+# Original data:  jskov, nickg
 # Contributors:
 # Date:           1999-10-29
 #
@@ -130,6 +131,17 @@ cdl_package CYGPKG_HAL_SH {
             calculated    !CYGHWR_HAL_SH_FPU
         }
 
+        cdl_option CYGHWR_HAL_SH_FPU_REGS {
+            display       "Variant FPU register count"
+            flavor        data
+            active_if     CYGHWR_HAL_SH_FPU
+            default_value 16
+            legal_values  { 16 32 }
+            description   "Number of FPU registers present. The SH3 has
+                           16 registers in one bank. The SH4 has 32
+                           registers in two banks."
+        }
+
         cdl_option CYGHWR_HAL_SH_BIGENDIAN {
             display          "Use big-endian mode"
             default_value    { (CYGINT_HAL_SH_PLF_BIGENDIAN_DEFAULT != 0) \
--- a/packages/hal/sh/arch/current/include/hal_arch.h
+++ b/packages/hal/sh/arch/current/include/hal_arch.h
@@ -12,6 +12,7 @@
 // -------------------------------------------
 // This file is part of eCos, the Embedded Configurable Operating System.
 // Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
+// Copyright (C) 2003 Nick Garnett 
 //
 // eCos is free software; you can redistribute it and/or modify it under
 // the terms of the GNU General Public License as published by the Free
@@ -44,7 +45,7 @@
 //#####DESCRIPTIONBEGIN####
 //
 // Author(s):   jskov
-// Contributors:jskov
+// Contributors:jskov, nickg
 // Date:        1999-04-24
 // Purpose:     Define architecture abstractions
 // Usage:       #include <cyg/hal/hal_arch.h>
@@ -169,11 +170,15 @@ externC void hal_idle_thread_action(cyg_
 #define CYGNUM_HAL_STACK_FRAME_SIZE (4 * 10)
 
 // Stack needed for a context switch (shreg_context_size from sh.inc)
-#define CYGNUM_HAL_STACK_CONTEXT_SIZE (4 * 21)
+#ifndef CYGHWR_HAL_SH_FPU
+#define CYGNUM_HAL_STACK_CONTEXT_SIZE (4 * 24)
+#else
+#define CYGNUM_HAL_STACK_CONTEXT_SIZE (4 * (26 + CYGHWR_HAL_SH_FPU_REGS))
+#endif
 
 // Interrupt + call to ISR, interrupt_end() and the DSR
 #define CYGNUM_HAL_STACK_INTERRUPT_SIZE \
-    ((24*4 /* sizeof(HAL_SavedRegisters) */) + 2 * CYGNUM_HAL_STACK_FRAME_SIZE)
+    (CYGNUM_HAL_STACK_CONTEXT_SIZE + 2 * CYGNUM_HAL_STACK_FRAME_SIZE)
 
 // We define a minimum stack size as the minimum any thread could ever
 // legitimately get away with. We can throw asserts if users ask for less
--- a/packages/hal/sh/arch/current/include/hal_var_bank.h
+++ b/packages/hal/sh/arch/current/include/hal_var_bank.h
@@ -11,6 +11,7 @@
 // -------------------------------------------
 // This file is part of eCos, the Embedded Configurable Operating System.
 // Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
+// Copyright (C) 2003 Nick Garnett 
 //
 // eCos is free software; you can redistribute it and/or modify it under
 // the terms of the GNU General Public License as published by the Free
@@ -43,7 +44,7 @@
 //#####DESCRIPTIONBEGIN####
 //
 // Author(s):   jskov
-// Contributors:jskov
+// Contributors:jskov, nickg
 // Date:        2002-01-11
 // Purpose:     Architecture abstractions for variants with banked registers
 //              
@@ -60,6 +61,13 @@ typedef struct
     cyg_uint32   r[16];                 // Data regs
     cyg_uint32   macl;                  // Multiply and accumulate - low
     cyg_uint32   mach;                  // Multiply and accumulate - high
+
+#ifdef CYGHWR_HAL_SH_FPU
+    cyg_uint32  fr[CYGHWR_HAL_SH_FPU_REGS]; // Floating point registers
+    cyg_uint32  fpul;                   // Floating point comm reg
+    cyg_uint32  fpscr;                  // Floating point status/control reg
+#endif
+    
     cyg_uint32   pr;                    // Procedure Reg
     cyg_uint32   sr;                    // Status Reg
     cyg_uint32   pc;                    // Program Counter
@@ -86,6 +94,20 @@ typedef struct
 // _entry_ entry point address.
 // _id_ bit pattern used in initializing registers, for debugging.
 
+#ifdef CYGHWR_HAL_SH_FPU
+#include <cyg/hal/sh_regs.h>
+#define HAL_THREAD_INIT_CONTEXT_FPU( _regs_ )           \
+{                                                       \
+    int _i_;                                            \
+    (_regs_)->fpul = 0;                                 \
+    (_regs_)->fpscr = CYG_FPSCR;                        \
+    for( _i_ = 0; _i_ < CYGHWR_HAL_SH_FPU_REGS; _i_++ ) \
+        (_regs_)->fr[_i_] = 0;                          \
+}
+#else
+#define HAL_THREAD_INIT_CONTEXT_FPU( _regs_ )
+#endif
+
 #define HAL_THREAD_INIT_CONTEXT( _sparg_, _thread_, _entry_, _id_ )           \
     CYG_MACRO_START                                                           \
     register CYG_WORD _sp_ = (CYG_WORD)_sparg_;                               \
@@ -101,8 +123,9 @@ typedef struct
     (_regs_)->mach = 0;                        /* MACH = 0               */   \
     (_regs_)->macl = 0;                        /* MACL = 0               */   \
     (_regs_)->pr = (CYG_WORD)(_entry_);        /* PR = entry point       */   \
-    (_regs_)->sr = 0;                          /* SR = enable interrupts */   \
+    (_regs_)->sr = 0x70000000;                 /* SR = enable interrupts */   \
     (_regs_)->pc = (CYG_WORD)(_entry_);        /* set PC for thread dbg  */   \
+    HAL_THREAD_INIT_CONTEXT_FPU( _regs_ );     /* Init FPU state         */   \
     _sparg_ = (CYG_ADDRESS)_regs_;                                            \
     CYG_MACRO_END
 
@@ -114,6 +137,29 @@ typedef struct
 #define HAL_THREAD_GET_SAVED_REGISTERS( _sp_, _regs_ )  \
         (_regs_) = (HAL_SavedRegisters *)(_sp_)
 
+#ifdef CYGHWR_HAL_SH_FPU
+#define HAL_GET_GDB_REGISTERS_FPU( _regval_, _regs_ )   \
+{                                                       \
+    _regval_[23] = (_regs_)->fpul;                      \
+    _regval_[24] = (_regs_)->fpscr;                     \
+                                                        \
+    for( _i_ = 0; _i_ < 16; _i_++ )                     \
+        _regval_[25+_i_] = (_regs_)->fr[_i_];           \
+}
+
+#define HAL_SET_GDB_REGISTERS_FPU( _regs_, _regval_ )   \
+{                                                       \
+    (_regs_)->fpul = _regval_[23];                      \
+    (_regs_)->fpscr = _regval_[24];                     \
+                                                        \
+    for( _i_ = 0; _i_ < 16; _i_++ )                     \
+        (_regs_)->fr[_i_] = _regval_[25+_i_];           \
+}
+#else
+#define HAL_GET_GDB_REGISTERS_FPU( _regval_, _regs_ )
+#define HAL_SET_GDB_REGISTERS_FPU( _regs_, _regval_ )
+#endif
+
 // Copy a set of registers from a HAL_SavedRegisters structure into a
 // GDB ordered array.    
 #define HAL_GET_GDB_REGISTERS( _aregval_, _regs_ )              \
@@ -121,7 +167,14 @@ typedef struct
     CYG_ADDRWORD *_regval_ = (CYG_ADDRWORD *)(_aregval_);       \
     int _i_;                                                    \
                                                                 \
-    for( _i_ = 0; _i_ < 16; _i_++ )                             \
+    for( _i_ = 0; _i_ < 8; _i_++ )                              \
+    {                                                           \
+        _regval_[_i_] = (_regs_)->r[_i_];                       \
+        _regval_[43+_i_] = (_regs_)->r[_i_];                    \
+        _regval_[51+_i_] = 0;                                   \
+    }                                                           \
+                                                                \
+    for( /* _i_ = 8 */ ; _i_ < 16; _i_++ )                      \
         _regval_[_i_] = (_regs_)->r[_i_];                       \
                                                                 \
     _regval_[16] = (_regs_)->pc;                                \
@@ -132,7 +185,8 @@ typedef struct
     _regval_[21] = (_regs_)->macl;                              \
     _regval_[22] = (_regs_)->sr;                                \
                                                                 \
-    /* 23-51 not used atm. */                                   \
+    HAL_GET_GDB_REGISTERS_FPU( _regval_, _regs_ );              \
+                                                                \
     CYG_MACRO_END
 
 // Copy a GDB ordered array into a HAL_SavedRegisters structure.
@@ -151,6 +205,9 @@ typedef struct
     (_regs_)->mach = _regval_[20];                              \
     (_regs_)->macl = _regval_[21];                              \
     (_regs_)->sr = _regval_[22];                                \
+                                                                \
+    HAL_SET_GDB_REGISTERS_FPU( _regs_, _regval_ );              \
+                                                                \
     CYG_MACRO_END
 
 //--------------------------------------------------------------------------
--- a/packages/hal/sh/arch/current/include/hal_var_bank.inc
+++ b/packages/hal/sh/arch/current/include/hal_var_bank.inc
@@ -9,6 +9,7 @@
 ## -------------------------------------------
 ## This file is part of eCos, the Embedded Configurable Operating System.
 ## Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
+## Copyright (C) 2003 Nick Garnett 
 ##
 ## eCos is free software; you can redistribute it and/or modify it under
 ## the terms of the GNU General Public License as published by the Free
@@ -41,7 +42,7 @@
 #######DESCRIPTIONBEGIN####
 ##
 ## Author(s):    jskov
-## Contributors: jskov
+## Contributors: jskov, nickg
 ## Date:         2002-01-11
 ## Purpose:      SH support code for variants using register banks
 ##
@@ -207,6 +208,50 @@ 2:
         mov.l   r0,@-r15                ! SR
 
         sts.l   pr,@-r15                ! PR
+
+#ifdef CYGHWR_HAL_SH_FPU
+        sts.l   fpscr,@-r15
+        sts.l   fpul,@-r15
+        mov.l   3f,r0                   ! set FPSCR to known value
+        lds     r0,fpscr
+#if CYGHWR_HAL_SH_FPU_REGS == 32
+        frchg
+        fmov.s  fr15,@-r15
+        fmov.s  fr14,@-r15
+        fmov.s  fr13,@-r15
+        fmov.s  fr12,@-r15
+        fmov.s  fr11,@-r15
+        fmov.s  fr10,@-r15
+        fmov.s  fr9,@-r15
+        fmov.s  fr8,@-r15
+        fmov.s  fr7,@-r15
+        fmov.s  fr6,@-r15
+        fmov.s  fr5,@-r15
+        fmov.s  fr4,@-r15
+        fmov.s  fr3,@-r15
+        fmov.s  fr2,@-r15
+        fmov.s  fr1,@-r15
+        fmov.s  fr0,@-r15        
+        frchg
+#endif          
+        fmov.s  fr15,@-r15
+        fmov.s  fr14,@-r15
+        fmov.s  fr13,@-r15
+        fmov.s  fr12,@-r15
+        fmov.s  fr11,@-r15
+        fmov.s  fr10,@-r15
+        fmov.s  fr9,@-r15
+        fmov.s  fr8,@-r15
+        fmov.s  fr7,@-r15
+        fmov.s  fr6,@-r15
+        fmov.s  fr5,@-r15
+        fmov.s  fr4,@-r15
+        fmov.s  fr3,@-r15
+        fmov.s  fr2,@-r15
+        fmov.s  fr1,@-r15
+        fmov.s  fr0,@-r15
+#endif
+
         sts.l   mach,@-r15              ! mach
         sts.l   macl,@-r15              ! macl
 
@@ -234,6 +279,7 @@ 2:
 	 nop
         .align  2        
 1:	.long   CYG_SR
+3:      .long   CYG_FPSCR
         # ------------------------------------------------------------
         # Register bank has changed now. 
 2:
@@ -285,6 +331,48 @@ 2:
 
         lds.l   @r0+,macl               ! macl
         lds.l   @r0+,mach               ! mach
+
+#ifdef CYGHWR_HAL_SH_FPU
+        fmov.s  @r0+,fr0
+        fmov.s  @r0+,fr1
+        fmov.s  @r0+,fr2
+        fmov.s  @r0+,fr3
+        fmov.s  @r0+,fr4
+        fmov.s  @r0+,fr5
+        fmov.s  @r0+,fr6
+        fmov.s  @r0+,fr7
+        fmov.s  @r0+,fr8
+        fmov.s  @r0+,fr9
+        fmov.s  @r0+,fr10
+        fmov.s  @r0+,fr11
+        fmov.s  @r0+,fr12
+        fmov.s  @r0+,fr13
+        fmov.s  @r0+,fr14
+        fmov.s  @r0+,fr15
+#if CYGHWR_HAL_SH_FPU_REGS == 32
+        frchg
+        fmov.s  @r0+,fr0
+        fmov.s  @r0+,fr1
+        fmov.s  @r0+,fr2
+        fmov.s  @r0+,fr3
+        fmov.s  @r0+,fr4
+        fmov.s  @r0+,fr5
+        fmov.s  @r0+,fr6
+        fmov.s  @r0+,fr7
+        fmov.s  @r0+,fr8
+        fmov.s  @r0+,fr9
+        fmov.s  @r0+,fr10
+        fmov.s  @r0+,fr11
+        fmov.s  @r0+,fr12
+        fmov.s  @r0+,fr13
+        fmov.s  @r0+,fr14
+        fmov.s  @r0+,fr15
+        frchg
+#endif                  
+        lds.l   @r0+,fpul
+        lds.l   @r0+,fpscr
+#endif
+
         lds.l   @r0+,pr                 ! PR
 
         mov.l   @r0+,r2
@@ -303,7 +391,6 @@ 2:
          nop
         .align  2        
 1:	.long   CYG_SR_BANK1
-
 	.endm
 
 #---------------------------------------------------------------------------
@@ -313,11 +400,12 @@ 1:	.long   CYG_SR_BANK1
         mov.l   @r0,r4
         mov     #-5,r0                  ! divide cause by 0x20
         shld    r0,r4
-        mov     #CYGARC_SHREG_EVENT,r0
+        mov.l   3f,r0
 	bra     2f
          mov.l   r4,@(r0,r15)            ! store decoded vector number back
 	.align  2
 1:	.long   CYGARC_REG_EXCEVT
+3:      .long   CYGARC_SHREG_EVENT
 2:	
 	.endm
 
--- a/packages/hal/sh/arch/current/include/sh_stub.h
+++ b/packages/hal/sh/arch/current/include/sh_stub.h
@@ -12,6 +12,7 @@
 // -------------------------------------------
 // This file is part of eCos, the Embedded Configurable Operating System.
 // Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
+// Copyright (C) 2003 Nick Garnett 
 //
 // eCos is free software; you can redistribute it and/or modify it under
 // the terms of the GNU General Public License as published by the Free
@@ -44,7 +45,7 @@
 //#####DESCRIPTIONBEGIN####
 //
 // Author(s):    jskov
-// Contributors: jskov,
+// Contributors: jskov, nickg
 // Date:         1999-05-18
 // Purpose:      Define SH stub stuff
 //
@@ -71,7 +72,9 @@ enum regnames {
     FPUL, FPSCR,
     FP0, FP1, FP2, FP3, FP4, FP5, FP6, FP7,
     FP8, FP9, FP10, FP11, FP12, FP13, FP14, FP15,
-    SSR, SPC, ROB0, ROB1
+    SSR, SPC,
+    ROB0, R1B0, R2B0, R3B0, R4B0, R5B0, R6B0, R7B0, 
+    ROB1, R1B1, R2B1, R3B1, R4B1, R5B1, R6B1, R7B1
 };
 
 // For convenience
@@ -119,7 +122,11 @@ extern void __clear_breakpoints (void);
 #define HAL_STUB_PLATFORM_STUBS_FIXUP()                         \
     CYG_MACRO_START                                             \
     if (CYGNUM_HAL_EXCEPTION_TRAP == __get_trap_number())       \
-        put_register(PC, get_register(PC) - 2);                 \
+    {                                                           \
+        CYG_ADDRESS pc = get_register(PC) - 2;                  \
+        if( *(cyg_uint16 *)pc == HAL_BREAKINST )                \
+            put_register(PC, pc);                               \
+    }                                                           \
     CYG_MACRO_END
 
 #ifdef __cplusplus
--- a/packages/hal/sh/arch/current/src/context.S
+++ b/packages/hal/sh/arch/current/src/context.S
@@ -9,6 +9,7 @@
 ## -------------------------------------------
 ## This file is part of eCos, the Embedded Configurable Operating System.
 ## Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
+## Copyright (C) 2003 Nick Garnett 
 ##
 ## eCos is free software; you can redistribute it and/or modify it under
 ## the terms of the GNU General Public License as published by the Free
@@ -41,7 +42,7 @@
 #######DESCRIPTIONBEGIN####
 ##
 ## Author(s):   jskov
-## Contributors:jskov
+## Contributors:jskov, nickg
 ## Date:        1999-05-01
 ## Purpose:     SH context switch code
 ## Description: This file contains implementations of the thread context 
@@ -98,6 +99,48 @@ FUNC_START(hal_thread_switch_context)
         mov.l   r1,@-r15
 
         sts.l   pr,@-r15                ! return address
+
+#ifdef CYGHWR_HAL_SH_FPU
+        sts.l   fpscr,@-r15
+        sts.l   fpul,@-r15
+#if CYGHWR_HAL_SH_FPU_REGS == 32
+        frchg
+        fmov.s  fr15,@-r15
+        fmov.s  fr14,@-r15
+        fmov.s  fr13,@-r15
+        fmov.s  fr12,@-r15
+        fmov.s  fr11,@-r15
+        fmov.s  fr10,@-r15
+        fmov.s  fr9,@-r15
+        fmov.s  fr8,@-r15
+        fmov.s  fr7,@-r15
+        fmov.s  fr6,@-r15
+        fmov.s  fr5,@-r15
+        fmov.s  fr4,@-r15
+        fmov.s  fr3,@-r15
+        fmov.s  fr2,@-r15
+        fmov.s  fr1,@-r15
+        fmov.s  fr0,@-r15
+        frchg
+#endif          
+        fmov.s  fr15,@-r15
+        fmov.s  fr14,@-r15
+        fmov.s  fr13,@-r15
+        fmov.s  fr12,@-r15
+        fmov.s  fr11,@-r15
+        fmov.s  fr10,@-r15
+        fmov.s  fr9,@-r15
+        fmov.s  fr8,@-r15
+        fmov.s  fr7,@-r15
+        fmov.s  fr6,@-r15
+        fmov.s  fr5,@-r15
+        fmov.s  fr4,@-r15
+        fmov.s  fr3,@-r15
+        fmov.s  fr2,@-r15
+        fmov.s  fr1,@-r15
+        fmov.s  fr0,@-r15
+#endif
+        
         sts.l   macl,@-r15              ! macl
         sts.l   mach,@-r15              ! mach
         mov.l   r0,@-r15                ! saved r15 (entry sp)
@@ -153,6 +196,48 @@ FUNC_START(hal_thread_load_context)
 
         lds.l   @r0+,mach               ! mach
         lds.l   @r0+,macl               ! macl
+
+#ifdef CYGHWR_HAL_SH_FPU
+        fmov.s  @r0+,fr0
+        fmov.s  @r0+,fr1
+        fmov.s  @r0+,fr2
+        fmov.s  @r0+,fr3
+        fmov.s  @r0+,fr4
+        fmov.s  @r0+,fr5
+        fmov.s  @r0+,fr6
+        fmov.s  @r0+,fr7
+        fmov.s  @r0+,fr8
+        fmov.s  @r0+,fr9
+        fmov.s  @r0+,fr10
+        fmov.s  @r0+,fr11
+        fmov.s  @r0+,fr12
+        fmov.s  @r0+,fr13
+        fmov.s  @r0+,fr14
+        fmov.s  @r0+,fr15
+#if CYGHWR_HAL_SH_FPU_REGS == 32
+        frchg
+        fmov.s  @r0+,fr0
+        fmov.s  @r0+,fr1
+        fmov.s  @r0+,fr2
+        fmov.s  @r0+,fr3
+        fmov.s  @r0+,fr4
+        fmov.s  @r0+,fr5
+        fmov.s  @r0+,fr6
+        fmov.s  @r0+,fr7
+        fmov.s  @r0+,fr8
+        fmov.s  @r0+,fr9
+        fmov.s  @r0+,fr10
+        fmov.s  @r0+,fr11
+        fmov.s  @r0+,fr12
+        fmov.s  @r0+,fr13
+        fmov.s  @r0+,fr14
+        fmov.s  @r0+,fr15
+        frchg
+#endif                  
+        lds.l   @r0+,fpul
+        lds.l   @r0+,fpscr
+#endif
+        
         lds.l   @r0+,pr                 ! pr
 
         mov     r3,r15                  ! update stack pointer
--- a/packages/hal/sh/arch/current/src/hal_misc.c
+++ b/packages/hal/sh/arch/current/src/hal_misc.c
@@ -9,6 +9,7 @@
 // -------------------------------------------
 // This file is part of eCos, the Embedded Configurable Operating System.
 // Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
+// Copyright (C) 2003 Nick Garnett 
 //
 // eCos is free software; you can redistribute it and/or modify it under
 // the terms of the GNU General Public License as published by the Free
@@ -214,20 +215,32 @@ hal_delay_us(int usecs)
     volatile unsigned char *tstr = (volatile unsigned char *)CYGARC_REG_TSTR;
     volatile unsigned long *tcnt = (volatile unsigned long *)CYGARC_REG_TCNT1;
     volatile unsigned long *tcor = (volatile unsigned long *)CYGARC_REG_TCOR1;
-    unsigned long clocks_per_us = (CYGHWR_HAL_SH_ONCHIP_PERIPHERAL_SPEED+(CYGHWR_HAL_SH_TMU_PRESCALE_0-1))/CYGHWR_HAL_SH_TMU_PRESCALE_0;  // Rounded up
-    int diff, diff2;
-    cyg_uint32 val1, val2;
+    volatile unsigned short *tcr = (volatile unsigned short *)CYGARC_REG_TCR1;
+    unsigned long clocks_per_us = (((CYGHWR_HAL_SH_ONCHIP_PERIPHERAL_SPEED/1000000) +
+                                    (CYGHWR_HAL_SH_TMU_PRESCALE_0-1))               /
+                                   CYGHWR_HAL_SH_TMU_PRESCALE_0);
+    volatile int diff, diff2;
+    volatile cyg_uint32 val1, val2;
 
+    *tcr = (( 4==CYGHWR_HAL_SH_TMU_PRESCALE_0) ? CYGARC_REG_TCR_TPSC_4 :
+            (16==CYGHWR_HAL_SH_TMU_PRESCALE_0) ? CYGARC_REG_TCR_TPSC_16:
+            (64==CYGHWR_HAL_SH_TMU_PRESCALE_0) ? CYGARC_REG_TCR_TPSC_64:
+                                                 CYGARC_REG_TCR_TPSC_256);
+
+    *tcnt = 0x0FFFFFFF;
+    *tcor = 0x0FFFFFFF;
+    
     _tstr = *tstr;
     *tstr |= CYGARC_REG_TSTR_STR1;  // Enable channel 1
     while (usecs-- > 0) {
         diff = 0;
+        val1 = *tcnt;
         while (diff < clocks_per_us) {
-            val1 = *tcnt;
             while ((val2 = *tcnt) == val1) ;
-            diff2 = val2 - val1;
+            diff2 = val1 - val2;
             if (diff2 < 0) diff2 += *tcor;
             diff += diff2;
+            val1 = val2;
         }
     }
     *tstr = _tstr;                  // Restore timer to previous state
--- a/packages/hal/sh/arch/current/src/hal_syscall.c
+++ b/packages/hal/sh/arch/current/src/hal_syscall.c
@@ -9,6 +9,7 @@
 // -------------------------------------------
 // This file is part of eCos, the Embedded Configurable Operating System.
 // Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Red Hat, Inc.
+// Copyright (C) 2003 Nick Garnett 
 //
 // eCos is free software; you can redistribute it and/or modify it under
 // the terms of the GNU General Public License as published by the Free
@@ -41,7 +42,7 @@
 //#####DESCRIPTIONBEGIN####
 //
 // Author(s):   msalter
-// Contributors:msalter, jskov
+// Contributors:msalter, jskov, nickg
 // Date:        2002-02-28
 // Purpose:     
 // Description: 
@@ -98,6 +99,10 @@ extern int __do_syscall(int func,		// sy
 #define _shnewlib_SYS_pipe        42
 #define _shnewlib_SYS_execve      59
 
+#define _shnewlib_SYS_argc        172 /* == 0xAC, for Argument Count :-) */
+#define _shnewlib_SYS_argnlen     173
+#define _shnewlib_SYS_argn        174
+
 #define _shnewlib_SYS_utime       201 /* not really a system call */
 #define _shnewlib_SYS_wait        202 /* nor is this */
 
@@ -114,6 +119,9 @@ hal_syscall_handler(void)
     arg4 = *(unsigned int *)(get_register(SP));
 
     switch (func) {
+    case _shnewlib_SYS_exit:
+        func = SYS_exit;
+        break;
     case _shnewlib_SYS_read:
         func = SYS_read;
         break;
@@ -129,8 +137,36 @@ hal_syscall_handler(void)
     case _shnewlib_SYS_lseek:
         func = SYS_lseek;
         break;
+    case _shnewlib_SYS_unlink:
+        func = SYS_unlink;
+        break;
+    case _shnewlib_SYS_getpid:
+        func = SYS_getpid;
+        break;
+    case _shnewlib_SYS_fstat:
+        func = SYS_fstat;
+        break;
+    case _shnewlib_SYS_chdir:
+        func = SYS_chdir;
+        break;
+    case _shnewlib_SYS_stat:
+        func = SYS_stat;
+        break;
+    case _shnewlib_SYS_chmod:
+        func = SYS_chmod;
+        break;
+    case _shnewlib_SYS_time:
+        func = SYS_time;
+        break;
+    case _shnewlib_SYS_isatty:
+        func = SYS_isatty;
+        break;
     case _shnewlib_SYS_utime:
         func = SYS_utime;
+    case _shnewlib_SYS_argc:
+        put_register( R0, 0 );
+        put_register( R1, 0 );
+        return 0;
     default:
         return SIGTRAP;
     }
--- a/packages/hal/sh/arch/current/src/sh_stub.c
+++ b/packages/hal/sh/arch/current/src/sh_stub.c
@@ -9,6 +9,7 @@
 // -------------------------------------------
 // This file is part of eCos, the Embedded Configurable Operating System.
 // Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
+// Copyright (C) 2003 Nick Garnett 
 //
 // eCos is free software; you can redistribute it and/or modify it under
 // the terms of the GNU General Public License as published by the Free
@@ -41,7 +42,7 @@
 //#####DESCRIPTIONBEGIN####
 //
 // Author(s):    jskov
-// Contributors: jskov, Ben Lee, Steve Chamberlain
+// Contributors: jskov, Ben Lee, Steve Chamberlain, nickg
 // Date:         1999-05-18
 // Description:  GDB Stub support for sh CPU.
 //
@@ -127,7 +128,12 @@ int
 #if defined(CYGSEM_REDBOOT_BSP_SYSCALLS)
 int __is_bsp_syscall(void) 
 {
-    if (_hal_registers->event == 34)
+#if defined(CYGARC_REG_TRA)    
+    if (_hal_registers->event == 11 &&
+        (*(CYG_WORD *)CYGARC_REG_TRA) == (34<<2))
+#else
+    if (_hal_registers->event == 34 )
+#endif
         return 1;
     else
         return 0;
--- a/packages/hal/sh/arch/current/src/vectors.S
+++ b/packages/hal/sh/arch/current/src/vectors.S
@@ -9,6 +9,7 @@
 ## -------------------------------------------
 ## This file is part of eCos, the Embedded Configurable Operating System.
 ## Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
+## Copyright (C) 2003 Nick Garnett 
 ##
 ## eCos is free software; you can redistribute it and/or modify it under
 ## the terms of the GNU General Public License as published by the Free
@@ -41,7 +42,7 @@
 #######DESCRIPTIONBEGIN####
 ##
 ## Author(s):    jskov
-## Contributors: jskov, gthomas
+## Contributors: jskov, gthomas, nickg
 ## Date:         1999-05-01
 ## Purpose:      SH exception vectors
 ## Description:  This file defines the code placed into the exception
@@ -111,21 +112,45 @@ 2:
 	# the decoded exception number
 	hal_exception_translate
 
+        mov      r15,r4                 ! R4 = register dump
+        
+#if (defined(CYGSEM_HAL_ROM_MONITOR) || defined(CYGPKG_REDBOOT)) && \
+    defined(CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK)
+
+        mov.l   $cyg_interrupt_stack_base,r0
+        mov.l   $cyg_interrupt_stack,r1
+        cmp/hi  r15,r0                  ! if r0 > r15 or
+        bt      2f
+        cmp/hi  r1,r15                  ! if r15 > r1
+        bf      1f
+2:      mov     r1,r15                  ! change to supervisor stack
+1:      mov.l   r4,@-r15                ! save old stack pointer
+
+#endif
+        
         # The entire CPU state is now stashed on the stack,
         # call into C to do something with it.
 
-        mov      r15,r4                 ! R4 = register dump
-
-        mov.l   $restore_state,r0       ! get return link
-        lds     r0,pr                   ! to procedure register
-
         mov.l   $cyg_hal_exception_handler,r0
-        jmp     @r0                     ! call C code, r4 = registers
+        jsr     @r0                     ! call C code, r4 = registers
          nop
 
+#if (defined(CYGSEM_HAL_ROM_MONITOR) || defined(CYGPKG_REDBOOT)) && \
+    defined(CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK)
+
+        # If we are returning from the last nested exception, move back
+        # to the thread stack. 
+        # Since we have arranged for the top of stack location to
+        # contain the sp we need to go back to here, just pop it off
+        # and put it in SP.
+
+        mov.l   @r15,r15
+#endif
+        
+        bra     restore_state
+         nop
+        
         .align  2
-$restore_state:
-        .long   restore_state
         SYM_PTR_REF(cyg_hal_exception_handler)
 
 #---------------------------------------------------------------------------
@@ -589,10 +614,10 @@ SYM_DEF(cyg_interrupt_stack)
 #endif // CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK
 
 
-#ifdef CYGSEM_HAL_ROM_MONITOR
+#if defined(CYGSEM_HAL_ROM_MONITOR) || defined(CYGPKG_REDBOOT)
   // Enough space for stub to handle downloads. If using thread capabilities
   // it will be using the RAM application's stack.
-# define STARTUP_STACK_SIZE 1024
+# define STARTUP_STACK_SIZE CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE
 #else
 # ifdef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK
    // Enough space to run constructors.