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changeset 2522:8064abf7f528

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* include/plf_io.h: removed AT91_SPI_MR_MODFDIS, AT91_WSTC (AT91_WDTC), AT91_AIC because already in var_io.h. Fixed typo.
author asl
date Thu, 14 Aug 2008 18:42:49 +0000
parents cac2b9a9e6e6
children 41caa79fe76e
files packages/hal/arm/at91/at91sam7s/current/ChangeLog packages/hal/arm/at91/at91sam7s/current/include/plf_io.h
diffstat 2 files changed, 7 insertions(+), 11 deletions(-) [+]
line wrap: on
line diff
--- a/packages/hal/arm/at91/at91sam7s/current/ChangeLog
+++ b/packages/hal/arm/at91/at91sam7s/current/ChangeLog
@@ -1,3 +1,8 @@
+2008-08-14  Jürgen Lambrecht <J.Lambrecht@televic.com>
+
+	* include/plf_io.h: removed AT91_SPI_MR_MODFDIS, AT91_WSTC
+	(AT91_WDTC), AT91_AIC because already in var_io.h. Fixed typo.
+
 2008-05-11  James G. Smith <jsmith@rallysmith.co.uk
             Andrew Lunn  <andrew@lunn.ch>
 
--- a/packages/hal/arm/at91/at91sam7s/current/include/plf_io.h
+++ b/packages/hal/arm/at91/at91sam7s/current/include/plf_io.h
@@ -62,9 +62,6 @@
 
 #define AT91_SPI AT91_SPI0
 
-//Extra SPI control bits
-#define AT91_SPI_MR_MODFDIS (1<<4)
-
 // DMA registers 
 #define AT91_SPI_RPR  0x100 // Receive Pointer Register
 #define AT91_SPI_RCR  0x104 // Receive Counter Register
@@ -73,7 +70,7 @@
 #define AT91_SPI_NRPR 0x110 // Next Receive Pointer Register
 #define AT91_SPI_NRCR 0x114 // Next Receive Counter Register
 #define AT91_SPI_NTPR 0x118 // Next Transmit Pointer Register
-#define AT91_SPI_NTCR 0x11C // Next Trsnsmit Counter Register
+#define AT91_SPI_NTCR 0x11C // Next Transmit Counter Register
 #define AT91_SPI_PTCR 0x120 // PDC Transfer Control Register
 #define AT91_SPI_PTSR 0x124 // PDC Transfer Status Register
 
@@ -83,8 +80,6 @@
 #define AT91_PIOB   0xFFFFF600
 #endif
 
-#define AT91_WSTC   0xFFFFFD40
-
 // USART
 
 #define AT91_USART0 0xFFFC0000
@@ -110,7 +105,7 @@ extern cyg_uint32 hal_at91_us_baud(cyg_u
 #define AT91_US_NRPR 0x110 // Next Receive Pointer Register
 #define AT91_US_NRCR 0x114 // Next Receive Counter Register
 #define AT91_US_NTPR 0x118 // Next Transmit Pointer Register 
-#define AT91_US_NTCR 0x11C // Next Trsnsmit Counter Register
+#define AT91_US_NTCR 0x11C // Next Transmit Counter Register
 #define AT91_US_PTCR 0x120 // PDC Transfer Control Register
 #define AT91_US_PTSR 0x124 // PDC Transfer Status Register
 
@@ -118,10 +113,6 @@ extern cyg_uint32 hal_at91_us_baud(cyg_u
 
 #define AT91_PIO    AT91_PIOA
 
-// AIC - Advanced Interrupt Controller
-
-#define AT91_AIC    0xFFFFF000
-
 // TC - Timer Counter
 
 #define AT91_TC     0xFFFA0000