Mercurial > ecos
changeset 248:825f61ca1975
Support new system clock frequencies.
| author | gthomas |
|---|---|
| date | Mon, 22 Jul 2002 17:13:37 +0000 |
| parents | c69b83a1a8bd |
| children | 4486bfabb514 |
| files | packages/hal/powerpc/viper/current/ChangeLog packages/hal/powerpc/viper/current/cdl/hal_powerpc_viper.cdl packages/hal/powerpc/viper/current/src/viper.S |
| diffstat | 3 files changed, 24 insertions(+), 2 deletions(-) [+] |
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--- a/packages/hal/powerpc/viper/current/ChangeLog +++ b/packages/hal/powerpc/viper/current/ChangeLog @@ -1,3 +1,9 @@ +2002-07-22 Gary Thomas <gary@chez-thomas.org> + + * src/viper.S: + * cdl/hal_powerpc_viper.cdl: + Support choices of 47.9, 51.6 MHz for the system clock. + 2002-07-18 Gary Thomas <gary@chez-thomas.org> * src/viper.S: Increase power-up delay before starting SDRAM.
--- a/packages/hal/powerpc/viper/current/cdl/hal_powerpc_viper.cdl +++ b/packages/hal/powerpc/viper/current/cdl/hal_powerpc_viper.cdl @@ -93,7 +93,7 @@ cdl_package CYGPKG_HAL_POWERPC_VIPER { cdl_option CYGHWR_HAL_POWERPC_BOARD_SPEED { display "Development board clock speed (MHz)" flavor data - legal_values 47 + legal_values { 47 51 } default_value 47 description " VIPER Development Boards have various system clock speeds
--- a/packages/hal/powerpc/viper/current/src/viper.S +++ b/packages/hal/powerpc/viper/current/src/viper.S @@ -256,7 +256,17 @@ 10: // Field WLFA (bits 24-27) = 1 // Field TLFA (bits 28-31) = 4 */ - lwi r3,0x5E802114 + +// +// PTX field is (System Clock in MHz * Refresh rate in us) / Prescale +// e.g. ((14*3.6864)*62.5)/32 => 100.8 => 101 +// +#if (CYGHWR_HAL_POWERPC_BOARD_SPEED == 47) + lwi r3,0x5E802114 // PTX = 94 +#endif +#if (CYGHWR_HAL_POWERPC_BOARD_SPEED == 51) + lwi r3,0x65802114 // PTX = 101 +#endif stw r3,MAMR(r4) stw r3,MBMR(r4) @@ -356,8 +366,14 @@ 10: // Field FIOPD (bit 26) = 0 // Field Reserved (bits 27-31) = 0 */ +#if (CYGHWR_HAL_POWERPC_BOARD_SPEED == 47) /* MF (0:11) = 0x00C = 12 = (47MHz/3.6864MHz)-1 */ lwi r3,0x00C04000 +#endif +#if (CYGHWR_HAL_POWERPC_BOARD_SPEED == 51) + /* MF (0:11) = 0x00D = 13 = (51.6MHz/3.6864MHz)-1 */ + lwi r3,0x00D04000 +#endif stw r3,PLPRCR(r4) LED(0xE0)