Mercurial > ecos
changeset 1832:9053ba5020a7
Fix timer capture channel B defines in AT91 var.Add some uart bit defines. I sent the patch in august to the list then forgot to commit it
| author | jani |
|---|---|
| date | Fri, 12 Nov 2004 09:45:15 +0000 |
| parents | 57ed8b8c8df9 |
| children | 14804b5162ae |
| files | packages/hal/arm/at91/var/current/ChangeLog packages/hal/arm/at91/var/current/include/var_io.h |
| diffstat | 2 files changed, 13 insertions(+), 4 deletions(-) [+] |
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--- a/packages/hal/arm/at91/var/current/ChangeLog +++ b/packages/hal/arm/at91/var/current/ChangeLog @@ -1,3 +1,8 @@ +2004-11-12 Jani Monoses <jani@iv.ro> + + * include/var_io.h: Added defines for some missing UART bits, + corrected a few timer capture mode register bits. + 2004-11-12 Andrew Lunn <andrew.lunn@ascom.ch> * src/hal_diag.c: Only support the third serial port if we have
--- a/packages/hal/arm/at91/var/current/include/var_io.h +++ b/packages/hal/arm/at91/var/current/include/var_io.h @@ -123,8 +123,12 @@ #define AT91_US_CSR 0x14 // Channel status register #define AT91_US_CSR_RxRDY 0x01 // Receive data ready #define AT91_US_CSR_TxRDY 0x02 // Transmit ready +#define AT91_US_CSR_RXBRK 0x04 // Transmit ready +#define AT91_US_CSR_ENDRX 0x08 // Transmit ready +#define AT91_US_CSR_ENDTX 0x10 // Transmit ready #define AT91_US_CSR_OVRE 0x20 // Overrun error #define AT91_US_CSR_FRAME 0x40 // Framing error +#define AT91_US_CSR_TIMEOUT 0x80 // Timeout #define AT91_US_RHR 0x18 // Receive holding register #define AT91_US_THR 0x1C // Transmit holding register #define AT91_US_BRG 0x20 // Baud rate generator @@ -396,10 +400,10 @@ #define AT91_TC_CMR_LDRA_TIOA_NEG (1<<16) #define AT91_TC_CMR_LDRA_TIOA_POS (2<<16) #define AT91_TC_CMR_LDRA_TIOA_BOTH (3<<16) -#define AT91_TC_CMR_LDRB_NONE (0<<16) -#define AT91_TC_CMR_LDRB_TIOA_NEG (1<<16) -#define AT91_TC_CMR_LDRB_TIOA_POS (2<<16) -#define AT91_TC_CMR_LDRB_TIOA_BOTH (3<<16) +#define AT91_TC_CMR_LDRB_NONE (0<<18) +#define AT91_TC_CMR_LDRB_TIOA_NEG (1<<18) +#define AT91_TC_CMR_LDRB_TIOA_POS (2<<18) +#define AT91_TC_CMR_LDRB_TIOA_BOTH (3<<18) // Waveform mode definitions #define AT91_TC_CMR_CPCSTOP (1<<6) #define AT91_TC_CMR_CPCDIS (1<<7)