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changeset 2994:9df777181d2a

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* src/stm32_misc.c (hal_start_clocks): Correct bit clear operation when disabling external clock.
author nickg
date Thu, 13 Jan 2011 11:37:28 +0000
parents b97a185587c7
children 05d279424483
files packages/hal/cortexm/stm32/var/current/ChangeLog packages/hal/cortexm/stm32/var/current/src/stm32_misc.c
diffstat 2 files changed, 6 insertions(+), 1 deletions(-) [+]
line wrap: on
line diff
--- a/packages/hal/cortexm/stm32/var/current/ChangeLog
+++ b/packages/hal/cortexm/stm32/var/current/ChangeLog
@@ -1,3 +1,8 @@
+2011-01-13  Nick Garnett  <nickg@ecoscentric.com>
+
+	* src/stm32_misc.c (hal_start_clocks): Correct bit clear operation
+	when disabling external clock.
+
 2009-10-26  Ross Younger  <wry@ecoscentric.com>
 
 	* include/var_io.h: Minor corrections to the FSMC register defs.
--- a/packages/hal/cortexm/stm32/var/current/src/stm32_misc.c
+++ b/packages/hal/cortexm/stm32/var/current/src/stm32_misc.c
@@ -166,7 +166,7 @@ void hal_start_clocks( void )
     // Start up HSE clock
     
     HAL_READ_UINT32( rcc+CYGHWR_HAL_STM32_RCC_CR, cr );
-    cr &= CYGHWR_HAL_STM32_RCC_CR_HSEON|CYGHWR_HAL_STM32_RCC_CR_HSEBYP;
+    cr &= ~(CYGHWR_HAL_STM32_RCC_CR_HSEON|CYGHWR_HAL_STM32_RCC_CR_HSEBYP);
     HAL_WRITE_UINT32( rcc+CYGHWR_HAL_STM32_RCC_CR, cr );
 
     HAL_READ_UINT32( rcc+CYGHWR_HAL_STM32_RCC_CR, cr );