Mercurial > ecos
changeset 96:b15c60e34c84
Merge from eCos master repository on 2000-06-06-05:24:42-BST
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--- a/host/libcdl/ChangeLog +++ b/host/libcdl/ChangeLog @@ -1,3 +1,10 @@ +2000-06-02 Bart Veer <bartv@redhat.com> + + * config.cxx (load_package): + Diagnostic function pointers were not being installed at the + package level, so error messages due to invalid CDL were + disappearing. + 2000-05-11 Bart Veer <bartv@redhat.com> * value.cxx (implements_update_handler):
--- a/host/libcdl/config.cxx +++ b/host/libcdl/config.cxx @@ -812,7 +812,8 @@ CdlConfigurationBody::load_package(CdlTr CdlInterpreter interp = package->get_interpreter(); CYG_ASSERT_CLASSC(interp); - interp->add_command("unknown", &CdlParse::unknown_command); + interp->add_command("unknown", &CdlParse::unknown_command); + CdlInterpreterBody::DiagSupport diag_support(interp, error_fn, warn_fn); // Next figure out the script name, and make sure that it exists. std::string actual_script = package->find_absolute_file(script, "cdl");
--- a/host/tools/ecostest/common/eCosTestDownloadFilter.cpp +++ b/host/tools/ecostest/common/eCosTestDownloadFilter.cpp @@ -53,7 +53,7 @@ #include "eCosStd.h" #include "eCosTrace.h" -#define DL_FILTER_VER "$Id: eCosTestDownloadFilter.cpp,v 1.10 2000/06/02 17:35:00 jlarmour Exp $" +#define DL_FILTER_VER "$Id: eCosTestDownloadFilter.cpp,v 1.11 2000/06/06 05:12:17 jlarmour Exp $" #include "eCosTestDownloadFilter.h" CeCosTestDownloadFilter::CeCosTestDownloadFilter():
--- a/host/tools/ecostest/common/eCosTestMonitorFilter.cpp +++ b/host/tools/ecostest/common/eCosTestMonitorFilter.cpp @@ -45,7 +45,7 @@ #include "eCosStd.h" -#define SER_FILTER_VER "$Id: eCosTestMonitorFilter.cpp,v 1.9 2000/06/02 17:35:00 jlarmour Exp $" +#define SER_FILTER_VER "$Id: eCosTestMonitorFilter.cpp,v 1.10 2000/06/06 05:12:17 jlarmour Exp $" #include "eCosTestMonitorFilter.h" CeCosTestMonitorFilter::CeCosTestMonitorFilter():
--- a/host/tools/ecostest/common/eCosTestSerialFilter.cpp +++ b/host/tools/ecostest/common/eCosTestSerialFilter.cpp @@ -51,7 +51,7 @@ #include "eCosStd.h" -#define SER_FILTER_VER "$Id: eCosTestSerialFilter.cpp,v 1.10 2000/06/02 17:35:00 jlarmour Exp $" +#define SER_FILTER_VER "$Id: eCosTestSerialFilter.cpp,v 1.11 2000/06/06 05:12:17 jlarmour Exp $" #include "eCosTestSerialFilter.h" #include "eCosThreadUtils.h"
--- a/packages/ChangeLog +++ b/packages/ChangeLog @@ -1,3 +1,9 @@ +2000-06-05 John Dallaway <jld@redhat.com> + + * ecos.db: + + Tidy CqREEK-related display strings. + 2000-05-31 Jesper Skov <jskov@redhat.com> * ecos.db: Added CqREEK platform HAL (contributed by Haruki @@ -14,6 +20,18 @@ 2000-05-26 Jesper Skov <jskov@redhat.c * ecos.db: Added dallas 1742 wallclock driver package. +2000-05-25 John Dallaway <jld@redhat.com> + + * ecos.db: Tidy V850-related display strings. + +2000-04-26 Jesper Skov <jskov@redhat.com> + + * ecos.db: ceb_v850 - include serial driver. + +2000-04-20 Gary Thomas <gthomas@redhat.com> + + * ecos.db: Rename hal/nec to hal/v85x for NEC/V85x architecture. + 2000-04-11 Hugo Tyson <hmt@cygnus.co.uk> * ecos.db: CYGPKG_IO_SERIAL should not be "hardware" now that it @@ -86,6 +104,10 @@ 2000-03-22 John Dallaway <jld@cygnus.c Don't invoke 'cygpath' on DOS-style paths to workaround erratic behaviour when invoked from the GUI admin tool. +2000-03-20 Gary Thomas <gthomas@redhat.com> + + * ecos.db: Add support for NEC/V850 HAL and CEB platform. + 2000-03-16 Jesper Skov <jskov@redhat.com> * ecos.db: Make edk7708 target select the appropriate CPU.
--- a/packages/NEWS +++ b/packages/NEWS @@ -1,3 +1,7 @@ +* NEC V85x architecture support added +* NEC Cosmo CEB-V850/SA1 evaluation board platform HAL added +* Serial device drivers added for systems based on NEC V850 SA1 (70F3017) + or SB1 (70F3033) processors * Hitachi SH3 CqREEK (cq7708) platform HAL support added Contributed by Haruki Kashiwaya [Still untested, serial not imported] * Watchdog reworked much like wallclock.
new file mode 100644 --- /dev/null +++ b/packages/devs/serial/v85x/v850/current/ChangeLog @@ -0,0 +1,31 @@ +2000-05-28 Gary Thomas <gthomas@redhat.com> + + * src/v85x_v850_serial.h: + * src/v85x_v850_serial.c: + * cdl/ser_v85x_v850.cdl: New file(s). + +//=========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//===========================================================================
new file mode 100644 --- /dev/null +++ b/packages/devs/serial/v85x/v850/current/cdl/ser_v85x_v850.cdl @@ -0,0 +1,106 @@ +# ==================================================================== +# +# ser_v85x_v850.cdl +# +# eCos serial NEC/V850 configuration data +# +# ==================================================================== +#####COPYRIGHTBEGIN#### +# +# ------------------------------------------- +# The contents of this file are subject to the Red Hat eCos Public License +# Version 1.1 (the "License"); you may not use this file except in +# compliance with the License. You may obtain a copy of the License at +# http://www.redhat.com/ +# +# Software distributed under the License is distributed on an "AS IS" +# basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +# License for the specific language governing rights and limitations under +# the License. +# +# The Original Code is eCos - Embedded Configurable Operating System, +# released September 30, 1998. +# +# The Initial Developer of the Original Code is Red Hat. +# Portions created by Red Hat are +# Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +# All Rights Reserved. +# ------------------------------------------- +# +#####COPYRIGHTEND#### +# ==================================================================== +######DESCRIPTIONBEGIN#### +# +# Author(s): gthomas +# Original data: gthomas +# Contributors: +# Date: 2000-05-26 +# +#####DESCRIPTIONEND#### +# +# ==================================================================== + +cdl_package CYGPKG_IO_SERIAL_V85X_V850 { + display "NEC V850 serial device drivers" + + parent CYGPKG_IO_SERIAL_DEVICES + active_if CYGPKG_IO_SERIAL + active_if CYGPKG_HAL_V85X_V850 + + requires CYGPKG_ERROR + include_dir cyg/io +# include_files ; # none _exported_ whatsoever + description " + This option enables the serial device drivers for the + NEC CEB/V850SA1." + doc redirect/ecos-device-drivers.html + + compile -library=libextras.a v85x_v850_serial.c + + define_proc { + puts $::cdl_system_header "/***** serial driver proc output start *****/" + puts $::cdl_system_header "#define CYGDAT_IO_SERIAL_DEVICE_HEADER <pkgconf/io_serial_v85x_v850.h>" + puts $::cdl_system_header "/***** serial driver proc output end *****/" + } + + cdl_component CYGPKG_IO_SERIAL_V85X_V850_SERIAL0 { + display "NEC V850 serial port 0 driver" + flavor bool + default_value 0 + description " + This option includes the serial device driver for the NEC V850 + SA1 (70F3017) and SB1 (70F3033) devices, port 0." + + cdl_option CYGDAT_IO_SERIAL_V85X_V850_SERIAL0_NAME { + display "Device name for NEC V850 serial port 0 driver" + flavor data + default_value {"\"/dev/ser0\""} + description " + This option specifies the name of the serial device for the + NEC V850, port 0." + } + + cdl_option CYGNUM_IO_SERIAL_V85X_V850_SERIAL0_BAUD { + display "Baud rate for the NEC V850 serial port 0 driver" + flavor data + legal_values { 50 75 110 "134_5" 150 200 300 600 1200 1800 2400 3600 + 4800 7200 9600 14400 19200 38400 57600 115200 + } + default_value 38400 + description " + This option specifies the default baud rate (speed) for the + NEC V850, port 0." + } + + cdl_option CYGNUM_IO_SERIAL_V85X_V850_SERIAL0_BUFSIZE { + display "Buffer size for the NEC V850 serial port 0 driver" + flavor data + legal_values 0 to 8192 + default_value 128 + description " + This option specifies the size of the internal buffers used + for the NEC V850, port 0." + } + } + +}
new file mode 100644 --- /dev/null +++ b/packages/devs/serial/v85x/v850/current/src/v85x_v850_serial.c @@ -0,0 +1,313 @@ +//========================================================================== +// +// io/serial/v85x/v85x_v850_serial.c +// +// NEC V850 Serial I/O Interface Module (interrupt driven) +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 2000-03-31 +// Purpose: V850 Serial I/O module (interrupt driven version) +// Description: +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#include <pkgconf/system.h> +#include <pkgconf/io_serial.h> +#include <pkgconf/io.h> +#include <pkgconf/kernel.h> + +#include <cyg/io/io.h> +#include <cyg/hal/hal_intr.h> +#include <cyg/io/devtab.h> +#include <cyg/io/serial.h> +#include <cyg/infra/diag.h> + +#ifdef CYGVAR_KERNEL_COUNTERS_CLOCK +#include <cyg/kernel/kapi.h> +#endif + +#ifdef CYGPKG_IO_SERIAL_V85X_V850 + +#include "v85x_v850_serial.h" + +typedef struct v850_serial_info { + CYG_ADDRWORD base; + CYG_WORD int_num; + cyg_interrupt serial_interrupt[3]; + cyg_handle_t serial_interrupt_handle[3]; + cyg_bool tx_busy; +#ifdef CYGVAR_KERNEL_COUNTERS_CLOCK + cyg_alarm tx_timeout; + cyg_handle_t tx_timeout_handle; +#endif +} v850_serial_info; + +static bool v850_serial_init(struct cyg_devtab_entry *tab); +static bool v850_serial_putc(serial_channel *chan, unsigned char c); +static Cyg_ErrNo v850_serial_lookup(struct cyg_devtab_entry **tab, + struct cyg_devtab_entry *sub_tab, + const char *name); +static unsigned char v850_serial_getc(serial_channel *chan); +static bool v850_serial_set_config(serial_channel *chan, cyg_serial_info_t *config); +static void v850_serial_start_xmit(serial_channel *chan); +static void v850_serial_stop_xmit(serial_channel *chan); + +static cyg_uint32 v850_serial_ISR(cyg_vector_t vector, cyg_addrword_t data); +static void v850_serial_DSR(cyg_vector_t vector, cyg_ucount32 count, cyg_addrword_t data); + +static SERIAL_FUNS(v850_serial_funs, + v850_serial_putc, + v850_serial_getc, + v850_serial_set_config, + v850_serial_start_xmit, + v850_serial_stop_xmit + ); + +#ifdef CYGPKG_IO_SERIAL_V85X_V850_SERIAL0 +static v850_serial_info v850_serial_info0 = {V850_REG_ASIM0, + CYGNUM_HAL_VECTOR_INTSER0}; +#if CYGNUM_IO_SERIAL_V85X_V850_SERIAL0_BUFSIZE > 0 +static unsigned char v850_serial_out_buf0[CYGNUM_IO_SERIAL_V85X_V850_SERIAL0_BUFSIZE]; +static unsigned char v850_serial_in_buf0[CYGNUM_IO_SERIAL_V85X_V850_SERIAL0_BUFSIZE]; + +static SERIAL_CHANNEL_USING_INTERRUPTS(v850_serial_channel0, + v850_serial_funs, + v850_serial_info0, + CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_V85X_V850_SERIAL0_BAUD), + CYG_SERIAL_STOP_DEFAULT, + CYG_SERIAL_PARITY_DEFAULT, + CYG_SERIAL_WORD_LENGTH_DEFAULT, + CYG_SERIAL_FLAGS_DEFAULT, + &v850_serial_out_buf0[0], sizeof(v850_serial_out_buf0), + &v850_serial_in_buf0[0], sizeof(v850_serial_in_buf0) + ); +#else +static SERIAL_CHANNEL(v850_serial_channel0, + v850_serial_funs, + v850_serial_info0, + CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_V85X_V850_SERIAL0_BAUD), + CYG_SERIAL_STOP_DEFAULT, + CYG_SERIAL_PARITY_DEFAULT, + CYG_SERIAL_WORD_LENGTH_DEFAULT, + CYG_SERIAL_FLAGS_DEFAULT + ); +#endif + +DEVTAB_ENTRY(v850_serial_io0, + CYGDAT_IO_SERIAL_V85X_V850_SERIAL0_NAME, + 0, // Does not depend on a lower level interface + &cyg_io_serial_devio, + v850_serial_init, + v850_serial_lookup, // Serial driver may need initializing + &v850_serial_channel0 + ); +#endif // CYGPKG_IO_SERIAL_V85X_V850_SERIAL0 + +// Internal function to actually configure the hardware to desired baud rate, etc. +static bool +v850_serial_config_port(serial_channel *chan, cyg_serial_info_t *new_config, bool init) +{ + v850_serial_info *v850_chan = (v850_serial_info *)chan->dev_priv; + volatile struct serial_port *port = (volatile struct serial_port *)v850_chan->base; + unsigned char parity = select_parity[new_config->parity]; + unsigned char word_length = select_word_length[new_config->word_length-CYGNUM_SERIAL_WORD_LENGTH_5]; + unsigned char stop_bits = select_stop_bits[new_config->stop]; + if ((select_baud[new_config->baud].count == 0) || + (word_length == 0xFF) || + (parity == 0xFF) || + (stop_bits == 0xFF)) { + return false; // Unsupported configuration + } + port->asim = ASIM_TxRx_Tx | ASIM_TxRx_Rx | parity | word_length | stop_bits; + port->brgc = select_baud[new_config->baud].count; + port->brgm = select_baud[new_config->baud].mode + 1; + if (new_config != &chan->config) { + chan->config = *new_config; + } + return true; +} + +#ifdef CYGVAR_KERNEL_COUNTERS_CLOCK +// +// The serial ports on the V850 are incredibly stupid. There is no +// interface status register which can tell you if it is possible to +// read or write a character! The only way to discern this is by using +// interrupts [or at least an interrupt register and polling it]. Thus +// the serial transmit code has a problem in that it will be required by +// upper layers to "send until full". The only way to decide "not full" is +// that an interrupt has happened. If the serial driver is being mixed +// with diagnostic I/O, then serial transmit interrupts will possibly be +// lost. +// +// This code attempts to compenstate by using a kernel alarm to reset the +// "device is busy" flag after some timeout. The timeout period will be +// sufficiently long so as to not interfere with normal interrupt handling. +// +static void +v850_serial_tx_timeout(cyg_addrword_t p) +{ + v850_serial_info *v850_chan = (v850_serial_info *)p; + v850_chan->tx_busy = false; +} +#endif + +// Function to initialize the device. Called at bootstrap time. +static bool +v850_serial_init(struct cyg_devtab_entry *tab) +{ + int i; + serial_channel *chan = (serial_channel *)tab->priv; + v850_serial_info *v850_chan = (v850_serial_info *)chan->dev_priv; +#ifdef CYGVAR_KERNEL_COUNTERS_CLOCK + cyg_handle_t h; +#endif +#ifdef CYGDBG_IO_INIT + diag_printf("V850 SERIAL init - dev: %x.%d\n", v850_chan->base, v850_chan->int_num); +#endif + (chan->callbacks->serial_init)(chan); // Really only required for interrupt driven devices + if (chan->out_cbuf.len != 0) { + for (i = 0; i < 3; i++) { + cyg_drv_interrupt_create(v850_chan->int_num+i, + 99, // Priority - unused + (cyg_addrword_t)chan, // Data item passed to interrupt handler + v850_serial_ISR, + v850_serial_DSR, + &v850_chan->serial_interrupt_handle[i], + &v850_chan->serial_interrupt[i]); + cyg_drv_interrupt_attach(v850_chan->serial_interrupt_handle[i]); + cyg_drv_interrupt_unmask(v850_chan->int_num+i); +#ifdef CYGVAR_KERNEL_COUNTERS_CLOCK + cyg_clock_to_counter(cyg_real_time_clock(), &h); + cyg_alarm_create(h, v850_serial_tx_timeout, (cyg_addrword_t)v850_chan, + &v850_chan->tx_timeout_handle, &v850_chan->tx_timeout); +#endif + } + } + v850_chan->tx_busy = false; + return v850_serial_config_port(chan, &chan->config, true); +} + +// This routine is called when the device is "looked" up (i.e. attached) +static Cyg_ErrNo +v850_serial_lookup(struct cyg_devtab_entry **tab, + struct cyg_devtab_entry *sub_tab, + const char *name) +{ + serial_channel *chan = (serial_channel *)(*tab)->priv; + (chan->callbacks->serial_init)(chan); // Really only required for interrupt driven devices + return ENOERR; +} + +// Send a character to the device output buffer. +// Return 'true' if character is sent to device +static bool +v850_serial_putc(serial_channel *chan, unsigned char c) +{ + v850_serial_info *v850_chan = (v850_serial_info *)chan->dev_priv; + volatile struct serial_port *port = (volatile struct serial_port *)v850_chan->base; + if (!v850_chan->tx_busy) { + v850_chan->tx_busy = true; + port->txs = c; +#ifdef CYGVAR_KERNEL_COUNTERS_CLOCK + cyg_alarm_initialize(v850_chan->tx_timeout_handle, cyg_current_time()+10, 0); +#endif + } else { + return false; // Couldn't send, tx was busy + } +} + +// Fetch a character from the device input buffer, waiting if necessary +static unsigned char +v850_serial_getc(serial_channel *chan) +{ + v850_serial_info *v850_chan = (v850_serial_info *)chan->dev_priv; + volatile struct serial_port *port = (volatile struct serial_port *)v850_chan->base; + return port->rxs; +} + +// Set up the device characteristics; baud rate, etc. +static bool +v850_serial_set_config(serial_channel *chan, cyg_serial_info_t *config) +{ + return v850_serial_config_port(chan, config, false); +} + +// Enable the transmitter on the device +static void +v850_serial_start_xmit(serial_channel *chan) +{ + v850_serial_info *v850_chan = (v850_serial_info *)chan->dev_priv; + (chan->callbacks->xmt_char)(chan); // Kick transmitter (if necessary) + cyg_drv_interrupt_unmask(v850_chan->int_num+INT_Tx); // Enable Tx interrupt +} + +// Disable the transmitter on the device +static void +v850_serial_stop_xmit(serial_channel *chan) +{ + v850_serial_info *v850_chan = (v850_serial_info *)chan->dev_priv; + cyg_drv_interrupt_mask(v850_chan->int_num+INT_Tx); // Disable Tx interrupt +} + +// Serial I/O - low level interrupt handler (ISR) +static cyg_uint32 +v850_serial_ISR(cyg_vector_t vector, cyg_addrword_t data) +{ + cyg_drv_interrupt_mask(vector); + cyg_drv_interrupt_acknowledge(vector); + return CYG_ISR_CALL_DSR; // Cause DSR to be run +} + +// Serial I/O - high level interrupt handler (DSR) +static void +v850_serial_DSR(cyg_vector_t vector, cyg_ucount32 count, cyg_addrword_t data) +{ + serial_channel *chan = (serial_channel *)data; + v850_serial_info *v850_chan = (v850_serial_info *)chan->dev_priv; + volatile struct serial_port *port = (volatile struct serial_port *)v850_chan->base; + switch (vector-(v850_chan->int_num)) { + case INT_ERR: + case INT_Rx: + (chan->callbacks->rcv_char)(chan, port->rxs); + break; + case INT_Tx: + v850_chan->tx_busy = false; +#ifdef CYGVAR_KERNEL_COUNTERS_CLOCK + cyg_alarm_initialize(v850_chan->tx_timeout_handle, 0, 0); +#endif + (chan->callbacks->xmt_char)(chan); + break; + } + cyg_drv_interrupt_unmask(vector); +} +#endif
new file mode 100644 --- /dev/null +++ b/packages/devs/serial/v85x/v850/current/src/v85x_v850_serial.h @@ -0,0 +1,147 @@ +#ifndef CYGONCE_V85X_V850_SERIAL_H +#define CYGONCE_V85X_V850_SERIAL_H + +// ==================================================================== +// +// v850_ceb_serial.h +// +// Device I/O - Description of NEC V850 serial hardware +// +// ==================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +// ==================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 2000-03-31 +// Purpose: Internal interfaces for serial I/O drivers +// Description: +// +//####DESCRIPTIONEND#### +// +// ==================================================================== + +// Description of serial ports on NEC CEB/V850SA1 + +#include <cyg/hal/v850_common.h> + +struct serial_port { + unsigned char asim; // Serial interface mode + unsigned char _filler0; + unsigned char asis; // Serial interface status + unsigned char _filler1; + unsigned char brgc; // Baud rate control + unsigned char _filler2; + unsigned char txs; // Transmit shift register + unsigned char _filler3; + unsigned char rxs; // Receive shift register + unsigned char _filler4; + unsigned char brgm; // Baud rate mode + unsigned char _filler5; +}; + +// Relative interrupt numbers +#define INT_ERR 0 // Receive error condition +#define INT_Rx 1 // Receive data +#define INT_Tx 2 // Transmit data + +// Serial interface mode +#define ASIM_TxRx_MASK (3<<6) // Receive & Transmit enables +#define ASIM_TxRx_Rx (1<<6) // Receive enable +#define ASIM_TxRx_Tx (2<<6) // Transmit enable +#define ASIM_Parity_MASK (3<<4) // Parity mode bits +#define ASIM_Parity_none (0<<4) // No parity +#define ASIM_Parity_space (1<<4) // Send zero bit, ignore errors +#define ASIM_Parity_odd (2<<4) // Odd parity +#define ASIM_Parity_even (3<<4) // Even parity +#define ASIM_Length_MASK (1<<3) // Character length select +#define ASIM_Length_7 (0<<3) // 7 bit chars +#define ASIM_Length_8 (1<<3) // 8 bit chars +#define ASIM_Stop_MASK (1<<2) // Stop bit select +#define ASIM_Stop_1 (0<<2) // 1 stop bit +#define ASIM_Stop_2 (1<<2) // 2 stop bits +#define ASIM_Error_MASK (1<<1) // Receive error select +#define ASIM_Error_enable (0<<1) // Issue interrupt on receive error +#define ASIM_Error_disable (1<<1) // No interrupts on receive error + +// Serial interface status (errors only) +#define ASIS_OVE (1<<0) // Overrun error +#define ASIS_FE (1<<1) // Framing error +#define ASIS_PE (1<<2) // Parity error + +static unsigned char select_word_length[] = { + 0xFF, // 5 bits / word (char) + 0xFF, + ASIM_Length_7, + ASIM_Length_8 +}; + +static unsigned char select_stop_bits[] = { + 0, + ASIM_Stop_1, // 1 stop bit + 0xFF, // 1.5 stop bit + ASIM_Stop_2 // 2 stop bits +}; + +static unsigned char select_parity[] = { + ASIM_Parity_none, // No parity + ASIM_Parity_even, // Even parity + ASIM_Parity_odd, // Odd parity + 0xFF, // Mark parity + ASIM_Parity_space, // Space parity +}; + +// Baud rate values, based on raw 17MHz clock + +static struct v850_baud { + unsigned char count; + unsigned char mode; +} select_baud[] = { + {0, 0}, // Unused + {0, 0}, // 50 + {0, 0}, // 75 + {0, 0}, // 110 + {0, 0}, // 134.5 + {0, 0}, // 150 + {0, 0}, // 200 + {0, 0}, // 300 + {0, 0}, // 600 + {221, 5}, // 1200 + {0, 0}, // 1800 + {221, 4}, // 2400 + {0, 0}, // 3600 + {221, 3}, // 4800 + {0, 0}, // 7200 + {221, 2}, // 9600 + {0, 0}, // 14400 + {221, 1}, // 19200 + {221, 0}, // 38400 + {0, 0}, // 57600 + {0, 0}, // 115200 + {0, 0}, // 230400 +}; + +#endif // CYGONCE_V85X_V850_SERIAL_H
--- a/packages/ecos.db +++ b/packages/ecos.db @@ -209,6 +209,16 @@ package CYGPKG_IO_SERIAL_SH_EDK7708 { } +package CYGPKG_IO_SERIAL_V85X_V850 { + alias { "NEC V850 serial device drivers" + devs_serial_v85x_v850 v850_serial_driver } + hardware + directory devs/serial/v85x/v850 + script ser_v85x_v850.cdl + description "Serial device drivers for systems based on NEC V850 + SA1 (70F3017) or SB1 (70F3033) processors." +} + package CYGPKG_DEVS_ETH_ARM_EDB7XXX { alias { "Cirrus Logic ethernet driver" edb7xxx_eth_driver } hardware @@ -472,13 +482,13 @@ package CYGPKG_HAL_SH_EDK7708 { } package CYGPKG_HAL_SH_SH7708_CQ7708 { - alias { "CqREEK Hitachi SH7708 board" hal_sh_cq sh_cq_hal } + alias { "CqREEK SH7708 board" hal_sh_cq sh_cq_hal } directory hal/sh/cq7708 script hal_sh_sh7708_cq7708.cdl hardware description " The cq HAL package provides the support needed to run - eCos on a Hitachi SH3 CqREEK board." + eCos on a CqREEK SH7708 board." } @@ -789,6 +799,38 @@ package CYGPKG_HAL_MN10300_AM33_STB { actual hardware for the AM33 STB evaluation board." } +# -------------------------------------------------------------------------- +# NEC packages +package CYGPKG_HAL_V85X { + alias { "NEC V85x common HAL" hal_v85x nec_arch_hal } + directory hal/v85x/arch + script hal_v85x.cdl + hardware + description " +The NEC V85x architecture HAL package provides generic support for this +processor architecture. It is also necessary to select a specific +target platform HAL package." +} + +package CYGPKG_HAL_V85X_V850 { + alias { "NEC V850 variant HAL" hal_v85x_v850 nec_v850_hal } + directory hal/v85x/v850 + script hal_v85x_v850.cdl + hardware + description " +The V850 HAL package provides the support needed to run eCos on a NEC V850 +processor." +} + +package CYGPKG_HAL_V85X_V850_CEB { + alias { "Cosmo CEB-V850/SA1 board" hal_v85x_v850_ceb nec_v850_ceb_hal } + directory hal/v85x/ceb_v850 + script hal_v85x_ceb_v850.cdl + hardware + description " +The CEB-V850/SA1 HAL package provides the support needed to run eCos on a Cosmo CEB-V850/SA1 +evaluation board." +} # ========================================================================== # -------------------------------------------------------------------------- # ARM targets @@ -868,14 +910,14 @@ target sh7708 { } target cq7708 { - alias { "CqREEK SH7708 Evaluation board" cq7708 } + alias { "CqREEK SH7708 board" cq7708 } packages { CYGPKG_HAL_SH CYGPKG_HAL_SH_SH7708_CQ7708 } enable { CYGPKG_HAL_SH_7708 } description " The cq7708 target provides the packages needed to run - eCos on a CqREEK Hitachi SH7708 board." + eCos on a CqREEK SH7708 board." } # -------------------------------------------------------------------------- @@ -1064,3 +1106,18 @@ target stb { eCos on a Matsushita STB board." } +# -------------------------------------------------------------------------- +# NEC targets + +target ceb_v850 { + alias { "Cosmo CEB-V850/SA1 board" CEB } + packages { CYGPKG_HAL_V85X + CYGPKG_HAL_V85X_V850 + CYGPKG_HAL_V85X_V850_CEB + CYGPKG_IO_SERIAL_V85X_V850 + } + description " +The ceb target provides the packages needed to run eCos on a Cosmo CEB-V850/SA1 +evaluation board." +} +# --------------------------------------------------------------------------
--- a/packages/ecosadmin.tcl +++ b/packages/ecosadmin.tcl @@ -1,15 +1,14 @@ #!/bin/sh # these lines restart using the tcl shell \ exec sh -c "if ( echo | tclsh ) 2>/dev/null ; then \ - exec tclsh \"$0\" ${1+\"$@\"} ; \ + exec tclsh "${0}" ${1+"${@}"} ; \ elif ( echo | cygtclsh80 ) 2>/dev/null ; then \ - exec cygtclsh80 \"$0\" ${1+\"$@\"} ; \ + exec cygtclsh80 "${0}" ${1+"${@}"} ; \ else \ echo Could not find TCL interpreter ; \ exit 1 ; \ fi" - # {{{ Banner #===============================================================================
--- a/packages/hal/arm/aeb/current/ChangeLog +++ b/packages/hal/arm/aeb/current/ChangeLog @@ -1,3 +1,7 @@ +2000-06-06 Jonathan Larmour <jlarmour@redhat.co.uk> + + * src/flash_cksum.tcl: Make sure it invokes the interpreter correctly + 2000-05-22 Jesper Skov <jskov@redhat.com> * src/flash_cksum.tcl: Use correct intepreter.
--- a/packages/hal/arm/aeb/current/src/flash_cksum.tcl +++ b/packages/hal/arm/aeb/current/src/flash_cksum.tcl @@ -1,9 +1,9 @@ #!/bin/sh # the next line restarts using tclsh \ exec sh -c "if ( echo | tclsh ) 2>/dev/null ; then \ - exec tclsh \"$0\" ${1+\"$@\"} ; \ + exec tclsh "${0}" ${1+"${@}"} ; \ elif ( echo | cygtclsh80 ) 2>/dev/null ; then \ - exec cygtclsh80 \"$0\" ${1+\"$@\"} ; \ + exec cygtclsh80 "${0}" ${1+"${@}"} ; \ else \ echo Could not find TCL interpreter ; \ exit 1 ; \
--- a/packages/hal/arm/arch/current/ChangeLog +++ b/packages/hal/arm/arch/current/ChangeLog @@ -1,3 +1,13 @@ +2000-06-04 Gary Thomas <gthomas@redhat.com> + + * src/vectors.S: Add support for platform specific "vectors" + which may need to end up in predefined memory locations. + * src/arm.ld: Add separate 'fixed_vectors' section. + +2000-06-01 Gary Thomas <gthomas@redhat.com> + + * include/hal_mmu.h (MMU_Control_I): Added for StrongARM support. + 2000-04-10 Hugo Tyson <hmt@cygnus.co.uk> * include/arm_stub.h (CYG_HAL_GDB_ENTER_CRITICAL_IO_REGION): Only
--- a/packages/hal/arm/arch/current/include/hal_mmu.h +++ b/packages/hal/arm/arch/current/include/hal_mmu.h @@ -97,6 +97,7 @@ #define MMU_Control_B 0x080 // Enable Big-Endian #define MMU_Control_S 0x100 // Enable system protection #define MMU_Control_R 0x200 // Enable ROM protection +#define MMU_Control_I 0x1000 // Enable Instruction cache #define MMU_Control_Init (MMU_Control_P|MMU_Control_D|MMU_Control_L) //-----------------------------------------------------------------------------
--- a/packages/hal/arm/arch/current/src/arm.ld +++ b/packages/hal/arm/arch/current/src/arm.ld @@ -79,6 +79,11 @@ OUTPUT_FORMAT(elf32-bigarm) .debug_loc 0 : { *(.debug_loc) } \ .debug_macinfo 0 : { *(.debug_macinfo) } +#define SECTION_fixed_vectors(_region_, _vma_, _lma_) \ + .fixed_vectors _vma_ : _lma_ \ + { FORCE_OUTPUT; KEEP (*(.fixed_vectors)) } \ + > _region_ + #define SECTION_rom_vectors(_region_, _vma_, _lma_) \ .rom_vectors _vma_ : _lma_ \ { FORCE_OUTPUT; KEEP (*(.vectors)) } \
--- a/packages/hal/arm/arch/current/src/vectors.S +++ b/packages/hal/arm/arch/current/src/vectors.S @@ -170,10 +170,13 @@ PTR(start) // This is copied to 0x28 for // location 0x40 is used for storing DRAM size if known // for some platforms. -// Other vectors - .balign 16 // Should be at 0x50 .balign 32 - + +// Other vectors - this may include "fixed" locations +#ifdef PLATFORM_VECTORS + PLATFORM_VECTORS +#endif + .text // Startup code which will get the machine into supervisor mode .global reset_vector
--- a/packages/hal/common/current/ChangeLog +++ b/packages/hal/common/current/ChangeLog @@ -1,3 +1,9 @@ +2000-06-04 Gary Thomas <gthomas@redhat.com> + + * cdl/hal.cdl: Support variant 'pkgconf' headers. This will allow + [variant] common symbols to be defined, rather than duplicating + them over all platforms using that variant. + 2000-05-25 Jesper Skov <jskov@redhat.com> * cdl/debugging.cdl: Allow thread support to included for ROM
--- a/packages/hal/common/current/cdl/hal.cdl +++ b/packages/hal/common/current/cdl/hal.cdl @@ -165,6 +165,9 @@ cdl_package CYGPKG_HAL { puts $::cdl_header "#include <pkgconf/system.h>" puts $::cdl_header "#include CYGBLD_HAL_TARGET_H" + puts $::cdl_header "#ifdef CYGBLD_HAL_VARIANT_H" + puts $::cdl_header "#include CYGBLD_HAL_VARIANT_H" + puts $::cdl_header "#endif" puts $::cdl_header "#include CYGBLD_HAL_PLATFORM_H" puts $::cdl_header "/****** proc output end ******/"
--- a/packages/hal/sh/cq7708/current/ChangeLog +++ b/packages/hal/sh/cq7708/current/ChangeLog @@ -1,3 +1,9 @@ +2000-06-05 John Dallaway <jld@redhat.com> + + * cdl/hal_sh_sh7708_cq7708.cdl: + + Tidy display strings. + 2000-05-31 Jesper Skov <jskov@redhat.com> * Munging sources to matches post-1.3.1 changes.
--- a/packages/hal/sh/cq7708/current/cdl/hal_sh_sh7708_cq7708.cdl +++ b/packages/hal/sh/cq7708/current/cdl/hal_sh_sh7708_cq7708.cdl @@ -41,13 +41,13 @@ # ==================================================================== cdl_package CYGPKG_HAL_SH_SH7708_CQ7708 { - display "Hitachi SH3 CQ7708 evaluation board" + display "CqREEK SH7708 board" parent CYGPKG_HAL_SH define_header hal_sh_sh7708_cq7708.h include_dir cyg/hal description " The cq HAL package provides the support needed to run - eCos on a Hitachi SH3 CQ7708 board." + eCos on a CqREEK SH7708 board." compile hal_diag.c plf_stub.c plf_misc.c
new file mode 100644 --- /dev/null +++ b/packages/hal/v85x/arch/current/ChangeLog @@ -0,0 +1,109 @@ +2000-05-26 Gary Thomas <gthomas@redhat.com> + + * src/vectors.S: Slight reorg of trap vectors (more readable). + +2000-05-25 John Dallaway <jld@redhat.com> + + * cdl/hal_v85x.cdl: Tidy display strings. + +2000-05-25 Gary Thomas <gthomas@redhat.com> + + * src/vectors.S: Handle different chips (number of interrupt + sources differs, exception table is altered, etc). + + * include/hal_intr.h: Actual interrupt layout now defined by + variant/platform since these differ depending on the chip. + +2000-05-03 Gary Thomas <gthomas@redhat.com> + + * include/hal_arch.h: New breakpoint instruction ("br *"). + +2000-04-14 Gary Thomas <gthomas@redhat.com> + + * src/hal_misc.c (exception_handler): Proper handling of nested + [watchdog] interrupts - don't corrupt GDB registers. + + * src/hal_mk_defs.c: Add some symbols required for NMI handling. + + * src/vectors.S (return_from_exception_or_interrupt): + Properly handle different cases for exception, NMI and ISR. + + * include/hal_intr.h (HAL_TRANSLATE_VECTOR): Ignore interrupt + chaining - doesn't happen on this hardware. + +2000-04-11 Gary Thomas <gthomas@redhat.com> + + * src/vectors.S (exception): Handle NMI. In particular, need to + have appropriate bits set so they clear and also get the state + from the proper save registers. + (exception): Register save was wrong - ROM only. + +2000-03-31 Gary Thomas <gthomas@redhat.com> + + * src/hal_mk_defs.c: Add definition for 'ep' register. + + * include/hal_intr.h: + * cdl/hal_nec.cdl: Add config option to choose between inline and + real functions for interrupt macros. + + * src/vectors.S: Tune up - use SLD/SST for smaller, faster code + in context load/save routines. Also remove IRQ trace/debug code. + +2000-03-30 Gary Thomas <gthomas@redhat.com> + + * src/vectors.S (do_interrupt): Can't use R13 across function calls. + This caused instability when turning on kernel instrumentation. + + * include/hal_intr.h: Use out-of-line code for interrupt functions + for tracing/testing. + + * src/vectors.S: Working support for separate interrupt stack. + Some debug/trace code left in. + + * src/hal_mk_defs.c: + * include/hal_arch.h: Documented API does not match actual GCC + register usage. Need to save R1/R2/R4/R5 for setjmp/longjmp. + +2000-03-27 Gary Thomas <gthomas@redhat.com> + + * src/vectors.S (do_interrupt): Pass regs to ISR & DSR. + + * include/basetype.h: Endian-ness was incorrect. + + * include/hal_arch.h: + * src/hal_mk_defs.c: Complete setjmp/longjmp support. + + * src/vectors.S: Add interrupt stack. + +2000-03-21 Gary Thomas <gthomas@redhat.com> + + * src/vectors.S (_hal_plf_reset_board): Add board reset function. + + * include/hal_arch.h (CYGHWR_TEST_PROGRAM_EXIT): Define RESET for ROM + based programs. + +//=========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//===========================================================================
new file mode 100644 --- /dev/null +++ b/packages/hal/v85x/arch/current/cdl/hal_v85x.cdl @@ -0,0 +1,102 @@ +# ==================================================================== +# +# hal_v85x.cdl +# +# NEC architectural HAL package configuration data +# +# ==================================================================== +#####COPYRIGHTBEGIN#### +# +# ------------------------------------------- +# The contents of this file are subject to the Red Hat eCos Public License +# Version 1.1 (the "License"); you may not use this file except in +# compliance with the License. You may obtain a copy of the License at +# http://www.redhat.com/ +# +# Software distributed under the License is distributed on an "AS IS" +# basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +# License for the specific language governing rights and limitations under +# the License. +# +# The Original Code is eCos - Embedded Configurable Operating System, +# released September 30, 1998. +# +# The Initial Developer of the Original Code is Red Hat. +# Portions created by Red Hat are +# Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +# All Rights Reserved. +# ------------------------------------------- +# +#####COPYRIGHTEND#### +# ==================================================================== +######DESCRIPTIONBEGIN#### +# +# Author(s): gthomas +# Contributors: +# Date: 2000-03-09 +# +#####DESCRIPTIONEND#### +# +# ==================================================================== + +cdl_package CYGPKG_HAL_V85X { + display "NEC V85x architecture" + parent CYGPKG_HAL + hardware + include_dir cyg/hal + define_header hal_v85x.h + description " + The NEC architecture HAL package provides generic support + for this processor architecture. It is also necessary to + select a CPU variant and a specific target platform HAL + package." + + cdl_interface CYGINT_HAL_V85X_VARIANT { + display "Number of variant implementations in this configuration" + requires 1 == CYGINT_HAL_V85X_VARIANT + } + + compile hal_misc.c + + make -priority 1 { + <PREFIX>/include/cyg/hal/nec_offsets.inc : <PACKAGE>/src/hal_mk_defs.c + $(CC) $(CFLAGS) $(INCLUDE_PATH) -Wp,-MD,nec_offsets.tmp -o hal_mk_defs.tmp -S $< + fgrep .equ hal_mk_defs.tmp | sed s/#// > $@ + @echo $@ ": \\" > $(notdir $@).deps + @tail +2 nec_offsets.tmp >> $(notdir $@).deps + @echo >> $(notdir $@).deps + @rm nec_offsets.tmp hal_mk_defs.tmp + } + + make { + <PREFIX>/lib/vectors.o : <PACKAGE>/src/vectors.S + $(CC) -Wp,-MD,vectors.tmp $(INCLUDE_PATH) $(CFLAGS) -c -o $@ $< + @echo $@ ": \\" > $(notdir $@).deps + @tail +2 vectors.tmp >> $(notdir $@).deps + @echo >> $(notdir $@).deps + @rm vectors.tmp + } + + cdl_option CYGHWR_HAL_V85X_CPU_FREQ { + display "CPU frequency in MHz" + flavor data + legal_values 5 10 17 + default_value 17 + description " + This option contains the frequency of the CPU in MegaHertz. + Choose the frequency to match the processor you have. This + may affect thing like serial device, interval clock and + memory access speed settings." + } + + cdl_option CYGSEM_HAL_V85X_INLINE_INTERRUPT_FUNCTIONS { + display "In-line interrupt functions" + flavor bool + default_value 1 + description " + This option allows for the HAL interrupt functions, + e.g. HAL_ENABLE_INTERRUPTS() to be coded as either in-line + assembly code or real functions. The primary motivations + for the latter would be debugging, tracing, etc." + } +}
new file mode 100644 --- /dev/null +++ b/packages/hal/v85x/arch/current/include/basetype.h @@ -0,0 +1,67 @@ +#ifndef CYGONCE_HAL_BASETYPE_H +#define CYGONCE_HAL_BASETYPE_H + +//============================================================================= +// +// basetype.h +// +// Standard types for this architecture. +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): nickg +// Contributors: nickg, gthomas +// Date: 1998-02-05 +// Purpose: Define architecture base types. +// Usage: Included by <cyg/infra/cyg_types.h>, do not use directly +// +//####DESCRIPTIONEND#### +// + +#include <pkgconf/hal.h> + +//----------------------------------------------------------------------------- +// Characterize the architecture + +#define CYG_BYTEORDER CYG_LSBFIRST // Little endian + +//----------------------------------------------------------------------------- +// NEC does not usually use labels with undersores. Some labels generated +// by the linker do, so add an underscore where required. + +#define CYG_LABEL_NAME(_name_) _##_name_ + +//----------------------------------------------------------------------------- +// Define the standard variable sizes + +// The NEC architecture uses the default definitions of the base types, +// so we do not need to define any here. + +//----------------------------------------------------------------------------- +#endif // CYGONCE_HAL_BASETYPE_H +// End of basetype.h
new file mode 100644 --- /dev/null +++ b/packages/hal/v85x/arch/current/include/hal_arch.h @@ -0,0 +1,269 @@ +#ifndef CYGONCE_HAL_HAL_ARCH_H +#define CYGONCE_HAL_HAL_ARCH_H + +//========================================================================== +// +// hal_arch.h +// +// Architecture specific abstractions +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): nickg +// Contributors: nickg +// Date: 1999-02-17 +// Purpose: Define architecture abstractions +// Usage: #include <cyg/hal/hal_arch.h> +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#include <pkgconf/hal.h> +#include <cyg/infra/cyg_type.h> + +#include <cyg/hal/var_arch.h> + +//-------------------------------------------------------------------------- +// Processor saved states: +// The layout of this structure is also defined in "arch.inc", for assembly +// code. Do not change this without changing that (or vice versa). + +#define CYG_HAL_NEC_REG CYG_WORD32 +#define CYG_HAL_NEC_REG_SIZE 4 + +typedef struct +{ + // These are common to all saved states + CYG_HAL_NEC_REG d[32]; /* Data regs */ + CYG_ADDRWORD pc; /* Program Counter */ + CYG_ADDRWORD psw; /* Status Reg */ + + // These are only saved for exceptions and interrupts + CYG_ADDRWORD cause; /* Exception cause register */ + CYG_ADDRWORD vector; /* Exception/interrupt number */ +} HAL_SavedRegisters; + +// +// Processor state register +// +#define CYGARC_PSW_ID 0x20 // Interrupt disable +#define CYGARC_PSW_EP 0x40 // Exception in progress +#define CYGARC_PSW_NP 0x80 // NMI in progress + +//-------------------------------------------------------------------------- +// Exception handling function. +// This function is defined by the kernel according to this prototype. It is +// invoked from the HAL to deal with any CPU exceptions that the HAL does +// not want to deal with itself. It usually invokes the kernel's exception +// delivery mechanism. + +externC void cyg_hal_deliver_exception( CYG_WORD code, CYG_ADDRWORD data ); + +//-------------------------------------------------------------------------- +// Bit manipulation macros + +externC cyg_uint32 hal_lsbit_index(cyg_uint32 mask); +externC cyg_uint32 hal_msbit_index(cyg_uint32 mask); + +#define HAL_LSBIT_INDEX(index, mask) index = hal_lsbit_index(mask); + +#define HAL_MSBIT_INDEX(index, mask) index = hal_msbit_index(mask); + +//-------------------------------------------------------------------------- +// Context Initialization + +#define CYG_HAL_NEC_INIT_PSW 0x00000000 + +// Initialize the context of a thread. +// Arguments: +// _sparg_ name of variable containing current sp, will be written with new sp +// _thread_ thread object address, passed as argument to entry point +// _entry_ entry point address. +// _id_ bit pattern used in initializing registers, for debugging. +#define HAL_THREAD_INIT_CONTEXT( _sparg_, _thread_, _entry_, _id_ ) \ +{ \ + register CYG_WORD _sp_ = ((CYG_WORD)_sparg_)-56; \ + register HAL_SavedRegisters *_regs_; \ + int _i_; \ + _sp_ = _sp_ & 0xFFFFFFF0; \ + _regs_ = (HAL_SavedRegisters *)(((_sp_) - sizeof(HAL_SavedRegisters))&0xFFFFFFF0); \ + for( _i_ = 0; _i_ < 32; _i_++ ) (_regs_)->d[_i_] = (_id_)|_i_; \ + (_regs_)->d[03] = (CYG_HAL_NEC_REG)(_sp_); /* SP = top of stack */ \ + (_regs_)->d[04] = (CYG_HAL_NEC_REG)(_sp_); /* GP = top of stack */ \ + (_regs_)->d[29] = (CYG_HAL_NEC_REG)(_sp_); /* FP = top of stack */ \ + (_regs_)->d[06] = (CYG_HAL_NEC_REG)(_thread_); /* R6 = arg1 = thread ptr */ \ + (_regs_)->d[31] = (CYG_HAL_NEC_REG)(_entry_); /* RA(d[31]) = entry point*/ \ + (_regs_)->pc = (CYG_WORD)(_entry_); /* PC = entry point */ \ + (_regs_)->psw = CYG_HAL_NEC_INIT_PSW; \ + _sparg_ = (CYG_ADDRESS)_regs_; \ +} + +//-------------------------------------------------------------------------- +// Context switch macros. +// The arguments are pointers to locations where the stack pointer +// of the current thread is to be stored, and from where the sp of the +// next thread is to be fetched. + +externC void hal_thread_switch_context( CYG_ADDRESS to, CYG_ADDRESS from ); +externC void hal_thread_load_context( CYG_ADDRESS to ) + __attribute__ ((noreturn)); + +#define HAL_THREAD_SWITCH_CONTEXT(_fspptr_,_tspptr_) \ + hal_thread_switch_context( (CYG_ADDRESS)_tspptr_, \ + (CYG_ADDRESS)_fspptr_); + +#define HAL_THREAD_LOAD_CONTEXT(_tspptr_) \ + hal_thread_load_context( (CYG_ADDRESS)_tspptr_ ); + +//-------------------------------------------------------------------------- +// Execution reorder barrier. +// When optimizing the compiler can reorder code. In multithreaded systems +// where the order of actions is vital, this can sometimes cause problems. +// This macro may be inserted into places where reordering should not happen. +// The "memory" keyword is potentially unnecessary, but it is harmless to +// keep it. + +#define HAL_REORDER_BARRIER() asm volatile ( "" : : : "memory" ) + +//-------------------------------------------------------------------------- +// Breakpoint support +// HAL_BREAKPOINT() is a code sequence that will cause a breakpoint to +// happen if executed. +// HAL_BREAKINST is the value of the breakpoint instruction and +// HAL_BREAKINST_SIZE is its size in bytes. + +#define HAL_BREAKPOINT(_label_) \ +asm volatile (" .globl _" #_label_ ";" \ + "_"#_label_":" \ + " br _"#_label_ \ + ); + +#define HAL_BREAKINST 0x0585 +#define HAL_BREAKINST_SIZE 2 + +//-------------------------------------------------------------------------- +// Thread register state manipulation for GDB support. + +// Default to a 32 bit register size for GDB register dumps. +#ifndef CYG_HAL_GDB_REG +#define CYG_HAL_GDB_REG CYG_WORD32 +#endif + +// Translate a stack pointer as saved by the thread context macros above into +// a pointer to a HAL_SavedRegisters structure. +#define HAL_THREAD_GET_SAVED_REGISTERS( _sp_, _regs_ ) \ + (_regs_) = (HAL_SavedRegisters *)(_sp_) + + +//-------------------------------------------------------------------------- +// HAL setjmp + +typedef struct { + cyg_uint32 sp; + cyg_uint32 gp; + cyg_uint32 tp; + cyg_uint32 r1,r2,r4,r5; + cyg_uint32 r20, r21, r22, r23; + cyg_uint32 r24, r25, r26, r27, r28; + cyg_uint32 fp; + cyg_uint32 ep; + cyg_uint32 lp; +} hal_jmp_buf_t; + +typedef cyg_uint32 hal_jmp_buf[sizeof(hal_jmp_buf_t) / sizeof(cyg_uint32)]; + +externC int hal_setjmp(hal_jmp_buf env); +externC void hal_longjmp(hal_jmp_buf env, int val); + +//------------------------------------------------------------------------- +// Idle thread code. +// This macro is called in the idle thread loop, and gives the HAL the +// chance to insert code. Typical idle thread behaviour might be to halt the +// processor. + +externC void hal_idle_thread_action(cyg_uint32 loop_count); + +#define HAL_IDLE_THREAD_ACTION(_count_) hal_idle_thread_action(_count_) + +//-------------------------------------------------------------------------- +// Hardware specific test exit code. This is defined here simply to make +// setting a breakpoint on this function viable. +// +#define CYGHWR_TEST_PROGRAM_EXIT() \ +{ \ + static volatile int ctr; \ + while (1) ctr++; \ +} + +//-------------------------------------------------------------------------- +// Minimal and sensible stack sizes: the intention is that applications +// will use these to provide a stack size in the first instance prior to +// proper analysis. Idle thread stack should be this big. + +// THESE ARE NOT INTENDED TO BE MICROMETRICALLY ACCURATE FIGURES. +// THEY ARE HOWEVER ENOUGH TO START PROGRAMMING. +// YOU MUST MAKE YOUR STACKS LARGER IF YOU HAVE LARGE "AUTO" VARIABLES! + +// This is not a config option because it should not be adjusted except +// under "enough rope" sort of disclaimers. + +// Typical case stack frame size: return link + 4 pushed registers + some locals. +#define CYGNUM_HAL_STACK_FRAME_SIZE (48) + +// Stack needed for a context switch: +#define CYGNUM_HAL_STACK_CONTEXT_SIZE (((32+12)*CYG_HAL_NEC_REG_SIZE)+(32*4)) + + +// Interrupt + call to ISR, interrupt_end() and the DSR +#define CYGNUM_HAL_STACK_INTERRUPT_SIZE (4+2*CYGNUM_HAL_STACK_CONTEXT_SIZE) + +#ifdef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK + +// An interrupt stack which is large enough for all possible interrupt +// conditions (and only used for that purpose) exists. "User" stacks +// can be much smaller + +#define CYGNUM_HAL_STACK_SIZE_MINIMUM (CYGNUM_HAL_STACK_CONTEXT_SIZE+ \ + CYGNUM_HAL_STACK_INTERRUPT_SIZE*2+ \ + CYGNUM_HAL_STACK_FRAME_SIZE*8) +#define CYGNUM_HAL_STACK_SIZE_TYPICAL (CYGNUM_HAL_STACK_SIZE_MINIMUM+1024) + +#else // CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK + +// No separate interrupt stack exists. Make sure all threads contain +// a stack sufficiently large. + +#define CYGNUM_HAL_STACK_SIZE_MINIMUM (4096) +#define CYGNUM_HAL_STACK_SIZE_TYPICAL (4096) + +#endif + +//-------------------------------------------------------------------------- +#endif // CYGONCE_HAL_HAL_ARCH_H +// End of hal_arch.h
new file mode 100644 --- /dev/null +++ b/packages/hal/v85x/arch/current/include/hal_cache.h @@ -0,0 +1,59 @@ +#ifndef CYGONCE_HAL_CACHE_H +#define CYGONCE_HAL_CACHE_H + +//============================================================================= +// +// hal_cache.h +// +// HAL cache control API +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): nickg +// Contributors: nickg +// Date: 1998-02-17 +// Purpose: Cache control API +// Description: The macros defined here provide the HAL APIs for handling +// cache control operations. +// Usage: +// #include <cyg/hal/hal_cache.h> +// ... +// +// +//####DESCRIPTIONEND#### +// +//============================================================================= + +#include <pkgconf/hal.h> +#include <cyg/infra/cyg_type.h> + +#include <cyg/hal/var_cache.h> + +//----------------------------------------------------------------------------- +#endif // ifndef CYGONCE_HAL_CACHE_H +// End of hal_cache.h
new file mode 100644 --- /dev/null +++ b/packages/hal/v85x/arch/current/include/hal_intr.h @@ -0,0 +1,253 @@ +#ifndef CYGONCE_HAL_HAL_INTR_H +#define CYGONCE_HAL_HAL_INTR_H + +//========================================================================== +// +// hal_intr.h +// +// HAL Interrupt and clock support +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): nickg +// Contributors: nickg, jskov, +// gthomas, jlarmour +// Date: 1999-02-16 +// Purpose: Define Interrupt support +// Description: The macros defined here provide the HAL APIs for handling +// interrupts and the clock. +// +// Usage: +// #include <cyg/hal/hal_intr.h> +// ... +// +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#include <pkgconf/hal.h> +#include <pkgconf/hal_v85x.h> + +#include <cyg/infra/cyg_type.h> +#include <cyg/hal/hal_io.h> + +#include <cyg/hal/var_intr.h> + +//-------------------------------------------------------------------------- +// Static data used by HAL + +// ISR tables +externC volatile CYG_ADDRESS hal_interrupt_handlers[CYGNUM_HAL_ISR_COUNT]; +externC volatile CYG_ADDRWORD hal_interrupt_data[CYGNUM_HAL_ISR_COUNT]; +externC volatile CYG_ADDRESS hal_interrupt_objects[CYGNUM_HAL_ISR_COUNT]; + +// VSR table +externC volatile CYG_ADDRESS hal_vsr_table[CYGNUM_HAL_VSR_COUNT]; + +//-------------------------------------------------------------------------- +// Default ISR +// The #define is used to test whether this routine exists, and to allow +// us to call it. + +externC cyg_uint32 hal_default_isr(CYG_ADDRWORD vector, CYG_ADDRWORD data); + +#define HAL_DEFAULT_ISR hal_default_isr + +//-------------------------------------------------------------------------- +// Interrupt state storage + +typedef cyg_uint32 CYG_INTERRUPT_STATE; + +//-------------------------------------------------------------------------- +// Interrupt control macros + +externC cyg_uint32 hal_disable_interrupts(void); +externC void hal_enable_interrupts(void); +externC void hal_restore_interrupts(cyg_uint32); +externC cyg_uint32 hal_query_interrupts(void); + +#ifdef CYGSEM_HAL_NEC_INLINE_INTERRUPT_FUNCTIONS +#define HAL_DISABLE_INTERRUPTS(_old_) \ + CYG_MACRO_START \ + asm volatile ( \ + "stsr PSW,%0;" \ + "di" \ + : "=r"(_old_)); \ + CYG_MACRO_END + +#define HAL_ENABLE_INTERRUPTS() \ + CYG_MACRO_START \ + asm volatile ( \ + "ei" \ + : ); \ + CYG_MACRO_END + +#define HAL_RESTORE_INTERRUPTS(_old_) \ + CYG_MACRO_START \ + asm volatile ( \ + "ldsr %0,PSW" \ + : \ + : "r" (_old_)); \ + CYG_MACRO_END +#else +#define HAL_DISABLE_INTERRUPTS(_old_) _old_ = hal_disable_interrupts() +#define HAL_ENABLE_INTERRUPTS() hal_enable_interrupts() +#define HAL_RESTORE_INTERRUPTS(_old_) hal_restore_interrupts(_old_) +#endif + +#define HAL_QUERY_INTERRUPTS( _state_ ) _state_ = hal_query_interrupts() + +//-------------------------------------------------------------------------- +// Routine to execute DSRs using separate interrupt stack + +#ifdef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK +externC void hal_interrupt_stack_call_pending_DSRs(void); +#define HAL_INTERRUPT_STACK_CALL_PENDING_DSRS() \ + hal_interrupt_stack_call_pending_DSRs() + +// these are offered solely for stack usage testing +// if they are not defined, then there is no interrupt stack. +#define HAL_INTERRUPT_STACK_BASE cyg_interrupt_stack_base +#define HAL_INTERRUPT_STACK_TOP cyg_interrupt_stack +// use them to declare these extern however you want: +// extern char HAL_INTERRUPT_STACK_BASE[]; +// extern char HAL_INTERRUPT_STACK_TOP[]; +// is recommended +#endif + +//-------------------------------------------------------------------------- +// Vector translation. +// For chained interrupts we only have a single vector though which all +// are passed. For unchained interrupts we have a vector per interrupt. +// Note: this hardware does not have/support chained interrupts. + +#ifndef HAL_TRANSLATE_VECTOR +#define HAL_TRANSLATE_VECTOR(_vector_,_index_) (_index_) = (_vector_-CYGNUM_HAL_ISR_MIN) +#endif + +//-------------------------------------------------------------------------- +// Interrupt and VSR attachment macros + +#define HAL_INTERRUPT_IN_USE( _vector_, _state_) \ + CYG_MACRO_START \ + cyg_uint32 _index_; \ + HAL_TRANSLATE_VECTOR ((_vector_), _index_); \ + \ + if( hal_interrupt_handlers[_index_] == (CYG_ADDRESS)HAL_DEFAULT_ISR ) \ + (_state_) = 0; \ + else \ + (_state_) = 1; \ + CYG_MACRO_END + +#define HAL_INTERRUPT_ATTACH( _vector_, _isr_, _data_, _object_ ) \ +{ \ + cyg_uint32 _index_; \ + HAL_TRANSLATE_VECTOR( _vector_, _index_ ); \ + \ + if( hal_interrupt_handlers[_index_] == (CYG_ADDRESS)HAL_DEFAULT_ISR ) \ + { \ + hal_interrupt_handlers[_index_] = (CYG_ADDRESS)_isr_; \ + hal_interrupt_data[_index_] = (CYG_ADDRWORD)_data_; \ + hal_interrupt_objects[_index_] = (CYG_ADDRESS)_object_; \ + } \ +} + +#define HAL_INTERRUPT_DETACH( _vector_, _isr_ ) \ +{ \ + cyg_uint32 _index_; \ + HAL_TRANSLATE_VECTOR( _vector_, _index_ ); \ + \ + if( hal_interrupt_handlers[_index_] == (CYG_ADDRESS)_isr_ ) \ + { \ + hal_interrupt_handlers[_index_] = (CYG_ADDRESS)HAL_DEFAULT_ISR; \ + hal_interrupt_data[_index_] = 0; \ + hal_interrupt_objects[_index_] = 0; \ + } \ +} + +#define HAL_VSR_GET( _vector_, _pvsr_ ) \ + *(_pvsr_) = (void (*)())hal_vsr_table[_vector_]; + + +#define HAL_VSR_SET( _vector_, _vsr_, _poldvsr_ ) CYG_MACRO_START \ + if( _poldvsr_ != NULL) \ + *(CYG_ADDRESS *)_poldvsr_ = (CYG_ADDRESS)hal_vsr_table[_vector_]; \ + hal_vsr_table[_vector_] = (CYG_ADDRESS)_vsr_; \ +CYG_MACRO_END + +// This is an ugly name, but what it means is: grab the VSR back to eCos +// internal handling, or if you like, the default handler. But if +// cooperating with GDB and CygMon, the default behaviour is to pass most +// exceptions to CygMon. This macro undoes that so that eCos handles the +// exception. So use it with care. + +externC void __default_exception_vsr(void); +externC void __default_interrupt_vsr(void); + +#define HAL_VSR_SET_TO_ECOS_HANDLER( _vector_, _poldvsr_ ) CYG_MACRO_START \ + HAL_VSR_SET( _vector_, _vector_ == CYGNUM_HAL_VECTOR_INTERRUPT \ + ? (CYG_ADDRESS)__default_interrupt_vsr \ + : (CYG_ADDRESS)__default_exception_vsr, \ + _poldvsr_ ); \ +CYG_MACRO_END + +//-------------------------------------------------------------------------- +// Interrupt controller access + +externC void hal_interrupt_mask(int); +externC void hal_interrupt_unmask(int); +externC void hal_interrupt_acknowledge(int); + +#define HAL_INTERRUPT_MASK( _vector_ ) hal_interrupt_mask(_vector_) +#define HAL_INTERRUPT_UNMASK( _vector_ ) hal_interrupt_unmask(_vector_) +#define HAL_INTERRUPT_ACKNOWLEDGE( _vector_ ) hal_interrupt_acknowledge(_vector_) + +#define HAL_INTERRUPT_CONFIGURE( _vector_, _level_, _up_ ) +#define HAL_INTERRUPT_SET_LEVEL( _vector_, _level_ ) + +//-------------------------------------------------------------------------- +// Clock control. + +externC CYG_WORD32 cyg_hal_clock_period; +externC void hal_clock_initialize(cyg_int32); +externC void hal_clock_reset(int, cyg_uint32); +externC cyg_uint32 hal_clock_read(void); + +#define HAL_CLOCK_INITIALIZE( _period_ ) hal_clock_initialize(_period_) +#define HAL_CLOCK_RESET( _vector_, _period_ ) hal_clock_reset(_vector_,_period_) +#define HAL_CLOCK_READ( _pvalue_ ) *(_pvalue_) = hal_clock_read() + +#if defined(CYGVAR_KERNEL_COUNTERS_CLOCK_LATENCY) && \ + !defined(HAL_CLOCK_LATENCY) +#define HAL_CLOCK_LATENCY( _pvalue_ ) HAL_CLOCK_READ(_pvalue_) +#endif + +//-------------------------------------------------------------------------- +#endif // ifndef CYGONCE_HAL_HAL_INTR_H +// End of hal_intr.h
new file mode 100644 --- /dev/null +++ b/packages/hal/v85x/arch/current/include/hal_io.h @@ -0,0 +1,140 @@ +#ifndef CYGONCE_HAL_HAL_IO_H +#define CYGONCE_HAL_HAL_IO_H + +//============================================================================= +// +// hal_io.h +// +// HAL device IO register support. +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): nickg +// Contributors: nickg +// Date: 1998-02-17 +// Purpose: Define IO register support +// Description: The macros defined here provide the HAL APIs for handling +// device IO control registers. +// +// Usage: +// #include <cyg/hal/hal_io.h> +// ... +// +// +//####DESCRIPTIONEND#### +// +//============================================================================= + +#include <pkgconf/hal.h> + +#include <cyg/infra/cyg_type.h> + +#include <cyg/hal/plf_io.h> + +//----------------------------------------------------------------------------- +// IO Register address. +// This type is for recording the address of an IO register. + +typedef volatile CYG_ADDRWORD HAL_IO_REGISTER; + +//----------------------------------------------------------------------------- +// BYTE Register access. +// Individual and vectorized access to 8 bit registers. + +#define HAL_READ_UINT8( _register_, _value_ ) \ + ((_value_) = *((volatile CYG_BYTE *)(_register_))) + +#define HAL_WRITE_UINT8( _register_, _value_ ) \ + (*((volatile CYG_BYTE *)(_register_)) = (_value_)) + +#define HAL_READ_UINT8_VECTOR( _register_, _buf_, _count_, _step_ ) \ +{ \ + cyg_count32 _i_,_j_; \ + for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) \ + (_buf_)[_i_] = ((volatile CYG_BYTE *)(_register_))[_j_]; \ +} + +#define HAL_WRITE_UINT8_VECTOR( _register_, _buf_, _count_, _step_ ) \ +{ \ + cyg_count32 _i_,_j_; \ + for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) \ + ((volatile CYG_BYTE *)(_register_))[_j_] = (_buf_)[_i_]; \ +} + + +//----------------------------------------------------------------------------- +// 16 bit access. +// Individual and vectorized access to 16 bit registers. + +#define HAL_READ_UINT16( _register_, _value_ ) \ + ((_value_) = *((volatile CYG_WORD16 *)(_register_))) + +#define HAL_WRITE_UINT16( _register_, _value_ ) \ + (*((volatile CYG_WORD16 *)(_register_)) = (_value_)) + +#define HAL_READ_UINT16_VECTOR( _register_, _buf_, _count_, _step_ ) \ +{ \ + cyg_count32 _i_,_j_; \ + for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) \ + (_buf_)[_i_] = ((volatile CYG_WORD16 *)(_register_))[_j_]; \ +} + +#define HAL_WRITE_UINT16_VECTOR( _register_, _buf_, _count_, _step_ ) \ +{ \ + cyg_count32 _i_,_j_; \ + for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) \ + ((volatile CYG_WORD16 *)(_register_))[_j_] = (_buf_)[_i_]; \ +} + +//----------------------------------------------------------------------------- +// 32 bit access. +// Individual and vectorized access to 32 bit registers. + +#define HAL_READ_UINT32( _register_, _value_ ) \ + ((_value_) = *((volatile CYG_WORD32 *)(_register_))) + +#define HAL_WRITE_UINT32( _register_, _value_ ) \ + (*((volatile CYG_WORD32 *)(_register_)) = (_value_)) + +#define HAL_READ_UINT32_VECTOR( _register_, _buf_, _count_, _step_ ) \ +{ \ + cyg_count32 _i_,_j_; \ + for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) \ + (_buf_)[_i_] = ((volatile CYG_WORD32 *)(_register_))[_j_]; \ +} + +#define HAL_WRITE_UINT32_VECTOR( _register_, _buf_, _count_, _step_ ) \ +{ \ + cyg_count32 _i_,_j_; \ + for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) \ + ((volatile CYG_WORD32 *)(_register_))[_j_] = (_buf_)[_i_]; \ +} + +//----------------------------------------------------------------------------- +#endif // ifndef CYGONCE_HAL_HAL_IO_H +// End of hal_io.h
new file mode 100644 --- /dev/null +++ b/packages/hal/v85x/arch/current/include/nec-stub.h @@ -0,0 +1,111 @@ +#ifndef CYGONCE_HAL_NEC_STUB_H +#define CYGONCE_HAL_NEC_STUB_H +//======================================================================== +// +// nec-stub.h +// +// NEC-specific definitions for generic stub +// +//======================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//======================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): Red Hat, nickg +// Contributors: Red Hat, nickg +// Date: 1998-06-08 +// Purpose: +// Description: NEC-specific definitions for generic stub +// Usage: +// +//####DESCRIPTIONEND#### +// +//======================================================================== + + +#include <pkgconf/system.h> + +#ifdef __cplusplus +extern "C" { +#endif + +#define NUMREGS 66 +#define REGSIZE(X) 4 +typedef unsigned long target_register_t; + +enum regnames { + R0, R1, SP, R3, R4, R5, R6, R7, + R8, R9 , R10, R11, R12, R13, R14, R15, + R16, R17, R18, R19, R20, R21, R22, R23, + R24, R25, R26, R27, R28, R29, R30, R31, + EIPC, EIPSW, FEPC, FEPSW, ECR, PSW, SR6, SR7, + SR8, SR9 , SR10, SR11, SR12, SR13, SR14, SR15, + SR16, SR17, SR18, SR19, SR20, SR21, SR22, SR23, + SR24, SR25, SR26, SR27, SR28, SR29, SR30, SR31, + PC, FP +}; + +typedef enum regnames regnames_t; + +/* Given a trap value TRAP, return the corresponding signal. */ +extern int __computeSignal (unsigned int trap_number); + +/* Return the SPARC trap number corresponding to the last-taken trap. */ +extern int __get_trap_number (void); + +/* Return the currently-saved value corresponding to register REG. */ +extern target_register_t get_register (regnames_t reg); + +/* Store VALUE in the register corresponding to WHICH. */ +extern void put_register (regnames_t which, target_register_t value); + +/* Set the currently-saved pc register value to PC. This also updates NPC + as needed. */ +extern void set_pc (target_register_t pc); + +/* Set things up so that the next user resume will execute one instruction. + This may be done by setting breakpoints or setting a single step flag + in the saved user registers, for example. */ +void __single_step (void); + +/* Clear the single-step state. */ +void __clear_single_step (void); + +/* If the breakpoint we hit is in the breakpoint() instruction, return a + non-zero value. */ +extern int __is_breakpoint_function (void); + +/* Skip the current instruction. */ +extern void __skipinst (void); + +extern void __install_breakpoints (void); + +extern void __clear_breakpoints (void); + +#ifdef __cplusplus +} /* extern "C" */ +#endif + +#endif // ifndef CYGONCE_HAL_NEC_STUB_H
new file mode 100644 --- /dev/null +++ b/packages/hal/v85x/arch/current/src/hal_misc.c @@ -0,0 +1,211 @@ +/*========================================================================== +// +// hal_misc.c +// +// HAL miscellaneous functions +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): nickg, gthomas +// Contributors: nickg, gthomas +// Date: 1999-02-20 +// Purpose: HAL miscellaneous functions +// Description: This file contains miscellaneous functions provided by the +// HAL. +// +//####DESCRIPTIONEND#### +// +//=========================================================================*/ + +#include <pkgconf/hal.h> +#include <pkgconf/hal_v85x.h> +#ifdef CYGPKG_KERNEL +#include <pkgconf/kernel.h> +#endif +#ifdef CYGPKG_CYGMON +#include <pkgconf/cygmon.h> +#endif + +#include <cyg/infra/cyg_type.h> +#include <cyg/infra/cyg_trac.h> // tracing macros +#include <cyg/infra/cyg_ass.h> // assertion macros +#include <cyg/infra/diag.h> + +#include <cyg/hal/hal_arch.h> // HAL header +#include <cyg/hal/hal_intr.h> // HAL header + +/*------------------------------------------------------------------------*/ +/* First level C exception handler. */ + +externC void __handle_exception (void); + +externC HAL_SavedRegisters *_hal_registers; +extern void *__mem_fault_handler; + +void +exception_handler(HAL_SavedRegisters *regs) +{ +#if defined(CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS) && !defined(CYGPKG_CYGMON) +// diag_printf("Exception! Frame: %x\n", regs); +// show_regs(regs); + static int gdb_active; + if (gdb_active == 0) { + gdb_active = 1; + _hal_registers = regs; + __handle_exception(); + gdb_active = 0; + } + +#elif defined(CYGPKG_KERNEL_EXCEPTIONS) + + // We should decode the vector and pass a more appropriate + // value as the second argument. For now we simply pass a + // pointer to the saved registers. We should also divert + // breakpoint and other debug vectors into the debug stubs. + + cyg_hal_deliver_exception( regs->vector, (CYG_ADDRWORD)regs ); + +#else + + CYG_FAIL("Exception!!!"); + +#endif + + return; +} + +/*------------------------------------------------------------------------*/ +/* C++ support - run initial constructors */ + +#ifdef CYGSEM_HAL_STOP_CONSTRUCTORS_ON_FLAG +cyg_bool cyg_hal_stop_constructors; +#endif + +typedef void (*pfunc) (void); +extern pfunc __CTOR_LIST__[]; +extern pfunc __CTOR_END__[]; + +void +cyg_hal_invoke_constructors (void) +{ + +#ifdef CYGSEM_HAL_STOP_CONSTRUCTORS_ON_FLAG + static pfunc *p = &__CTOR_END__[-1]; + + cyg_hal_stop_constructors = 0; + for (; p >= __CTOR_LIST__; p--) { + (*p) (); + if (cyg_hal_stop_constructors) { + p--; + break; + } + } +#else + pfunc *p; + + for (p = &__CTOR_END__[-1]; p >= __CTOR_LIST__; p--) { + (*p) (); + } +#endif +} + +/*------------------------------------------------------------------------*/ +/* default ISR */ + +externC cyg_uint32 +hal_default_isr(CYG_ADDRWORD vector, CYG_ADDRWORD data) +{ + CYG_TRACE1(true, "Interrupt: %d", vector); + +#ifndef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS +#ifdef CYGDBG_HAL_DEBUG_GDB_CTRLC_SUPPORT +#ifdef CYGDBG_HAL_CTRLC_ISR + // then see if it is an incoming character interrupt and break + // into the stub ROM if the char is a ^C. + if ( CYGDBG_HAL_CTRLC_ISR( vector, data ) ) + return 1; // interrupt handled +#endif +#endif +#endif + + diag_printf("Spurious Interrupt!!! - vector: %d, data: %x\n", vector, + data); + CYG_FAIL("Spurious Interrupt!!!"); + return 0; +} + +/*------------------------------------------------------------------------*/ +/* Idle thread action */ + +void +hal_idle_thread_action( cyg_uint32 count ) +{ +} + +/*-------------------------------------------------------------------------*/ +/* Misc functions */ + +cyg_uint32 +hal_lsbit_index(cyg_uint32 mask) +{ + int i; + for (i = 0; i < 32; i++) { + if (mask & (1<<i)) return ((cyg_uint32)i); + } + return ((cyg_uint32)-1); +} + +cyg_uint32 +hal_msbit_index(cyg_uint32 mask) +{ + int i; + for (i = 32; i >= 0; i++) { + if (mask & (1<<i)) return ((cyg_uint32)i); + } + return ((cyg_uint32)-1); +} + +void +show_regs(HAL_SavedRegisters *regs) +{ + int i; + diag_printf("Regs\n"); + for (i = 0; i < 32; i++) { + if ((i % 8) == 0) { + diag_printf("R%2d: ", i); + } + diag_printf("0x%08x ", regs->d[i]); + if ((i % 8) == 7) { + diag_printf("\n"); + } + } + diag_printf("PC = %x, PSW = %x\n", regs->pc, regs->psw); +} + +/*------------------------------------------------------------------------*/ +// EOF hal_misc.c
new file mode 100644 --- /dev/null +++ b/packages/hal/v85x/arch/current/src/hal_mk_defs.c @@ -0,0 +1,161 @@ +//========================================================================== +// +// hal_mk_defs.c +// +// HAL (architecture) "make defs" program +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas, jskov +// Date: 2000-02-21 +// Purpose: SH architecture dependent definition generator +// Description: This file contains code that can be compiled by the target +// compiler and used to generate machine specific definitions +// suitable for use in assembly code. +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#include <pkgconf/hal.h> + +#include <cyg/hal/hal_arch.h> // HAL header +#include <cyg/hal/hal_intr.h> // HAL header +#ifdef CYGPKG_KERNEL +# include <pkgconf/kernel.h> +# include <cyg/kernel/instrmnt.h> +#endif + +/* + * This program is used to generate definitions needed by + * assembly language modules. + * + * This technique was first used in the OSF Mach kernel code: + * generate asm statements containing #defines, + * compile this file to assembler, and then extract the + * #defines from the assembly-language output. + */ + +#define DEFINE(sym, val) \ + asm volatile("\n\t.equ\t" #sym ",%0" : : "i" (val)) + +int +main(void) +{ + // setjmp/longjmp buffer + DEFINE(CYGARC_JMPBUF_SP, offsetof(hal_jmp_buf_t, sp)); + DEFINE(CYGARC_JMPBUF_GP, offsetof(hal_jmp_buf_t, gp)); + DEFINE(CYGARC_JMPBUF_TP, offsetof(hal_jmp_buf_t, tp)); + DEFINE(CYGARC_JMPBUF_R1, offsetof(hal_jmp_buf_t, r1)); + DEFINE(CYGARC_JMPBUF_R2, offsetof(hal_jmp_buf_t, r2)); + DEFINE(CYGARC_JMPBUF_R4, offsetof(hal_jmp_buf_t, r4)); + DEFINE(CYGARC_JMPBUF_R5, offsetof(hal_jmp_buf_t, r5)); + DEFINE(CYGARC_JMPBUF_R20, offsetof(hal_jmp_buf_t, r20)); + DEFINE(CYGARC_JMPBUF_R21, offsetof(hal_jmp_buf_t, r21)); + DEFINE(CYGARC_JMPBUF_R22, offsetof(hal_jmp_buf_t, r22)); + DEFINE(CYGARC_JMPBUF_R23, offsetof(hal_jmp_buf_t, r23)); + DEFINE(CYGARC_JMPBUF_R24, offsetof(hal_jmp_buf_t, r24)); + DEFINE(CYGARC_JMPBUF_R25, offsetof(hal_jmp_buf_t, r25)); + DEFINE(CYGARC_JMPBUF_R26, offsetof(hal_jmp_buf_t, r26)); + DEFINE(CYGARC_JMPBUF_R27, offsetof(hal_jmp_buf_t, r27)); + DEFINE(CYGARC_JMPBUF_R28, offsetof(hal_jmp_buf_t, r28)); + DEFINE(CYGARC_JMPBUF_FP, offsetof(hal_jmp_buf_t, fp)); + DEFINE(CYGARC_JMPBUF_EP, offsetof(hal_jmp_buf_t, ep)); + DEFINE(CYGARC_JMPBUF_LP, offsetof(hal_jmp_buf_t, lp)); + + DEFINE(CYGARC_JMPBUF_SIZE, sizeof(hal_jmp_buf_t)); + + // Exception/interrupt/context save buffer + DEFINE(CYGARC_REG_R1, offsetof(HAL_SavedRegisters, d[1])); + DEFINE(CYGARC_REG_R2, offsetof(HAL_SavedRegisters, d[2])); + DEFINE(CYGARC_REG_R3, offsetof(HAL_SavedRegisters, d[3])); + DEFINE(CYGARC_REG_SP, offsetof(HAL_SavedRegisters, d[3])); + DEFINE(CYGARC_REG_R4, offsetof(HAL_SavedRegisters, d[4])); + DEFINE(CYGARC_REG_R5, offsetof(HAL_SavedRegisters, d[5])); + DEFINE(CYGARC_REG_R6, offsetof(HAL_SavedRegisters, d[6])); + DEFINE(CYGARC_REG_R7, offsetof(HAL_SavedRegisters, d[7])); + DEFINE(CYGARC_REG_R8, offsetof(HAL_SavedRegisters, d[8])); + DEFINE(CYGARC_REG_R9, offsetof(HAL_SavedRegisters, d[9])); + DEFINE(CYGARC_REG_R10, offsetof(HAL_SavedRegisters, d[10])); + DEFINE(CYGARC_REG_R11, offsetof(HAL_SavedRegisters, d[11])); + DEFINE(CYGARC_REG_R12, offsetof(HAL_SavedRegisters, d[12])); + DEFINE(CYGARC_REG_R13, offsetof(HAL_SavedRegisters, d[13])); + DEFINE(CYGARC_REG_R14, offsetof(HAL_SavedRegisters, d[14])); + DEFINE(CYGARC_REG_R15, offsetof(HAL_SavedRegisters, d[15])); + DEFINE(CYGARC_REG_R16, offsetof(HAL_SavedRegisters, d[16])); + DEFINE(CYGARC_REG_R17, offsetof(HAL_SavedRegisters, d[17])); + DEFINE(CYGARC_REG_R18, offsetof(HAL_SavedRegisters, d[18])); + DEFINE(CYGARC_REG_R19, offsetof(HAL_SavedRegisters, d[19])); + DEFINE(CYGARC_REG_R20, offsetof(HAL_SavedRegisters, d[20])); + DEFINE(CYGARC_REG_R21, offsetof(HAL_SavedRegisters, d[21])); + DEFINE(CYGARC_REG_R22, offsetof(HAL_SavedRegisters, d[22])); + DEFINE(CYGARC_REG_R23, offsetof(HAL_SavedRegisters, d[23])); + DEFINE(CYGARC_REG_R24, offsetof(HAL_SavedRegisters, d[24])); + DEFINE(CYGARC_REG_R25, offsetof(HAL_SavedRegisters, d[25])); + DEFINE(CYGARC_REG_R26, offsetof(HAL_SavedRegisters, d[26])); + DEFINE(CYGARC_REG_R27, offsetof(HAL_SavedRegisters, d[27])); + DEFINE(CYGARC_REG_R28, offsetof(HAL_SavedRegisters, d[28])); + DEFINE(CYGARC_REG_R29, offsetof(HAL_SavedRegisters, d[29])); + DEFINE(CYGARC_REG_R30, offsetof(HAL_SavedRegisters, d[30])); + DEFINE(CYGARC_REG_R31, offsetof(HAL_SavedRegisters, d[31])); + DEFINE(CYGARC_REG_EP, offsetof(HAL_SavedRegisters, d[30])); + DEFINE(CYGARC_REG_LP, offsetof(HAL_SavedRegisters, d[31])); + DEFINE(CYGARC_REG_PSW, offsetof(HAL_SavedRegisters, psw)); + DEFINE(CYGARC_REG_PC, offsetof(HAL_SavedRegisters, pc)); + + // Below only saved on exceptions/interrupts + DEFINE(CYGARC_REG_CAUSE, offsetof(HAL_SavedRegisters, cause)); + DEFINE(CYGARC_REG_VECTOR, offsetof(HAL_SavedRegisters, vector)); + + DEFINE(CYGARC_EXCEPTION_FRAME_SIZE, sizeof(HAL_SavedRegisters)); + + // Some other exception related definitions + DEFINE(CYGNUM_HAL_ISR_MIN, CYGNUM_HAL_ISR_MIN); + DEFINE(CYGNUM_HAL_ISR_COUNT, CYGNUM_HAL_ISR_COUNT); + DEFINE(CYGNUM_HAL_VSR_MAX, CYGNUM_HAL_VSR_MAX); + DEFINE(CYGNUM_HAL_VSR_COUNT, CYGNUM_HAL_VSR_COUNT); + DEFINE(CYGNUM_HAL_EXCEPTION_COUNT, CYGNUM_HAL_EXCEPTION_COUNT); + DEFINE(CYGNUM_HAL_VECTOR_WATCHDOG_TIMER, CYGNUM_HAL_VECTOR_WATCHDOG_TIMER); + DEFINE(CYGNUM_HAL_VECTOR_TRAP0, CYGNUM_HAL_VECTOR_TRAP0); + DEFINE(CYGNUM_HAL_VECTOR_TRAP1, CYGNUM_HAL_VECTOR_TRAP1); + DEFINE(CYGNUM_HAL_VECTOR_ILLEGAL_OPCODE, CYGNUM_HAL_VECTOR_ILLEGAL_OPCODE); + + DEFINE(CYGARC_PSW_ID, CYGARC_PSW_ID); + DEFINE(CYGARC_PSW_EP, CYGARC_PSW_EP); + DEFINE(CYGARC_PSW_NP, CYGARC_PSW_NP); + +#ifdef CYGPKG_KERNEL + DEFINE(RAISE_INTR, CYG_INSTRUMENT_CLASS_INTR|CYG_INSTRUMENT_EVENT_INTR_RAISE); +#endif + + // Variant definitions - want these to be included instead. +} + +//-------------------------------------------------------------------------- +// EOF hal_mk_defs.c
new file mode 100644 --- /dev/null +++ b/packages/hal/v85x/arch/current/src/v85x.ld @@ -0,0 +1,123 @@ +//============================================================================= +// +// MLT linker script for NEC +// adapted from packages/hal/arm/pid/v1_1/src/pid.ld +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= + +#include <pkgconf/system.h> + +STARTUP(vectors.o) +ENTRY(reset_vector) +#ifdef EXTRAS +INPUT(extras.o) +#endif +GROUP(libtarget.a libgcc.a) + +#define ALIGN_LMA 4 +#define FOLLOWING(_section_) AT ((LOADADDR (_section_) + SIZEOF (_section_) + ALIGN_LMA - 1) & ~ (ALIGN_LMA - 1)) +#define LMA_EQ_VMA +#define FORCE_OUTPUT . = . + +#define SECTIONS_BEGIN \ + /* Debug information */ \ + .debug_aranges 0 : { *(.debug_aranges) } \ + .debug_pubnames 0 : { *(.debug_pubnames) } \ + .debug_info 0 : { *(.debug_info) } \ + .debug_abbrev 0 : { *(.debug_abbrev) } \ + .debug_line 0 : { *(.debug_line) } \ + .debug_frame 0 : { *(.debug_frame) } \ + .debug_str 0 : { *(.debug_str) } \ + .debug_loc 0 : { *(.debug_loc) } \ + .debug_macinfo 0 : { *(.debug_macinfo) } + +#define SECTION_rom_vectors(_region_, _vma_, _lma_) \ + .rom_vectors _vma_ : _lma_ \ + { FORCE_OUTPUT; KEEP (*(.vectors)) } \ + > _region_ + +#define SECTION_text(_region_, _vma_, _lma_) \ + .text _vma_ : _lma_ \ + { stext = ABSOLUTE(.); \ + PROVIDE (__stext = ABSOLUTE(.)); \ + *(.text*) *(.gnu.warning) *(.gnu.linkonce*) *(.init) \ + *(.glue_7) *(.glue_7t) \ + } > _region_ \ + etext = .; PROVIDE (__etext = .); + +#define SECTION_fini(_region_, _vma_, _lma_) \ + .fini _vma_ : _lma_ \ + { FORCE_OUTPUT; *(.fini) } \ + > _region_ + +#define SECTION_rodata(_region_, _vma_, _lma_) \ + .rodata _vma_ : _lma_ \ + { FORCE_OUTPUT; *(.rodata*) } \ + > _region_ + +#define SECTION_rodata1(_region_, _vma_, _lma_) \ + .rodata1 _vma_ : _lma_ \ + { FORCE_OUTPUT; *(.rodata1) } \ + > _region_ + +#define SECTION_fixup(_region_, _vma_, _lma_) \ + .fixup _vma_ : _lma_ \ + { FORCE_OUTPUT; *(.fixup) } \ + > _region_ + +#define SECTION_gcc_except_table(_region_, _vma_, _lma_) \ + .gcc_except_table _vma_ : _lma_ \ + { FORCE_OUTPUT; *(.gcc_except_table) } \ + > _region_ + +#define SECTION_data(_region_, _vma_, _lma_) \ + .data _vma_ : _lma_ \ + { __ram_data_start = ABSOLUTE (.); *(.data*) *(.data1) MERGE_IN_RODATA \ + _GOT1_START_ = ABSOLUTE (.); *(.got1) _GOT1_END_ = ABSOLUTE (.); \ + _GOT2_START_ = ABSOLUTE (.); *(.got2) _GOT2_END_ = ABSOLUTE (.); \ + . = ALIGN (4); \ + __DEVTAB__ = ABSOLUTE (.); KEEP (*(SORT (.devtab*))) __DEVTAB_END__ = ABSOLUTE (.); \ + __NETDEVTAB__ = ABSOLUTE (.); KEEP (*(SORT (.netdevtab*))) __NETDEVTAB_END__ = ABSOLUTE (.); \ + __CTOR_LIST__ = ABSOLUTE (.); KEEP (*(SORT (.ctors*))) __CTOR_END__ = ABSOLUTE (.); \ + __DTOR_LIST__ = ABSOLUTE (.); KEEP (*(SORT (.dtors*))) __DTOR_END__ = ABSOLUTE (.); \ + *(.dynamic) *(.sdata*) *(.sbss*) } \ + > _region_ \ + __rom_data_start = LOADADDR (.data); \ + __ram_data_end = .; PROVIDE (__ram_data_end = .); _edata = .; PROVIDE (edata = .); \ + PROVIDE (__rom_data_end = LOADADDR (.data) + SIZEOF(.data)); + +#define SECTION_bss(_region_, _vma_, _lma_) \ + .bss _vma_ : _lma_ \ + { __bss_start = ABSOLUTE (.); \ + *(.scommon) *(.dynbss) *(.bss*) *(COMMON) \ + __bss_end = ABSOLUTE (.); } \ + > _region_ + +#define SECTIONS_END . = ALIGN(4); _end = .; PROVIDE (end = .); \ + +#include <pkgconf/hal_v85x.h> +#include CYGHWR_MEMORY_LAYOUT_LDI
new file mode 100644 --- /dev/null +++ b/packages/hal/v85x/arch/current/src/vectors.S @@ -0,0 +1,518 @@ +// #======================================================================== +// # +// # vectors.S +// # +// # NEC/V85x exception/interrupt vectors +// # +// #======================================================================== +// ####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +// ####COPYRIGHTEND#### +// #======================================================================== +// ######DESCRIPTIONBEGIN#### +// # +// # Author(s): gthomas +// # Contributors: gthomas +// # Date: 2000-03-10 +// # Purpose: NEC/V85x exception vectors +// # Description: This file defines the code placed into the exception +// # vectors. It also contains the first level default VSRs +// # that save and restore state for both exceptions and +// # interrupts. +// # +// #####DESCRIPTIONEND#### +// # +// #======================================================================== + +#include <pkgconf/hal.h> +#include <pkgconf/hal_v85x.h> +#ifdef CYGPKG_KERNEL // no CDL yet +#include <pkgconf/kernel.h> +#else +# undef CYGFUN_HAL_COMMON_KERNEL_SUPPORT +# undef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK +#endif +#include <cyg/hal/hal_platform_setup.h> + +#include <cyg/hal/nec_offsets.inc> + +// Two different macros in case we ever decide to differentiate +// between exceptions and interrupts. + .macro EXCEPTION + .org reset_vector+(0x0010*VECTOR) + addi -CYGARC_EXCEPTION_FRAME_SIZE,sp,sp + st.w r1,CYGARC_REG_R1[sp] + movea VECTOR,r0,r1 + .set VECTOR, VECTOR+1 + jr exception + .endm + + .macro INTERRUPT + .org reset_vector+(0x0010*VECTOR) + addi -CYGARC_EXCEPTION_FRAME_SIZE,sp,sp + st.w r1,CYGARC_REG_R1[sp] + movea VECTOR,r0,r1 + jr exception + .set VECTOR, VECTOR+1 + .endm + + .text + .globl reset_vector +reset_vector: + +#ifdef CYG_HAL_STARTUP_ROM +// +// These are the hardware exception vectors. +// +__ROM_vsr: + // 0x000 + jr start + + .set VECTOR, 1 + .rept CYGNUM_HAL_EXCEPTION_COUNT-1 + EXCEPTION + .endr + .set VECTOR, 8 + .rept CYGNUM_HAL_ISR_COUNT + INTERRUPT + .endr +#endif // CYG_HAL_STARTUP_ROM + + .globl start +start: + // Perform hardware initialization + PLATFORM_SETUP1 + +#ifdef CYG_HAL_STARTUP_ROM + // Relocate [copy] data from ROM to RAM + lea ___rom_data_start,r6 + lea ___ram_data_start,r7 + lea ___ram_data_end,r8 +1: ld.w 0[r6],r1 + st.w r1,0[r7] + addi 4,r6,r6 + addi 4,r7,r7 + cmp r7,r8 + bne 1b +#endif + // Initialize stack + lea __startup_stack,r1 + mov r1,sp + + // Clear BSS + lea ___bss_start,r6 + lea ___bss_end,r7 +1: st.w r0,0[r6] + addi 4,r6,r6 + cmp r6,r7 + bne 1b + +#ifdef CYG_HAL_STARTUP_ROM + // Built initial trap VSR tables + lea __vsr_table,r6 + lea __vsr_table_end,r9 +#if 0 + lea __ROM_vsr,r7 + mov r6,r8 + sub r7,r8 + lea 0x003FFFFF,r7 + and r7,r8 + lea 0x07800000,r7 + or r7,r8 +#else + lea 0x00000794,r8 // jr 0x0100xx0 +#endif +10: st.w r8,0[r6] + addi 16,r6,r6 + cmp r6,r9 + bne 10b +#else +// Set up VSR pointers into this application/image + lea _hal_vsr_table+(CYGNUM_HAL_EXCEPTION_COUNT*4),r6 + movea CYGNUM_HAL_ISR_COUNT,r0,r7 + lea do_interrupt,r8 +10: st.w r8,0[r6] + addi 4,r6,r6 + addi -1,r7,r7 + bne 10b +#endif + + // Initialize hardware + jarl _cyg_hal_hardware_init,r31 + +#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS +#ifndef CYG_HAL_STARTUP_ROM +// Need to handle exceptions as well + lea _hal_vsr_table,r6 + movea CYGNUM_HAL_EXCEPTION_COUNT,r0,r7 + lea do_exception,r8 +10: st.w r8,0[r6] + addi 4,r6,r6 + addi -1,r7,r7 + bne 10b +#endif + jarl _initialize_stub,r31 +#endif + + // Run through static constructors + jarl _cyg_hal_invoke_constructors,r31 + + // Ready to start the eCos kernel + jarl _cyg_start,r31 + + // If we get here, something is _very_ wrong +_start_hang: + br _start_hang + +#ifdef CYG_HAL_STARTUP_ROM + // Handle exception +exception: + // save exception context + st.w ep,CYGARC_REG_EP[sp] + mov sp,ep + st.w r1,CYGARC_REG_VECTOR[ep] + addi CYGARC_EXCEPTION_FRAME_SIZE,ep,r1 + sst.w r2,CYGARC_REG_R2[ep] + sst.w r1,CYGARC_REG_SP[ep] + sst.w r4,CYGARC_REG_R4[ep] + sst.w r5,CYGARC_REG_R5[ep] + sst.w r6,CYGARC_REG_R6[ep] + sst.w r7,CYGARC_REG_R7[ep] + sst.w r8,CYGARC_REG_R8[ep] + sst.w r9,CYGARC_REG_R9[ep] + sst.w r10,CYGARC_REG_R10[ep] + sst.w r11,CYGARC_REG_R11[ep] + sst.w r12,CYGARC_REG_R12[ep] + sst.w r13,CYGARC_REG_R13[ep] + sst.w r14,CYGARC_REG_R14[ep] + sst.w r15,CYGARC_REG_R15[ep] + sst.w r16,CYGARC_REG_R16[ep] + sst.w r17,CYGARC_REG_R17[ep] + sst.w r18,CYGARC_REG_R18[ep] + sst.w r19,CYGARC_REG_R19[ep] + sst.w r20,CYGARC_REG_R20[ep] + sst.w r21,CYGARC_REG_R21[ep] + sst.w r22,CYGARC_REG_R22[ep] + sst.w r23,CYGARC_REG_R23[ep] + sst.w r24,CYGARC_REG_R24[ep] + sst.w r25,CYGARC_REG_R25[ep] + sst.w r26,CYGARC_REG_R26[ep] + sst.w r27,CYGARC_REG_R27[ep] + sst.w r28,CYGARC_REG_R28[ep] + sst.w r29,CYGARC_REG_R29[ep] + ld.w CYGARC_REG_VECTOR[ep],r8 + sst.w lp,CYGARC_REG_LP[ep] + cmp CYGNUM_HAL_VECTOR_TRAP0,r8 // NMI? + bge 05f + stsr FEPC,r6 // saved state differs + stsr FEPSW,r7 + br 20f +05: stsr EIPC,r6 + cmp CYGNUM_HAL_VECTOR_ILLEGAL_OPCODE,r8 // Illegal opcode? + bne 10f + addi -4,r6,r6 // yes, adjust PC +10: stsr EIPSW,r7 +20: st.w r6,CYGARC_REG_PC[ep] + st.w r7,CYGARC_REG_PSW[ep] + stsr ECR,r6 + st.w r6,CYGARC_REG_CAUSE[ep] + // Reenable exception processing + stsr PSW,r6 + andi ~(CYGARC_PSW_EP|CYGARC_PSW_NP),r6,r6 + ldsr r6,PSW + shl 2,r8 + lea _hal_vsr_table,r1 + add r1,r8 + ld.w 0[r8],r1 + jmp [r1] +#endif + +do_exception: + mov sp,r6 + jarl _exception_handler,r31 + +return_from_exception_or_interrupt: + mov sp,ep + ld.w CYGARC_REG_PSW[ep],r7 + sld.w CYGARC_REG_R1[ep],r1 + ld.w CYGARC_REG_PC[ep],r6 + sld.w CYGARC_REG_R2[ep],r2 + // disable interrupts while restoring context + ld.w CYGARC_REG_VECTOR[ep],r4 + stsr PSW,r8 + cmp CYGNUM_HAL_VECTOR_TRAP0,r4 + bge 10f + ori CYGARC_PSW_NP,r8,r8 // returning from NMI + ori CYGARC_PSW_ID,r8,r8 // disable interrupt + ldsr r8,PSW + ldsr r7,FEPSW + ldsr r6,FEPC + br 30f +10: cmp CYGNUM_HAL_ISR_MIN,r4 // exception or interrupt + bge 20f + ori CYGARC_PSW_EP,r8,r8 // returning from exception +20: ori CYGARC_PSW_ID,r8,r8 // disable interrupt + ldsr r8,PSW + ldsr r7,EIPSW // Avoid pipline bubbles + ldsr r6,EIPC +30: sld.w CYGARC_REG_R4[ep],r4 + sld.w CYGARC_REG_R5[ep],r5 + sld.w CYGARC_REG_R6[ep],r6 + sld.w CYGARC_REG_R7[ep],r7 + sld.w CYGARC_REG_R8[ep],r8 + sld.w CYGARC_REG_R9[ep],r9 + sld.w CYGARC_REG_R10[ep],r10 + sld.w CYGARC_REG_R11[ep],r11 + sld.w CYGARC_REG_R12[ep],r12 + sld.w CYGARC_REG_R13[ep],r13 + sld.w CYGARC_REG_R14[ep],r14 + sld.w CYGARC_REG_R15[ep],r15 + sld.w CYGARC_REG_R16[ep],r16 + sld.w CYGARC_REG_R17[ep],r17 + sld.w CYGARC_REG_R18[ep],r18 + sld.w CYGARC_REG_R19[ep],r19 + sld.w CYGARC_REG_R20[ep],r20 + sld.w CYGARC_REG_R21[ep],r21 + sld.w CYGARC_REG_R22[ep],r22 + sld.w CYGARC_REG_R23[ep],r23 + sld.w CYGARC_REG_R24[ep],r24 + sld.w CYGARC_REG_R25[ep],r25 + sld.w CYGARC_REG_R26[ep],r26 + sld.w CYGARC_REG_R27[ep],r27 + sld.w CYGARC_REG_R28[ep],r28 + sld.w CYGARC_REG_R29[ep],r29 + sld.w CYGARC_REG_LP[ep],lp + sld.w CYGARC_REG_SP[ep],sp + sld.w CYGARC_REG_EP[ep],ep + reti + + // Handle interrupt - these are typically vectored into user code +do_interrupt: + mov sp,ep // save pointer to regs frame + +#ifdef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK + // Switch to interrupt stack + lea irq_level,r6 // current number of nested interrupts + ld.w 0[r6],r7 + addi 1,r7,r8 + st.w r8,0[r6] + cmp 0,r7 // if was zero, switch stacks + bne 10f + mov sp,r1 // save old stack pointer + lea __interrupt_stack-4,r2 + mov r2,sp + st.w r1,0[sp] +10: +#endif // CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK + + // The entire CPU state is now stashed on the stack, + // increment the scheduler lock and handle the interrupt + +#ifdef CYGFUN_HAL_COMMON_KERNEL_SUPPORT + .extern cyg_scheduler_sched_lock + lea cyg_scheduler_sched_lock,r7 + ld.w 0[r7],r8 + addi 1,r8,r8 + st.w r8,0[r7] +#endif + +#if defined(CYGPKG_KERNEL_INSTRUMENT) && \ + defined(CYGDBG_KERNEL_INSTRUMENT_INTR) + lea RAISE_INTR,r6 // arg0 = type = INTR,RAISE + ld.w CYGARC_REG_VECTOR[ep],r7 // args = vector + mov r0,r8 // arg2 = 0 + jarl _cyg_instrument,r31 +#endif + + ld.w CYGARC_REG_VECTOR[ep],r6 // vector # + addi -CYGNUM_HAL_ISR_MIN,r6,r8 + shl 2,r8 + lea _hal_interrupt_objects,r1 + add r8,r1 + ld.w 0[r1],r29 // save object handle + lea _hal_interrupt_data,r1 + add r8,r1 + ld.w 0[r1],r7 // handler data + lea _hal_interrupt_handlers,r1 + add r8,r1 + mov ep,r8 // pointer to saved registers + ld.w 0[r1],r1 // handler routine + jarl call_via_r1,r31 + +#ifdef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK + // If we are returning from the last nested interrupt, move back + // to the thread stack. interrupt_end() must be called on the + // thread stack since it potentially causes a context switch. + lea irq_level,r6 + ld.w 0[r6],r7 + addi -1,r7,r8 + st.w r8,0[r6] + cmp 0,r8 + bne 10f + ld.w 0[sp],sp // Restore non-interrupt stack at last interrupt +10: +#endif // CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK + +#ifdef CYGFUN_HAL_COMMON_KERNEL_SUPPORT + // The return value from the handler (in r10) will indicate whether a + // DSR is to be posted. Pass this together with a pointer to the + // interrupt object we have just used to the interrupt tidy up routine. + + mov r10,r6 // interrupt handler return code + mov r29,r7 // object handle + mov ep,r8 // register frame + jarl _interrupt_end,r31 // post any bottom layer handle + +#endif + br return_from_exception_or_interrupt + +#ifdef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK + .globl _hal_interrupt_stack_call_pending_DSRs +_hal_interrupt_stack_call_pending_DSRs: + stsr PSW,r9 + di // disable interrupts while changing stack + // Switch to interrupt stack + lea irq_level,r6 // current number of nested interrupts + mov 1,r7 // note: this can never be non-zero at this point + st.w r7,0[r6] + mov sp,r1 // save old stack pointer + lea __interrupt_stack-(4*4),r8 + mov r8,sp + st.w r1,0[sp] + st.w r9,4[sp] + st.w lp,8[sp] + ei + jarl _cyg_interrupt_call_pending_DSRs,lp + di + ld.w 8[sp],lp // restore state + ld.w 4[sp],r6 + ld.w 0[sp],sp + lea irq_level,r7 + st.w r0,0[r7] + ldsr r6,PSW + jmp [lp] +#endif // CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK + +// +// Indirect subroutine call, via R1 + +call_via_r1: + jmp [r1] + +#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS +// +// Reset the board +// + .globl _hal_plf_reset_board +_hal_plf_reset_board: + di // Turn off interrupts + jmp [r0] // Restart machine +#endif + +#if !defined(CYGSEM_HAL_NEC_INLINE_INTERRUPT_FUNCTIONS) + .globl _hal_disable_interrupts +_hal_disable_interrupts: + stsr PSW,r10 + di + jmp [lp] + + .globl _hal_enable_interrupts +_hal_enable_interrupts: + stsr PSW,r6 + ei + jmp [lp] + + .globl _hal_restore_interrupts +_hal_restore_interrupts: + ldsr r6,PSW + jmp [lp] +#endif + +// ------------------------------------------------------------------------- + .data +#ifdef CYG_HAL_STARTUP_ROM +// Trap jump table - used by builtin ROM +__vsr_table: + .rept CYGNUM_HAL_VSR_COUNT + .word 0,0,0,0 + .endr +__vsr_table_end: + +_hal_vsr_table: + .rept CYGNUM_HAL_EXCEPTION_COUNT + .word do_exception + .endr + .rept CYGNUM_HAL_ISR_COUNT + .word do_interrupt + .endr +#endif + +// Initial stack + .rept 1024 + .byte 0 + .endr +__startup_stack: + +#ifndef CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE +#define CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE 4096 +#endif +#ifdef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK + .balign 16 + .global _cyg_interrupt_stack_base +_cyg_interrupt_stack_base: +__interrupt_stack_base: + .rept CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE + .byte 0 + .endr + .balign 16 + .global _cyg_interrupt_stack +_cyg_interrupt_stack: +__interrupt_stack: +irq_level: + .long 0 +#endif // CYG_HAL_STARTUP == ROM + +// Interrupt vector tables. +// These tables contain the isr, data and object pointers used to deliver +// interrupts to user code. + + .extern _hal_default_isr + + .globl _hal_interrupt_handlers +_hal_interrupt_handlers: + .rept CYGNUM_HAL_ISR_COUNT + .long _hal_default_isr + .endr + + .globl _hal_interrupt_data +_hal_interrupt_data: + .rept CYGNUM_HAL_ISR_COUNT + .long 0 + .endr + + .globl _hal_interrupt_objects +_hal_interrupt_objects: + .rept CYGNUM_HAL_ISR_COUNT + .long 0 + .endr + \ No newline at end of file
new file mode 100644 --- /dev/null +++ b/packages/hal/v85x/ceb_v850/current/ChangeLog @@ -0,0 +1,90 @@ +2000-05-25 John Dallaway <jld@redhat.com> + + * cdl/hal_v85x_ceb_v850.cdl: Tidy display strings. + +2000-05-25 Gary Thomas <gthomas@redhat.com> + + * include/plf_intr.h: Interrupt mappings now are in this file. + +2000-05-24 Gary Thomas <gthomas@redhat.com> + + * include/plf_sections.h: + * include/v850_regs.h: New file(s). + +2000-05-03 Gary Thomas <gthomas@redhat.com> + + * src/hal_diag.c (hal_diag_write_char): Work around which fixes ^C + handling - GCC function __builtin_return_address() doesn't work. + +2000-04-25 John Dallaway <jld@cygnus.co.uk> + + * cdl/hal_nec_ceb_v850.cdl: Parent this package under the + V85X architecture package. + +2000-04-14 Gary Thomas <gthomas@redhat.com> + + * src/plf_stub.c (hal_plf_stub_init): Use watchdog timer to + emulate a breakpoint since this hardware doesn't have one. + +2000-04-11 Gary Thomas <gthomas@redhat.com> + + * src/plf_stub.c (hal_plf_get_char): Use LED for "interesting" + display during GDB I/O. + + * src/hal_diag.c (hal_diag_write_char): Disable interrupts + while sending character - necessary because there is no way to + determine that a character has been sent other than to see that + there is an interrupt pending. + + * cdl/hal_nec_ceb_v850.cdl: Add implementation of "GDB protocol + suppressed" functionality. + +2000-03-30 Gary Thomas <gthomas@redhat.com> + + * src/hal_diag.c (hal_diag_write_char): GDB break support only + present if GDB stubs in place. + +2000-03-27 Gary Thomas <gthomas@redhat.com> + + * src/plf_stub.c: + * include/plf_stub.h: Adding GDB break support. + + * include/plf_intr.h: Remove garbage left over from cut&paste. + + * include/plf_cache.h: Add missing INVALIDATE macros. + +2000-03-21 Gary Thomas <gthomas@redhat.com> + + * src/hal_diag.c: Remove ROM startup messages. + + * include/pkgconf/mlt_nec_v850_ceb_rom.mlt: + * include/pkgconf/mlt_nec_v850_ceb_rom.ldi: + * include/pkgconf/mlt_nec_v850_ceb_rom.h: Use proper RAM layout. + + * include/plf_stub.h (HAL_STUB_PLATFORM_RESET): Add board reset. + +//=========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//===========================================================================
new file mode 100644 --- /dev/null +++ b/packages/hal/v85x/ceb_v850/current/cdl/hal_v85x_ceb_v850.cdl @@ -0,0 +1,241 @@ +# ==================================================================== +# +# hal_v85x_v850_ceb.cdl +# +# V850/CEB board HAL package configuration data +# +# ==================================================================== +#####COPYRIGHTBEGIN#### +# +# ------------------------------------------- +# The contents of this file are subject to the Red Hat eCos Public License +# Version 1.1 (the "License"); you may not use this file except in +# compliance with the License. You may obtain a copy of the License at +# http://www.redhat.com/ +# +# Software distributed under the License is distributed on an "AS IS" +# basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +# License for the specific language governing rights and limitations under +# the License. +# +# The Original Code is eCos - Embedded Configurable Operating System, +# released September 30, 1998. +# +# The Initial Developer of the Original Code is Red Hat. +# Portions created by Red Hat are +# Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +# All Rights Reserved. +# ------------------------------------------- +# +#####COPYRIGHTEND#### +# ==================================================================== +######DESCRIPTIONBEGIN#### +# +# Author(s): gthomas +# Original data: bartv, jskov +# Contributors: +# Date: 2000-03-10 +# +#####DESCRIPTIONEND#### +# +# ==================================================================== + +cdl_package CYGPKG_HAL_V85X_V850_CEB { + display "Cosmo CEB-V850/SA1 board" + parent CYGPKG_HAL_V85X + requires CYGPKG_HAL_V85X_V850 + define_header hal_v85x_v850_ceb.h + include_dir cyg/hal + description " + The CEB HAL package should be used when targetting the + actual hardware." + + compile hal_diag.c plf_misc.c plf_stub.c + + implements CYGINT_HAL_DEBUG_GDB_STUBS + implements CYGINT_HAL_DEBUG_GDB_STUBS_BREAK + implements CYGINT_HAL_DIAG_DISABLE_GDB_PROTOCOL_SUPPORTED + + define_proc { + puts $::cdl_system_header "#define CYGBLD_HAL_TARGET_H <pkgconf/hal_v85x_v850.h>" + puts $::cdl_system_header "#define CYGBLD_HAL_PLATFORM_H <pkgconf/hal_v85x_v850_ceb.h>" + } + + cdl_component CYG_HAL_STARTUP { + display "Startup type" + flavor data + legal_values {"RAM" "ROM"} + default_value {"RAM"} + no_define + define -file system.h CYG_HAL_STARTUP + description " + When targetting the CEB board it is possible to build + the system for either RAM bootstrap or ROM bootstrap." + } + + cdl_option CYGHWR_HAL_V85X_V850_CEB_DIAG_BAUD { + display "Diagnostic serial port baud rate" + flavor data + legal_values 9600 19200 38400 + default_value 38400 + description " + This option selects the baud rate used for the diagnostic port. + Note: this should match the value chosen for the GDB port if the + diagnostic and GDB port are the same." + } + + # Real-time clock/counter specifics + cdl_component CYGNUM_HAL_RTC_CONSTANTS { + display "Real-time clock constants." + flavor none + + cdl_option CYGNUM_HAL_RTC_NUMERATOR { + display "Real-time clock numerator" + flavor data + calculated 1000000000 + } + cdl_option CYGNUM_HAL_RTC_DENOMINATOR { + display "Real-time clock denominator" + flavor data + calculated 100 + } + cdl_option CYGNUM_HAL_RTC_PERIOD { + display "Real-time clock period" + flavor data + calculated 42500 + } + } + + cdl_component CYGBLD_GLOBAL_OPTIONS { + display "Global build options" + flavor none + parent CYGPKG_NONE + description " + Global build options including control over + compiler flags, linker flags and choice of toolchain." + + + cdl_option CYGBLD_GLOBAL_COMMAND_PREFIX { + display "Global command prefix" + flavor data + no_define + default_value { "v850-elf" } + description " + This option specifies the command prefix used when + invoking the build tools." + } + + cdl_option CYGBLD_GLOBAL_CFLAGS { + display "Global compiler flags" + flavor data + no_define + default_value { "-Wall -Wpointer-arith -Wstrict-prototypes -Winline -Wundef -Woverloaded-virtual -g -O2 -ffunction-sections -fdata-sections -fno-rtti -fno-exceptions -fvtable-gc -finit-priority" } + description " + This option controls the global compiler flags which + are used to compile all packages by + default. Individual packages may define + options which override these global flags." + } + + cdl_option CYGBLD_GLOBAL_LDFLAGS { + display "Global linker flags" + flavor data + no_define + default_value { "-g -nostdlib -Wl,--gc-sections -Wl,-static" } + description " + This option controls the global linker flags. Individual + packages may define options which override these global flags." + } + + cdl_option CYGBLD_BUILD_GDB_STUBS { + display "Build GDB stub ROM image" + default_value 0 + requires { CYG_HAL_STARTUP == "ROM" } + requires CYGSEM_HAL_ROM_MONITOR + requires CYGBLD_BUILD_COMMON_GDB_STUBS + requires CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + requires ! CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT + requires ! CYGDBG_HAL_DEBUG_GDB_THREAD_SUPPORT + requires ! CYGDBG_HAL_COMMON_INTERRUPTS_SAVE_MINIMUM_CONTEXT + requires ! CYGDBG_HAL_COMMON_CONTEXT_SAVE_MINIMUM + no_define + description " + This option enables the building of the GDB stubs for the + board. The common HAL controls takes care of most of the + build process, but the final conversion from ELF image to + binary data is handled by the platform CDL, allowing + relocation of the data if necessary." + + make -priority 320 { + <PREFIX>/bin/gdb_module.bin : <PREFIX>/bin/gdb_module.img + $(OBJCOPY) -O binary $< $@ + } + } + } + + cdl_component CYGHWR_MEMORY_LAYOUT { + display "Memory layout" + flavor data + no_define + calculated { CYG_HAL_STARTUP == "RAM" ? "v85x_v850_ceb_ram" : \ + CYG_HAL_STARTUP == "ROM" ? "v85x_v850_ceb_rom" : \ + "v85x_v850_ceb_romram" } + + cdl_option CYGHWR_MEMORY_LAYOUT_LDI { + display "Memory layout linker script fragment" + flavor data + no_define + define -file system.h CYGHWR_MEMORY_LAYOUT_LDI + calculated { CYG_HAL_STARTUP == "RAM" ? "<pkgconf/mlt_v85x_v850_ceb_ram.ldi>" : \ + CYG_HAL_STARTUP == "ROM" ? "<pkgconf/mlt_v85x_v850_ceb_rom.ldi>" : \ + "<pkgconf/mlt_v85x_v850_ceb_romram.ldi>" } + } + + cdl_option CYGHWR_MEMORY_LAYOUT_H { + display "Memory layout header file" + flavor data + no_define + define -file system.h CYGHWR_MEMORY_LAYOUT_H + calculated { CYG_HAL_STARTUP == "RAM" ? "<pkgconf/mlt_v85x_v850_ceb_ram.h>" : \ + CYG_HAL_STARTUP == "ROM" ? "<pkgconf/mlt_v85x_v850_ceb_rom.h>" : \ + "<pkgconf/mlt_v85x_v850_ceb_romram.h>" } + } + } + + cdl_option CYGSEM_HAL_USE_ROM_MONITOR { + display "Work with a ROM monitor" + flavor booldata + legal_values { "Generic" "GDB_stubs" "PMON" } + default_value { CYG_HAL_STARTUP == "RAM" ? "GDB_stubs" : 0 } + parent CYGPKG_HAL_ROM_MONITOR + requires { CYG_HAL_STARTUP == "RAM" } + description " + Support can be enabled for three different varieties of ROM monitor. + This support changes various eCos semantics such as the encoding + of diagnostic output, or the overriding of hardware interrupt + vectors. + Firstly there is \"Generic\" support which prevents the HAL + from overriding the hardware vectors that it does not use, to + instead allow an installed ROM monitor to handle them. This is + the most basic support which is likely to be common to most + implementations of ROM monitor. + \"GDB_stubs\" provides support when GDB stubs are included in + the ROM monitor or boot ROM. + And finally, \"PMON\" allows the program to co-operate with + the PMON ROM monitor when fitted to the board." + } + + cdl_option CYGSEM_HAL_ROM_MONITOR { + display "Behave as a ROM monitor" + flavor bool + default_value 0 + parent CYGPKG_HAL_ROM_MONITOR + requires { CYG_HAL_STARTUP == "ROM" } + description " + Enable this option if this program is to be used as a ROM monitor, + i.e. applications will be loaded into RAM on the board, and this + ROM monitor may process exceptions or interrupts generated from the + application. This enables features such as utilizing a separate + interrupt stack when exceptions are generated." + } +}
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new file mode 100644 --- /dev/null +++ b/packages/hal/v85x/ceb_v850/current/include/hal_diag.h @@ -0,0 +1,71 @@ +#ifndef CYGONCE_HAL_HAL_DIAG_H +#define CYGONCE_HAL_HAL_DIAG_H + +/*============================================================================= +// +// hal_diag.h +// +// HAL Support for Kernel Diagnostic Routines +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): nickg +// Contributors: nickg +// Date: 1998-03-02 +// Purpose: HAL Support for Kernel Diagnostic Routines +// Description: Diagnostic routines for use during kernel development. +// Usage: #include <cyg/hal/hal_diag.h> +// +//####DESCRIPTIONEND#### +// +//===========================================================================*/ + +#include <pkgconf/hal.h> + +#include <cyg/infra/cyg_type.h> + +/*---------------------------------------------------------------------------*/ +/* functions implemented in hal_diag.c */ + +externC void hal_diag_init(void); + +externC void hal_diag_write_char(char c); + +externC void hal_diag_read_char(char *c); + +/*---------------------------------------------------------------------------*/ + +#define HAL_DIAG_INIT() hal_diag_init() + +#define HAL_DIAG_WRITE_CHAR(_c_) hal_diag_write_char(_c_) + +#define HAL_DIAG_READ_CHAR(_c_) hal_diag_read_char(&_c_) + +/*---------------------------------------------------------------------------*/ +/* end of hal_diag.h */ +#endif /* CYGONCE_HAL_HAL_DIAG_H */
new file mode 100644 --- /dev/null +++ b/packages/hal/v85x/ceb_v850/current/include/hal_platform_setup.h @@ -0,0 +1,129 @@ +#ifndef CYGONCE_HAL_PLATFORM_SETUP_H +#define CYGONCE_HAL_PLATFORM_SETUP_H + +/*============================================================================= +// +// hal_platform_setup.h +// +// Platform specific support for HAL (assembly code) +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 2000-03-10 +// Purpose: NEC CEB/V850 platform specific support routines +// Description: +// Usage: #include <cyg/hal/hal_platform_setup.h> +// +//####DESCRIPTIONEND#### +// +//===========================================================================*/ + +#include <pkgconf/system.h> // System-wide configuration info +#include <pkgconf/hal.h> // Architecture independent configuration +#include <cyg/hal/v850_common.h> +#include CYGBLD_HAL_PLATFORM_H // Platform specific configuration + + .macro lea addr,reg + movhi hi(\addr),r0,\reg + movea lo(\addr),\reg,\reg + .endm + + .macro PLATFORM_SETUP1 +#ifdef CYG_HAL_STARTUP_ROM + movhi hi(V850_REGS),r0,r6 + + mov 0x01,r1 + st.b r1,lo(V850_REG_SYC)[r6] + + // Internal RAM, I/O - 1 wait state + // Externam ROM - 3 wait states + movea 0x7FFE,r0,r1 + st.h r1,lo(V850_REG_DWC)[r6] + + // Internal RAM, I/O - 0 idle + // Externam ROM - 0 idle + movea 0x2AA8,r0,r1 + st.h r1,lo(V850_REG_BCC)[r6] + + mov 0x00,r1 + st.b r1,lo(V850_REG_EGP0)[r6] + + mov 0x01,r1 + st.b r1,lo(V850_REG_EGN0)[r6] + + movea 0x2C,r0,r1 + st.b r1,lo(V850_REG_PM1)[r6] + + movea 0xFF,r0,r1 + st.b r1,lo(V850_REG_PM3)[r6] + + movea 0xEC,r0,r1 + st.b r1,lo(V850_REG_P1)[r6] + + mov 0x00,r1 + st.b r1,lo(V850_REG_PM10)[r6] + + mov 0x00,r1 + st.b r1,lo(V850_REG_P10)[r6] + + movea 0xDD,r0,r1 + st.b r1,lo(V850_REG_BRGC0)[r6] + + mov 0x03,r1 + st.b r1,lo(V850_REG_BRGM0)[r6] + + movea 0xC8,r0,r1 + st.b r1,lo(V850_REG_ASIM0)[r6] + + movea 0x47,r0,r1 + st.b r1,lo(V850_REG_STIC0)[r6] + + mov 0x07,r1 + st.b r1,lo(V850_REG_MM)[r6] + + // Setting the PCC register is tricky + stsr PSW,r7 + ori CYGARC_PSW_NP,r7,r8 + ldsr r8,PSW + mov 0x00,r1 + st.b r1,lo(V850_REG_PRCMD)[r6] + st.b r1,lo(V850_REG_PCC)[r6] + ldsr r7,PSW + nop + nop + nop + nop + nop +#endif + .endm + +/*---------------------------------------------------------------------------*/ +/* end of hal_platform_setup.h */ +#endif /* CYGONCE_HAL_PLATFORM_SETUP_H */
new file mode 100644 --- /dev/null +++ b/packages/hal/v85x/ceb_v850/current/include/pkgconf/mlt_v85x_v850_ceb_ram.h @@ -0,0 +1,13 @@ +// eCos memory layout - Fri Mar 17 13:07:05 2000 + +// This is a generated file - do not edit + +#include <cyg/infra/cyg_type.h> +#include <stddef.h> + +#define CYGMEM_REGION_ram (0xfc0000) +#define CYGMEM_REGION_ram_SIZE (0x40000) +#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W) +extern char CYG_LABEL_NAME (_reserved) []; +#define CYGMEM_SECTION_reserved (CYG_LABEL_NAME (_reserved)) +#define CYGMEM_SECTION_reserved_SIZE (0x4000)
new file mode 100644 --- /dev/null +++ b/packages/hal/v85x/ceb_v850/current/include/pkgconf/mlt_v85x_v850_ceb_ram.ldi @@ -0,0 +1,23 @@ +// eCos memory layout - Fri Mar 17 13:07:05 2000 + +// This is a generated file - do not edit + +MEMORY +{ + ram : ORIGIN = 0xfc0000, LENGTH = 0x40000 +} + +SECTIONS +{ + SECTIONS_BEGIN + __reserved = 0xfc0000; . = __reserved + 0x4000; + SECTION_text (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_fini (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_rodata (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_rodata1 (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_fixup (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_gcc_except_table (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_data (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_bss (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTIONS_END +}
new file mode 100644 --- /dev/null +++ b/packages/hal/v85x/ceb_v850/current/include/pkgconf/mlt_v85x_v850_ceb_ram.mlt @@ -0,0 +1,11 @@ +version 0 +region ram fc0000 40000 0 ! +section reserved 4000 1 0 0 1 1 1 1 fc0000 fc0000 text text ! +section text 0 4 0 1 0 1 0 1 fini fini ! +section fini 0 4 0 1 0 1 0 1 rodata rodata ! +section rodata 0 4 0 1 0 1 0 1 rodata1 rodata1 ! +section rodata1 0 4 0 1 0 1 0 1 fixup fixup ! +section fixup 0 4 0 1 0 1 0 1 gcc_except_table gcc_except_table ! +section gcc_except_table 0 4 0 1 0 1 0 1 data data ! +section data 0 4 0 1 0 1 0 1 bss bss ! +section bss 0 4 0 1 0 0 0 0 !
new file mode 100644 --- /dev/null +++ b/packages/hal/v85x/ceb_v850/current/include/pkgconf/mlt_v85x_v850_ceb_rom.h @@ -0,0 +1,13 @@ +// eCos memory layout - Tue Mar 21 04:31:59 2000 + +// This is a generated file - do not edit + +#include <cyg/infra/cyg_type.h> +#include <stddef.h> + +#define CYGMEM_REGION_rom (0x100000) +#define CYGMEM_REGION_rom_SIZE (0x80000) +#define CYGMEM_REGION_rom_ATTR (CYGMEM_REGION_ATTR_R) +#define CYGMEM_REGION_ram (0xfc0000) +#define CYGMEM_REGION_ram_SIZE (0x40000) +#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W)
new file mode 100644 --- /dev/null +++ b/packages/hal/v85x/ceb_v850/current/include/pkgconf/mlt_v85x_v850_ceb_rom.ldi @@ -0,0 +1,24 @@ +// eCos memory layout - Tue Mar 21 04:31:59 2000 + +// This is a generated file - do not edit + +MEMORY +{ + rom : ORIGIN = 0x100000, LENGTH = 0x80000 + ram : ORIGIN = 0xfc0000, LENGTH = 0x40000 +} + +SECTIONS +{ + SECTIONS_BEGIN + SECTION_rom_vectors (rom, 0x100000, LMA_EQ_VMA) + SECTION_text (rom, ALIGN (0x4), LMA_EQ_VMA) + SECTION_fini (rom, ALIGN (0x4), LMA_EQ_VMA) + SECTION_rodata (rom, ALIGN (0x4), LMA_EQ_VMA) + SECTION_rodata1 (rom, ALIGN (0x4), LMA_EQ_VMA) + SECTION_fixup (rom, ALIGN (0x4), LMA_EQ_VMA) + SECTION_gcc_except_table (rom, ALIGN (0x4), LMA_EQ_VMA) + SECTION_data (ram, 0xfc0000, FOLLOWING (.gcc_except_table)) + SECTION_bss (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTIONS_END +}
new file mode 100644 --- /dev/null +++ b/packages/hal/v85x/ceb_v850/current/include/pkgconf/mlt_v85x_v850_ceb_rom.mlt @@ -0,0 +1,12 @@ +version 0 +region rom 100000 80000 1 ! +region ram fc0000 40000 0 ! +section rom_vectors 0 1 0 1 1 1 1 1 100000 100000 text text ! +section text 0 4 0 1 0 1 0 1 fini fini ! +section fini 0 4 0 1 0 1 0 1 rodata rodata ! +section rodata 0 4 0 1 0 1 0 1 rodata1 rodata1 ! +section rodata1 0 4 0 1 0 1 0 1 fixup fixup ! +section fixup 0 4 0 1 0 1 0 1 gcc_except_table gcc_except_table ! +section gcc_except_table 0 4 0 1 0 0 0 1 data ! +section data 0 4 1 1 1 1 0 0 fc0000 bss ! +section bss 0 4 0 1 0 0 0 0 !
new file mode 100644 --- /dev/null +++ b/packages/hal/v85x/ceb_v850/current/include/plf_cache.h @@ -0,0 +1,71 @@ +#ifndef CYGONCE_PLF_CACHE_H +#define CYGONCE_PLF_CACHE_H + +//============================================================================= +// +// plf_cache.h +// +// HAL cache control API +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): nickg +// Contributors: nickg +// Date: 1998-02-17 +// Purpose: Cache control API +// Description: The macros defined here provide the HAL APIs for handling +// cache control operations. +// Usage: +// #include <cyg/hal/plf_cache.h> +// ... +// +// +//####DESCRIPTIONEND#### +// +//============================================================================= + +#include <pkgconf/hal.h> +#include <cyg/infra/cyg_type.h> + +//============================================================================= + +// No caches defined on this platform +#define HAL_ICACHE_ENABLE() +#define HAL_ICACHE_DISABLE() +#define HAL_ICACHE_SYNC() +#define HAL_ICACHE_INVALIDATE_ALL() + +#define HAL_DCACHE_ENABLE() +#define HAL_DCACHE_DISABLE() +#define HAL_DCACHE_SYNC() +#define HAL_DCACHE_INVALIDATE_ALL() + +//----------------------------------------------------------------------------- +#endif // ifndef CYGONCE_PLF_CACHE_H +// End of plf_cache.h +
new file mode 100644 --- /dev/null +++ b/packages/hal/v85x/ceb_v850/current/include/plf_intr.h @@ -0,0 +1,153 @@ +#ifndef CYGONCE_HAL_PLF_INTR_H +#define CYGONCE_HAL_PLF_INTR_H + +//========================================================================== +// +// plf_intr.h +// +// NEC/V85x Interrupt and clock support +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): nickg +// Contributors: nickg, jskov, +// gthomas, jlarmour +// Date: 1999-02-16 +// Purpose: Define Interrupt support +// Description: The macros defined here provide the HAL APIs for handling +// interrupts and the clock for the VRC4373 board. +// +// Usage: +// #include <cyg/hal/plf_intr.h> +// ... +// +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#include <pkgconf/hal.h> + +#include <cyg/infra/cyg_type.h> + +//-------------------------------------------------------------------------- +// NEC (70F3017) vectors. + +// These are the exception codes presented in the Cause register and +// correspond to VSRs. These values are the ones to use for HAL_VSR_GET/SET + +#define CYGNUM_HAL_VECTOR_RESET 0x00 +#define CYGNUM_HAL_VECTOR_NMI 0x01 +#define CYGNUM_HAL_VECTOR_WATCHDOG_TIMER 0x02 +#define CYGNUM_HAL_VECTOR_TRAP0 0x04 +#define CYGNUM_HAL_VECTOR_TRAP1 0x05 +#define CYGNUM_HAL_VECTOR_ILLEGAL_OPCODE 0x06 +#define CYGNUM_HAL_VECTOR_WATCHDOG_TIMER_M 0x08 +#define CYGNUM_HAL_VECTOR_INTP0 0x09 +#define CYGNUM_HAL_VECTOR_INTP1 0x0A +#define CYGNUM_HAL_VECTOR_INTP2 0x0B +#define CYGNUM_HAL_VECTOR_INTP3 0x0C +#define CYGNUM_HAL_VECTOR_INTP4 0x0D +#define CYGNUM_HAL_VECTOR_INTP5 0x0E +#define CYGNUM_HAL_VECTOR_INTP6 0x0F +#define CYGNUM_HAL_VECTOR_INTWTI 0x10 +#define CYGNUM_HAL_VECTOR_INTTM00 0x11 +#define CYGNUM_HAL_VECTOR_INTTM01 0x12 +#define CYGNUM_HAL_VECTOR_INTTM10 0x13 +#define CYGNUM_HAL_VECTOR_INTTM11 0x14 +#define CYGNUM_HAL_VECTOR_INTTM2 0x15 +#define CYGNUM_HAL_VECTOR_INTTM3 0x16 +#define CYGNUM_HAL_VECTOR_INTTM4 0x17 +#define CYGNUM_HAL_VECTOR_INTTM5 0x18 +#define CYGNUM_HAL_VECTOR_INTCSI0 0x19 +#define CYGNUM_HAL_VECTOR_INTSER0 0x1A +#define CYGNUM_HAL_VECTOR_INTCSI1 0x1B +#define CYGNUM_HAL_VECTOR_INTST0 0x1C +#define CYGNUM_HAL_VECTOR_INTCSI2 0x1D +#define CYGNUM_HAL_VECTOR_INTSER1 0x1E +#define CYGNUM_HAL_VECTOR_INTSR1 0x1F +#define CYGNUM_HAL_VECTOR_INTST1 0x20 +#define CYGNUM_HAL_VECTOR_INTAD 0x21 +#define CYGNUM_HAL_VECTOR_INTDMA0 0x22 +#define CYGNUM_HAL_VECTOR_INTDMA1 0x23 +#define CYGNUM_HAL_VECTOR_INTDMA2 0x24 +#define CYGNUM_HAL_VECTOR_INTWT 0x25 + +#define CYGNUM_HAL_VSR_MIN 0 +#define CYGNUM_HAL_VSR_MAX 0x25 +#define CYGNUM_HAL_VSR_COUNT 0x26 + +// Min/Max exception numbers and how many there are +#define CYGNUM_HAL_EXCEPTION_MIN 0 +#define CYGNUM_HAL_EXCEPTION_MAX 7 +#define CYGNUM_HAL_EXCEPTION_COUNT ((CYGNUM_HAL_EXCEPTION_MAX-CYGNUM_HAL_EXCEPTION_MIN)+1) + +// Min/Max ISR numbers and how many there are +#define CYGNUM_HAL_ISR_MIN 0x08 +#define CYGNUM_HAL_ISR_MAX 0x25 +#define CYGNUM_HAL_ISR_COUNT ((CYGNUM_HAL_ISR_MAX-CYGNUM_HAL_ISR_MIN)+1) + +// The vector used by the Real time clock. +#define CYGNUM_HAL_INTERRUPT_RTC CYGNUM_HAL_VECTOR_INTTM10 + +// Mapping from interrupt numbers to hardware registers +#define CYG_HAL_V85X_INTERRUPT_CONTROL_REGISTERS \ + (volatile unsigned char *)V850_REG_WDTIC, \ + (volatile unsigned char *)V850_REG_PIC0, \ + (volatile unsigned char *)V850_REG_PIC1, \ + (volatile unsigned char *)V850_REG_PIC2, \ + (volatile unsigned char *)V850_REG_PIC3, \ + (volatile unsigned char *)V850_REG_PIC4, \ + (volatile unsigned char *)V850_REG_PIC5, \ + (volatile unsigned char *)V850_REG_PIC6, \ + (volatile unsigned char *)V850_REG_WTIIC, \ + (volatile unsigned char *)V850_REG_TMIC00, \ + (volatile unsigned char *)V850_REG_TMIC01, \ + (volatile unsigned char *)V850_REG_TMIC10, \ + (volatile unsigned char *)V850_REG_TMIC11, \ + (volatile unsigned char *)V850_REG_TMIC2, \ + (volatile unsigned char *)V850_REG_TMIC3, \ + (volatile unsigned char *)V850_REG_TMIC4, \ + (volatile unsigned char *)V850_REG_TMIC5, \ + (volatile unsigned char *)V850_REG_CSIC0, \ + (volatile unsigned char *)V850_REG_SERIC0, \ + (volatile unsigned char *)V850_REG_SRIC0, \ + (volatile unsigned char *)V850_REG_STIC0, \ + (volatile unsigned char *)V850_REG_CSIC2, \ + (volatile unsigned char *)V850_REG_SERIC1, \ + (volatile unsigned char *)V850_REG_SRIC1, \ + (volatile unsigned char *)V850_REG_STIC1, \ + (volatile unsigned char *)V850_REG_ADIC, \ + (volatile unsigned char *)V850_REG_DMAIC0, \ + (volatile unsigned char *)V850_REG_DMAIC1, \ + (volatile unsigned char *)V850_REG_DMAIC2, \ + (volatile unsigned char *)V850_REG_WTIC + +//-------------------------------------------------------------------------- +#endif // ifndef CYGONCE_HAL_PLF_INTR_H +// End of plf_intr.h
new file mode 100644 --- /dev/null +++ b/packages/hal/v85x/ceb_v850/current/include/plf_io.h @@ -0,0 +1,211 @@ +#ifndef CYGONCE_PLF_IO_H +#define CYGONCE_PLF_IO_H + +//============================================================================= +// +// plf_io.h +// +// Platform specific IO support +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): hmt, jskov, nickg +// Contributors: hmt, jskov, nickg +// Date: 1999-08-09 +// Purpose: VRC4373 PCI IO support macros +// Description: +// Usage: #include <cyg/hal/plf_io.h> +// +// Note: Based on information in +// "VRC4373 System Controller Data Sheet" +//####DESCRIPTIONEND#### +// +//============================================================================= + +#include <pkgconf/hal.h> + +#include <cyg/hal/hal_io.h> // IO macros +#include <cyg/hal/hal_intr.h> // Interrupt vectors + +//----------------------------------------------------------------------------- +// PCI access registers + +#define HAL_PCI_ADDRESS_WINDOW_1 0xAF000014 +#define HAL_PCI_ADDRESS_WINDOW_2 0xAF000018 +#define HAL_PCI_IO_WINDOW 0xAF000024 +#define HAL_PCI_CONFIG_SPACE_DATA 0xAF000028 +#define HAL_PCI_CONFIG_SPACE_ADDR 0xAF00002C +#define HAL_PCI_ENABLE_REG 0xAF000074 + +//----------------------------------------------------------------------------- +// Mappings for PCI memory and IO spaces + +// This is where the PCI spaces are mapped in the CPU's (virtual) +// address space. +#define HAL_PCI_PHYSICAL_MEMORY_BASE 0xC0000000 +#define HAL_PCI_PHYSICAL_IO_BASE 0xAC000000 + +//----------------------------------------------------------------------------- + +// Initialize the PCI bus. +// This has actually already been done by the HAL. +#define HAL_PCI_INIT() + +// Compute address necessary to access PCI config space for the given +// bus and device. +#define HAL_PCI_CONFIG_ADDRESS( __bus, __devfn, __offset ) \ + ({ \ + cyg_uint32 __addr; \ + cyg_uint32 __dev = CYG_PCI_DEV_GET_DEV(__devfn); \ + if (0 == __bus) { \ + __addr = (1 << (__dev+16)); \ + } else { \ + /* We need better info about how to form type 1 addresses */ \ + __addr = 0x800000000 | (__bus << 16) | (__dev << 11); \ + } \ + __addr |= CYG_PCI_DEV_GET_FN(__devfn) << 8; \ + __addr |= (__offset)&~3; \ + __addr; \ + }) + +// The following function allows us to read locations in the PCI config +// space that we are not sure contains a valid device. Support in platform.S +// catches and fixes any bus errors caused. +externC CYG_WORD32 hal_pci_config_read(CYG_ADDRESS addr); +#define HAL_PCI_CONFIG_READ( __addr, __val ) __val = hal_pci_config_read(__addr) + +// Read a value from the PCI configuration space of the appropriate +// size at an address composed from the bus, devfn and offset. +// We can only make 32 bit accesses to the PCI config data register, hence +// all the shifing and masking in these macros. +// Note that we may only use HAL_PCI_CONFIG_READ() here. +#define HAL_PCI_CFG_READ_UINT8( __bus, __devfn, __offset, __val ) \ +CYG_MACRO_START \ + CYG_WORD32 _val_; \ + CYG_WORD32 _offset_ = __offset & 3; \ + HAL_WRITE_UINT32(HAL_PCI_CONFIG_SPACE_ADDR, \ + HAL_PCI_CONFIG_ADDRESS(__bus, __devfn, __offset)); \ + HAL_PCI_CONFIG_READ(HAL_PCI_CONFIG_SPACE_DATA, _val_); \ + __val = (CYG_BYTE)((_val_>>(_offset_*8))&0xFF); \ +CYG_MACRO_END + +#define HAL_PCI_CFG_READ_UINT16( __bus, __devfn, __offset, __val ) \ +CYG_MACRO_START \ + CYG_WORD32 _val_; \ + CYG_WORD32 _offset_ = __offset & 2; \ + HAL_WRITE_UINT32(HAL_PCI_CONFIG_SPACE_ADDR, \ + HAL_PCI_CONFIG_ADDRESS(__bus, __devfn, __offset)); \ + HAL_PCI_CONFIG_READ(HAL_PCI_CONFIG_SPACE_DATA, _val_); \ + __val = (CYG_WORD16)((_val_>>(_offset_*8))&0xFFFF); \ +CYG_MACRO_END + +#define HAL_PCI_CFG_READ_UINT32( __bus, __devfn, __offset, __val ) \ +CYG_MACRO_START \ + CYG_WORD32 _val_; \ + HAL_WRITE_UINT32(HAL_PCI_CONFIG_SPACE_ADDR, \ + HAL_PCI_CONFIG_ADDRESS(__bus, __devfn, __offset)); \ + HAL_PCI_CONFIG_READ(HAL_PCI_CONFIG_SPACE_DATA, _val_); \ + __val = (CYG_WORD32)_val_; \ +CYG_MACRO_END + +// Write a value to the PCI configuration space of the appropriate +// size at an address composed from the bus, devfn and offset. +// We can only make 32 bit accesses to the PCI config data register, hence +// all the shifing and masking in these macros. +// Note that we do not need to use HAL_PCI_CONFIG_READ() here since we +// should not be writing to config space locations that we do not already +// know are valid. +#define HAL_PCI_CFG_WRITE_UINT8( __bus, __devfn, __offset, __val ) \ +CYG_MACRO_START \ + CYG_WORD32 _val_; \ + CYG_WORD32 _offset_ = __offset & 3; \ + HAL_WRITE_UINT32(HAL_PCI_CONFIG_SPACE_ADDR, \ + HAL_PCI_CONFIG_ADDRESS(__bus, __devfn, __offset)); \ + HAL_READ_UINT32(HAL_PCI_CONFIG_SPACE_DATA, _val_); \ + _val_ &= ~(0xFF<<(_offset_*8)); \ + _val_ |= (__val)<<(_offset_*8); \ + HAL_WRITE_UINT32(HAL_PCI_CONFIG_SPACE_DATA, _val_); \ +CYG_MACRO_END + +#define HAL_PCI_CFG_WRITE_UINT16( __bus, __devfn, __offset, __val ) \ +CYG_MACRO_START \ + CYG_WORD32 _val_; \ + CYG_WORD32 _offset_ = __offset & 2; \ + HAL_WRITE_UINT32(HAL_PCI_CONFIG_SPACE_ADDR, \ + HAL_PCI_CONFIG_ADDRESS(__bus, __devfn, __offset)); \ + HAL_READ_UINT32(HAL_PCI_CONFIG_SPACE_DATA, _val_); \ + _val_ &= ~(0xFFFF<<(_offset_*8)); \ + _val_ |= (__val)<<(_offset_*8); \ + HAL_WRITE_UINT32(HAL_PCI_CONFIG_SPACE_DATA, _val_); \ +CYG_MACRO_END + +#define HAL_PCI_CFG_WRITE_UINT32( __bus, __devfn, __offset, __val ) \ +CYG_MACRO_START \ + HAL_WRITE_UINT32(HAL_PCI_CONFIG_SPACE_ADDR, \ + HAL_PCI_CONFIG_ADDRESS(__bus, __devfn, __offset)); \ + HAL_WRITE_UINT32(HAL_PCI_CONFIG_SPACE_DATA, __val); \ +CYG_MACRO_END + + +//----------------------------------------------------------------------------- +// Resources + +// Map PCI device resources starting from these addresses in PCI space. +#define HAL_PCI_ALLOC_BASE_MEMORY 0 +#define HAL_PCI_ALLOC_BASE_IO 0 + +// Translate the PCI interrupt requested by the device (INTA#, INTB#, +// INTC# or INTD#) to the associated CPU interrupt (i.e., HAL vector). +// We don't actually know what the mappings are at present for this +// board. The following is therefore just a temporary guess until +// we can find out. + +#define HAL_PCI_TRANSLATE_INTERRUPT( __bus, __devfn, __vec, __valid) \ + CYG_MACRO_START \ + cyg_uint8 __req; \ + HAL_PCI_CFG_READ_UINT8(__bus, __devfn, CYG_PCI_CFG_INT_PIN, __req); \ + if (0 != __req) { \ + CYG_ADDRWORD __translation[4] = { \ + CYGNUM_HAL_INTERRUPT_PCI_INTA, /* INTA# */ \ + CYGNUM_HAL_INTERRUPT_PCI_INTB, /* INTB# */ \ + CYGNUM_HAL_INTERRUPT_PCI_INTC, /* INTC# */ \ + CYGNUM_HAL_INTERRUPT_PCI_INTD };/* INTD# */ \ + \ + __vec = __translation[(((__req-1)+CYG_PCI_DEV_GET_DEV(__devfn))&3)]; \ + \ + __valid = true; \ + } else { \ + /* Device will not generate interrupt requests. */ \ + __valid = false; \ + } \ + CYG_MACRO_END + + +//----------------------------------------------------------------------------- +// end of plf_io.h +#endif // CYGONCE_PLF_IO_H
new file mode 100644 --- /dev/null +++ b/packages/hal/v85x/ceb_v850/current/include/plf_sections.h @@ -0,0 +1,45 @@ +//========================================================================== +// +// plf_sections.h +// +// V85x layout definitions - hardwired sections +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 2000-05-24 +// Purpose: Hardwired layout definitions +// Description: Used only in linker scripts +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#define SECTIONS_END . = ALIGN(4); _end = .; PROVIDE (end = .); \ + PROVIDE(_hal_vsr_table = 0x00FC0260);
new file mode 100644 --- /dev/null +++ b/packages/hal/v85x/ceb_v850/current/include/plf_stub.h @@ -0,0 +1,85 @@ +#ifndef CYGONCE_HAL_PLF_STUB_H +#define CYGONCE_HAL_PLF_STUB_H + +//============================================================================= +// +// plf_stub.h +// +// Platform header for GDB stub support. +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jskov +// Contributors:jskov, gthomas +// Date: 2000-03-10 +// Purpose: Platform HAL stub support for NEC/CEB-V850 +// Usage: #include <cyg/hal/plf_stub.h> +// +//####DESCRIPTIONEND#### +// +//============================================================================= + +#include <pkgconf/hal.h> + +#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + +#include <cyg/infra/cyg_type.h> // CYG_UNUSED_PARAM + +#include <cyg/hal/nec-stub.h> // architecture stub support + +//---------------------------------------------------------------------------- +// Define serial stuff. +extern void hal_plf_init_serial( void ); +extern int hal_plf_get_char( void ); +extern void hal_plf_put_char( int c ); +extern int hal_plf_interruptible( int ); + +#define HAL_STUB_PLATFORM_INIT_SERIAL() hal_plf_init_serial() +#define HAL_STUB_PLATFORM_GET_CHAR() hal_plf_get_char() +#define HAL_STUB_PLATFORM_PUT_CHAR(c) hal_plf_put_char((c)) +#define HAL_STUB_PLATFORM_SET_BAUD_RATE(baud) CYG_UNUSED_PARAM(int, (baud)) +#define HAL_STUB_PLATFORM_INTERRUPTIBLE hal_plf_interruptible +#define HAL_STUB_PLATFORM_INIT_BREAK_IRQ() CYG_EMPTY_STATEMENT + +//---------------------------------------------------------------------------- +// Stub initializer. + +extern void hal_plf_stub_init(void); + +#define HAL_STUB_PLATFORM_INIT() hal_plf_stub_init(); + +//---------------------------------------------------------------------------- +// Reset. + +#define HAL_STUB_PLATFORM_RESET() hal_plf_reset_board() + +#endif // ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + +//----------------------------------------------------------------------------- +#endif // CYGONCE_HAL_PLF_STUB_H +// End of plf_stub.h
new file mode 100644 --- /dev/null +++ b/packages/hal/v85x/ceb_v850/current/include/v850_regs.h @@ -0,0 +1,247 @@ +#ifndef CYGONCE_V850_REGS_H +#define CYGONCE_V850_REGS_H + +/*============================================================================= +// +// v850_regs.h +// +// NEC/V850 platform register definitions +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 2000-03-10 +// Purpose: NEC/V850 CPU family hardware description +// Description: +// Usage: #include <cyg/hal/v850_regs.h> +// +//####DESCRIPTIONEND#### +// +//===========================================================================*/ + +// These definitions are for the SA1 (70F3017) + +#define V850_REGS 0xFFFFF000 + +#define V850_REG_P0 0xFFFFF000 +#define V850_REG_P1 0xFFFFF002 +#define V850_REG_P2 0xFFFFF004 +#define V850_REG_P3 0xFFFFF006 +#define V850_REG_P4 0xFFFFF008 +#define V850_REG_P5 0xFFFFF00A +#define V850_REG_P6 0xFFFFF00C +#define V850_REG_P7 0xFFFFF00E +#define V850_REG_P8 0xFFFFF010 +#define V850_REG_P9 0xFFFFF012 +#define V850_REG_P10 0xFFFFF014 +#define V850_REG_P11 0xFFFFF016 +#define V850_REG_P12 0xFFFFF018 + +#define V850_REG_PM0 0xFFFFF020 +#define V850_REG_PM1 0xFFFFF022 +#define V850_REG_PM2 0xFFFFF024 +#define V850_REG_PM3 0xFFFFF026 +#define V850_REG_PM4 0xFFFFF028 +#define V850_REG_PM5 0xFFFFF02A +#define V850_REG_PM6 0xFFFFF02C +#define V850_REG_PM7 0xFFFFF02E +#define V850_REG_PM8 0xFFFFF030 +#define V850_REG_PM9 0xFFFFF032 +#define V850_REG_PM10 0xFFFFF034 +#define V850_REG_PM11 0xFFFFF036 +#define V850_REG_PM12 0xFFFFF038 + +#define V850_REG_MM 0xFFFFF04C + +#define V850_REG_PMC12 0xFFFFF058 + +#define V850_REG_DWC 0xFFFFF060 +#define V850_REG_BCC 0xFFFFF062 +#define V850_REG_SYC 0xFFFFF064 +#define V850_REG_MAM 0xFFFFF068 + +#define V850_REG_PSC 0xFFFFF070 +#define V850_REG_PCC 0xFFFFF074 +#define V850_REG_SYS 0xFFFFF078 + +#define V850_REG_PU0 0xFFFFF080 +#define V850_REG_PU1 0xFFFFF082 +#define V850_REG_PU2 0xFFFFF084 +#define V850_REG_PU3 0xFFFFF086 +#define V850_REG_PU10 0xFFFFF094 +#define V850_REG_PU11 0xFFFFF096 + +#define V850_REG_PF1 0xFFFFF0A2 +#define V850_REG_PF2 0xFFFFF0A4 +#define V850_REG_PF10 0xFFFFF0B4 + +#define V850_REG_EGP0 0xFFFFF0C0 +#define V850_REG_EGN0 0xFFFFF0C2 + +#define V850_REG_WDTIC 0xFFFFF100 +#define V850_REG_PIC0 0xFFFFF102 +#define V850_REG_PIC1 0xFFFFF104 +#define V850_REG_PIC2 0xFFFFF106 +#define V850_REG_PIC3 0xFFFFF108 +#define V850_REG_PIC4 0xFFFFF10A +#define V850_REG_PIC5 0xFFFFF10C +#define V850_REG_PIC6 0xFFFFF10E +#define V850_REG_WTIIC 0xFFFFF110 +#define V850_REG_TMIC00 0xFFFFF112 +#define V850_REG_TMIC01 0xFFFFF114 +#define V850_REG_TMIC10 0xFFFFF116 +#define V850_REG_TMIC11 0xFFFFF118 +#define V850_REG_TMIC2 0xFFFFF11A +#define V850_REG_TMIC3 0xFFFFF11C +#define V850_REG_TMIC4 0xFFFFF11E +#define V850_REG_TMIC5 0xFFFFF120 +#define V850_REG_CSIC0 0xFFFFF122 +#define V850_REG_SERIC0 0xFFFFF124 +#define V850_REG_CSIC1 0xFFFFF126 // Is this correct? +#define V850_REG_SRIC0 0xFFFFF126 +#define V850_REG_STIC0 0xFFFFF128 +#define V850_REG_CSIC2 0xFFFFF12A +#define V850_REG_SERIC1 0xFFFFF12C +#define V850_REG_SRIC1 0xFFFFF12E +#define V850_REG_STIC1 0xFFFFF130 +#define V850_REG_ADIC 0xFFFFF132 +#define V850_REG_DMAIC0 0xFFFFF134 +#define V850_REG_DMAIC1 0xFFFFF136 +#define V850_REG_DMAIC2 0xFFFFF138 +#define V850_REG_WTIC 0xFFFFF13A + +#define V850_REG_ISPR 0xFFFFF166 +#define V850_REG_PRCMD 0xFFFFF170 + +#define V850_REG_DIOA0 0xFFFFF180 +#define V850_REG_DRA0 0xFFFFF182 +#define V850_REG_DBC0 0xFFFFF184 +#define V850_REG_DCHC0 0xFFFFF186 + +#define V850_REG_DIOA1 0xFFFFF190 +#define V850_REG_DRA1 0xFFFFF192 +#define V850_REG_DBC1 0xFFFFF194 +#define V850_REG_DCHC1 0xFFFFF196 + +#define V850_REG_DIOA2 0xFFFFF1A0 +#define V850_REG_DRA2 0xFFFFF1A2 +#define V850_REG_DBC2 0xFFFFF1A4 +#define V850_REG_DCHC2 0xFFFFF1A6 + +#define V850_REG_TM0 0xFFFFF200 +#define V850_REG_CR00 0xFFFFF202 +#define V850_REG_CR01 0xFFFFF204 +#define V850_REG_PRM0 0xFFFFF206 +#define V850_REG_TMC0 0xFFFFF208 +#define V850_REG_CRC0 0xFFFFF20A +#define V850_REG_TOC0 0xFFFFF20C + +#define V850_REG_TM1 0xFFFFF210 +#define V850_REG_CR10 0xFFFFF212 +#define V850_REG_CR11 0xFFFFF214 +#define V850_REG_PRM1 0xFFFFF216 +#define V850_REG_TMC1 0xFFFFF218 +#define V850_REG_CRC1 0xFFFFF21A +#define V850_REG_TOC1 0xFFFFF21C + +#define V850_REG_TM2 0xFFFFF240 +#define V850_REG_CR20 0xFFFFF242 +#define V850_REG_TCL2 0xFFFFF244 +#define V850_REG_TMC2 0xFFFFF246 +#define V850_REG_TM23 0xFFFFF24A +#define V850_REG_CR23 0xFFFFF24C + +#define V850_REG_TM3 0xFFFFF250 +#define V850_REG_CR30 0xFFFFF252 +#define V850_REG_TCL3 0xFFFFF254 +#define V850_REG_TMC3 0xFFFFF256 + +#define V850_REG_TM4 0xFFFFF260 +#define V850_REG_CR40 0xFFFFF262 +#define V850_REG_TCL4 0xFFFFF264 +#define V850_REG_TMC4 0xFFFFF266 +#define V850_REG_TM45 0xFFFFF26A +#define V850_REG_CR45 0xFFFFF26C + +#define V850_REG_TM5 0xFFFFF270 +#define V850_REG_CR50 0xFFFFF272 +#define V850_REG_TCL5 0xFFFFF274 +#define V850_REG_TMC5 0xFFFFF276 + +#define V850_REG_SIO0 0xFFFFF2A0 +#define V850_REG_CSIM0 0xFFFFF2A2 +#define V850_REG_CSIS0 0xFFFFF2A4 + +#define V850_REG_SIO1 0xFFFFF2B0 +#define V850_REG_CSIM1 0xFFFFF2B2 +#define V850_REG_CSIS1 0xFFFFF2B4 + +#define V850_REG_SIO2 0xFFFFF2C0 +#define V850_REG_CSIM2 0xFFFFF2C2 +#define V850_REG_CSIS2 0xFFFFF2C4 + +#define V850_REG_ASIM0 0xFFFFF300 +#define V850_REG_ASIS0 0xFFFFF302 +#define V850_REG_BRGC0 0xFFFFF304 +#define V850_REG_TXS0 0xFFFFF306 +#define V850_REG_RXS0 0xFFFFF308 +#define V850_REG_BRGM0 0xFFFFF30E +#define V850_REG_BRGX0 0xFFFFF320 + +#define V850_REG_ASIM1 0xFFFFF310 +#define V850_REG_ASIS1 0xFFFFF312 +#define V850_REG_BRGC1 0xFFFFF314 +#define V850_REG_TXS1 0xFFFFF316 +#define V850_REG_RXS1 0xFFFFF318 +#define V850_REG_BRGM1 0xFFFFF31E + +#define V850_REG_IICC0 0xFFFFF340 +#define V850_REG_IICS0 0xFFFFF342 +#define V850_REG_IICCL0 0xFFFFF344 +#define V850_REG_SVA0 0xFFFFF346 +#define V850_REG_IIC0 0xFFFFF348 + +#define V850_REG_WTM 0xFFFFF360 +#define V850_REG_OSTS 0xFFFFF380 +#define V850_REG_WDCS 0xFFFFF382 +#define V850_REG_WDTM 0xFFFFF384 + +#define V850_REG_RTBL 0xFFFFF3A0 +#define V850_REG_RTBH 0xFFFFF3A2 +#define V850_REG_RTPM 0xFFFFF3A4 +#define V850_REG_RTPC 0xFFFFF3A6 + +#define V850_REG_ADM 0xFFFFF3C0 +#define V850_REG_ADS 0xFFFFF3C2 +#define V850_REG_ADCR 0xFFFFF3C4 +#define V850_REG_ADCRH 0xFFFFF3C6 + +/*---------------------------------------------------------------------------*/ +/* end of v850_regs.h */ +#endif /* CYGONCE_V850_REGS_H */
new file mode 100644 --- /dev/null +++ b/packages/hal/v85x/ceb_v850/current/src/hal_diag.c @@ -0,0 +1,320 @@ +/*============================================================================= +// +// hal_diag.c +// +// HAL diagnostic output code +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): nickg, gthomas +// Contributors:nickg, gthomas +// Date: 1998-03-02 +// Purpose: HAL diagnostic output +// Description: Implementations of HAL diagnostic output support. +// +//####DESCRIPTIONEND#### +// +//===========================================================================*/ + +#include <pkgconf/hal.h> +#include <pkgconf/system.h> +#include CYGBLD_HAL_PLATFORM_H + +#include <cyg/infra/cyg_type.h> // base types +#include <cyg/infra/cyg_trac.h> // tracing macros +#include <cyg/infra/cyg_ass.h> // assertion macros + +#include <cyg/hal/hal_arch.h> // basic machine info +#include <cyg/hal/hal_intr.h> // interrupt macros +#include <cyg/hal/hal_io.h> // IO macros +#include <cyg/hal/hal_diag.h> +#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS +#include <cyg/hal/drv_api.h> +#include <cyg/hal/hal_stub.h> // cyg_hal_gdb_interrupt +#define CYG_DEVICE_SERIAL_INT CYGNUM_HAL_VECTOR_INTCSI1 +#endif + +#include <cyg/hal/v850_common.h> // hardware registers, etc. + +// Assumption: all diagnostic output must be GDB packetized unless this is a ROM (i.e. +// totally stand-alone) system. + +#ifdef CYGSEM_HAL_ROM_MONITOR +#define CYG_HAL_STARTUP_ROM +#undef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS +#endif + +#if defined(CYG_HAL_STARTUP_ROM) && !defined(CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS) +#define HAL_DIAG_USES_HARDWARE +#else +#if defined(CYGDBG_HAL_DIAG_DISABLE_GDB_PROTOCOL) +#define HAL_DIAG_USES_HARDWARE +#endif +#endif + +#if (CYGHWR_HAL_V85X_V850_CEB_DIAG_BAUD == 9600) +#define BAUD_COUNT 0xDD +#define BAUD_DIVISOR 3 +#endif +#if (CYGHWR_HAL_V85X_V850_CEB_DIAG_BAUD == 19200) +#define BAUD_COUNT 0xDD +#define BAUD_DIVISOR 2 +#endif +#if (CYGHWR_HAL_V85X_V850_CEB_DIAG_BAUD == 38400) +#define BAUD_COUNT 0xDD +#define BAUD_DIVISOR 1 +#endif +#ifndef BAUD_COUNT +#error Unsupported BAUD rate +#endif + +/*---------------------------------------------------------------------------*/ +// CEB-v850 + +void +FAIL(char *m) +{ + static char *fail_reason; + fail_reason = m; +#if 0 + while (1) { + show_led('~'); + show_hex4(m); + show_led('/'); + } +#else + diag_printf("FAIL: %s\n", m); +#endif +} + +void +ALERT(char *m) +{ + static char *alert_reason; + alert_reason = m; +#if 0 + show_led('~'); + show_led('~'); + show_hex4(m); + show_led('/'); +#else + diag_printf("ALERT: %s\n", m); +#endif +} + +// Actually send character down the wire +void +hal_diag_write_char_serial(char c) +{ + volatile unsigned char *TxDATA = (volatile unsigned char *)V850_REG_TXS0; + volatile unsigned char *TxSTAT = (volatile unsigned char *)V850_REG_STIC0; + // Send character + *TxDATA = (unsigned char)c; + // Wait for Tx not busy + while ((*TxSTAT & 0x80) == 0x00) ; + *TxSTAT &= ~0x80; +} + +bool +hal_diag_read_serial(char *c) +{ + volatile unsigned char *RxDATA = (volatile unsigned char *)V850_REG_RXS0; + volatile unsigned char *RxSTAT = (volatile unsigned char *)V850_REG_SRIC0; + volatile unsigned char *RxERR = (volatile unsigned char *)V850_REG_SERIC0; + int timeout = 0; + while ((*RxSTAT & 0x80) == 0x00) { + if (++timeout == 50000) return false; + } + *c = (char)*RxDATA; + *RxSTAT &= ~0x80; + return true; +} + +#ifdef HAL_DIAG_USES_HARDWARE + +void hal_diag_init(void) +{ + static int init = 0; + volatile unsigned char *mode = (volatile unsigned char *)V850_REG_ASIM0; + volatile unsigned char *brgc = (volatile unsigned char *)V850_REG_BRGC0; + volatile unsigned char *brgm = (volatile unsigned char *)V850_REG_BRGM0; + volatile unsigned char *rxstat = (volatile unsigned char *)V850_REG_SRIC0; + volatile unsigned char *rxerr = (volatile unsigned char *)V850_REG_SERIC0; + volatile unsigned char *txstat = (volatile unsigned char *)V850_REG_STIC0; + if (init) return; + init++; + *mode = 0xC8; + *brgc = BAUD_COUNT; + *brgm = BAUD_DIVISOR; + *rxstat = 0x47; + *rxerr = 0; + *txstat = 0x47; +} + +#ifdef DEBUG_DIAG +#ifndef CYG_HAL_STARTUP_ROM +#define DIAG_BUFSIZE 2048 +static char diag_buffer[DIAG_BUFSIZE]; +static int diag_bp = 0; +#endif +#endif + +void hal_diag_write_char(char c) +{ + CYG_INTERRUPT_STATE old; + HAL_DISABLE_INTERRUPTS(old); + hal_diag_init(); +#ifdef DEBUG_DIAG +#ifndef CYG_HAL_STARTUP_ROM + diag_buffer[diag_bp++] = c; + if (diag_bp == sizeof(diag_buffer)) diag_bp = 0; +#endif +#endif + hal_diag_write_char_serial(c); + HAL_RESTORE_INTERRUPTS(old); +} + +void hal_diag_read_char(char *c) +{ + while (!hal_diag_read_serial(c)) ; +} + +#else // HAL_DIAG relies on GDB + +// Initialize diag port +void hal_diag_init(void) +{ + char *msg = "eCos 1.3.x - " __DATE__ "\n\r"; + static int init = 0; + if (init) return; + init++; + while (*msg) hal_diag_write_char(*msg++); +} + +void +hal_diag_read_char(char *c) +{ + while (!hal_diag_read_serial(c)) ; +} + +#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS +static void hal_diag_write_char_break(void) +{ +} +#endif + +void +hal_diag_write_char(char c) +{ + static char line[100]; + static int pos = 0; + + // No need to send CRs + if( c == '\r' ) return; + + line[pos++] = c; + + if( c == '\n' || pos == sizeof(line) ) + { + CYG_INTERRUPT_STATE old; + + // Disable interrupts. This prevents GDB trying to interrupt us + // while we are in the middle of sending a packet. The serial + // receive interrupt will be seen when we re-enable interrupts + // later. + +#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + CYG_HAL_GDB_ENTER_CRITICAL_IO_REGION(old); +#else + HAL_DISABLE_INTERRUPTS(old); +#endif + + while(1) + { + static char hex[] = "0123456789ABCDEF"; + cyg_uint8 csum = 0; + int i; + char c1; + + hal_diag_write_char_serial('$'); + hal_diag_write_char_serial('O'); + csum += 'O'; + for( i = 0; i < pos; i++ ) + { + char ch = line[i]; + char h = hex[(ch>>4)&0xF]; + char l = hex[ch&0xF]; + hal_diag_write_char_serial(h); + hal_diag_write_char_serial(l); + csum += h; + csum += l; + } + hal_diag_write_char_serial('#'); + hal_diag_write_char_serial(hex[(csum>>4)&0xF]); + hal_diag_write_char_serial(hex[csum&0xF]); + + // Wait for the ACK character '+' from GDB here and handle + // receiving a ^C instead. This is the reason for this clause + // being a loop. + if (!hal_diag_read_serial(&c1)) + continue; // No response - try sending packet again + + if( c1 == '+' ) + break; // a good acknowledge + +#if defined(CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS) && \ + defined(CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT) + cyg_drv_interrupt_acknowledge(CYG_DEVICE_SERIAL_INT); + if( c1 == 3 ) { + // Ctrl-C: breakpoint. +#if 0 // FIXME - __builtin_return_address() doesn't work + cyg_hal_gdb_interrupt (__builtin_return_address(0)); +#else + cyg_hal_gdb_interrupt (hal_diag_write_char_break); +#endif + break; + } +#endif + // otherwise, loop round again + } + + pos = 0; + + // And re-enable interrupts +#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + CYG_HAL_GDB_LEAVE_CRITICAL_IO_REGION(old); + hal_diag_write_char_break(); // FIXME +#else + HAL_RESTORE_INTERRUPTS(old); +#endif + } +} +#endif + +/*---------------------------------------------------------------------------*/ +/* End of hal_diag.c */
new file mode 100644 --- /dev/null +++ b/packages/hal/v85x/ceb_v850/current/src/plf_misc.c @@ -0,0 +1,289 @@ +//========================================================================== +// +// plf_misc.c +// +// HAL platform miscellaneous functions +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): nickg +// Contributors: nickg, gthomas +// Date: 2000-03-10 +// Purpose: HAL miscellaneous functions +// Description: This file contains miscellaneous functions provided by the +// HAL. +// +//####DESCRIPTIONEND#### +// +//========================================================================*/ + +#include <pkgconf/hal.h> + +#include <cyg/infra/cyg_type.h> // Base types +#include <cyg/infra/cyg_trac.h> // tracing macros +#include <cyg/infra/cyg_ass.h> // assertion macros + +#include <cyg/hal/hal_arch.h> // architectural definitions + +#include <cyg/hal/hal_intr.h> // Interrupt handling +#include <cyg/hal/v850_common.h> // Hardware definitions + +extern void show_hex4(unsigned long val); +extern void show_hex1(unsigned long val); +extern void show_8bit_reg(void *addr); +extern void show_led(int p); + +void +cyg_hal_platform_hardware_init(void) +{ + int i; + show_led(' '); + show_led(' '); +} + +void +show_hex4(unsigned long val) +{ + show_hex1(val>>24); + show_hex1(val>>16); + show_hex1(val>>8); + show_hex1(val); +} + +void +show_hex1(unsigned long val) +{ + static char *hex = "0123456789ABCDEF"; + show_led(hex[(val & 0xF0) >> 4]); + show_led(hex[val & 0x0F]); +} + +void +show_8bit_reg(void *addr) +{ + unsigned char *reg = (unsigned char *)addr; + unsigned char val = *reg; + show_led(' '); + show_hex4(reg); + show_led('='); + show_hex1(val); + show_led('/'); +} + +#define SEG_0 0x00 +#define SEG_A 0x01 +#define SEG_B 0x02 +#define SEG_C 0x04 +#define SEG_D 0x08 +#define SEG_E 0x10 +#define SEG_F 0x20 +#define SEG_G 0x40 +#define SEG_H 0x80 +#define LED(a,b,c,d,e,f,g,h) SEG_##a|SEG_##b|SEG_##c|SEG_##d|SEG_##e|SEG_##f|SEG_##g|SEG_##h + +static unsigned char led_bits[] = { + LED(H,0,0,0,0,0,0,0), // 0x20 + 0x30, // 0x21 ! + 0x00, // 0x22 @ + 0x00, // 0x23 + 0x00, // 0x24 + 0x00, // 0x25 + 0x00, // 0x26 + 0x00, // 0x27 + 0x00, // 0x28 + 0x00, // 0x29 + 0x00, // 0x2A + 0x00, // 0x2B + 0x00, // 0x2C + 0x00, // 0x2D + 0x00, // 0x2E + LED(E,G,B,0,0,0,0,0), // 0x2F + LED(A,B,C,D,E,F,0,0), // 0x30 + LED(0,B,C,0,0,0,0,0), // 0x31 + LED(A,B,G,E,D,0,0,0), // 0x32 + LED(A,B,G,C,D,0,0,0), // 0x33 + LED(F,G,B,C,0,0,0,0), // 0x34 + LED(A,F,G,C,D,0,0,0), // 0x35 + LED(A,F,G,C,D,E,0,0), // 0x36 + LED(A,B,C,0,0,0,0,0), // 0x37 + LED(A,B,C,D,E,F,G,0), // 0x38 + LED(A,F,G,B,C,0,0,0), // 0x39 + LED(0,0,0,0,0,0,0,0), // 0x3A + LED(0,0,0,0,0,0,0,0), // 0x3B + LED(0,0,0,0,0,0,0,0), // 0x3C + LED(D,G,0,0,0,0,0,0), // 0x3D - = + LED(0,0,0,0,0,0,0,0), // 0x3E + LED(0,0,0,0,0,0,0,0), // 0x3F + LED(0,0,0,0,0,0,0,0), // 0x40 + LED(A,F,G,B,E,C,0,0), // 0x41 - A + LED(F,G,E,D,C,0,0,0), // 0x42 - B + LED(A,F,E,D,0,0,0,0), // 0x43 - C + LED(B,G,E,D,C,0,0,0), // 0x44 - D + LED(A,F,G,E,D,0,0,0), // 0x45 - E + LED(A,F,G,E,0,0,0,0), // 0x46 - F + LED(0,0,0,0,0,0,0,0), // 0x47 + LED(0,0,0,0,0,0,0,0), // 0x48 + LED(0,0,0,0,0,0,0,0), // 0x49 + LED(0,0,0,0,0,0,0,0), // 0x4A + LED(0,0,0,0,0,0,0,0), // 0x4B + LED(0,0,0,0,0,0,0,0), // 0x4C + LED(0,0,0,0,0,0,0,0), // 0x4D + LED(0,0,0,0,0,0,0,0), // 0x4E + LED(0,0,0,0,0,0,0,0), // 0x4F + LED(0,0,0,0,0,0,0,0), // 0x50 + LED(0,0,0,0,0,0,0,0), // 0x51 + LED(0,0,0,0,0,0,0,0), // 0x52 + LED(0,0,0,0,0,0,0,0), // 0x53 + LED(0,0,0,0,0,0,0,0), // 0x54 + LED(0,0,0,0,0,0,0,0), // 0x55 + LED(0,0,0,0,0,0,0,0), // 0x56 + LED(0,0,0,0,0,0,0,0), // 0x57 + LED(0,0,0,0,0,0,0,0), // 0x58 + LED(0,0,0,0,0,0,0,0), // 0x59 + LED(0,0,0,0,0,0,0,0), // 0x5A + LED(0,0,0,0,0,0,0,0), // 0x5B + LED(0,0,0,0,0,0,0,0), // 0x5C + LED(0,0,0,0,0,0,0,0), // 0x5D + LED(0,0,0,0,0,0,0,0), // 0x5E + LED(0,0,0,0,0,0,0,0), // 0x5F + LED(0,0,0,0,0,0,0,0), // 0x60 + LED(0,0,0,0,0,0,0,0), // 0x61 + LED(0,0,0,0,0,0,0,0), // 0x62 + LED(0,0,0,0,0,0,0,0), // 0x63 + LED(0,0,0,0,0,0,0,0), // 0x64 + LED(0,0,0,0,0,0,0,0), // 0x65 + LED(0,0,0,0,0,0,0,0), // 0x66 + LED(0,0,0,0,0,0,0,0), // 0x67 + LED(0,0,0,0,0,0,0,0), // 0x68 + LED(0,0,0,0,0,0,0,0), // 0x69 + LED(0,0,0,0,0,0,0,0), // 0x6A + LED(0,0,0,0,0,0,0,0), // 0x6B + LED(0,0,0,0,0,0,0,0), // 0x6C + LED(0,0,0,0,0,0,0,0), // 0x6D + LED(0,0,0,0,0,0,0,0), // 0x6E + LED(0,0,0,0,0,0,0,0), // 0x6F + LED(0,0,0,0,0,0,0,0), // 0x70 + LED(0,0,0,0,0,0,0,0), // 0x71 + LED(0,0,0,0,0,0,0,0), // 0x72 + LED(0,0,0,0,0,0,0,0), // 0x73 + LED(0,0,0,0,0,0,0,0), // 0x74 + LED(0,0,0,0,0,0,0,0), // 0x75 + LED(0,0,0,0,0,0,0,0), // 0x76 + LED(0,0,0,0,0,0,0,0), // 0x77 + LED(0,0,0,0,0,0,0,0), // 0x78 + LED(0,0,0,0,0,0,0,0), // 0x79 + LED(0,0,0,0,0,0,0,0), // 0x7A + LED(0,0,0,0,0,0,0,0), // 0x7B + LED(0,0,0,0,0,0,0,0), // 0x7C + LED(0,0,0,0,0,0,0,0), // 0x7D + LED(A,0,0,0,0,0,0,0), // 0x7E - ~ + LED(0,0,0,0,0,0,0,0), // 0x7F +}; + +#ifdef CYG_HAL_STARTUP_ROM +#define DELAY 10000 +#else +#define DELAY 100000 +#endif + +void +show_led(int p) +{ + volatile unsigned char *led = (volatile unsigned char *)0xFFFFF014; + int j; + for (j = 0; j < DELAY; j++) { + *led = led_bits[p-0x20]; + } + for (j = 0; j < DELAY*3; j++) { + *led = 0; + } +} + +// +// Clock support, using 16 bit timer TM1 +// + +CYG_WORD32 cyg_hal_clock_period; + +void +hal_clock_initialize(cyg_int32 period) +{ + volatile unsigned char *tmc = (volatile unsigned char *)V850_REG_TMC1; + volatile unsigned char *crc = (volatile unsigned char *)V850_REG_CRC1; + volatile unsigned char *prm = (volatile unsigned char *)V850_REG_PRM1; + volatile unsigned short *cmp0 = (volatile unsigned short *)V850_REG_CR10; + volatile unsigned short *cmp1 = (volatile unsigned short *)V850_REG_CR11; + *tmc = 0x00; // Halt timer + *crc = 0x00; // Select simple compare mode + *prm = 0x01; // System clock / 4 = 4250KHz + *cmp0 = period; + *cmp1 = period; + *tmc = 0x0C; // Continuous, reset mode (interval timer) + cyg_hal_clock_period = period; +} + +void +hal_clock_reset(int vector, cyg_uint32 period) +{ + hal_clock_initialize(period); +} + +// +// Return the number of clock "ticks" since last interrupt +// +cyg_uint32 hal_clock_read(void) +{ + volatile unsigned short *timer = (volatile unsigned short *)V850_REG_TM1; + return (cyg_uint32)*timer; +} + + +extern void _hal_thread_load_context(HAL_SavedRegisters **to); +extern void _hal_thread_switch_context(HAL_SavedRegisters **to, HAL_SavedRegisters **from); + +void hal_thread_load_context(CYG_ADDRESS to) +{ + HAL_SavedRegisters **new_context = to; +#if 0 + diag_printf("Load context: %x\n", *new_context); + show_regs(*new_context); +#endif + _hal_thread_load_context(new_context); +} + +void hal_thread_switch_context(CYG_ADDRESS to, CYG_ADDRESS from) +{ + HAL_SavedRegisters **old_context = from; + HAL_SavedRegisters **new_context = to; +#if 0 + diag_printf("Switch context - old: %x, new: %x\n", *old_context, *new_context); + show_regs(*new_context); +#endif + _hal_thread_switch_context(new_context, old_context); +} +
new file mode 100644 --- /dev/null +++ b/packages/hal/v85x/ceb_v850/current/src/plf_stub.c @@ -0,0 +1,149 @@ +//============================================================================= +// +// plf_stub.c +// +// Platform specific code for GDB stub support. +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): nickg, jskov (based on the old tx39 hal_stub.c) +// Contributors:nickg, jskov, gthomas +// Date: 2000-03-10 +// Purpose: Platform specific code for GDB stub support. +// +//####DESCRIPTIONEND#### +// +//============================================================================= + +#include <pkgconf/hal.h> + +#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + +#include <cyg/hal/hal_stub.h> + +#include <cyg/hal/hal_io.h> // HAL IO macros +#include <cyg/hal/hal_diag.h> // diag output. FIXME +#include <cyg/hal/drv_api.h> + +#include <cyg/hal/hal_intr.h> + +#include <cyg/hal/v850_common.h> + +/*---------------------------------------------------------------------------*/ +#ifdef CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT +static cyg_interrupt gdb_interrupt; +static cyg_handle_t gdb_interrupt_handle; +#define CYG_DEVICE_SERIAL_INT CYGNUM_HAL_VECTOR_INTCSI1 + +// This ISR is called only for serial receive interrupts. +int +cyg_hal_gdb_isr(cyg_vector_t vector, cyg_addrword_t data, HAL_SavedRegisters *regs) +{ + volatile unsigned char *RxDATA = (volatile unsigned char *)V850_REG_RXS0; + cyg_uint8 c; + + c = *RxDATA; // Fetch the character + if( 3 == c ) { // ^C + // Ctrl-C: set a breakpoint at PC so GDB will display the + // correct program context when stopping rather than the + // interrupt handler. + cyg_hal_gdb_interrupt (regs->pc); + cyg_drv_interrupt_acknowledge(CYG_DEVICE_SERIAL_INT); + } + return 0; // No need to run DSR +} + +int +hal_plf_interruptible(int state) +{ + if (state) { + cyg_drv_interrupt_unmask(CYG_DEVICE_SERIAL_INT); + } else { + cyg_drv_interrupt_mask(CYG_DEVICE_SERIAL_INT); + } + + return 0; +} +#endif + +void hal_plf_init_serial() +{ +#ifdef CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT + cyg_drv_interrupt_create(CYG_DEVICE_SERIAL_INT, + 99, // Priority - what goes here? + 0, // Data item passed to interrupt handler + cyg_hal_gdb_isr, + 0, + &gdb_interrupt_handle, + &gdb_interrupt); + cyg_drv_interrupt_attach(gdb_interrupt_handle); + cyg_drv_interrupt_unmask(CYG_DEVICE_SERIAL_INT); +#endif +} + +/*---------------------------------------------------------------------------*/ + +void hal_plf_put_char( int c) +{ + hal_diag_write_char_serial(c); +} + +/*---------------------------------------------------------------------------*/ + +int hal_plf_get_char( void ) +{ + volatile unsigned char *LED = (volatile unsigned char *)V850_REG_P10; + char c; + unsigned char led = *LED & 0x7F; + if (led == 0) { + led = 0x01; + } else { + led <<= 1; + } + *LED = 0x80 | led; + hal_diag_read_char(&c); + *LED &= 0x7F; + return c; +} + + +//----------------------------------------------------------------------------- +// Stub init + +void hal_plf_stub_init(void) +{ + // Set up watchdog timer since we have to use it to emulate a breakpoint + volatile unsigned char *wdcs = (volatile unsigned char *)V850_REG_WDCS; + volatile unsigned char *wdtm = (volatile unsigned char *)V850_REG_WDTM; + *wdcs = 0x07; // 246.7ms - lowest possible overhead + *wdtm = 0x90; // Start watchdog +} + +#endif // ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS +//----------------------------------------------------------------------------- +// End of plf_stub.c
new file mode 100644 --- /dev/null +++ b/packages/hal/v85x/v850/current/ChangeLog @@ -0,0 +1,73 @@ +2000-05-25 Gary Thomas <gthomas@redhat.com> + + * src/v85x_v850.ld: Add platform specifics. In particular the + special, hardwired symbol "hal_vsr_table" needs to be platform + specific. + +2000-05-24 Gary Thomas <gthomas@redhat.com> + + * include/v850_common.h: Split into platform specific files. + +2000-04-25 Gary Thomas <gthomas@redhat.com> + + * src/v85x_v850.ld: Fix linking problem with "_etext". + +2000-04-14 Gary Thomas <gthomas@redhat.com> + + * src/v850_stub.c: Use 'br *' with a watchdog to emulate a + breakpoint since the hardware does not support them directly. + +2000-04-11 Gary Thomas <gthomas@redhat.com> + + * src/v850_stub.c (next_pc): Instruction "jmp [Rn]" was being + decoded incorrectly, leading to erroneous single step behaviour. + +2000-03-31 Gary Thomas <gthomas@redhat.com> + + * src/context.S: Use SLD/SST for smaller, faster code in context + save/restore functions. + +2000-03-30 Gary Thomas <gthomas@redhat.com> + + * src/context.S (_hal_longjmp): + (_hal_setjmp): Need to save R1/R2/R4/R5 since GCC seems to use them. + +2000-03-27 Gary Thomas <gthomas@redhat.com> + + * include/var_intr.h: Remove extra junk left over from cut&paste. + + * src/context.S: Add setjmp/longjmp support. + +2000-03-21 Gary Thomas <gthomas@redhat.com> + + * src/v850_stub.c (__skipinst): Use single step code properly. + +2000-03-20 Gary Thomas <gthomas@redhat.com> + + * src/v850_stub.c: Add single step support. + +//=========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//===========================================================================
new file mode 100644 --- /dev/null +++ b/packages/hal/v85x/v850/current/cdl/hal_v85x_v850.cdl @@ -0,0 +1,76 @@ +# ==================================================================== +# +# hal_v85x_v850.cdl +# +# NEC/V850 variant architectural HAL package configuration data +# +# ==================================================================== +#####COPYRIGHTBEGIN#### +# +# ------------------------------------------- +# The contents of this file are subject to the Red Hat eCos Public License +# Version 1.1 (the "License"); you may not use this file except in +# compliance with the License. You may obtain a copy of the License at +# http://www.redhat.com/ +# +# Software distributed under the License is distributed on an "AS IS" +# basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +# License for the specific language governing rights and limitations under +# the License. +# +# The Original Code is eCos - Embedded Configurable Operating System, +# released September 30, 1998. +# +# The Initial Developer of the Original Code is Red Hat. +# Portions created by Red Hat are +# Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +# All Rights Reserved. +# ------------------------------------------- +# +#####COPYRIGHTEND#### +# ==================================================================== +######DESCRIPTIONBEGIN#### +# +# Author(s): gthomas +# Contributors: +# Date: 2000-03-09 +# +#####DESCRIPTIONEND#### +# +# ==================================================================== + +cdl_package CYGPKG_HAL_V85X_V850 { + display "V850 variant" + parent CYGPKG_HAL_V85X + implements CYGINT_HAL_V85X_VARIANT + hardware + include_dir cyg/hal + define_header hal_v85x_v850.h + description " + The V850 variant HAL package provides generic support + for this processor architecture. It is also necessary to + select a specific target platform HAL package." + + define_proc { + puts $::cdl_header "#include <pkgconf/hal_v85x.h>" + } + + compile v850_stub.c v850_misc.c context.S + + make { + <PREFIX>/lib/target.ld: <PACKAGE>/src/v85x_v850.ld + $(CC) -E -P -Wp,-MD,target.tmp -DEXTRAS=1 -xc $(INCLUDE_PATH) $(CFLAGS) -o $@ $< + @echo $@ ": \\" > $(notdir $@).deps + @tail +2 target.tmp >> $(notdir $@).deps + @echo >> $(notdir $@).deps + @rm target.tmp + } + + cdl_option CYGBLD_LINKER_SCRIPT { + display "Linker script" + flavor data + no_define + calculated { "src/v85x_v850.ld" } + } + +}
new file mode 100644 --- /dev/null +++ b/packages/hal/v85x/v850/current/include/v850_common.h @@ -0,0 +1,56 @@ +#ifndef CYGONCE_V850_COMMON_H +#define CYGONCE_V850_COMMON_H + +/*============================================================================= +// +// v850_common.h +// +// NEC/V850 common definitions +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 2000-03-10 +// Purpose: NEC/V850 CPU family hardware description +// Description: +// Usage: #include <cyg/hal/v850_common.h> +// +//####DESCRIPTIONEND#### +// +//===========================================================================*/ + +// Note: these defintions match the documentation, thus no attempt is made +// to sanitize (mangle) the names. Also, care should be taken to keep this +// clean for use in assembly code (no "C" constructs). + +#include <cyg/hal/v850_regs.h> + +/*---------------------------------------------------------------------------*/ +/* end of v850_common.h */ +#endif /* CYGONCE_V850_COMMON_H */
new file mode 100644 --- /dev/null +++ b/packages/hal/v85x/v850/current/include/var_arch.h @@ -0,0 +1,85 @@ +#ifndef CYGONCE_HAL_VAR_ARCH_H +#define CYGONCE_HAL_VAR_ARCH_H + +//========================================================================== +// +// var_arch.h +// +// Architecture specific abstractions +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): nickg +// Contributors: nickg, gthomas +// Date: 1999-02-17 +// Purpose: Define architecture abstractions +// Description: This file contains any extra or modified definitions for +// this variant of the architecture. +// Usage: #include <cyg/hal/var_arch.h> +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#include <pkgconf/hal.h> +#include <cyg/infra/cyg_type.h> + +#define CYG_HAL_GDB_REG CYG_WORD32 + +// Copy a set of registers from a HAL_SavedRegisters structure into a +// GDB ordered array. +#define HAL_GET_GDB_REGISTERS( _aregval_ , _regs_ ) \ +{ \ + CYG_HAL_GDB_REG *_regval_ = (CYG_HAL_GDB_REG *)(_aregval_); \ + int _i_; \ + \ + for( _i_ = 0; _i_ < 32; _i_++ ) \ + _regval_[_i_] = (_regs_)->d[_i_]; \ + \ + _regval_[37] = (_regs_)->psw; \ + _regval_[36] = (_regs_)->cause; \ + _regval_[64] = (_regs_)->pc; \ +} + +// Copy a GDB ordered array into a HAL_SavedRegisters structure. +#define HAL_SET_GDB_REGISTERS( _regs_ , _aregval_ ) \ +{ \ + CYG_HAL_GDB_REG *_regval_ = (CYG_HAL_GDB_REG *)(_aregval_); \ + int _i_; \ + \ + for( _i_ = 0; _i_ < 32; _i_++ ) \ + (_regs_)->d[_i_] = _regval_[_i_]; \ + \ + (_regs_)->psw = _regval_[37]; \ + (_regs_)->cause = _regval_[36]; \ + (_regs_)->pc = _regval_[64]; \ +} + +//-------------------------------------------------------------------------- +#endif // CYGONCE_HAL_VAR_ARCH_H +// End of var_arch.h
new file mode 100644 --- /dev/null +++ b/packages/hal/v85x/v850/current/include/var_cache.h @@ -0,0 +1,59 @@ +#ifndef CYGONCE_VAR_CACHE_H +#define CYGONCE_VAR_CACHE_H + +//============================================================================= +// +// var_cache.h +// +// HAL cache control API +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): nickg +// Contributors: nickg +// Date: 1998-02-17 +// Purpose: Cache control API +// Description: The macros defined here provide the HAL APIs for handling +// cache control operations. +// Usage: +// #include <cyg/hal/var_cache.h> +// ... +// +// +//####DESCRIPTIONEND#### +// +//============================================================================= + +#include <pkgconf/hal.h> +#include <cyg/infra/cyg_type.h> + +#include <cyg/hal/plf_cache.h> + +//----------------------------------------------------------------------------- +#endif // ifndef CYGONCE_VAR_CACHE_H +// End of var_cache.h
new file mode 100644 --- /dev/null +++ b/packages/hal/v85x/v850/current/include/var_intr.h @@ -0,0 +1,71 @@ +#ifndef CYGONCE_HAL_VAR_INTR_H +#define CYGONCE_HAL_VAR_INTR_H + +//========================================================================== +// +// var_intr.h +// +// VR4300 Interrupt and clock support +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): nickg +// Contributors: nickg, jskov, +// gthomas, jlarmour +// Date: 1999-02-16 +// Purpose: VR4300 Interrupt support +// Description: The macros defined here provide the HAL APIs for handling +// interrupts and the clock for variants of the NEC VR4300 +// architecture. +// +// Usage: +// #include <cyg/hal/var_intr.h> +// ... +// +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#include <pkgconf/hal.h> + +#include <cyg/infra/cyg_type.h> + +#include <cyg/hal/plf_intr.h> + +//-------------------------------------------------------------------------- +// Interrupt controller access. + +//-------------------------------------------------------------------------- +// Clock control + +// This is handled by the default code + +//-------------------------------------------------------------------------- +#endif // ifndef CYGONCE_HAL_VAR_INTR_H +// End of var_intr.h
new file mode 100644 --- /dev/null +++ b/packages/hal/v85x/v850/current/src/context.S @@ -0,0 +1,205 @@ +// #============================================================================= +// # +// # context.S +// # +// # NEC/V850 context switch code +// # +// #============================================================================= +// ####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +// ####COPYRIGHTEND#### +// #============================================================================= +// ######DESCRIPTIONBEGIN#### +// # +// # Author(s): nickg, gthomas +// # Contributors: nickg, gthomas +// # Date: 1998-09-15 +// # Purpose: NEC/V850 context switch code +// # Description: This file contains implementations of the thread context +// # switch routines. It also contains the longjmp() and setjmp() routines. +// # +// #####DESCRIPTIONEND#### +// # +// #============================================================================= + +#include <pkgconf/hal.h> + +#include <cyg/hal/nec_offsets.inc> + + .text + +// ------------------------------------------------------------------------------ +// hal_thread_switch_context +// Switch thread contexts +// R6 = address of sp of next thread to execute +// R7 = address of sp save location of current thread + .globl __hal_thread_switch_context +__hal_thread_switch_context: + addi -CYGARC_EXCEPTION_FRAME_SIZE,sp,sp + st.w ep,CYGARC_REG_EP[sp] + mov sp,ep + sst.w r1,CYGARC_REG_R1[ep] + sst.w r2,CYGARC_REG_R2[ep] + addi CYGARC_EXCEPTION_FRAME_SIZE,ep,r1 + sst.w r1,CYGARC_REG_SP[ep] // sp + sst.w r4,CYGARC_REG_R4[ep] + sst.w r5,CYGARC_REG_R5[ep] + sst.w r6,CYGARC_REG_R6[ep] + sst.w r7,CYGARC_REG_R7[ep] + sst.w r8,CYGARC_REG_R8[ep] + sst.w r9,CYGARC_REG_R9[ep] + sst.w r10,CYGARC_REG_R10[ep] + sst.w r11,CYGARC_REG_R11[ep] + sst.w r12,CYGARC_REG_R12[ep] + sst.w r13,CYGARC_REG_R13[ep] + sst.w r14,CYGARC_REG_R14[ep] + sst.w r15,CYGARC_REG_R15[ep] + sst.w r16,CYGARC_REG_R16[ep] + sst.w r17,CYGARC_REG_R17[ep] + sst.w r18,CYGARC_REG_R18[ep] + sst.w r19,CYGARC_REG_R19[ep] + sst.w r20,CYGARC_REG_R20[ep] + sst.w r21,CYGARC_REG_R21[ep] + sst.w r22,CYGARC_REG_R22[ep] + sst.w r23,CYGARC_REG_R23[ep] + sst.w r24,CYGARC_REG_R24[ep] + sst.w r25,CYGARC_REG_R25[ep] + sst.w r26,CYGARC_REG_R26[ep] + sst.w r27,CYGARC_REG_R27[ep] + sst.w r28,CYGARC_REG_R28[ep] + sst.w r29,CYGARC_REG_R29[ep] + sst.w lp,CYGARC_REG_LP[ep] + sst.w lp,CYGARC_REG_PC[ep] + stsr PSW,r1 + st.w r1,CYGARC_REG_PSW[ep] + st.w sp,0[r7] // return new stack pointer + + # Now load the destination thread by dropping through + # to hal_thread_load_context +// ------------------------------------------------------------------------------ +// hal_thread_load_context +// Load thread context +// R6 = address of sp of next thread to execute +// Note that this function is also the second half of hal_thread_switch_context +// and is simply dropped into from it. + + .globl __hal_thread_load_context +__hal_thread_load_context: + di // disable interrupts while updating state + ld.w 0[r6],ep // get pointer to saved state + ld.w CYGARC_REG_PSW[ep],r6 + sld.w CYGARC_REG_LP[ep],r7 + sld.w CYGARC_REG_R1[ep],r1 // restore volatile registers + sld.w CYGARC_REG_R2[ep],r2 + ldsr r6,EIPSW // avoids pipline bubble + ldsr r7,EIPC + sld.w CYGARC_REG_R4[ep],r4 + sld.w CYGARC_REG_R5[ep],r5 + sld.w CYGARC_REG_R6[ep],r6 + sld.w CYGARC_REG_R7[ep],r7 + sld.w CYGARC_REG_R8[ep],r8 + sld.w CYGARC_REG_R9[ep],r9 + sld.w CYGARC_REG_R10[ep],r10 + sld.w CYGARC_REG_R11[ep],r11 + sld.w CYGARC_REG_R12[ep],r12 + sld.w CYGARC_REG_R13[ep],r13 + sld.w CYGARC_REG_R14[ep],r14 + sld.w CYGARC_REG_R15[ep],r15 + sld.w CYGARC_REG_R16[ep],r16 + sld.w CYGARC_REG_R17[ep],r17 + sld.w CYGARC_REG_R18[ep],r18 + sld.w CYGARC_REG_R19[ep],r19 + sld.w CYGARC_REG_R20[ep],r20 + sld.w CYGARC_REG_R21[ep],r21 + sld.w CYGARC_REG_R22[ep],r22 + sld.w CYGARC_REG_R23[ep],r23 + sld.w CYGARC_REG_R24[ep],r24 + sld.w CYGARC_REG_R25[ep],r25 + sld.w CYGARC_REG_R26[ep],r26 + sld.w CYGARC_REG_R27[ep],r27 + sld.w CYGARC_REG_R28[ep],r28 + sld.w CYGARC_REG_R29[ep],r29 + sld.w CYGARC_REG_LP[ep],lp + sld.w CYGARC_REG_SP[ep],sp + sld.w CYGARC_REG_EP[ep],ep + reti + +// ------------------------------------------------------------------------------ +// HAL longjmp, setjmp implementations + +#define fp r29 + + .globl _hal_setjmp +_hal_setjmp: + st.w r1,CYGARC_JMPBUF_R1[r6] + st.w r2,CYGARC_JMPBUF_R2[r6] + st.w r4,CYGARC_JMPBUF_R4[r6] + st.w r5,CYGARC_JMPBUF_R5[r6] + st.w sp,CYGARC_JMPBUF_SP[r6] + st.w gp,CYGARC_JMPBUF_GP[r6] + st.w tp,CYGARC_JMPBUF_TP[r6] + st.w r20,CYGARC_JMPBUF_R20[r6] + st.w r21,CYGARC_JMPBUF_R21[r6] + st.w r22,CYGARC_JMPBUF_R22[r6] + st.w r23,CYGARC_JMPBUF_R23[r6] + st.w r24,CYGARC_JMPBUF_R24[r6] + st.w r25,CYGARC_JMPBUF_R25[r6] + st.w r26,CYGARC_JMPBUF_R26[r6] + st.w r27,CYGARC_JMPBUF_R27[r6] + st.w r28,CYGARC_JMPBUF_R28[r6] + st.w fp,CYGARC_JMPBUF_FP[r6] + st.w ep,CYGARC_JMPBUF_EP[r6] + st.w lp,CYGARC_JMPBUF_LP[r6] + mov r0,r10 + jmp [lp] + +// hal_longjmp loads state from [arg0] and returns arg1 + + .globl _hal_longjmp +_hal_longjmp: + ld.w CYGARC_JMPBUF_SP[r6],sp + ld.w CYGARC_JMPBUF_GP[r6],gp + ld.w CYGARC_JMPBUF_TP[r6],tp + ld.w CYGARC_JMPBUF_R1[r6],r1 + ld.w CYGARC_JMPBUF_R2[r6],r2 + ld.w CYGARC_JMPBUF_R4[r6],r4 + ld.w CYGARC_JMPBUF_R5[r6],r5 + ld.w CYGARC_JMPBUF_R20[r6],r20 + ld.w CYGARC_JMPBUF_R21[r6],r21 + ld.w CYGARC_JMPBUF_R22[r6],r22 + ld.w CYGARC_JMPBUF_R23[r6],r23 + ld.w CYGARC_JMPBUF_R24[r6],r24 + ld.w CYGARC_JMPBUF_R25[r6],r25 + ld.w CYGARC_JMPBUF_R26[r6],r26 + ld.w CYGARC_JMPBUF_R27[r6],r27 + ld.w CYGARC_JMPBUF_R28[r6],r28 + ld.w CYGARC_JMPBUF_FP[r6],fp + ld.w CYGARC_JMPBUF_EP[r6],ep + ld.w CYGARC_JMPBUF_LP[r6],lp + mov r7,r10 + jmp [lp] + +// ------------------------------------------------------------------------------ +// end of context.S + +
new file mode 100644 --- /dev/null +++ b/packages/hal/v85x/v850/current/src/nec.ld @@ -0,0 +1,124 @@ +//============================================================================= +// +// MLT linker script for NEC +// adapted from packages/hal/arm/pid/v1_1/src/pid.ld +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= + +#include <pkgconf/system.h> + +STARTUP(vectors.o) +ENTRY(reset_vector) +#ifdef EXTRAS +INPUT(extras.o) +#endif +GROUP(libtarget.a libgcc.a) + +#define ALIGN_LMA 4 +#define FOLLOWING(_section_) AT ((LOADADDR (_section_) + SIZEOF (_section_) + ALIGN_LMA - 1) & ~ (ALIGN_LMA - 1)) +#define LMA_EQ_VMA +#define FORCE_OUTPUT . = . + +#define SECTIONS_BEGIN \ + /* Debug information */ \ + .debug_aranges 0 : { *(.debug_aranges) } \ + .debug_pubnames 0 : { *(.debug_pubnames) } \ + .debug_info 0 : { *(.debug_info) } \ + .debug_abbrev 0 : { *(.debug_abbrev) } \ + .debug_line 0 : { *(.debug_line) } \ + .debug_frame 0 : { *(.debug_frame) } \ + .debug_str 0 : { *(.debug_str) } \ + .debug_loc 0 : { *(.debug_loc) } \ + .debug_macinfo 0 : { *(.debug_macinfo) } + +#define SECTION_rom_vectors(_region_, _vma_, _lma_) \ + .rom_vectors _vma_ : _lma_ \ + { FORCE_OUTPUT; KEEP (*(.vectors)) } \ + > _region_ + +#define SECTION_text(_region_, _vma_, _lma_) \ + .text _vma_ : _lma_ \ + { stext = ABSOLUTE(.); \ + PROVIDE (__stext = ABSOLUTE(.)); \ + *(.text*) *(.gnu.warning) *(.gnu.linkonce*) *(.init) \ + *(.glue_7) *(.glue_7t) \ + } > _region_ \ + etext = .; PROVIDE (__etext = .); + +#define SECTION_fini(_region_, _vma_, _lma_) \ + .fini _vma_ : _lma_ \ + { FORCE_OUTPUT; *(.fini) } \ + > _region_ + +#define SECTION_rodata(_region_, _vma_, _lma_) \ + .rodata _vma_ : _lma_ \ + { FORCE_OUTPUT; *(.rodata*) } \ + > _region_ + +#define SECTION_rodata1(_region_, _vma_, _lma_) \ + .rodata1 _vma_ : _lma_ \ + { FORCE_OUTPUT; *(.rodata1) } \ + > _region_ + +#define SECTION_fixup(_region_, _vma_, _lma_) \ + .fixup _vma_ : _lma_ \ + { FORCE_OUTPUT; *(.fixup) } \ + > _region_ + +#define SECTION_gcc_except_table(_region_, _vma_, _lma_) \ + .gcc_except_table _vma_ : _lma_ \ + { FORCE_OUTPUT; *(.gcc_except_table) } \ + > _region_ + +#define SECTION_data(_region_, _vma_, _lma_) \ + .data _vma_ : _lma_ \ + { __ram_data_start = ABSOLUTE (.); *(.data*) *(.data1) MERGE_IN_RODATA \ + _GOT1_START_ = ABSOLUTE (.); *(.got1) _GOT1_END_ = ABSOLUTE (.); \ + _GOT2_START_ = ABSOLUTE (.); *(.got2) _GOT2_END_ = ABSOLUTE (.); \ + . = ALIGN (4); \ + __DEVTAB__ = ABSOLUTE (.); KEEP (*(SORT (.devtab*))) __DEVTAB_END__ = ABSOLUTE (.); \ + __NETDEVTAB__ = ABSOLUTE (.); KEEP (*(SORT (.netdevtab*))) __NETDEVTAB_END__ = ABSOLUTE (.); \ + __CTOR_LIST__ = ABSOLUTE (.); KEEP (*(SORT (.ctors*))) __CTOR_END__ = ABSOLUTE (.); \ + __DTOR_LIST__ = ABSOLUTE (.); KEEP (*(SORT (.dtors*))) __DTOR_END__ = ABSOLUTE (.); \ + *(.dynamic) *(.sdata*) *(.sbss*) } \ + > _region_ \ + __rom_data_start = LOADADDR (.data); \ + __ram_data_end = .; PROVIDE (__ram_data_end = .); _edata = .; PROVIDE (edata = .); \ + PROVIDE (__rom_data_end = LOADADDR (.data) + SIZEOF(.data)); + +#define SECTION_bss(_region_, _vma_, _lma_) \ + .bss _vma_ : _lma_ \ + { __bss_start = ABSOLUTE (.); \ + *(.scommon) *(.dynbss) *(.bss*) *(COMMON) \ + __bss_end = ABSOLUTE (.); } \ + > _region_ + +#define SECTIONS_END . = ALIGN(4); _end = .; PROVIDE (end = .); + +#include <pkgconf/hal_nec.h> +#include <pkgconf/hal_nec_v850.h> +#include CYGHWR_MEMORY_LAYOUT_LDI
new file mode 100644 --- /dev/null +++ b/packages/hal/v85x/v850/current/src/v850_misc.c @@ -0,0 +1,125 @@ +//========================================================================== +// +// v850_misc.c +// +// HAL CPU variant miscellaneous functions +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 2000-03-15 +// Purpose: HAL miscellaneous functions +// Description: This file contains miscellaneous functions provided by the +// HAL. +// +//####DESCRIPTIONEND#### +// +//========================================================================*/ + +#include <pkgconf/hal.h> + +#include <cyg/infra/cyg_type.h> // Base types +#include <cyg/infra/cyg_trac.h> // tracing macros +#include <cyg/infra/cyg_ass.h> // assertion macros + +#include <cyg/hal/hal_intr.h> +#include <cyg/hal/v850_common.h> + +externC void cyg_hal_platform_hardware_init(void); + +// +// Interrupt management functions +// + +static volatile unsigned char *interrupt_control_registers[] = { + CYG_HAL_V85X_INTERRUPT_CONTROL_REGISTERS // Defined in <plf_intr.h> +}; + +#define INT_CONTROL_PENDING 0x80 +#define INT_CONTROL_DISABLE 0x40 +#define INT_CONTROL_LEVEL(n) n + +#define INT_CONTROL_DEFAULT INT_CONTROL_DISABLE|INT_CONTROL_LEVEL(7) + +// +// Mask, i.e. disable, interrupt #vector from occurring +// +void +hal_interrupt_mask(int vector) +{ + volatile unsigned char *ctl; + ctl = interrupt_control_registers[vector-CYGNUM_HAL_ISR_MIN]; + *ctl |= INT_CONTROL_DISABLE; +} + +// +// Unmask, i.e. enable, interrupt #vector +// +void +hal_interrupt_unmask(int vector) +{ + volatile unsigned char *ctl; + ctl = interrupt_control_registers[vector-CYGNUM_HAL_ISR_MIN]; + *ctl &= ~INT_CONTROL_DISABLE; +} + +// +// Acknowledge, i.e. clear, interrupt #vector +// +void +hal_interrupt_acknowledge(int vector) +{ + volatile unsigned char *ctl; + ctl = interrupt_control_registers[vector-CYGNUM_HAL_ISR_MIN]; + *ctl &= ~INT_CONTROL_PENDING; +} + +static void +init_interrupts(void) +{ + int i; + volatile unsigned char *ctl; + for (i = CYGNUM_HAL_ISR_MIN; i <= CYGNUM_HAL_ISR_MAX; i++) { + ctl = interrupt_control_registers[i-CYGNUM_HAL_ISR_MIN]; + *ctl = INT_CONTROL_DEFAULT; + } +} + +// +// Initialize the hardware. This may involve platform specific code. +// +void +cyg_hal_hardware_init(void) +{ + init_interrupts(); + cyg_hal_platform_hardware_init(); +} + +/*------------------------------------------------------------------------*/ +/* End of v850_misc.c */
new file mode 100644 --- /dev/null +++ b/packages/hal/v85x/v850/current/src/v850_stub.c @@ -0,0 +1,315 @@ +//======================================================================== +// +// nec_stub.c +// +// Helper functions for stub, generic to all NEC processors +// +//======================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//======================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): Red Hat, gthomas +// Contributors: Red Hat, gthomas, jskov +// Date: 1998-11-26 +// Purpose: +// Description: Helper functions for stub, generic to all NEC processors +// Usage: +// +//####DESCRIPTIONEND#### +// +//======================================================================== + +#include <stddef.h> + +#include <pkgconf/hal.h> +#ifdef CYGPKG_CYGMON +#include <pkgconf/cygmon.h> +#endif + +#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + +#include <cyg/hal/hal_stub.h> +#include <cyg/hal/hal_arch.h> +#include <cyg/hal/hal_intr.h> + +#ifndef FALSE +#define FALSE 0 +#define TRUE 1 +#endif + +#ifdef CYGDBG_HAL_DEBUG_GDB_THREAD_SUPPORT +#include <cyg/hal/dbg-threads-api.h> // dbg_currthread_id +#endif + +/* Given a trap value TRAP, return the corresponding signal. */ + +int __computeSignal (unsigned int trap_number) +{ + unsigned short curins, *pc; + switch (trap_number) { + case CYGNUM_HAL_VECTOR_WATCHDOG_TIMER: + pc = (unsigned short *)_hal_registers->pc; + curins = *pc; + if (curins == 0x0585) { + // "br *" - used for breakpoint + return SIGTRAP; + } else { + // Anything else - just ignore it happened + return 0; + } + case CYGNUM_HAL_VECTOR_NMI: + return SIGINT; + default: + return SIGTRAP; + } +} + + +/* Return the trap number corresponding to the last-taken trap. */ +int __get_trap_number (void) +{ + // The vector is not not part of the GDB register set so get it + // directly from the save context. + return _hal_registers->vector; +} + +/* Set the currently-saved pc register value to PC. */ + +void set_pc (target_register_t pc) +{ + put_register (PC, pc); +} + + +/*---------------------------------------------------------------------- + * Single-step support + */ + +/* Set things up so that the next user resume will execute one instruction. + This may be done by setting breakpoints or setting a single step flag + in the saved user registers, for example. */ + +static unsigned short *ss_saved_pc = 0; +static unsigned short ss_saved_instr[2]; +static int ss_saved_instr_size; + +#define FIXME() {diag_printf("FIXME - %s\n", __FUNCTION__); } + +static unsigned short * +next_pc(unsigned short *pc) +{ + unsigned short curins = *pc; + unsigned short *newpc = pc; + + switch ((curins & 0x0780) >> 7) { + case 0x0: + if ((curins & 0x60) == 0x60) { + int Rn = curins & 0x1F; + newpc = (unsigned short *)get_register(Rn); + } else { + newpc = pc+1; + } + break; + case 0x1: + case 0x2: + case 0x3: + case 0x4: + case 0x5: + // Arithmetic - no branch opcodes + newpc = pc+1; + break; + case 0x6: + case 0x7: + case 0x8: + case 0x9: + case 0xA: + // Load and store - no branch opcodes + newpc = pc+2; + break; + case 0xB: + // Conditional branch + if (1) { + unsigned long psw = get_register(PSW); +#define PSW_SAT 0x10 +#define PSW_CY 0x08 +#define PSW_OV 0x04 +#define PSW_S 0x02 +#define PSW_Z 0x01 + long disp = ((curins & 0xF800) >> 8) | ((curins & 0x70) >> 4); + int cc = curins & 0x0F; + int S = (psw & PSW_S) != 0; + int Z = (psw & PSW_Z) != 0; + int OV = (psw & PSW_OV) != 0; + int CY = (psw & PSW_CY) != 0; + int do_branch = 0; + if (curins & 0x8000) disp |= 0xFFFFFF00; + switch (cc) { + case 0x0: // BV + do_branch = (OV == 1); + break; + case 0x1: // BL + do_branch = (CY == 1); + break; + case 0x2: // BE + do_branch = (Z == 1); + break; + case 0x3: // BNH + do_branch = ((CY | Z) == 1); + break; + case 0x4: // BN + do_branch = (S == 1); + break; + case 0x5: // - always + do_branch = 1; + break; + case 0x6: // BLT + do_branch = ((S ^ OV) == 1); + break; + case 0x7: // BLE + do_branch = (((S ^ OV) | Z) == 1); + break; + case 0x8: // BNV + do_branch = (OV == 0); + break; + case 0x9: // BNL + do_branch = (CY == 0); + break; + case 0xA: // BNE + do_branch = (Z == 0); + break; + case 0xB: // BH + do_branch = ((CY | Z) == 0); + break; + case 0xC: // BP + do_branch = (S == 0); + break; + case 0xD: // BSA + do_branch = ((psw & PSW_SAT) != 0); + break; + case 0xE: // BGE + do_branch = ((S ^ OV) == 0); + break; + case 0xF: // BGT + do_branch = (((S ^ OV) | Z) == 0); + break; + } + if (do_branch) { + newpc = pc + disp; + } else { + newpc = pc + 1; + } + } + break; + case 0xC: + case 0xD: + case 0xE: + // Arithmetic & load/store - no branch opcodes + newpc = pc+2; + break; + case 0xF: + if ((curins & 0x60) >= 0x40) { + // Bitfield and extended instructions - no branch opcodes + newpc = pc+2; + } else { + // JR/JARL + long disp = ((curins & 0x3F) << 16) | *(pc+1); + if (curins & 0x20) disp |= 0xFFC00000; + newpc = pc + (disp>>1); + } + } + return newpc; +} + +void __single_step (void) +{ + unsigned short *pc = (unsigned short *)get_register(PC); + unsigned short *break_pc; + unsigned short _breakpoint[] = {0x07E0, 0x0780}; + unsigned short *breakpoint = _breakpoint; + // If the current instruction is a branch, decide if the branch will + // be taken to determine where to set the breakpoint. + break_pc = next_pc(pc); + // Now see what kind of breakpoint can be used. + // Note: since this is a single step, always use the 32 bit version. + ss_saved_pc = break_pc; + ss_saved_instr_size = 2; + ss_saved_instr[0] = *break_pc; + *break_pc++ = *breakpoint++; + ss_saved_instr[1] = *break_pc; + *break_pc++ = *breakpoint++; +} + +/* Clear the single-step state. */ + +void __clear_single_step (void) +{ + unsigned short *pc, *val; + int i; + if (ss_saved_instr_size != 0) { + pc = ss_saved_pc; + val = ss_saved_instr; + for (i = 0; i < ss_saved_instr_size; i++) { + *pc++ = *val++; + } + ss_saved_instr_size = 0; + } +} + +#if !defined(CYGPKG_CYGMON) +void __install_breakpoints (void) +{ +// FIXME(); +} + +void __clear_breakpoints (void) +{ +// FIXME(); +} +#endif // !CYGPKG_CYGMON + +/* If the breakpoint we hit is in the breakpoint() instruction, return a + non-zero value. */ + +int +__is_breakpoint_function () +{ + return get_register (PC) == (target_register_t)&CYG_LABEL_NAME(breakinst); +} + + +/* Skip the current instruction. Since this is only called by the + stub when the PC points to a breakpoint or trap instruction, +*/ + +void __skipinst (void) +{ + unsigned short *pc = (unsigned short *)get_register(PC); + pc = next_pc(pc); + put_register(PC, (unsigned long)pc); +} + + +#endif // CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
new file mode 100644 --- /dev/null +++ b/packages/hal/v85x/v850/current/src/v85x_v850.ld @@ -0,0 +1,124 @@ +//============================================================================= +// +// MLT linker script for NEC +// adapted from packages/hal/arm/pid/v1_1/src/pid.ld +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= + +#include <pkgconf/system.h> + +STARTUP(vectors.o) +ENTRY(reset_vector) +#ifdef EXTRAS +INPUT(extras.o) +#endif +GROUP(libtarget.a libgcc.a) + +#define ALIGN_LMA 4 +#define FOLLOWING(_section_) AT ((LOADADDR (_section_) + SIZEOF (_section_) + ALIGN_LMA - 1) & ~ (ALIGN_LMA - 1)) +#define LMA_EQ_VMA +#define FORCE_OUTPUT . = . + +#define SECTIONS_BEGIN \ + /* Debug information */ \ + .debug_aranges 0 : { *(.debug_aranges) } \ + .debug_pubnames 0 : { *(.debug_pubnames) } \ + .debug_info 0 : { *(.debug_info) } \ + .debug_abbrev 0 : { *(.debug_abbrev) } \ + .debug_line 0 : { *(.debug_line) } \ + .debug_frame 0 : { *(.debug_frame) } \ + .debug_str 0 : { *(.debug_str) } \ + .debug_loc 0 : { *(.debug_loc) } \ + .debug_macinfo 0 : { *(.debug_macinfo) } + +#define SECTION_rom_vectors(_region_, _vma_, _lma_) \ + .rom_vectors _vma_ : _lma_ \ + { FORCE_OUTPUT; KEEP (*(.vectors)) } \ + > _region_ + +#define SECTION_text(_region_, _vma_, _lma_) \ + .text _vma_ : _lma_ \ + { stext = ABSOLUTE(.); \ + PROVIDE (__stext = ABSOLUTE(.)); \ + *(.text*) *(.gnu.warning) *(.gnu.linkonce*) *(.init) \ + *(.glue_7) *(.glue_7t) \ + } > _region_ \ + etext = .; PROVIDE (__etext = .); + +#define SECTION_fini(_region_, _vma_, _lma_) \ + .fini _vma_ : _lma_ \ + { FORCE_OUTPUT; *(.fini) } \ + > _region_ + +#define SECTION_rodata(_region_, _vma_, _lma_) \ + .rodata _vma_ : _lma_ \ + { FORCE_OUTPUT; *(.rodata*) } \ + > _region_ + +#define SECTION_rodata1(_region_, _vma_, _lma_) \ + .rodata1 _vma_ : _lma_ \ + { FORCE_OUTPUT; *(.rodata1) } \ + > _region_ + +#define SECTION_fixup(_region_, _vma_, _lma_) \ + .fixup _vma_ : _lma_ \ + { FORCE_OUTPUT; *(.fixup) } \ + > _region_ + +#define SECTION_gcc_except_table(_region_, _vma_, _lma_) \ + .gcc_except_table _vma_ : _lma_ \ + { FORCE_OUTPUT; *(.gcc_except_table) } \ + > _region_ + +#define SECTION_data(_region_, _vma_, _lma_) \ + .data _vma_ : _lma_ \ + { ___ram_data_start = ABSOLUTE (.); *(.data*) *(.data1); \ + _GOT1_START_ = ABSOLUTE (.); *(.got1) _GOT1_END_ = ABSOLUTE (.); \ + _GOT2_START_ = ABSOLUTE (.); *(.got2) _GOT2_END_ = ABSOLUTE (.); \ + . = ALIGN (4); \ + ___DEVTAB__ = ABSOLUTE (.); KEEP (*(SORT (.devtab*))) ___DEVTAB_END__ = ABSOLUTE (.); \ + ___NETDEVTAB__ = ABSOLUTE (.); KEEP (*(SORT (.netdevtab*))) ___NETDEVTAB_END__ = ABSOLUTE (.); \ + ___CTOR_LIST__ = ABSOLUTE (.); KEEP (*(SORT (.ctors*))) ___CTOR_END__ = ABSOLUTE (.); \ + ___DTOR_LIST__ = ABSOLUTE (.); KEEP (*(SORT (.dtors*))) ___DTOR_END__ = ABSOLUTE (.); \ + *(.dynamic) *(.sdata*) *(.sbss*) } \ + > _region_ \ + ___rom_data_start = LOADADDR (.data); \ + ___ram_data_end = .; PROVIDE (___ram_data_end = .); _edata = .; PROVIDE (edata = .); \ + PROVIDE (___rom_data_end = LOADADDR (.data) + SIZEOF(.data)); + +#define SECTION_bss(_region_, _vma_, _lma_) \ + .bss _vma_ : _lma_ \ + { ___bss_start = ABSOLUTE (.); \ + *(.scommon) *(.dynbss) *(.bss*) *(COMMON) \ + ___bss_end = ABSOLUTE (.); } \ + > _region_ + +#include <cyg/hal/plf_sections.h> + +#include <pkgconf/hal_v85x.h> +#include <pkgconf/hal_v85x_v850.h> +#include CYGHWR_MEMORY_LAYOUT_LDI
--- a/packages/io/serial/current/ChangeLog +++ b/packages/io/serial/current/ChangeLog @@ -1,3 +1,7 @@ +2000-05-28 Gary Thomas <gthomas@redhat.com> + + * tests/ser_test_protocol.inl: Rename NEC V85x drivers. + 2000-05-08 Jesper Skov <jskov@redhat.com> * cdl/io_serial.cdl: active_if CYGPKG_IO
--- a/packages/io/serial/current/tests/ser_test_protocol.inl +++ b/packages/io/serial/current/tests/ser_test_protocol.inl @@ -205,6 +205,15 @@ # define TEST_TTY_DEV CYGDAT_IO_SERIAL_TTY_TTY0_DEV # endif #endif +#if defined(CYGPKG_HAL_V85X_V850) \ + && defined(CYGPKG_IO_SERIAL_V85X_V850) \ + && defined(CYGPKG_IO_SERIAL_V85X_V850_SERIAL0) +# define TEST_CRASH_ID "v85x/v850" +# define TEST_SER_DEV CYGDAT_IO_SERIAL_V85X_V850_SERIAL0_NAME +# if defined(CYGPKG_IO_SERIAL_TTY_TTY0) +# define TEST_TTY_DEV CYGDAT_IO_SERIAL_TTY_TTY0_DEV +# endif +#endif // We can't rely on haldiag for ser_filter detection - it may not define // a working character reading function.
--- a/packages/kernel/current/ChangeLog +++ b/packages/kernel/current/ChangeLog @@ -1,3 +1,8 @@ +2000-05-30 Gary Thomas <gthomas@redhat.com> + + * tests/dhrystone.c: Increase number of test loops for faster + StrongARM platforms. + 2000-05-15 Jonathan Larmour <jlarmour@redhat.co.uk> * cdl/counters.cdl (CYGVAR_KERNEL_COUNTERS_CLOCK_DSR_LATENCY):
--- a/packages/kernel/current/tests/dhrystone.c +++ b/packages/kernel/current/tests/dhrystone.c @@ -62,6 +62,8 @@ dtime(void) // Number of loops to run. #if defined(CYGPKG_HAL_ARM_AEB) || defined(CYGPKG_HAL_ARM_PID) #define PASSES 100000 +#elif defined(CYGPKG_HAL_ARM_EBSA285) +#define PASSES 1000000 #elif defined(CYGPKG_HAL_ARM_CMA230) #define PASSES 100000 #elif defined(CYGPKG_HAL_POWERPC_MPC8xx)