Mercurial > ecos
changeset 1281:f58b62f3c85d
Apply Yoshinori Sato's H8/300 patches plus a few of my own.
See the individual ChangeLogs for detail of the changes in each
package.
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line diff
--- a/packages/ChangeLog +++ b/packages/ChangeLog @@ -97,6 +97,12 @@ 2003-03-18 Mark Salter <msalter@redhat * ecos.db: Add support for XScale IXP425, IXDP425, GRG. +2003-03-09 Yoshinori Sato <ysato@users.sourceforge.jp> + + * ecos.db: New variant H8S (H8/300 architecture) + New platform H8MAX (H8/300H) + New platform EDOSK-2674 (H8S) + 2003-03-05 John Dallaway <jld@ecoscentric.com> * ecosadmin.tcl: Prevent calls to 'cygpath' with an empty
--- a/packages/devs/eth/h8300/aki3068net/current/ChangeLog +++ b/packages/devs/eth/h8300/aki3068net/current/ChangeLog @@ -1,3 +1,6 @@ +2002-12-10 Yoshinori Sato <ysato@users.sourceforge.jp> + * include/devs_eth_h8300_aki3068net.inl: interrupt no fix. + 2002-08-14 Yoshinori Sato <qzb04471@nifty.ne.jp> 2002-08-14 Jonathan Larmour <jifl@ecoscentric.com>
--- a/packages/devs/eth/h8300/aki3068net/current/include/devs_eth_h8300_aki3068net.inl +++ b/packages/devs/eth/h8300/aki3068net/current/include/devs_eth_h8300_aki3068net.inl @@ -58,7 +58,7 @@ static dp83902a_priv_data_t dp83902a_eth0_priv_data = { base: 0x200000, - interrupt: 16, + interrupt: 17, tx_buf1: 0x40, tx_buf2: 0x48, rx_buf_start: 0x50,
new file mode 100644 --- /dev/null +++ b/packages/devs/eth/h8300/edosk2674/current/ChangeLog @@ -0,0 +1,39 @@ +2003-02-26 Yoshinori Sato <ysato@users.sourceforge.jp> + + * Initial version of support for LAN91CXX ethernet controller + on the HMSE EDOSK-2674R board. + +//=========================================================================== +//####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT ANY +// WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License along +// with eCos; if not, write to the Free Software Foundation, Inc., +// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +// +// As a special exception, if other files instantiate templates or use macros +// or inline functions from this file, or you compile this file and link it +// with other works to produce a work based on this file, this file does not +// by itself cause the resulting work to be covered by the GNU General Public +// License. However the source code for this file must still be made available +// in accordance with section (3) of the GNU General Public License. +// +// This exception does not invalidate any other reasons why a work based on +// this file might be covered by the GNU General Public License. +// +// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +// at http://sources.redhat.com/ecos/ecos-license/ +// ------------------------------------------- +//####ECOSGPLCOPYRIGHTEND#### +//===========================================================================
new file mode 100644 --- /dev/null +++ b/packages/devs/eth/h8300/edosk2674/current/cdl/h8300_edosk2674_eth_drivers.cdl @@ -0,0 +1,113 @@ +# ==================================================================== +# +# edosk2674_eth_drivers.cdl +# +# Ethernet drivers - support for LAN91CXX ethernet controller +# on the EDOSK-2674R board. +# +# ==================================================================== +#####ECOSGPLCOPYRIGHTBEGIN#### +## ------------------------------------------- +## This file is part of eCos, the Embedded Configurable Operating System. +## Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +## +## eCos is free software; you can redistribute it and/or modify it under +## the terms of the GNU General Public License as published by the Free +## Software Foundation; either version 2 or (at your option) any later version. +## +## eCos is distributed in the hope that it will be useful, but WITHOUT ANY +## WARRANTY; without even the implied warranty of MERCHANTABILITY or +## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +## for more details. +## +## You should have received a copy of the GNU General Public License along +## with eCos; if not, write to the Free Software Foundation, Inc., +## 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +## +## As a special exception, if other files instantiate templates or use macros +## or inline functions from this file, or you compile this file and link it +## with other works to produce a work based on this file, this file does not +## by itself cause the resulting work to be covered by the GNU General Public +## License. However the source code for this file must still be made available +## in accordance with section (3) of the GNU General Public License. +## +## This exception does not invalidate any other reasons why a work based on +## this file might be covered by the GNU General Public License. +## +## Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +## at http://sources.redhat.com/ecos/ecos-license/ +## ------------------------------------------- +#####ECOSGPLCOPYRIGHTEND#### +# ==================================================================== +######DESCRIPTIONBEGIN#### +# +# Author(s): yoshinori sato +# Contributors: yoshinori sato +# Date: 2003-02-26 +# +#####DESCRIPTIONEND#### +# +# ==================================================================== + +cdl_package CYGPKG_DEVS_ETH_H8300_EDOSK2674 { + + display "EDOSK-2674R SMC91C96 ethernet driver" + + parent CYGPKG_IO_ETH_DRIVERS + active_if CYGPKG_IO_ETH_DRIVERS + active_if CYGPKG_HAL_H8300_H8S_EDOSK2674 + + implements CYGHWR_NET_DRIVERS + implements CYGHWR_NET_DRIVER_ETH0 + implements CYGINT_DEVS_ETH_SMSC_LAN91CXX_REQUIRED + implements CYGSEM_DEVS_ETH_SMSC_LAN91CXX_8_BIT + + description "Ethernet driver for EDOSK-2674R boards." + + include_dir cyg/io + + define_proc { + puts $::cdl_system_header "/***** ethernet driver proc output start *****/" + puts $::cdl_system_header "#define CYGDAT_DEVS_ETH_SMSC_LAN91CXX_INL <cyg/io/devs_eth_edosk2674.inl>" + puts $::cdl_system_header "#define CYGDAT_DEVS_ETH_SMSC_LAN91CXX_CFG <pkgconf/devs_eth_h8300_edosk2674.h>" + puts $::cdl_system_header "/***** ethernet driver proc output end *****/" + } + + # Arguably this should do in the generic package + # but then there is a logic loop so you can never enable it. + + cdl_interface CYGINT_DEVS_ETH_SMSC_LAN91CXX_REQUIRED { + display "SMSC LAN91CXX driver required" + } + + cdl_option CYGDAT_DEVS_ETH_H8300_EDOSK2674_NAME { + display "Device name for the ethernet driver" + flavor data + default_value {"\"eth0\""} + description " + This option sets the name of the ethernet device for the + ethernet port." + } + + cdl_option CYGDAT_DEVS_ETH_H8300_EDOSK2674_ESA { + display "The ethernet station address (MAC)" + flavor data + default_value {"{0x12, 0x13, 0x14, 0x15, 0x16, 0x17}"} + description "A static ethernet station address. + Caution: Booting two systems with the same MAC on the same + network, will cause severe conflicts." + active_if !CYGSEM_DEVS_ETH_ARM_FLEXANET_REDBOOT_ESA + } + + cdl_option CYGSEM_DEVS_ETH_H8300_EDOSK2674_ETH0_SET_ESA { + display "Use the RedBoot ESA (MAC address)" + default_value 0 + flavor bool + description " + Use the ESA that is stored as a RedBoot variable instead of + a static ESA." + } + +} + +# EOF flexanet_eth_drivers.cdl
new file mode 100644 --- /dev/null +++ b/packages/devs/eth/h8300/edosk2674/current/include/devs_eth_edosk2674.inl @@ -0,0 +1,88 @@ +//========================================================================== +// +// devs/eth/h8300/edosk2674/...../include/devs_eth_edosk2674.inl +// +// EDOSK-2674R ethernet I/O definitions. +// +//========================================================================== +//####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT ANY +// WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License along +// with eCos; if not, write to the Free Software Foundation, Inc., +// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +// +// As a special exception, if other files instantiate templates or use macros +// or inline functions from this file, or you compile this file and link it +// with other works to produce a work based on this file, this file does not +// by itself cause the resulting work to be covered by the GNU General Public +// License. However the source code for this file must still be made available +// in accordance with section (3) of the GNU General Public License. +// +// This exception does not invalidate any other reasons why a work based on +// this file might be covered by the GNU General Public License. +// +// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +// at http://sources.redhat.com/ecos/ecos-license/ +// ------------------------------------------- +//####ECOSGPLCOPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): Yoshinori Sato <ysato@users.sourceforge.jp> +// Contributors: ysato +// Date: 2003-02-25 +// Purpose: EDOSK-2674R ethernet definitions +//####DESCRIPTIONEND#### +//========================================================================== + +#include <pkgconf/system.h> +#include <pkgconf/devs_eth_h8300_edosk2674.h> +#include <cyg/hal/hal_intr.h> + +// MAC address is stored as a Redboot config option +#ifdef CYGPKG_REDBOOT +#include <pkgconf/redboot.h> +#endif + +static lan91cxx_priv_data lan91cxx_eth0_priv_data = { +#ifdef CYGSEM_DEVS_ETH_H8300_EDOSK2674_ETH0_SET_ESA + enaddr : CYGDAT_DEVS_ETH_H8300_EDOSK2674_ESA, +#endif + base : (unsigned short *)0xf80000, + interrupt : 12 +}; + +ETH_DRV_SC(lan91cxx_sc, + &lan91cxx_eth0_priv_data, // Driver specific data + CYGDAT_DEVS_ETH_H8300_EDOSK2674_NAME, // Name for device + lan91cxx_start, + lan91cxx_stop, + lan91cxx_control, + lan91cxx_can_send, + lan91cxx_send, + lan91cxx_recv, + lan91cxx_deliver, + lan91cxx_poll, + lan91cxx_int_vector +); + +NETDEVTAB_ENTRY(lan91cxx_netdev, + "lan91cxx_" CYGDAT_DEVS_ETH_H8300_EDOSK2674_NAME, + smsc_lan91cxx_init, + &lan91cxx_sc); + +//EOF devs_eth_flexanet.inl + +
new file mode 100644 --- /dev/null +++ b/packages/devs/eth/h8300/h8max/current/ChangeLog @@ -0,0 +1,42 @@ +2002-05-28 Jonathan Larmour <jlarmour@redhat.com> + + * src/if_aki3068net.c: Remove unused includes. + +2002-04-24 Yoshinori Sato <qzb04471@nifty.ne.jp> + + * New package. + +//=========================================================================== +//####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT ANY +// WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License along +// with eCos; if not, write to the Free Software Foundation, Inc., +// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +// +// As a special exception, if other files instantiate templates or use macros +// or inline functions from this file, or you compile this file and link it +// with other works to produce a work based on this file, this file does not +// by itself cause the resulting work to be covered by the GNU General Public +// License. However the source code for this file must still be made available +// in accordance with section (3) of the GNU General Public License. +// +// This exception does not invalidate any other reasons why a work based on +// this file might be covered by the GNU General Public License. +// +// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +// at http://sources.redhat.com/ecos/ecos-license/ +// ------------------------------------------- +//####ECOSGPLCOPYRIGHTEND#### +//===========================================================================
new file mode 100644 --- /dev/null +++ b/packages/devs/eth/h8300/h8max/current/cdl/h8300_h8max_eth_drivers.cdl @@ -0,0 +1,130 @@ +# ==================================================================== +# +# h8300_h8max_eth_drivers.cdl +# +# Ethernet drivers - support for DP83902A(RTL8019AS) +# ethernet controller on the H8MAX board. +# +# ==================================================================== +#####ECOSGPLCOPYRIGHTBEGIN#### +## ------------------------------------------- +## This file is part of eCos, the Embedded Configurable Operating System. +## Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +## +## eCos is free software; you can redistribute it and/or modify it under +## the terms of the GNU General Public License as published by the Free +## Software Foundation; either version 2 or (at your option) any later version. +## +## eCos is distributed in the hope that it will be useful, but WITHOUT ANY +## WARRANTY; without even the implied warranty of MERCHANTABILITY or +## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +## for more details. +## +## You should have received a copy of the GNU General Public License along +## with eCos; if not, write to the Free Software Foundation, Inc., +## 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +## +## As a special exception, if other files instantiate templates or use macros +## or inline functions from this file, or you compile this file and link it +## with other works to produce a work based on this file, this file does not +## by itself cause the resulting work to be covered by the GNU General Public +## License. However the source code for this file must still be made available +## in accordance with section (3) of the GNU General Public License. +## +## This exception does not invalidate any other reasons why a work based on +## this file might be covered by the GNU General Public License. +## +## Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +## at http://sources.redhat.com/ecos/ecos-license/ +## ------------------------------------------- +#####ECOSGPLCOPYRIGHTEND#### +# ==================================================================== +######DESCRIPTIONBEGIN#### +# +# Author(s): ysato +# Contributors: ysato +# Date: 2002-08-10 +# +#####DESCRIPTIONEND#### +# +# ==================================================================== + +cdl_package CYGPKG_DEVS_ETH_H8300_H8MAX { + display "H8MAX board ethernet driver" + description " + Ethernet driver for H8MAX" + + parent CYGPKG_IO_ETH_DRIVERS + active_if CYGPKG_IO_ETH_DRIVERS + active_if CYGPKG_HAL_H8300_H8300H_H8MAX + compile -library=libextras.a if_h8max.c + + include_dir cyg/io + + # FIXME: This really belongs in the NS DP83902A package + cdl_interface CYGINT_DEVS_ETH_NS_DP83902A_REQUIRED { + display "NS dp83902a ethernet driver required" + } + + define_proc { + puts $::cdl_system_header "/***** ethernet driver proc output start *****/" + puts $::cdl_system_header "#define CYGDAT_DEVS_ETH_NS_DP83902A_INL <cyg/io/devs_eth_h8300_h8max.inl>" + puts $::cdl_system_header "#define CYGDAT_DEVS_ETH_NS_DP83902A_CFG <pkgconf/devs_eth_h8300_h8max.h>" + puts $::cdl_system_header "/***** ethernet driver proc output end *****/" + } + + cdl_component CYGPKG_DEVS_ETH_H8300_H8MAX_ETH0 { + display "Ethernet port 0 driver" + flavor bool + default_value 1 + + implements CYGHWR_NET_DRIVERS + implements CYGHWR_NET_DRIVER_ETH0 + + implements CYGINT_DEVS_ETH_NS_DP83902A_REQUIRED + + cdl_option CYGDAT_DEVS_ETH_H8300_H8MAX_ETH0_NAME { + display "Device name for the ETH0 ethernet port 0 driver" + flavor data + default_value {"\"eth0\""} + description " + This option sets the name of the ethernet device for the + RTL8019AS ethernet port 0." + } + + cdl_component CYGSEM_DEVS_ETH_H8300_H8MAX_ETH0_SET_ESA { + display "Set the ethernet station address" + flavor bool + default_value 0 + description "Enabling this option will allow the ethernet + station address to be forced to the value set by the + configuration. This may be required if the hardware does + not include a serial EEPROM for the ESA." + + cdl_option CYGDAT_DEVS_ETH_H8300_H8MAX_ETH0_ESA { + display "The ethernet station address" + flavor data + default_value {"{0x08, 0x00, 0x00, 0x00, 0x00, 0x01}"} + description "The ethernet station address" + } + } + } + + cdl_component CYGPKG_DEVS_ETH_H8300_AKI3068NET_OPTIONS { + display "PCMCIA ethernet driver build options" + flavor none + no_define + + cdl_option CYGPKG_DEVS_ETH_CF_CFLAGS_ADD { + display "Additional compiler flags" + flavor data + no_define + default_value { "-D_KERNEL -D__ECOS" } + description " + This option modifies the set of compiler flags for + building the PCMCIA ethernet driver package. + These flags are used in addition + to the set of global flags." + } + } +}
new file mode 100644 --- /dev/null +++ b/packages/devs/eth/h8300/h8max/current/include/devs_eth_h8300_h8max.inl @@ -0,0 +1,101 @@ +//========================================================================== +// +// devs_eth_h8300_h8max.inl +// +// DP83902(RTL8019AS) ethernet I/O definitions. +// +//========================================================================== +//####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT ANY +// WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License along +// with eCos; if not, write to the Free Software Foundation, Inc., +// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +// +// As a special exception, if other files instantiate templates or use macros +// or inline functions from this file, or you compile this file and link it +// with other works to produce a work based on this file, this file does not +// by itself cause the resulting work to be covered by the GNU General Public +// License. However the source code for this file must still be made available +// in accordance with section (3) of the GNU General Public License. +// +// This exception does not invalidate any other reasons why a work based on +// this file might be covered by the GNU General Public License. +// +// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +// at http://sources.redhat.com/ecos/ecos-license/ +// ------------------------------------------- +//####ECOSGPLCOPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): Yoshinori Sato +// Contributors: Yoshinori Sato +// Date: 2002-08-10 +// Purpose: h8max ethernet defintions +//####DESCRIPTIONEND#### +//========================================================================== + +#include <cyg/hal/hal_intr.h> // CYGNUM_HAL_INTERRUPT_ETHR +#include <cyg/hal/hal_if.h> + +#define CYGHWR_NS_DP83902A_PLF_INIT ns_dp83902a_plf_init +#define CYGHWR_NS_DP83902A_PLF_16BIT_DATA +#define BIGEND +#define DELAY() +#define DP_IN(_b_, _o_, _d_) HAL_READ_UINT8 ((cyg_addrword_t)(_b_)+((_o_)<<1)+1, (_d_)) +#define DP_OUT(_b_, _o_, _d_) HAL_WRITE_UINT16((cyg_addrword_t)(_b_)+((_o_)<<1), (_d_)) + +#ifdef __WANT_DEVS + +#ifdef CYGPKG_DEVS_ETH_H8300_H8MAX_ETH0 + +static dp83902a_priv_data_t dp83902a_eth0_priv_data = { + base: 0x800600, + interrupt: 16, + tx_buf1: 0x40, + tx_buf2: 0x48, + rx_buf_start: 0x50, + rx_buf_end: 0x80, +#ifdef CYGSEM_DEVS_ETH_H8300_H8MAX_ETH0_SET_ESA + hardwired_esa: true, + mac_address: CYGDAT_DEVS_ETH_H8300_H8MAX_ETH0_ESA +#else + hardwired_esa: false, +#endif +}; + +ETH_DRV_SC(dp83902a_sc, + &dp83902a_eth0_priv_data, // Driver specific data + CYGDAT_DEVS_ETH_H8300_H8MAX_ETH0_NAME, + dp83902a_start, + dp83902a_stop, + dp83902a_control, + dp83902a_can_send, + dp83902a_send, + dp83902a_recv, + dp83902a_deliver, // "pseudoDSR" called from fast net thread + dp83902a_poll, // poll function, encapsulates ISR and DSR + dp83902a_int_vector); + +NETDEVTAB_ENTRY(dp83902a_netdev, + "dp83902a_" CYGDAT_DEVS_ETH_H8300_H8MAX_ETH0_NAME, + dp83902a_init, + &dp83902a_sc); + +void ns_dp83902a_plf_init(dp83902a_priv_data_t *dp); + +#endif // CYGPKG_DEVS_ETH_H8300_H8MAX_ETH0 +#endif +// EOF devs_eth_h8300_h8max.inl
new file mode 100644 --- /dev/null +++ b/packages/devs/eth/h8300/h8max/current/src/if_h8max.c @@ -0,0 +1,111 @@ +//========================================================================== +// +// if_h8max.c +// +// Ethernet device driver for H8MAX board +// +//========================================================================== +//####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT ANY +// WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License along +// with eCos; if not, write to the Free Software Foundation, Inc., +// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +// +// As a special exception, if other files instantiate templates or use macros +// or inline functions from this file, or you compile this file and link it +// with other works to produce a work based on this file, this file does not +// by itself cause the resulting work to be covered by the GNU General Public +// License. However the source code for this file must still be made available +// in accordance with section (3) of the GNU General Public License. +// +// This exception does not invalidate any other reasons why a work based on +// this file might be covered by the GNU General Public License. +// +// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +// at http://sources.redhat.com/ecos/ecos-license/ +// ------------------------------------------- +//####ECOSGPLCOPYRIGHTEND#### +//####BSDCOPYRIGHTBEGIN#### +// +// ------------------------------------------- +// +// Portions of this software may have been derived from OpenBSD or other sources, +// and are covered by the appropriate copyright disclaimers included herein. +// +// ------------------------------------------- +// +//####BSDCOPYRIGHTEND#### +//========================================================================== + +#include <pkgconf/system.h> +#include <cyg/infra/cyg_type.h> +#include <cyg/hal/hal_arch.h> +#include <cyg/infra/diag.h> +#include <cyg/hal/drv_api.h> +#include <cyg/io/eth/eth_drv.h> +#include <cyg/io/eth/netdev.h> + +#define DP_CARD_RESET 0x1f + +#include <cyg/io/dp83902a.h> + +void ns_dp83902a_plf_init(dp83902a_priv_data_t *dp) +{ + static struct { + unsigned short offset; + unsigned short data; + } init_data[] = { + {DP_DCR, 0x49}, // Wordwide access + {DP_RBCH, 0}, // Remote byte count + {DP_RBCL, 0}, + {DP_ISR, 0xFF}, // Clear any pending interrupts + {DP_IMR, 0x00}, // Mask all interrupts + {DP_RCR, 0x20}, // Monitor + {DP_TCR, 0x02}, // loopback + {DP_RBCH, 32/2}, // Remote byte count + {DP_RBCL, 0}, + {DP_RSAL, 0}, // Remote address + {DP_RSAH, 0}, + {DP_CR, DP_CR_START|DP_CR_RDMA} // Read data + }; + unsigned short prom[32]; + int cnt,tmp; + + HAL_READ_UINT8(dp->base+(DP_CARD_RESET<<1)+1, tmp); + HAL_WRITE_UINT16(dp->base+(DP_CARD_RESET<<1), tmp); + dp->data = dp->base+(DP_DATAPORT<<1); + // Wait for card + do { + int cnt; + DP_IN(dp->base, DP_ISR, tmp); + for (cnt=0; cnt< 1024; cnt++); + } while (0 == (tmp & DP_ISR_RESET)); + if (dp->hardwired_esa) + return ; + + for (cnt=0; cnt<sizeof(init_data)/sizeof(init_data[0]); cnt++) + DP_OUT(dp->base, init_data[cnt].offset, init_data[cnt].data); + for (cnt = 0; cnt < 32/2; cnt++) { + DP_IN_DATA(dp->data, prom[cnt]); + } + if ((prom[0] == 0xffff) && (prom[1] == 0xffff) && (prom[2] == 0xffff)) { + dp->base = 0; + return ; + } + DP_OUT(dp->base, DP_CR, DP_CR_NODMA | DP_CR_PAGE1); + for (cnt = 0; cnt < 6; cnt ++) { + DP_OUT(dp->base, DP_P1_PAR0+cnt, prom[cnt] >> 8); + } +}
--- a/packages/ecos.db +++ b/packages/ecos.db @@ -1645,6 +1645,22 @@ package CYGPKG_DEVS_ETH_H8300_AKI3068NET micom board." } +package CYGPKG_DEVS_ETH_H8300_H8MAX { + alias { "H8MAX Board ethernet driver" h8max_eth_drivers } + directory devs/eth/h8300/h8max + script h8300_h8max_eth_drivers.cdl + hardware + description "Ethernet drivers for H8MAX board." +} + +package CYGPKG_DEVS_ETH_H8300_EDOSK2674 { + alias { "EDOSK-2674R Board ethernet driver" edosk2674_eth_drivers } + directory devs/eth/h8300/edosk2674 + script h8300_edosk2674_eth_drivers.cdl + hardware + description "Ethernet drivers for EDOSK-2674R board." +} + package CYGPKG_DEVS_ETH_MCF5272 { alias { "MCF5272 Fast Ethernet Controller driver" mcf5272_eth_driver} hardware @@ -2662,7 +2678,7 @@ package CYGPKG_HAL_SH_SH7751_SE7751 { } # -------------------------------------------------------------------------- -# H8300 packages +# H8/300 packages package CYGPKG_HAL_H8300 { alias { "Hitachi H8300 common HAL" hal_h8300 h8300_hal} directory hal/h8300/arch @@ -2680,10 +2696,20 @@ package CYGPKG_HAL_H8300_H8300H { script hal_h8300_h8300h.cdl hardware description " -The H8300H HAL package provides the support needed to run eCos on a Hitachi +The H8/300H HAL package provides the support needed to run eCos on a Hitachi H8/300H processor." } +package CYGPKG_HAL_H8300_H8S { + alias { "Hitachi H8S variant HAL" hal_h8s h8300h_hal} + directory hal/h8300/h8s + script hal_h8300_h8s.cdl + hardware + description " +The H8S HAL package provides the support needed to run eCos on a Hitachi +H8S processor." +} + package CYGPKG_HAL_H8300_H8300H_SIM { alias { "H8/300H simulator" hal_h8300h_sim h8300h_sim_hal } directory hal/h8300/sim @@ -2703,10 +2729,43 @@ package CYGPKG_HAL_H8300_H8300H_AKI3068N script hal_h8300_h8300h_aki3068net.cdl hardware description " - The aki HAL package provides the support needed to run + The aki3068net HAL package provides the support needed to run eCos on a Akizuki H8/3068 Network micom board." } +package CYGPKG_HAL_H8300_H8300H_H8MAX { + alias { "H8MAX board" hal_h8300h_h8max h8300h_h8max_hal } + directory hal/h8300/h8max + script hal_h8300_h8300h_h8max.cdl + hardware + description " + The h8max HAL package provides the support needed to run + eCos on a H8MAX board." +} + +package CYGPKG_HAL_H8300_H8S_SIM { + alias { "H8S simulator" hal_h8s_sim h8s_sim_hal } + directory hal/h8300/sim_s + script hal_h8300_h8s_sim.cdl + hardware + description " + The minimal simulator HAL package is provided for use when + only a simple simulation of the processor architecture is + desired, as opposed to detailed simulation of any specific + board. In particular it is not possible to simulate any of + the I/O devices, so device drivers cannot be used." +} + +package CYGPKG_HAL_H8300_H8S_EDOSK2674 { + alias { "EDOSK-2674R board" hal_h8s_edosk2674 h8s_edosk2674_hal } + directory hal/h8300/edosk2674 + script hal_h8300_h8s_edosk2674.cdl + hardware + description " + The edosk2674 HAL package provides the support needed to run + eCos on a Hitachi Micro System Europe EDOSK-2674R Evalution board." +} + # ========================================================================== # -------------------------------------------------------------------------- # i386 packages @@ -4765,7 +4824,7 @@ target mcf5272c3 { # H8 targets target h8300h_sim { - alias { "H8300H minimal simulator" } + alias { "H8/300H minimal simulator" } packages { CYGPKG_HAL_H8300 CYGPKG_HAL_H8300_H8300H CYGPKG_HAL_H8300_H8300H_SIM @@ -4778,6 +4837,20 @@ target h8300h_sim { is running in this mode." } +target h8s_sim { + alias { "H8S minimal simulator" } + packages { CYGPKG_HAL_H8300 + CYGPKG_HAL_H8300_H8S + CYGPKG_HAL_H8300_H8S_SIM + CYGPKG_IO_SERIAL_H8300_SCI + } + description " + The h8300h_sim target provides the packages need to run + eCos in the H8/300H minimal simulator. It is not possible to + use any of the eCos device drivers when the simulator + is running in this mode." +} + target aki3068net { alias { "Akizuki H8/3068 Network board" } packages { CYGPKG_HAL_H8300 @@ -4785,12 +4858,40 @@ target aki3068net { CYGPKG_HAL_H8300_H8300H_AKI3068NET CYGPKG_IO_SERIAL_H8300_SCI CYGPKG_DEVS_ETH_H8300_AKI3068NET + CYGPKG_DEVICES_WATCHDOG_H8300_H8300H } description " The aki3068net target provides the packages need to run eCos in the Akizuki H8/3068 Network board." } +target h8max { + alias { "H8MAX" } + packages { CYGPKG_HAL_H8300 + CYGPKG_HAL_H8300_H8300H + CYGPKG_HAL_H8300_H8300H_H8MAX + CYGPKG_IO_SERIAL_H8300_SCI + CYGPKG_DEVS_ETH_H8300_H8MAX + CYGPKG_DEVICES_WATCHDOG_H8300_H8300H + } + description " + The h8max target provides the packages need to run + eCos in the strawberry-linux.com H8MAX board." +} + +target edosk2674 { + alias { "EDOSK-2674R" } + packages { CYGPKG_HAL_H8300 + CYGPKG_HAL_H8300_H8S + CYGPKG_HAL_H8300_H8S_EDOSK2674 + CYGPKG_IO_SERIAL_H8300_SCI + CYGPKG_DEVS_ETH_H8300_EDOSK2674 + } + description " + The h8max target provides the packages need to run + eCos in the Hitachi Micro System Europe EDOSK-2674R Evalution board." +} + # -------------------------------------------------------------------------- # CalmRISC16 targets
--- a/packages/hal/h8300/aki3068net/current/ChangeLog +++ b/packages/hal/h8300/aki3068net/current/ChangeLog @@ -6,6 +6,53 @@ 2003-07-18 Nick Garnett <nickg@balti.c "default_value" from "calculated". This makes it easier to change these values globally. +2003-03-09 Yoshinori Sato <ysato@users.sourceforge.jp> + + * cdl/hal_h8300_h8300h_aki3068net.cdl + * src/hal_diag.c + CYGHAL_PLF_SCI_BASE add. + +2003-02-28 Yoshinori Sato <ysato@users.sourceforge.jp> + + * cdl/hal_h8300_h8300h_aki3068net.cdl + * src/plf_ide.c + * include/plf_io.h + * include/platform.inc + IDE I/F Support. + +2003-01-29 Yoshinori Sato <ysato@users.sourceforge.jp> + + * include/platform.inc + DRAM setup delay fix. + +2002-11-26 Yoshinori Sato <ysato@users.sourceforge.jp> + + * include/platform.inc + Buscontroler setting tuneing. + * cdl/hal_h8300_h8300h_aki3068net.cdl + CYGBLD_GLOBAL_LDFLAGS option "-mint32" add. + * include/plf_intr.h + delay_us scale fix. + * src/delay_us.S + timing tune. + +2002-10-15 Yoshinori Sato <ysato@users.sourceforge.jp> + + * include/pkgconf/mlt_h8300_h8300h_aki3068net_rom.ldi + typo fixed. + +2002-10-15 Yoshinori Sato <ysato@users.sourceforge.jp> + + * cdl/hal_h8300_h8300h_aki3068net.cdl + CYGSEM_HAL_H8300_VECTOR_HOOK,CYGHWR_HAL_H8300_VECTOR_ADDRESS add. + * include/pkgconf/mlt_h8300_h8300h_aki3068net_ram.cdl + typo fixed. + +2002-05-31 Yoshinori Sato <ysato@users.sourceforge.jp> + + * src/hal_diag.c + delete hal_delay_us function. + 2002-04-29 Jonathan Larmour <jlarmour@redhat.com> * src/delay_us.S:
--- a/packages/hal/h8300/aki3068net/current/cdl/hal_h8300_h8300h_aki3068net.cdl +++ b/packages/hal/h8300/aki3068net/current/cdl/hal_h8300_h8300h_aki3068net.cdl @@ -40,10 +40,10 @@ # ==================================================================== ######DESCRIPTIONBEGIN#### # -# Author(s): jskov +# Author(s): yoshinori sato # Original data: bartv -# Contributors: -# Date: 1999-11-02 +# Contributors: yoshinori sato +# Date: 2002-04-10 # #####DESCRIPTIONEND#### # @@ -62,11 +62,12 @@ cdl_package CYGPKG_HAL_H8300_H8300H_AKI3 The aki HAL package provides the support needed to run eCos on a Akizuki H8/3068 Network micom board." - compile hal_diag.c plf_misc.c delay_us.S + compile hal_diag.c plf_misc.c delay_us.S plf_ide.c define_proc { puts $::cdl_system_header "#define CYGBLD_HAL_TARGET_H <pkgconf/hal_h8300_h8300h.h>" puts $::cdl_system_header "#define CYGBLD_HAL_PLATFORM_H <pkgconf/hal_h8300_h8300h_aki3068net.h>" + puts $::cdl_system_header "#define CYGBLD_HAL_PLATFORM_IO_H <cyg/hal/plf_io.h>" puts $::cdl_header "#define CYG_HAL_H8300" puts $::cdl_header "#define CYGNUM_HAL_H8300_SCI_PORTS 1" @@ -80,7 +81,7 @@ cdl_package CYGPKG_HAL_H8300_H8300H_AKI3 display "Startup type" flavor data legal_values {"ROM" "RAM"} - default_value {"ROM"} + default_value {"RAM"} no_define define -file system.h CYG_HAL_STARTUP description " @@ -162,6 +163,12 @@ cdl_package CYGPKG_HAL_H8300_H8300H_AKI3 default_value 1 } + cdl_option CYGHWR_HAL_AKI3068NET_IDE { + display "IDE I/F expand" + flavor bool + default_value 0 + } + cdl_component CYGBLD_GLOBAL_OPTIONS { display "Global build options" flavor none @@ -197,11 +204,32 @@ cdl_package CYGPKG_HAL_H8300_H8300H_AKI3 display "Global linker flags" flavor data no_define - default_value { "-g -nostdlib -Wl,--gc-sections -Wl,-static -mh" } + default_value { "-g -nostdlib -Wl,--gc-sections -Wl,-static -mh -mint32" } description " This option controls the global linker flags. Individual packages may define options which override these global flags." } + cdl_option CYGBLD_BUILD_GDB_STUBS { + display "Build GDB stub ROM image" + default_value 0 + requires CYGSEM_HAL_ROM_MONITOR + requires CYGBLD_BUILD_COMMON_GDB_STUBS + requires CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + requires CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT + requires CYGDBG_HAL_DEBUG_GDB_THREAD_SUPPORT + no_define + description " + This option enables the building of the GDB stubs for the + board. The common HAL controls takes care of most of the + build process, but the final conversion from ELF image to + binary data is handled by the platform CDL, allowing + relocation of the data if necessary." + + make -priority 320 { + <PREFIX>/bin/gdb_module.bin : <PREFIX>/bin/gdb_module.img + $(OBJCOPY) -O binary $< $@ + } + } } cdl_component CYGHWR_MEMORY_LAYOUT { @@ -229,6 +257,36 @@ cdl_package CYGPKG_HAL_H8300_H8300H_AKI3 "<pkgconf/mlt_h8300_h8300h_aki3068net_rom.h>" } } } + + cdl_component CYGHWR_AKI3068NET_IDE_OPTIONS { + display "IDE Expand Setting" + flavor none + parent CYGPKG_NONE + active_if CYGHWR_HAL_AKI3068NET_IDE + implements CYGINT_HAL_PLF_IF_IDE + description " + IDE Expand Hardware Setting." + + cdl_option CYGHWR_HAL_IDE_REGISTER { + display "IDE Register base address" + flavor data + default_value 0x600000 + } + + cdl_option CYGHWR_HAL_IDE_ALT_REGS { + display "IDE AlternateRegister base address" + flavor data + default_value 0x600020 + } + + cdl_option CYGHWR_HAL_IDE_BUSWIDTH { + display "IDE bus width" + flavor data + legal_values {8 16} + default_value 8 + } + } + cdl_option CYGSEM_HAL_ROM_MONITOR { display "Behave as a ROM monitor" flavor bool @@ -242,4 +300,28 @@ cdl_package CYGPKG_HAL_H8300_H8300H_AKI3 application. This enables features such as utilizing a separate interrupt stack when exceptions are generated." } + cdl_option CYGSEM_HAL_H8300_VECTOR_HOOK { + display "Interrupt Vector Hook" + flavor bool + default_value 1 + parent CYGPKG_HAL_ROM_MONITOR + description " + Interrupt Vector Table Hooking Support" + } + cdl_option CYGHWR_HAL_H8300_VECTOR_ADDRESS { + display "Hook Vector Address" + flavor data + default_value 0xffbf20 + parent CYGPKG_HAL_ROM_MONITOR + requires { CYGSEM_HAL_H8300_VECTOR_HOOK == 1 } + description " + Hooking Vector Table Address" + } + cdl_option CYGHAL_PLF_SCI_BASE { + display "SCI Base address" + flavor data + default_value 0xffffb8 + description " + Used SCI Channel base address." + } }
--- a/packages/hal/h8300/aki3068net/current/include/pkgconf/mlt_h8300_h8300h_aki3068net_ram.ldi +++ b/packages/hal/h8300/aki3068net/current/include/pkgconf/mlt_h8300_h8300h_aki3068net_ram.ldi @@ -9,7 +9,8 @@ OUTPUT_ARCH(h8300h) MEMORY { - ram : ORIGIN = 0x400000, LENGTH = 0x20000 + ram : ORIGIN = 0x400000, LENGTH = 0x28000 + iram : ORIGIN = 0xffbf20, LENGTH = 0x4000-0x100 } SECTIONS @@ -21,10 +22,8 @@ SECTIONS SECTION_rodata1 (ram, ALIGN (0x1), LMA_EQ_VMA) SECTION_fixup (ram, ALIGN (0x1), LMA_EQ_VMA) SECTION_gcc_except_table (ram, ALIGN (0x1), LMA_EQ_VMA) - SECTION_int_fook_table (ram, ALIGN (0x4), LMA_EQ_VMA) SECTION_data (ram, ALIGN (0x4),LMA_EQ_VMA) SECTION_bss (ram, ALIGN (0x4),LMA_EQ_VMA) + SECTION_int_hook_table (iram, CYGHWR_HAL_H8300_VECTOR_ADDRESS, FOLLOWING (.data)) SECTIONS_END } - -fook_table_address = 0xffbf20;
--- a/packages/hal/h8300/aki3068net/current/include/pkgconf/mlt_h8300_h8300h_aki3068net_ram.mlt +++ b/packages/hal/h8300/aki3068net/current/include/pkgconf/mlt_h8300_h8300h_aki3068net_ram.mlt @@ -1,11 +1,11 @@ version 0 -region ram 400000 10000 0 ! +region ram 400000 28000 0 ! section text 0 1 0 1 0 1 0 1 400000 400000 fini fini ! section fini 0 1 0 1 0 1 0 1 rodata rodata ! section rodata 0 1 0 1 0 1 0 1 rodata1 rodata1 ! section rodata1 0 1 0 1 0 1 0 1 fixup fixup ! section fixup 0 1 0 1 0 1 0 1 gcc_except_table gcc_except_table ! -section gcc_except_table 0 1 0 1 0 1 0 1 int_fook_table int_fook_table ! +section gcc_except_table 0 1 0 1 0 1 0 1 int_fook_table int_hook_table ! section int_fook_table 0 1 0 1 0 1 0 1 data data ! section data 0 4 0 1 0 1 0 1 bss bss ! section bss 0 4 0 1 0 1 0 0 !
--- a/packages/hal/h8300/aki3068net/current/include/pkgconf/mlt_h8300_h8300h_aki3068net_rom.ldi +++ b/packages/hal/h8300/aki3068net/current/include/pkgconf/mlt_h8300_h8300h_aki3068net_rom.ldi @@ -9,12 +9,15 @@ OUTPUT_ARCH(h8300h) MEMORY { +#define IRAM_TOP 0xffbf20 rom : ORIGIN = 0x000000, LENGTH = 0x60000 #if !defined(CYGPKG_IO_ETH_DRIVERS) - ram : ORIGIN = 0xffbf20, LENGTH = 0x4000-0x100 +#define WORK (IRAM_TOP+0x100) + ram : ORIGIN = WORK, LENGTH = 0x4000-0x100 #else - ram : ORIGIN = 0x5F4000, LENGTH = 0xC000 - iram : ORIGIN = 0xffbf20, LENGTH = 0x4000-0x100 +#define WORK 0x5f4000 + ram : ORIGIN = WORK, LENGTH = 0xC000 + iram : ORIGIN = IRAM_TOP, LENGTH = 0x4000-0x100 #endif } @@ -28,14 +31,14 @@ SECTIONS SECTION_rodata1 (rom, ALIGN (0x1), LMA_EQ_VMA) SECTION_fixup (rom, ALIGN (0x1), LMA_EQ_VMA) SECTION_gcc_except_table (rom, ALIGN (0x1), LMA_EQ_VMA) + SECTION_data (ram, WORK, FOLLOWING (.gcc_except_table)) + SECTION_bss (ram, ALIGN (0x4), LMA_EQ_VMA) #if !defined(CYGPKG_IO_ETH_DRIVERS) - SECTION_int_fook_table (ram, 0xffbf20,FOLLOWING (.gcc_except_table)) - SECTION_data (ram, ALIGN (0x4),FOLLOWING (.int_fook_table)) - SECTION_bss (ram, ALIGN (0x4),LMA_EQ_VMA) + SECTION_int_hook_table (ram, CYGHWR_HAL_H8300_VECTOR_ADDRESS,FOLLOWING (.data)) #else - SECTION_data (ram, 0x5F4000,FOLLOWING (.gcc_except_table)) - SECTION_bss (ram, ALIGN (0x4),LMA_EQ_VMA) - SECTION_int_fook_table (iram, 0xffbf20,FOLLOWING (.data)) + SECTION_int_hook_table (iram, CYGHWR_HAL_H8300_VECTOR_ADDRESS,FOLLOWING (.data)) #endif SECTIONS_END } + +#undef WORK
--- a/packages/hal/h8300/aki3068net/current/include/platform.inc +++ b/packages/hal/h8300/aki3068net/current/include/platform.inc @@ -42,9 +42,9 @@ ##============================================================================= #######DESCRIPTIONBEGIN#### ## -## Author(s): jlarmour +## Author(s): Yoshinori Saro ## Contributors: Yoshinori Sato -## Date: 1999-09-09 +## Date: 2002-04-06 ## Purpose: AKI3068NET "board" definitions. ## Description: This file contains various definitions and macros that are ## required for writing assembly code for the AKI3068NET board @@ -65,39 +65,61 @@ ##----------------------------------------------------------------------------- +#if CYGINT_HAL_PLF_IF_IDE != 0 +#define ABWCR_VAL ~((1 << ((CYGHWR_HAL_IDE_REGISTER >> 25) & 7)) |\ + (1 << ((CYGHWR_HAL_IDE_ALT_REGS >> 25) & 7))) +#else +#define ABWCR_VAL 0xff +#endif + #define CYGPKG_HAL_H8300_MEMC_DEFINED .macro hal_memc_init #if defined(CYG_HAL_STARTUP_ROM) mov.l #init_regs,er0 - mov.w #8,e1 1: - mov.l @er0+,er2 + mov.w @er0+,r2 + beq 1f + cmp.w #0xf000,r2 + bhi 2f + mov.w #0x00fe,e2 + bra 3f +2: + mov.w #0x00ff,e2 +3: mov.w @er0+,r1 mov.b r1l,@er2 - dec.w #1,e1 - bne 1b - bra 2f + bra 1b + +#define INIT_REGS_DATA(REGS,DATA) \ + .word (REGS & 0xffff),DATA init_regs: - .long CYGARC_RTCOR - .word 5 ; 1.5[ms] reflesh cycle - .long CYGARC_RTMCSR - .word 0x30 ; clk x 2048 - .long CYGARC_DRCRB - .word 0x90 - .long CYGARC_DRCRA - .word 0x22 - .long CYGARC_P1DDR - .word 0xff - .long CYGARC_P2DDR - .word 0xff - .long CYGARC_P5DDR - .word 0x01 - .long CYGARC_P8DDR - .word 0x0c +INIT_REGS_DATA(CYGARC_RTCOR,9) +INIT_REGS_DATA(CYGARC_RTMCSR,0x30) +INIT_REGS_DATA(CYGARC_DRCRB,0x98) +INIT_REGS_DATA(CYGARC_DRCRA,0x3c) +INIT_REGS_DATA(CYGARC_ASTCR,0xfb) +INIT_REGS_DATA(CYGARC_ABWCR,ABWCR_VAL) +INIT_REGS_DATA(CYGARC_P1DDR,0xff) +INIT_REGS_DATA(CYGARC_P2DDR,0xff) +INIT_REGS_DATA(CYGARC_P5DDR,0x01) +INIT_REGS_DATA(CYGARC_P8DDR,0x0c) + .word 0 init_regs_end: +;; Thanks Hiroyuki Senshu +;; DRAM Setup delay +1: + mov.b #8,r0h 2: + mov.b #0,r0l +3: + dec.b r0l + bne 3b + mov.b @CYGARC_RTMCSR,r0l + bpl 2b + dec r0h + bne 2b #endif .endm
--- a/packages/hal/h8300/aki3068net/current/include/plf_intr.h +++ b/packages/hal/h8300/aki3068net/current/include/plf_intr.h @@ -43,9 +43,9 @@ //========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour -// Contributors: jlarmour -// Date: 1999-09-09 +// Author(s): ysato +// Contributors: ysato +// Date: 2002-04-06 // Purpose: Define Interrupt support // Description: The macros defined here provide the HAL APIs for handling // interrupts and the clock for the simulator. This file @@ -69,7 +69,7 @@ externC void hal_delay_us(int usecs); #define HAL_PLATFORM_RESET(x) #define HAL_PLATFORM_RESET_ENTRY &h8300h_reset -#define HAL_DELAY_US(n) hal_delay_us((n) / 16) +#define HAL_DELAY_US(n) hal_delay_us((n)) //-------------------------------------------------------------------------- #endif // ifndef CYGONCE_HAL_PLF_INTR_H
new file mode 100644 --- /dev/null +++ b/packages/hal/h8300/aki3068net/current/include/plf_io.h @@ -0,0 +1,91 @@ +#ifndef CYGONCE_HAL_PLF_IO_H +#define CYGONCE_HAL_PLF_IO_H + +//============================================================================= +// +// plf_io.h +// +// platform specific IO support +// +//============================================================================= +//####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT ANY +// WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License along +// with eCos; if not, write to the Free Software Foundation, Inc., +// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +// +// As a special exception, if other files instantiate templates or use macros +// or inline functions from this file, or you compile this file and link it +// with other works to produce a work based on this file, this file does not +// by itself cause the resulting work to be covered by the GNU General Public +// License. However the source code for this file must still be made available +// in accordance with section (3) of the GNU General Public License. +// +// This exception does not invalidate any other reasons why a work based on +// this file might be covered by the GNU General Public License. +// +// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +// at http://sources.redhat.com/ecos/ecos-license/ +// ------------------------------------------- +//####ECOSGPLCOPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): ysato +// Contributors: ysato +// Date: 2003-02-28 +// Purpose: aki3068net + CF IO support +// Description: The macros defined here provide the HAL APIs for handling +// basic IO +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#include <pkgconf/system.h> + +//----------------------------------------------------------------------------- +// IDE interface macros +// +#define HAL_IDE_NUM_CONTROLLERS 1 + +// Initialize the IDE controller(s). +#define HAL_IDE_INIT() aki3068net_ide_setup() + +#define HAL_IDE_READ_UINT8( __ctlr, __regno, __val ) \ + aki3068net_read_command(__regno, __val) +#define HAL_IDE_READ_UINT16( __ctlr, __regno, __val ) \ + aki3068net_read_data(__regno, __val) +#define HAL_IDE_READ_ALTSTATUS( __ctlr, __val ) \ + aki3068net_read_control( __val) + +#define HAL_IDE_WRITE_UINT8( __ctlr, __regno, __val ) \ + aki3068net_write_command(__regno, __val) +#define HAL_IDE_WRITE_UINT16( __ctlr, __regno, __val ) \ + aki3068net_write_data(__regno, __val) +#define HAL_IDE_WRITE_CONTROL( __ctlr, __val ) \ + aki3068net_write_control( __val) + +void aki3068net_read_command(cyg_uint16 r, cyg_uint8 *d); +void aki3068net_read_data (cyg_uint16 r, cyg_uint16 *d); +void aki3068net_read_control(cyg_uint8 *d); + +void aki3068net_write_command(cyg_uint16 r, cyg_uint8 d); +void aki3068net_write_data (cyg_uint16 r, cyg_uint16 d); +void aki3068net_write_control(cyg_uint8 d); + +//----------------------------------------------------------------------------- +#endif // CYGONCE_HAL_PLF_IO_H +// end of plf_io.h
--- a/packages/hal/h8300/aki3068net/current/src/delay_us.S +++ b/packages/hal/h8300/aki3068net/current/src/delay_us.S @@ -14,26 +14,12 @@ .global CYG_LABEL_DEFN(hal_delay_us) CYG_LABEL_DEFN(hal_delay_us): - mov.b #0,r1l - mov.b r1l,@CYGARC_8TCNT2:8 - mov.b r1l,@CYGARC_8TCSR2:8 - mov.b #DELAY_COUNT+1,r1l - mov.b r1l,@CYGARC_TCORA2:8 - mov.b #0x09,r1l - mov.b r1l,@CYGARC_8TCR2:8 - mov.b #0,r2h - sub.w e1,e1 -1: + shlr.l er0 mov.l er0,er0 - ble 3f -2: - btst #6,@CYGARC_8TCSR2:8 - beq 2b - bclr #6,@CYGARC_8TCSR2:8 +1: + ble 4f dec.l #1,er0 bra 1b -3: - mov.b #0,r0l - mov.b r0l,@CYGARC_8TCR2 +4: rts
--- a/packages/hal/h8300/aki3068net/current/src/hal_diag.c +++ b/packages/hal/h8300/aki3068net/current/src/hal_diag.c @@ -40,9 +40,9 @@ //============================================================================= //#####DESCRIPTIONBEGIN#### // -// Author(s): dsm -// Contributors: dsm -// Date: 1998-03-13 +// Author(s): ysato +// Contributors: ysato +// Date: 2002-04-05 // Purpose: HAL diagnostic output // Description: Implementations of HAL diagnostic output support. // @@ -58,9 +58,9 @@ #include <cyg/hal/hal_intr.h> #include <cyg/hal/hal_misc.h> -#define SCI_BASE ((cyg_uint8*)0xffffb8) +#define SCI_BASE ((cyg_uint8*)CYGHAL_PLF_SCI_BASE) -static channel_data_t channel = { (cyg_uint8*)SCI_BASE, 0, 0}; +const static channel_data_t channel = { (cyg_uint8*)SCI_BASE, 0, 0}; void cyg_hal_plf_comms_init(void)
new file mode 100644 --- /dev/null +++ b/packages/hal/h8300/aki3068net/current/src/plf_ide.c @@ -0,0 +1,135 @@ +//========================================================================== +// +// plf_ide.c +// +// HAL platform IDE support function +// +//========================================================================== +//####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT ANY +// WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License along +// with eCos; if not, write to the Free Software Foundation, Inc., +// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +// +// As a special exception, if other files instantiate templates or use macros +// or inline functions from this file, or you compile this file and link it +// with other works to produce a work based on this file, this file does not +// by itself cause the resulting work to be covered by the GNU General Public +// License. However the source code for this file must still be made available +// in accordance with section (3) of the GNU General Public License. +// +// This exception does not invalidate any other reasons why a work based on +// this file might be covered by the GNU General Public License. +// +// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +// at http://sources.redhat.com/ecos/ecos-license/ +// ------------------------------------------- +//####ECOSGPLCOPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): ysato +// Contributors: ysato +// Date: 2003-02-28 +// Purpose: HAL IDE support function +// Description: This file contains IDE support functions provided by the +// HAL. +// +//####DESCRIPTIONEND#### +// +//========================================================================*/ + +#include <pkgconf/hal.h> + +#include <cyg/infra/cyg_type.h> // Base types + +#include <cyg/hal/hal_arch.h> // architectural definitions +#include <cyg/hal/hal_io.h> +#include <cyg/hal/hal_if.h> +#include <cyg/hal/plf_intr.h> +#include <cyg/hal/var_arch.h> + +/*------------------------------------------------------------------------*/ + +#if CYGINT_HAL_PLF_IF_IDE != 0 + +#define IDE_REG_FEATUERS 1 +#define IDE_REG_COMMAND 7 + +void aki3068net_ide_setup(void) +{ +#if CYGHWR_HAL_IDE_BUSWIDTH == 8 + aki3068net_write_command(IDE_REG_FEATUERS,0x01); /* 8bit transfer mode */ + aki3068net_write_command(IDE_REG_COMMAND, 0xef); /* set featuers */ +#endif +} + +void aki3068net_read_command(cyg_uint16 r, cyg_uint8 *d) +{ +#if CYGHWR_HAL_IDE_BUSWIDTH == 8 + *d = *(volatile cyg_uint8 *)(CYGHWR_HAL_IDE_REGISTER + r); +#else + *d = *(volatile cyg_uint16 *)(CYGHWR_HAL_IDE_REGISTER + (r << 1)) & 0xff; +#endif +} + +void aki3068net_read_data (cyg_uint16 r, cyg_uint16 *d) +{ +#if CYGHWR_HAL_IDE_BUSWIDTH == 8 + *d = *(volatile cyg_uint16 *)(CYGHWR_HAL_IDE_REGISTER + r); +#else + *d = *(volatile cyg_uint16 *)(CYGHWR_HAL_IDE_REGISTER + (r << 1)); +#endif +} + +void aki3068net_read_control(cyg_uint8 *d) +{ +#if CYGHWR_HAL_IDE_BUSWIDTH == 8 + *d = *(volatile cyg_uint8 *)(CYGHWR_HAL_IDE_ALT_REGS + 6); +#else + *d = *(volatile cyg_uint16 *)(CYGHWR_HAL_IDE_ALT_REGS + 12) & 0xff; +#endif +} + +void aki3068net_write_command(cyg_uint16 r, cyg_uint8 d) +{ +#if CYGHWR_HAL_IDE_BUSWIDTH == 8 + *(volatile cyg_uint8 *)(CYGHWR_HAL_IDE_REGISTER + r) = d; +#else + *(volatile cyg_uint16 *)(CYGHWR_HAL_IDE_REGISTER + (r << 1) +1) = d; +#endif +} + +void aki3068net_write_data (cyg_uint16 r, cyg_uint16 d) +{ +#if CYGHWR_HAL_IDE_BUSWIDTH == 8 + *(volatile cyg_uint8 *)(CYGHWR_HAL_IDE_REGISTER + r) = d; +#else + *(volatile CYG_WORD16 *)(CYGHWR_HAL_IDE_REGISTER + (__regno <<1)) = (__val >> 8) | (__val << 8); +#endif +} + +void aki3068net_write_control(cyg_uint8 d) +{ +#if CYGHWR_HAL_IDE_BUSWIDTH == 8 + *(volatile cyg_uint8 *)(CYGHWR_HAL_IDE_ALT_REGS + 6) = d; +#else + *(volatile cyg_uint16 *)(CYGHWR_HAL_IDE_ALT_REGS + 12) = d; +#endif +} + +#endif //CYGINT_HAL_PLF_IF_IDE != 0 +/*------------------------------------------------------------------------*/ +/* End of plf_ide.c */
--- a/packages/hal/h8300/aki3068net/current/src/plf_misc.c +++ b/packages/hal/h8300/aki3068net/current/src/plf_misc.c @@ -40,9 +40,9 @@ //========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): nickg -// Contributors: nickg, jlarmour -// Date: 1999-09-09 +// Author(s): yoshinori sato +// Contributors: yoshinori sato +// Date: 2002-04-05 // Purpose: HAL miscellaneous functions // Description: This file contains miscellaneous functions provided by the // HAL. @@ -122,40 +122,5 @@ void hal_clock_read(cyg_uint32 *pvalue) *pvalue = val; } -//--------------------------------------------------------------------------- -// Low-level delay (in microseconds) - -#if 0 -void hal_delay_us(int usecs) -{ - volatile CYG_BYTE *tcr = (CYG_BYTE *)CYGARC_8TCR2; - volatile CYG_BYTE *tcnt = (CYG_BYTE *)CYGARC_8TCNT2; - short clocks_per_us = (CYGHWR_HAL_H8300_PROCESSOR_SPEED/1000000)/8*25; - //short clocks_per_us = (CYGHWR_HAL_H8300_PROCESSOR_SPEED/1000000)/20; - unsigned char val1,val2; - short diff; - - usecs /= 25; - - *tcnt = 0x00; - *tcr = 0x01; - - diff = 0; - while (usecs > 0) { - while (diff < clocks_per_us) { - val1 = *tcnt; - while ((val2 = *tcnt) == val1); - if (val2 < val1) - diff += val2 + 0x100 - val1; - else - diff += val2 - val1; - } - usecs -= diff / clocks_per_us; - diff -= clocks_per_us; - } - *tcr = 0x00; -} -#endif - /*------------------------------------------------------------------------*/ /* End of plf_misc.c */
--- a/packages/hal/h8300/arch/current/ChangeLog +++ b/packages/hal/h8300/arch/current/ChangeLog @@ -1,8 +1,46 @@ +2003-07-10 Nick Garnett <nickg@balti.calivar.com> + + * <general>: Added Yoshinori Sato's changes, see following + entries, plus a few small changes of my own. + +2003-03-09 Yoshinori Sato <ysato@users.sourceforge.jp> + + * src/sci.c + * cdl/hal_h8300.cdl + move variant h8_sci.c to arch sci.c + h8300_stub.c move to variant + +2003-02-27 Yoshinori Sato <ysato@users.sourceforge.jp> + + * src/context.S + H8S support fix. + +2003-02-22 Yoshinori Sato <ysato@users.sourceforge.jp> + + * include/arch.inc + * include/h8300_stub.h + * include/hal_arch.h + * src/context.S + H8S support add. + * src/vector.S + H8S support add. + Nested interrupt mask fix. + 2003-01-31 Mark Salter <msalter@redhat.com> * src/hal_syscall.c (hal_syscall_handler): Let generic syscall code handle exit. +2002-10-17 Yoshinori Sato <ysato@users.sourceforge.jp> + + * src/h8300_stub.c + single step fix. + +2002-08-30 Yoshinori Sato <ysato@users.sourceforge.jp> + + * include/hal_io.h + RedBoot IDE support add. + 2002-04-29 Jonathan Larmour <jlarmour@redhat.com> * src/vectors.S:
--- a/packages/hal/h8300/arch/current/cdl/hal_h8300.cdl +++ b/packages/hal/h8300/arch/current/cdl/hal_h8300.cdl @@ -40,10 +40,10 @@ # ==================================================================== ######DESCRIPTIONBEGIN#### # -# Author(s): jskov +# Author(s): yoshinori sato # Original data: bartv, nickg -# Contributors: dmoseley -# Date: 1999-11-02 +# Contributors: yoshinori sato +# Date: 2002-02-16 # #####DESCRIPTIONEND#### # @@ -76,7 +76,7 @@ cdl_package CYGPKG_HAL_H8300 { control C handling." } - compile hal_misc.c hal_syscall.c context.S h8300_stub.c + compile hal_misc.c hal_syscall.c context.S sci.c make { <PREFIX>/lib/vectors.o : <PACKAGE>/src/vectors.S @@ -86,4 +86,53 @@ cdl_package CYGPKG_HAL_H8300 { @echo >> $(notdir $@).deps @rm vectors.tmp } + cdl_component CYGPKG_REDBOOT_H8300_OPTIONS { + display "Redboot for H8300 options" + flavor none + no_define + parent CYGPKG_REDBOOT + active_if CYGPKG_REDBOOT + description " + This option lists the target's requirements for a valid Redboot + configuration." + + cdl_component CYGSEM_REDBOOT_H8300_LINUX_BOOT { + display "Support booting uCinux via RedBoot" + flavor bool + default_value 1 + description " + This option enables RedBoot to support booting of a uClinux kernel." + compile -library=libextras.a redboot_linux_exec.c + + cdl_option CYGDAT_REDBOOT_H8300_LINUX_BOOT_ENTRY { + display "Default kernel entry address" + flavor data + default_value 0x400000 + description " + This option uClinux kernel entry address of default." + } + + cdl_option CYGDAT_REDBOOT_H8300_LINUX_COMMAND_START { + display "Default kernel command line start address" + flavor data + default_value 0x5ffe00 + description " + This option uClinux kernel command line start address of default." + } + + cdl_option CYGDAT_REDBOOT_H8300_LINUX_BOOT_COMMAND_LINE { + display "Default command line" + flavor data + default_value { "console=/dev/ttyS1" } + description " + This option uClinux kernel startup command line of default." + } + } + } + cdl_option CYGNUM_HAL_H8300_SCI_BAUD_RATE { + display "SCI serial port default baud rate" + flavor data + legal_values { 4800 9600 14400 19200 38400 57600 115200 } + default_value { 38400 } + } }
--- a/packages/hal/h8300/arch/current/include/arch.inc +++ b/packages/hal/h8300/arch/current/include/arch.inc @@ -74,26 +74,6 @@ .endm #endif - # Enable interrupts - .macro hal_cpu_int_enable - andc #0x3f,ccr - .endm - - # Disable interrupts - .macro hal_cpu_int_disable - orc #0xc0,ccr - .endm - - # Merge the interrupt enable state of the status register in - # \sr with the current sr. - .macro hal_cpu_int_merge sr wk=r0l - and.b #0xc0,\sr - stc ccr,\wk - bclr #7,\wk - or \sr,\wk - ldc \wk,ccr - .endm - # Enable further exception processing, and disable # interrupt processing. .macro hal_cpu_except_enable
--- a/packages/hal/h8300/arch/current/include/h8300_stub.h +++ b/packages/hal/h8300/arch/current/include/h8300_stub.h @@ -57,16 +57,32 @@ extern "C" { #endif -#define NUMREGS 32 +#ifdef CYGPKG_HAL_H8300_H8300H +#define NUMREGS 10 + +#define NUMREGBYTES (4*10) + +enum regnames { + ER0,ER1,ER2,ER3,ER4,ER5,ER6, + SP, CCR,PC +}; +#endif + +#ifdef CYGPKG_HAL_H8300_H8S +#define NUMREGS 11 + +#define NUMREGBYTES (4*11) + +enum regnames { + ER6,ER5,ER4,ER3,ER2,ER1,ER0, + SP, EXR,CCR,PC +}; +#endif #define REGSIZE( _x_ ) (4) typedef unsigned long target_register_t; -enum regnames { - ER0,ER1,ER2,ER3,ER4,ER5,ER6, - SP, PC, CCR -}; typedef enum regnames regnames_t;
--- a/packages/hal/h8300/arch/current/include/hal_arch.h +++ b/packages/hal/h8300/arch/current/include/hal_arch.h @@ -42,9 +42,9 @@ //========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): nickg -// Contributors: nickg -// Date: 1999-02-18 +// Author(s): Yoshinori Sato +// Contributors: Yoshinori Sato +// Date: 2002-02-13 // Purpose: Define architecture abstractions // Usage: #include <cyg/hal/hal_arch.h> // @@ -102,8 +102,8 @@ externC cyg_uint32 hal_msbit_index(cyg_u _regs_->er4 = (_id_)|0xddd4; \ _regs_->er5 = (_id_)|0xddd5; \ _regs_->er6 = (_id_)|0xddd6; \ + _regs_->pc = (CYG_WORD)(_entry_); \ _regs_->ccr = 0x00; \ - _regs_->pc = (CYG_WORD)(_entry_); \ _sp_ = (CYG_ADDRESS)_regs_; \ } @@ -146,7 +146,7 @@ asm volatile (" .globl " __HAL_BREAKPOI "trapa #3" \ ); -#define HAL_BREAKINST 0x5703 +#define HAL_BREAKINST 0x5730 #define HAL_BREAKINST_SIZE 2 @@ -180,10 +180,9 @@ asm volatile (" .globl " __HAL_BREAKPOI _regval_[5] = (_regs_)->er5; \ _regval_[6] = (_regs_)->er6; \ \ - _regval_[7] = (CYG_ADDRWORD)(_regs_) + \ - sizeof(HAL_SavedRegisters); \ - _regval_[8] = (_regs_)->pc; \ - _regval_[9] = (_regs_)->ccr; \ + _regval_[7] = (_regs_)->sp; \ + _regval_[8] = (_regs_)->ccr; \ + _regval_[9] = (_regs_)->pc & 0xffffff; \ \ HAL_GET_GDB_EXTRA_REGISTERS( _regval_, _regs_ ); \ } @@ -201,8 +200,8 @@ asm volatile (" .globl " __HAL_BREAKPOI (_regs_)->er5 = _regval_[5]; \ (_regs_)->er6 = _regval_[6]; \ \ - (_regs_)->pc = _regval_[8]; \ - (_regs_)->ccr = _regval_[9]; \ + (_regs_)->ccr = _regval_[8]; \ + (_regs_)->pc = (_regval_[9] & 0xffffff); \ \ /* We do not allow the SP or PSW to be set. Changing the SP will \ * mess up the saved state. No PSW is saved on thread context \ @@ -212,6 +211,10 @@ asm volatile (" .globl " __HAL_BREAKPOI HAL_SET_GDB_EXTRA_REGISTERS( _regs_, _regval_ ); \ } +#ifndef CYGARC_HAL_GET_PC_REG +#define CYGARC_HAL_GET_PC_REG(_regs_,_val_) ((_val_) = (_regs_)->pc & 0xffffff) +#endif + //------------------------------------------------------------------------- // HAL setjmp // Note: These definitions are repeated in context.S. If changes are required @@ -267,7 +270,7 @@ externC void hal_idle_thread_action(cyg_ // Interrupt + call to ISR, interrupt_end() and the DSR #define CYGNUM_HAL_STACK_INTERRUPT_SIZE (128) -#ifdef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK +#if 0 //def CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK // An interrupt stack which is large enough for all possible interrupt // conditions (and only used for that purpose) exists. "User" stacks
--- a/packages/hal/h8300/arch/current/include/hal_cache.h +++ b/packages/hal/h8300/arch/current/include/hal_cache.h @@ -67,17 +67,17 @@ // Cache dimensions // Data cache -#define HAL_DCACHE_SIZE 0 // Size of data cache in bytes -#define HAL_DCACHE_LINE_SIZE 0 // Size of a data cache line -#define HAL_DCACHE_WAYS 0 // Associativity of the cache +//#define HAL_DCACHE_SIZE 0 // Size of data cache in bytes +//#define HAL_DCACHE_LINE_SIZE 0 // Size of a data cache line +//#define HAL_DCACHE_WAYS 0 // Associativity of the cache // Instruction cache -#define HAL_ICACHE_SIZE 0 // Size of cache in bytes -#define HAL_ICACHE_LINE_SIZE 0 // Size of a cache line -#define HAL_ICACHE_WAYS 0 // Associativity of the cache +//#define HAL_ICACHE_SIZE 0 // Size of cache in bytes +//#define HAL_ICACHE_LINE_SIZE 0 // Size of a cache line +//#define HAL_ICACHE_WAYS 0 // Associativity of the cache -#define HAL_DCACHE_SETS (HAL_DCACHE_SIZE/(HAL_DCACHE_LINE_SIZE*HAL_DCACHE_WAYS)) -#define HAL_ICACHE_SETS (HAL_ICACHE_SIZE/(HAL_ICACHE_LINE_SIZE*HAL_ICACHE_WAYS)) +//#define HAL_DCACHE_SETS (HAL_DCACHE_SIZE/(HAL_DCACHE_LINE_SIZE*HAL_DCACHE_WAYS)) +//#define HAL_ICACHE_SETS (HAL_ICACHE_SIZE/(HAL_ICACHE_LINE_SIZE*HAL_ICACHE_WAYS)) //----------------------------------------------------------------------------- // Global control of data cache
--- a/packages/hal/h8300/arch/current/include/hal_intr.h +++ b/packages/hal/h8300/arch/current/include/hal_intr.h @@ -109,47 +109,6 @@ externC void hal_interrupt_stack_call_pe #endif -//-------------------------------------------------------------------------- -// Interrupt control macros - -#define HAL_DISABLE_INTERRUPTS(_old_) \ - asm volatile ( \ - "sub.l er0,er0\n\t" \ - "stc ccr,r0l\n\t" \ - "orc #0x80,ccr\n\t" \ - "and.b #0xc0,r0l\n\t" \ - "mov.l er0,%0" \ - : "=r"(_old_) \ - : \ - : "er0" \ - ); - -#define HAL_ENABLE_INTERRUPTS() \ - asm volatile ( \ - "andc #0x3f,ccr" \ - ); - -#define HAL_RESTORE_INTERRUPTS(_old_) \ - asm volatile ( \ - "mov.l %0,er0\n\t" \ - "and.b #0xc0,r0l\n\t" \ - "stc ccr,r0h\n\t" \ - "and.b #0x3f,r0h\n\t" \ - "or.b r0h,r0l\n\t" \ - "ldc r0l,ccr" \ - : \ - : "r"(_old_) \ - : "er0" \ - ); - -#define HAL_QUERY_INTERRUPTS(_old_) \ - asm volatile ( \ - "sub.l er0,er0\n\t" \ - "stc ccr,r0l\n\t" \ - "and.b #0xc0,r0l\n\t" \ - "mov.l er0,%0" \ - : "=r"(_old_) \ - ); #ifndef HAL_TRANSLATE_VECTOR
--- a/packages/hal/h8300/arch/current/include/hal_io.h +++ b/packages/hal/h8300/arch/current/include/hal_io.h @@ -60,6 +60,9 @@ //============================================================================= #include <cyg/infra/cyg_type.h> +#if defined(CYGBLD_HAL_PLATFORM_IO_H) +#include CYGBLD_HAL_PLATFORM_IO_H +#endif //----------------------------------------------------------------------------- // IO Register address.
--- a/packages/hal/h8300/arch/current/src/context.S +++ b/packages/hal/h8300/arch/current/src/context.S @@ -57,8 +57,14 @@ #include <cyg/hal/arch.inc> #include <cyg/hal/basetype.h> + +#ifdef CYGPKG_HAL_H8300_H8300H .h8300h - +#endif +#ifdef CYGPKG_HAL_H8300_H8S + .h8300s +#endif + #------------------------------------------------------------------------------ # hal_thread_switch_context # Switch thread contexts @@ -67,7 +73,7 @@ .global CYG_LABEL_DEFN(hal_thread_switch_context) CYG_LABEL_DEFN(hal_thread_switch_context): - hal_cpu_save_all + hal_cpu_save_context mov.l sp,@er1 # Now load the destination thread by dropping through @@ -85,7 +91,7 @@ CYG_LABEL_DEFN(hal_thread_load_context): mov.l @er0,sp hal_cpu_load_all - rts + rte ##----------------------------------------------------------------------------- ## HAL longjmp(), setjmp() implementations
deleted file mode 100644 --- a/packages/hal/h8300/arch/current/src/h8300_stub.c +++ /dev/null @@ -1,286 +0,0 @@ -//======================================================================== -// -// h8300_stub.c -// -// Helper functions for H8/300H stub -// -//======================================================================== -//####ECOSGPLCOPYRIGHTBEGIN#### -// ------------------------------------------- -// This file is part of eCos, the Embedded Configurable Operating System. -// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. -// -// eCos is free software; you can redistribute it and/or modify it under -// the terms of the GNU General Public License as published by the Free -// Software Foundation; either version 2 or (at your option) any later version. -// -// eCos is distributed in the hope that it will be useful, but WITHOUT ANY -// WARRANTY; without even the implied warranty of MERCHANTABILITY or -// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -// for more details. -// -// You should have received a copy of the GNU General Public License along -// with eCos; if not, write to the Free Software Foundation, Inc., -// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. -// -// As a special exception, if other files instantiate templates or use macros -// or inline functions from this file, or you compile this file and link it -// with other works to produce a work based on this file, this file does not -// by itself cause the resulting work to be covered by the GNU General Public -// License. However the source code for this file must still be made available -// in accordance with section (3) of the GNU General Public License. -// -// This exception does not invalidate any other reasons why a work based on -// this file might be covered by the GNU General Public License. -// -// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. -// at http://sources.redhat.com/ecos/ecos-license/ -// ------------------------------------------- -//####ECOSGPLCOPYRIGHTEND#### -//======================================================================== -//#####DESCRIPTIONBEGIN#### -// -// Author(s): Red Hat, jskov -// Contributors: Red Hat, jskov -// Date: 1998-11-06 -// Purpose: -// Description: Helper functions for H8/300H stub -// Usage: -// -//####DESCRIPTIONEND#### -// -//======================================================================== - -#include <stddef.h> - -#include <pkgconf/hal.h> - -#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS - -#include <cyg/hal/hal_stub.h> -#include <cyg/hal/hal_arch.h> -#include <cyg/hal/hal_intr.h> - -#ifdef CYGDBG_HAL_DEBUG_GDB_THREAD_SUPPORT -#include <cyg/hal/dbg-threads-api.h> // dbg_currthread_id -#endif - -/*---------------------------------------------------------------------- - * Asynchronous interrupt support - */ - -typedef unsigned short t_inst; - -static struct -{ - t_inst *targetAddr; - t_inst savedInstr; -} asyncBuffer; - -/* Called to asynchronously interrupt a running program. - Must be passed address of instruction interrupted. - This is typically called in response to a debug port - receive interrupt. -*/ - -void -install_async_breakpoint(void *pc) -{ - asyncBuffer.targetAddr = pc; - asyncBuffer.savedInstr = *(t_inst *)pc; - *(t_inst *)pc = (t_inst)HAL_BREAKINST; - __instruction_cache(CACHE_FLUSH); - __data_cache(CACHE_FLUSH); -} - -/*--------------------------------------------------------------------*/ -/* Given a trap value TRAP, return the corresponding signal. */ - -int __computeSignal (unsigned int trap_number) -{ - switch (trap_number) { - case 11: - return SIGTRAP; - default: - return SIGINT; - } -} - -/*--------------------------------------------------------------------*/ -/* Return the trap number corresponding to the last-taken trap. */ - -int __get_trap_number (void) -{ - extern int CYG_LABEL_NAME(_intvector); - // The vector is not not part of the GDB register set so get it - // directly from the save context. - return CYG_LABEL_NAME(_intvector); -} - -/*--------------------------------------------------------------------*/ -/* Set the currently-saved pc register value to PC. This also updates NPC - as needed. */ - -void set_pc (target_register_t pc) -{ - put_register (PC, pc); -} - - -/*---------------------------------------------------------------------- - * Single-step support. Lifted from CygMon. - */ - -#define NUM_SS_BPTS 2 -static target_register_t break_mem [NUM_SS_BPTS] = {0, 0}; -static unsigned char break_mem_data [NUM_SS_BPTS]; - -/* Set a single-step breakpoint at ADDR. Up to two such breakpoints - can be set; WHICH specifies which one to set (0 or 1). */ - -static void -set_single_bp (int which, unsigned char *addr) -{ - if (break_mem[which] == 0) { - break_mem[which] = (target_register_t) addr; - break_mem_data[which] = *(unsigned short *)addr; - *(unsigned short *)addr = HAL_BREAKINST; - } -} - -/* Clear any single-step breakpoint(s) that may have been set. */ - -void __clear_single_step (void) -{ - int x; - for (x = 0; x < NUM_SS_BPTS; x++) - { - unsigned char* addr = (unsigned char*) break_mem[x]; - if (addr) { - *addr = break_mem_data[x]; - break_mem[x] = 0; - } - } -} - -/* Set breakpoint(s) to simulate a single step from the current PC. */ - -const static unsigned char opcode_length0[]={ - 0x04,0x02,0x04,0x02,0x04,0x02,0x04,0x02, /* 0x58 */ - 0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02, /* 0x60 */ - 0x02,0x02,0x11,0x11,0x02,0x02,0x04,0x04, /* 0x68 */ - 0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02, /* 0x70 */ - 0x08,0x04,0x06,0x04,0x04,0x04,0x04,0x04 /* 0x78 */ -}; - -const static unsigned char opcode_length1[]={ - 0x10,0x00,0x00,0x00,0x11,0x00,0x00,0x00, - 0x02,0x00,0x00,0x00,0x04,0x04,0x00,0x04 -}; - -static int insn_length(unsigned char *pc) -{ - if (*pc != 0x01 && (*pc < 0x58 || *pc>=0x80)) - return 2; - else - switch (*pc) { - case 0x01: - switch (*(pc+1) & 0xf0) { - case 0x00: - if (*(pc+2)== 0x78) { - return 10; - } else if (*(pc+2)== 0x6b) { - return (*(pc+3) & 0x20)?8:6; - } else { - return (*(pc+2) & 0x02)?6:4; - } - case 0x40: - return (*(pc+2) & 0x02)?8:6; - default: - return opcode_length1[*(pc+1)>>4]; - } - case 0x6a: - case 0x6b: - return (*(pc+1) & 0x20)?6:4; - default: - return opcode_length0[*pc-0x58]; - } -} - -void __single_step (void) -{ - unsigned int pc = get_register (PC); - unsigned int next; - unsigned int opcode; - - opcode = *(unsigned short *)pc; - next = pc + insn_length((unsigned char *)pc); - if (opcode == 0x5470) { - /* rts */ - unsigned long *sp; - sp = (unsigned long *)get_register(SP); - next = *sp & 0x00ffffff; - } else if ((opcode & 0xfb00) != 0x5800) { - /* jmp / jsr */ - int regs; - const short reg_tbl[]={ER0,ER1,ER2,ER3,ER4,ER5,ER6,SP}; - switch(opcode & 0xfb00) { - case 0x5900: - regs = (opcode & 0x0070) >> 8; - next = get_register(reg_tbl[regs]); - break; - case 0x5a00: - next = *(unsigned long *)(pc+2) & 0x00ffffff; - break; - case 0x5b00: - next = *(unsigned long *)(opcode & 0xff); - break; - } - } else if (((opcode & 0xf000) == 0x4000) || ((opcode & 0xff00) == 0x5500)) { - /* b**:8 */ - unsigned long dsp; - dsp = (long)(opcode && 0xff)+pc+2; - set_single_bp(1,(unsigned char *)dsp); - } else if (((opcode & 0xff00) == 0x5800) || ((opcode & 0xff00) == 0x5c00)) { - /* b**:16 */ - unsigned long dsp; - dsp = *(unsigned short *)(pc+2)+pc+4; - set_single_bp(1,(unsigned char *)dsp); - } - set_single_bp(0,(unsigned char *)next); -} - -void __install_breakpoints (void) -{ - /* NOP since single-step HW exceptions are used instead of - breakpoints. */ -} - -void __clear_breakpoints (void) -{ - -} - - -/* If the breakpoint we hit is in the breakpoint() instruction, return a - non-zero value. */ - -externC void CYG_LABEL_NAME(breakinst)(void); -int -__is_breakpoint_function () -{ - return get_register (PC) == (target_register_t)&CYG_LABEL_NAME(breakinst); -} - - -/* Skip the current instruction. */ - -void __skipinst (void) -{ - unsigned long pc = get_register (PC); - - pc+=insn_length((unsigned char *)pc); - put_register (PC, (target_register_t) pc); -} - -#endif // CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
--- a/packages/hal/h8300/arch/current/src/hal_misc.c +++ b/packages/hal/h8300/arch/current/src/hal_misc.c @@ -160,7 +160,7 @@ hal_msbit_index(cyg_uint32 mask) w = (w & 0x33333333) + ((w >> 2) & 0x33333333); w = w + (w >> 4); w = (w & 0x000F000F) + ((w >> 8) & 0x000F000F); - return (cyg_uint32)((w + (w >> 16)) & 0xFF); + return (cyg_uint32)((w + (w >> 16)) & 0xFF)-1; }
--- a/packages/hal/h8300/arch/current/src/hal_syscall.c +++ b/packages/hal/h8300/arch/current/src/hal_syscall.c @@ -41,7 +41,7 @@ //#####DESCRIPTIONBEGIN#### // // Author(s): msalter -// Contributors:msalter +// Contributors:msalter,ysato // Date: 2000-11-5 // Purpose: // Description:
new file mode 100644 --- /dev/null +++ b/packages/hal/h8300/arch/current/src/redboot_linux_exec.c @@ -0,0 +1,107 @@ +//========================================================================== +// +// redboot_linux_exec.c +// +// RedBoot exec command for Linux booting +// +//========================================================================== +//####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT ANY +// WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License along +// with eCos; if not, write to the Free Software Foundation, Inc., +// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +// +// As a special exception, if other files instantiate templates or use macros +// or inline functions from this file, or you compile this file and link it +// with other works to produce a work based on this file, this file does not +// by itself cause the resulting work to be covered by the GNU General Public +// License. However the source code for this file must still be made available +// in accordance with section (3) of the GNU General Public License. +// +// This exception does not invalidate any other reasons why a work based on +// this file might be covered by the GNU General Public License. +// +// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +// at http://sources.redhat.com/ecos/ecos-license/ +// ------------------------------------------- +//####ECOSGPLCOPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): yoshinori sato +// Contributors: yoshinori sato +// Date: 2002-05-28 +// Purpose: RedBoot exec command for uClinux booting +// +//####DESCRIPTIONEND#### +// +//=========================================================================== + +#include <redboot.h> + +#include <cyg/infra/cyg_type.h> +#include <cyg/hal/hal_intr.h> +#include <cyg/hal/hal_cache.h> + +#define xstr(s) str(s) +#define str(s...) #s + +static void do_exec(int argc, char *argv[]); +RedBoot_cmd("exec", + "Execute an image", + "[-b <command line addr>] [-c \"kernel command line\"]\n" + " [<entry point>]", + do_exec + ); + +static void +do_exec(int argc, char *argv[]) +{ + cyg_uint32 entry = CYGDAT_REDBOOT_H8300_LINUX_BOOT_ENTRY; + cyg_uint32 command_addr = CYGDAT_REDBOOT_H8300_LINUX_COMMAND_START; + char *cmd_line = xstr( CYGDAT_REDBOOT_H8300_LINUX_BOOT_COMMAND_LINE ); + + bool command_addr_set,command_line_set; + + struct option_info opts[2]; + char *pcmd; + int oldints; + + init_opts(&opts[0], 'b', true, OPTION_ARG_TYPE_NUM, + (void **)&command_addr, &command_addr_set, "command line address"); + init_opts(&opts[1], 'c', true, OPTION_ARG_TYPE_STR, + (void **)&cmd_line, &command_line_set, "kernel command line"); + + if (!scan_opts(argc, argv, 1, opts, 2, (void *)&entry, + OPTION_ARG_TYPE_NUM, "entry address")) + return ; + + diag_printf("Now booting linux kernel:\n"); + diag_printf(" Entry Address 0x%08x\n", entry); + diag_printf(" Cmdline : %s\n", cmd_line); + + HAL_DISABLE_INTERRUPTS(oldints); + HAL_DCACHE_SYNC(); + HAL_ICACHE_DISABLE(); + HAL_DCACHE_DISABLE(); + HAL_DCACHE_SYNC(); + HAL_ICACHE_INVALIDATE_ALL(); + HAL_DCACHE_INVALIDATE_ALL(); + + pcmd = (char *)command_addr; + while ((*pcmd++ = *cmd_line++)); + + asm ("jmp @%0" : : "r" (entry)); +}
new file mode 100644 --- /dev/null +++ b/packages/hal/h8300/arch/current/src/sci.c @@ -0,0 +1,321 @@ +//============================================================================= +// +// sci.c +// +// Simple driver for the H8/300 Serial Communication Interface (SCI) +// +//============================================================================= +//####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT ANY +// WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License along +// with eCos; if not, write to the Free Software Foundation, Inc., +// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +// +// As a special exception, if other files instantiate templates or use macros +// or inline functions from this file, or you compile this file and link it +// with other works to produce a work based on this file, this file does not +// by itself cause the resulting work to be covered by the GNU General Public +// License. However the source code for this file must still be made available +// in accordance with section (3) of the GNU General Public License. +// +// This exception does not invalidate any other reasons why a work based on +// this file might be covered by the GNU General Public License. +// +// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +// at http://sources.redhat.com/ecos/ecos-license/ +// ------------------------------------------- +//####ECOSGPLCOPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): ysato +// Contributors:ysato +// Date: 2002-03-21 +// Description: Simple driver for the H8/300 Serial Communication Interface +// Clients of this file can configure the behavior with: +// CYGNUM_SCI_PORTS: number of SCI ports +// +//####DESCRIPTIONEND#### +// +//============================================================================= + +#include <pkgconf/hal.h> + +#ifdef CYGNUM_HAL_H8300_SCI_PORTS + +#include <cyg/hal/hal_io.h> // IO macros +#include <cyg/hal/drv_api.h> // CYG_ISR_HANDLED +#include <cyg/hal/hal_misc.h> // Helper functions +#include <cyg/hal/hal_intr.h> // HAL_ENABLE/MASK/UNMASK_INTERRUPTS +#include <cyg/hal/hal_arch.h> // SAVE/RESTORE GP +#include <cyg/hal/hal_if.h> // Calling-if API +#include <cyg/hal/mod_regs_sci.h> // serial register definitions + +#include <cyg/hal/h8_sci.h> // our header + +//-------------------------------------------------------------------------- + +void +cyg_hal_plf_sci_init_channel(void* chan) +{ + cyg_uint8 tmp; + cyg_uint8* base = ((channel_data_t *)chan)->base; + + // Disable Tx/Rx interrupts, but enable Tx/Rx + HAL_WRITE_UINT8(base+_REG_SCSCR, + CYGARC_REG_SCSCR_TE|CYGARC_REG_SCSCR_RE); + + // 8-1-no parity. + HAL_WRITE_UINT8(base+_REG_SCSMR, 0); + + // Set speed to CYGNUM_HAL_H8300_SCI_DEFAULT_BAUD_RATE + HAL_READ_UINT8(base+_REG_SCSMR, tmp); + tmp &= ~CYGARC_REG_SCSMR_CKSx_MASK; + tmp |= CYGARC_SCBRR_CKSx(CYGNUM_HAL_H8300_SCI_BAUD_RATE); + HAL_WRITE_UINT8(base+_REG_SCSMR, tmp); + HAL_WRITE_UINT8(base+_REG_SCBRR, CYGARC_SCBRR_N(CYGNUM_HAL_H8300_SCI_BAUD_RATE)); +} + +static cyg_bool +cyg_hal_plf_sci_getc_nonblock(void* __ch_data, cyg_uint8* ch) +{ + cyg_uint8* base = ((channel_data_t*)__ch_data)->base; + cyg_uint8 sr; + + HAL_READ_UINT8(base+_REG_SCSSR, sr); + if (sr & CYGARC_REG_SCSSR_ORER) { + // Serial RX overrun. Clear error and let caller try again. + HAL_WRITE_UINT8(base+_REG_SCSSR, + CYGARC_REG_SCSSR_CLEARMASK & ~CYGARC_REG_SCSSR_ORER); + return false; + } + + if ((sr & CYGARC_REG_SCSSR_RDRF) == 0) + return false; + + HAL_READ_UINT8(base+_REG_SCRDR, *ch); + + // Clear buffer full flag. + HAL_WRITE_UINT8(base+_REG_SCSSR, sr & ~CYGARC_REG_SCSSR_RDRF); + + return true; +} + +cyg_uint8 +cyg_hal_plf_sci_getc(void* __ch_data) +{ + cyg_uint8 ch; + CYGARC_HAL_SAVE_GP(); + + while(!cyg_hal_plf_sci_getc_nonblock(__ch_data, &ch)); + + CYGARC_HAL_RESTORE_GP(); + return ch; +} + +void +cyg_hal_plf_sci_putc(void* __ch_data, cyg_uint8 c) +{ + cyg_uint8* base = ((channel_data_t*)__ch_data)->base; + cyg_uint8 sr; + CYGARC_HAL_SAVE_GP(); + + do { + HAL_READ_UINT8(base+_REG_SCSSR, sr); + } while ((sr & CYGARC_REG_SCSSR_TDRE) == 0); + + HAL_WRITE_UINT8(base+_REG_SCTDR, c); + + // Clear empty flag. + HAL_WRITE_UINT8(base+_REG_SCSSR, sr & ~CYGARC_REG_SCSSR_TDRE); + + // Hang around until the character has been safely sent. + do { + HAL_READ_UINT8(base+_REG_SCSSR, sr); + } while ((sr & CYGARC_REG_SCSSR_TDRE) == 0); + + CYGARC_HAL_RESTORE_GP(); +} + + +static channel_data_t channels[CYGNUM_HAL_H8300_SCI_PORTS]; + +static void +cyg_hal_plf_sci_write(void* __ch_data, const cyg_uint8* __buf, + cyg_uint32 __len) +{ + CYGARC_HAL_SAVE_GP(); + + while(__len-- > 0) + cyg_hal_plf_sci_putc(__ch_data, *__buf++); + + CYGARC_HAL_RESTORE_GP(); +} + +static void +cyg_hal_plf_sci_read(void* __ch_data, cyg_uint8* __buf, cyg_uint32 __len) +{ + CYGARC_HAL_SAVE_GP(); + + while(__len-- > 0) + *__buf++ = cyg_hal_plf_sci_getc(__ch_data); + + CYGARC_HAL_RESTORE_GP(); +} + +cyg_bool +cyg_hal_plf_sci_getc_timeout(void* __ch_data, cyg_uint8* ch) +{ + channel_data_t* chan = (channel_data_t*)__ch_data; + int delay_count; + cyg_bool res; + CYGARC_HAL_SAVE_GP(); + + delay_count = chan->msec_timeout * 20; // delay in .1 ms steps + + for(;;) { + res = cyg_hal_plf_sci_getc_nonblock(__ch_data, ch); + if (res || 0 == delay_count--) + break; + + CYGACC_CALL_IF_DELAY_US(50); + } + + CYGARC_HAL_RESTORE_GP(); + return res; +} + +static int +cyg_hal_plf_sci_control(void *__ch_data, __comm_control_cmd_t __func, ...) +{ + static int irq_state = 0; + channel_data_t* chan = (channel_data_t*)__ch_data; + cyg_uint8 scr; + int ret = 0; + CYGARC_HAL_SAVE_GP(); + + switch (__func) { + case __COMMCTL_IRQ_ENABLE: + irq_state = 1; + HAL_INTERRUPT_UNMASK(chan->isr_vector); + HAL_READ_UINT8(chan->base+_REG_SCSCR, scr); + scr |= CYGARC_REG_SCSCR_RIE; + HAL_WRITE_UINT8(chan->base+_REG_SCSCR, scr); + break; + case __COMMCTL_IRQ_DISABLE: + ret = irq_state; + irq_state = 0; + HAL_INTERRUPT_UNMASK(chan->isr_vector); + HAL_READ_UINT8(chan->base+_REG_SCSCR, scr); + scr &= ~CYGARC_REG_SCSCR_RIE; + HAL_WRITE_UINT8(chan->base+_REG_SCSCR, scr); + break; + case __COMMCTL_DBG_ISR_VECTOR: + ret = chan->isr_vector; + break; + case __COMMCTL_SET_TIMEOUT: + { + va_list ap; + + va_start(ap, __func); + + ret = chan->msec_timeout; + chan->msec_timeout = va_arg(ap, cyg_uint32); + + va_end(ap); + } + default: + break; + } + CYGARC_HAL_RESTORE_GP(); + return ret; +} + +static int +cyg_hal_plf_sci_isr(void *__ch_data, int* __ctrlc, + CYG_ADDRWORD __vector, CYG_ADDRWORD __data) +{ + cyg_uint8 c, sr; + cyg_uint8* base = ((channel_data_t*)__ch_data)->base; + int res = 0; + CYGARC_HAL_SAVE_GP(); + + *__ctrlc = 0; + HAL_READ_UINT8(base+_REG_SCSSR, sr); + if (sr & CYGARC_REG_SCSSR_ORER) { + // Serial RX overrun. Clear error and hope protocol recovers. + HAL_WRITE_UINT8(base+_REG_SCSSR, + CYGARC_REG_SCSSR_CLEARMASK & ~CYGARC_REG_SCSSR_ORER); + res = CYG_ISR_HANDLED; + } else if (sr & CYGARC_REG_SCSSR_RDRF) { + // Received character + HAL_READ_UINT8(base+_REG_SCRDR, c); + + // Clear buffer full flag. + HAL_WRITE_UINT8(base+_REG_SCSSR, + CYGARC_REG_SCSSR_CLEARMASK & ~CYGARC_REG_SCSSR_RDRF); + + if( cyg_hal_is_break( &c , 1 ) ) + *__ctrlc = 1; + + res = CYG_ISR_HANDLED; + } + + CYGARC_HAL_RESTORE_GP(); + return res; +} + +void +cyg_hal_plf_sci_init(int sci_index, int comm_index, + int rcv_vect, cyg_uint8* base) +{ + channel_data_t* chan = &channels[sci_index]; + hal_virtual_comm_table_t* comm; + int cur = CYGACC_CALL_IF_SET_CONSOLE_COMM(CYGNUM_CALL_IF_SET_COMM_ID_QUERY_CURRENT); + + // Initialize channel table + chan->base = base; + chan->isr_vector = rcv_vect; + chan->msec_timeout = 1000; + + // Disable interrupts. + HAL_INTERRUPT_MASK(chan->isr_vector); + + // Init channel + + cyg_hal_plf_sci_init_channel(chan); + + // Setup procs in the vector table + + // Initialize channel procs + CYGACC_CALL_IF_SET_CONSOLE_COMM(comm_index); + comm = CYGACC_CALL_IF_CONSOLE_PROCS(); + CYGACC_COMM_IF_CH_DATA_SET(*comm, chan); + CYGACC_COMM_IF_WRITE_SET(*comm, cyg_hal_plf_sci_write); + CYGACC_COMM_IF_READ_SET(*comm, cyg_hal_plf_sci_read); + CYGACC_COMM_IF_PUTC_SET(*comm, cyg_hal_plf_sci_putc); + CYGACC_COMM_IF_GETC_SET(*comm, cyg_hal_plf_sci_getc); + CYGACC_COMM_IF_CONTROL_SET(*comm, cyg_hal_plf_sci_control); + CYGACC_COMM_IF_DBG_ISR_SET(*comm, cyg_hal_plf_sci_isr); + CYGACC_COMM_IF_GETC_TIMEOUT_SET(*comm, cyg_hal_plf_sci_getc_timeout); + + // Restore original console + CYGACC_CALL_IF_SET_CONSOLE_COMM(cur); +} + +#endif // CYGNUM_HAL_H8300_SCI_PORTS + +//----------------------------------------------------------------------------- +// end of sci.c
--- a/packages/hal/h8300/arch/current/src/vectors.S +++ b/packages/hal/h8300/arch/current/src/vectors.S @@ -40,8 +40,8 @@ ##============================================================================= #######DESCRIPTIONBEGIN#### ## -## Author(s): nickg -## Contributors: nickg, dmoseley, dhowells +## Author(s): Yoshinori Sato +## Contributors: Yoshinori Sato ## Date: 2002-02-14 ## Purpose: H8/300 exception vectors ## Description: This file defines the code placed into the exception @@ -67,12 +67,31 @@ #include <cyg/hal/arch.inc> #include <cyg/hal/basetype.h> - +#include <cyg/hal/variant.inc> + ##----------------------------------------------------------------------------- -// .file "vectors.S" +#ifdef CYGPKG_HAL_H8300_H8300H .h8300h + .macro shll2 reg + shll.l \reg + shll.l \reg + .endm + .macro shlr2 reg + shlr.l \reg + shlr.l \reg + .endm +#endif +#ifdef CYGPKG_HAL_H8300_H8S + .h8300s + .macro shll2 reg + shll.l #2,\reg + .endm + .macro shlr2 reg + shlr.l #2,\reg + .endm +#endif #ifdef CYGPKG_CYGMON ##----------------------------------------------------------------------------- @@ -115,8 +134,8 @@ ; need to restore the exception frame. mov.l @sp+,er0 mov.l @sp+,er1 - mov.l er1,@er0 - mov.l er0,sp // Restore the frame-adjusted SP + mov.l er0,@er1 + mov.l er1,sp // Restore the frame-adjusted SP ; Restore the scratch registers mov.l @er0_save,er0 @@ -127,7 +146,10 @@ ##----------------------------------------------------------------------------- -#if defined(CYG_HAL_STARTUP_ROM) || defined(CYGPKG_HAL_H8300_H8300H_SIM) +#if (defined(CYG_HAL_STARTUP_ROM) || \ + defined(CYGPKG_HAL_H8300_H8300H_SIM) || \ + defined(CYGPKG_HAL_H8300_H8S_SIM)) + .section .vectors,"a" .globl reset_vector @@ -135,7 +157,10 @@ reset_vector: ; Reset vector .long CYG_LABEL_DEFN(_start) - .space 6*4 + .long CYG_LABEL_DEFN(_start) + .space 3*4 + .long __interrupt5 + .long __interrupt6 .long __interrupt7 .long __interrupt8 .long __interrupt9 @@ -193,16 +218,84 @@ reset_vector: .long __interrupt61 .long __interrupt62 .long __interrupt63 - + +#ifdef CYGPKG_HAL_H8300_H8S + .long __interrupt64 + .long __interrupt65 + .long __interrupt66 + .long __interrupt67 + .long __interrupt68 + .long __interrupt69 + .long __interrupt70 + .long __interrupt71 + .long __interrupt72 + .long __interrupt73 + .long __interrupt74 + .long __interrupt75 + .long __interrupt76 + .long __interrupt77 + .long __interrupt78 + .long __interrupt79 + .long __interrupt80 + .long __interrupt81 + .long __interrupt82 + .long __interrupt83 + .long __interrupt84 + .long __interrupt85 + .long __interrupt86 + .long __interrupt87 + .long __interrupt88 + .long __interrupt89 + .long __interrupt90 + .long __interrupt91 + .long __interrupt92 + .long __interrupt93 + .long __interrupt94 + .long __interrupt95 + .long __interrupt96 + .long __interrupt97 + .long __interrupt98 + .long __interrupt99 + .long __interrupt100 + .long __interrupt101 + .long __interrupt102 + .long __interrupt103 + .long __interrupt104 + .long __interrupt105 + .long __interrupt106 + .long __interrupt107 + .long __interrupt108 + .long __interrupt109 + .long __interrupt110 + .long __interrupt111 + .long __interrupt112 + .long __interrupt113 + .long __interrupt114 + .long __interrupt115 + .long __interrupt116 + .long __interrupt117 + .long __interrupt118 + .long __interrupt119 + .long __interrupt120 + .long __interrupt121 + .long __interrupt122 + .long __interrupt123 + .long __interrupt124 + .long __interrupt125 + .long __interrupt126 + .long __interrupt127 +#endif #endif #define INTERRUPT_ENTRY(no) \ __interrupt##no: \ jsr @interrupt_entry - .section .int_fook_table,"a" - .space 7*4 + .section .int_hook_table,"ax" + .space 5*4 __interrupt_table: +INTERRUPT_ENTRY(5) +INTERRUPT_ENTRY(6) INTERRUPT_ENTRY(7) INTERRUPT_ENTRY(8) INTERRUPT_ENTRY(9) @@ -260,7 +353,73 @@ INTERRUPT_ENTRY(60) INTERRUPT_ENTRY(61) INTERRUPT_ENTRY(62) INTERRUPT_ENTRY(63) - +#ifdef CYGPKG_HAL_H8300_H8S +INTERRUPT_ENTRY(64) +INTERRUPT_ENTRY(65) +INTERRUPT_ENTRY(66) +INTERRUPT_ENTRY(67) +INTERRUPT_ENTRY(68) +INTERRUPT_ENTRY(69) +INTERRUPT_ENTRY(70) +INTERRUPT_ENTRY(71) +INTERRUPT_ENTRY(72) +INTERRUPT_ENTRY(73) +INTERRUPT_ENTRY(74) +INTERRUPT_ENTRY(75) +INTERRUPT_ENTRY(76) +INTERRUPT_ENTRY(77) +INTERRUPT_ENTRY(78) +INTERRUPT_ENTRY(79) +INTERRUPT_ENTRY(80) +INTERRUPT_ENTRY(81) +INTERRUPT_ENTRY(82) +INTERRUPT_ENTRY(83) +INTERRUPT_ENTRY(84) +INTERRUPT_ENTRY(85) +INTERRUPT_ENTRY(86) +INTERRUPT_ENTRY(87) +INTERRUPT_ENTRY(88) +INTERRUPT_ENTRY(89) +INTERRUPT_ENTRY(90) +INTERRUPT_ENTRY(91) +INTERRUPT_ENTRY(92) +INTERRUPT_ENTRY(93) +INTERRUPT_ENTRY(94) +INTERRUPT_ENTRY(95) +INTERRUPT_ENTRY(96) +INTERRUPT_ENTRY(97) +INTERRUPT_ENTRY(98) +INTERRUPT_ENTRY(99) +INTERRUPT_ENTRY(100) +INTERRUPT_ENTRY(101) +INTERRUPT_ENTRY(102) +INTERRUPT_ENTRY(103) +INTERRUPT_ENTRY(104) +INTERRUPT_ENTRY(105) +INTERRUPT_ENTRY(106) +INTERRUPT_ENTRY(107) +INTERRUPT_ENTRY(108) +INTERRUPT_ENTRY(109) +INTERRUPT_ENTRY(110) +INTERRUPT_ENTRY(111) +INTERRUPT_ENTRY(112) +INTERRUPT_ENTRY(113) +INTERRUPT_ENTRY(114) +INTERRUPT_ENTRY(115) +INTERRUPT_ENTRY(116) +INTERRUPT_ENTRY(117) +INTERRUPT_ENTRY(118) +INTERRUPT_ENTRY(119) +INTERRUPT_ENTRY(120) +INTERRUPT_ENTRY(121) +INTERRUPT_ENTRY(122) +INTERRUPT_ENTRY(123) +INTERRUPT_ENTRY(124) +INTERRUPT_ENTRY(125) +INTERRUPT_ENTRY(126) +INTERRUPT_ENTRY(127) +#endif + ##----------------------------------------------------------------------------- ## Startup code @@ -271,7 +430,6 @@ CYG_LABEL_DEFN(_start): ; set up stack mov.l #__interrupt_stack,sp - ldc #0x80,ccr ; Initialize hardware hal_cpu_init @@ -299,17 +457,19 @@ 1: #endif +#if defined(CYGSEM_HAL_H8300_VECTOR_HOOK) ; Setup Interrupt Vector (virtual) - mov.l #CYG_LABEL_DEFN(__rom_int_fook_start),er5 - mov.l #CYG_LABEL_DEFN(__int_fook_start),er6 - mov.l #CYG_LABEL_DEFN(__int_fook_end),er4 + mov.l #CYG_LABEL_DEFN(__rom_int_hook_table),er5 + mov.l #CYG_LABEL_DEFN(__int_hook_start),er6 + mov.l #CYG_LABEL_DEFN(__int_hook_end),er4 sub.l er6,er4 1: eepmov.w dec.w #1,e4 cmp.w #-1,e4 bhi 1b - +#endif + ; Clear BSS mov.l #CYG_LABEL_DEFN(__bss_start),er5 mov.l er5,er6 @@ -351,8 +511,6 @@ 1: #endif - mov.b #0x9a,r0l - mov.b r0l,@0xfee027 ; Call cyg_start sub.l er0,er0 @@ -368,18 +526,15 @@ interrupt_entry: sub.l #__interrupt_table,er0 shlr.l er0 shlr.l er0 - add.w #7,r0 + add.w #5-1,r0 mov.l er0,@CYG_LABEL_DEFN(_intvector) mov.l @sp+,er0 adds #4,sp #ifdef CYGPKG_CYGMON hal_cygmon_switch_app_stack #endif - hal_cpu_save_all ; push all registers - mov.l @CYG_LABEL_DEFN(_intvector),er0 - shll.l er0 - shll.l er0 - mov.l @(CYG_LABEL_DEFN(hal_vsr_table),er0),er0 + hal_cpu_save_all + h8300_var_interrupt_entry ; load isr address jmp @er0 ##----------------------------------------------------------------------------- @@ -418,10 +573,10 @@ CYG_LABEL_DEFN(__default_interrupt_vsr): hal_diag_intr_start increment_sched_lock - + #if defined(CYGPKG_CYGMON) // For Cygmon, we saved this back when we originally switched stacks. - mov.l @sp,er1 ; A2 = saved thread state + mov.l sp,er1 ; A2 = saved thread state #elif defined(CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK) ; Increment interrupt nesting counter mov.l sp,er1 @@ -434,11 +589,11 @@ 1: mov.l er0,sp ; switch to new SP 8: mov.l er1,@-sp ; save old SP - mov.l @er1,er1 #else - mov @sp,er1 ; A2 = saved thread state + mov sp,er1 ; A2 = saved thread state #endif + mov.l er1,er4 ; Here D3 contains the table byte offset of the vector to ; call. @@ -448,7 +603,6 @@ 8: ; Call cyg_instrument to record that this interrupt is being raised. .extern CYG_LABEL_DEFN(cyg_instrument) - mov.l er1,er3 mov.l #0x0301,er0 ; type = INTR,RAISE mov.l @CYG_LABEL_DEFN(_intvector),er2 ; arg2 = table offset jsr CYG_LABEL_DEFN(cyg_instrument) ; call instrumentation @@ -464,8 +618,9 @@ 8: ; Cyg_Interrupt::acknowledge_interrupt(). At some future point ; we may want to do the ack stuff here to allow immediate nesting. - andc #0x7f,ccr - + mov.l @CYG_LABEL_DEFN(_intvector),er0 + mov.b @(CYG_LABEL_DEFN(cyg_hal_level_table),er0),r0l + hal_cpu_set_int_level #endif #if defined(CYGDBG_HAL_DEBUG_GDB_CTRLC_SUPPORT) || \ defined(CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT) @@ -475,18 +630,16 @@ 8: ; this is a ^C. .extern CYG_LABEL_DEFN(hal_saved_interrupt_state) - mov.l er3,@CYG_LABEL_DEFN(hal_saved_interrupt_state) + mov.l er4,@CYG_LABEL_DEFN(hal_saved_interrupt_state) #endif mov.l @CYG_LABEL_DEFN(_intvector),er0 - shll.l er0 - shll.l er0 + shll2 er0 mov.l @(CYG_LABEL_DEFN(hal_interrupt_handlers),er0),er2 mov.l @(CYG_LABEL_DEFN(hal_interrupt_data),er0),er1 - shlr.l er0 - shlr.l er0 + shlr2 er0 jsr @er2 @@ -523,8 +676,7 @@ 2: ; Using the vector offset in D3, get the interrupt object pointer ; into D1. mov.l @CYG_LABEL_DEFN(_intvector),er1 - shll.l er1 - shll.l er1 + shll2 er1 mov.l @(CYG_LABEL_DEFN(hal_interrupt_objects),er1),er1 ; Even when this is not the last nested interrupt, we must call @@ -540,18 +692,25 @@ 2: # show_interrupts hal_diag_restore - + hal_cpu_load_all #ifdef CYGPKG_CYGMON hal_cygmon_restore_app_stack #endif + mov.l er0,@-sp + mov.l @(4:16,sp),er0 + mov.l er0,@__lastpc + mov.l @sp+,er0 + rte ; and return .section .bss .global CYG_LABEL_DEFN(_intvector) CYG_LABEL_DEFN(_intvector): .long 0 - + .global __lastpc +__lastpc: + .long 0 .text ##----------------------------------------------------------------------------- ## Execute pending DSRs on the interrupt stack with interrupts enabled. @@ -562,25 +721,7 @@ CYG_LABEL_DEFN(_intvector): .global CYG_LABEL_DEFN(hal_interrupt_stack_call_pending_DSRs) CYG_LABEL_DEFN(hal_interrupt_stack_call_pending_DSRs): - mov.l er5,@-sp ; save some work regs - mov.l er6,@-sp - mov.l sp,er6 ; save current SP - mov.l #__interrupt_stack,sp ; interrupt stack pointer - stc ccr,r5l ; save PSW - hal_cpu_int_enable ; enable interrupts - - ; Call kernel code to invoke DSRs. - jsr @CYG_LABEL_DEFN(cyg_interrupt_call_pending_DSRs) - - ; On return the old SP in a2 and the old PSW in d2 will - ; have been preserved by the calling conventions. - - hal_cpu_int_merge r5l ; Restore previous PSW - mov.l er6,sp ; restore old SP - mov.l @sp+,er6 ; Retrieve old work regs - mov.l @sp+,er5 - rts ; and return - + h8300_var_call_pending_DSR #endif #ifdef CYGPKG_CYGMON @@ -589,18 +730,6 @@ er0_save: .long 0 er1_save: .long 0 -er2_save: - .long 0 -er3_save: - .long 0 -er4_save: - .long 0 -er5_save: - .long 0 -er6_save: - .long 0 -sp_save: - .long 0 #endif ##----------------------------------------------------------------------------- @@ -613,7 +742,9 @@ CYG_LABEL_DEFN(__default_trap_vsr): #ifdef CYG_HAL_DIAG_EXCPT_END hal_diag_excpt_start #endif - + mov.l @(32,sp),er0 + subs #2,er0 + mov.l er0,@(32,sp) mov.l sp,er0 mov.l @CYG_LABEL_DEFN(_intvector),er1 @@ -639,9 +770,7 @@ CYG_LABEL_DEFN(__default_trap_vsr): .globl CYG_LABEL_DEFN(hal_vsr_table) CYG_LABEL_DEFN(hal_vsr_table): .long CYG_LABEL_DEFN(__default_trap_vsr) - .long 0 - .long 0 - .long 0 + .long CYG_LABEL_DEFN(__default_trap_vsr) .long 0 .long 0 .long 0 @@ -650,10 +779,12 @@ CYG_LABEL_DEFN(hal_vsr_table): .long CYG_LABEL_DEFN(__default_trap_vsr) .long CYG_LABEL_DEFN(__default_trap_vsr) .long CYG_LABEL_DEFN(__default_trap_vsr) + .long CYG_LABEL_DEFN(__default_trap_vsr) + .long CYG_LABEL_DEFN(__default_trap_vsr) - .rept 64-12 + .rept CYG_ISR_TABLE_SIZE-12 .long CYG_LABEL_DEFN(__default_interrupt_vsr) - .endr + .endr #endif ##----------------------------------------------------------------------------- @@ -687,26 +818,26 @@ CYG_LABEL_DEFN(hal_interrupt_objects): .section .bss - .balign 16 + .balign 2 .global _cyg_interrupt_stack_base _cyg_interrupt_stack_base: __interrupt_stack_base: .rept CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE .byte 0 .endr - .balign 16 + .balign 2 .global _cyg_interrupt_stack _cyg_interrupt_stack: __interrupt_stack: #ifdef CYGPKG_CYGMON - .balign 16 + .balign 2 .global __cygmon_interrupt_stack_base __cygmon_interrupt_stack_base: .rept CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE .byte 0 .endr - .balign 16 + .balign 2 .global __cygmon_interrupt_stack __cygmon_interrupt_stack: #endif
new file mode 100644 --- /dev/null +++ b/packages/hal/h8300/edosk2674/current/ChangeLog @@ -0,0 +1,38 @@ +2003-02-21 Yoshinori Sato <qzb04471@nifty.ne.jp> + + * New package. + +//=========================================================================== +//####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT ANY +// WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License along +// with eCos; if not, write to the Free Software Foundation, Inc., +// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +// +// As a special exception, if other files instantiate templates or use macros +// or inline functions from this file, or you compile this file and link it +// with other works to produce a work based on this file, this file does not +// by itself cause the resulting work to be covered by the GNU General Public +// License. However the source code for this file must still be made available +// in accordance with section (3) of the GNU General Public License. +// +// This exception does not invalidate any other reasons why a work based on +// this file might be covered by the GNU General Public License. +// +// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +// at http://sources.redhat.com/ecos/ecos-license/ +// ------------------------------------------- +//####ECOSGPLCOPYRIGHTEND#### +//===========================================================================
new file mode 100644 --- /dev/null +++ b/packages/hal/h8300/edosk2674/current/cdl/hal_h8300_h8s_edosk2674.cdl @@ -0,0 +1,284 @@ +# ==================================================================== +# +# hal_h8300_h8s_edosk2674.cdl +# +# EDOSK-2674R HAL package configuration data +# +# ==================================================================== +#####ECOSGPLCOPYRIGHTBEGIN#### +## ------------------------------------------- +## This file is part of eCos, the Embedded Configurable Operating System. +## Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +## +## eCos is free software; you can redistribute it and/or modify it under +## the terms of the GNU General Public License as published by the Free +## Software Foundation; either version 2 or (at your option) any later version. +## +## eCos is distributed in the hope that it will be useful, but WITHOUT ANY +## WARRANTY; without even the implied warranty of MERCHANTABILITY or +## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +## for more details. +## +## You should have received a copy of the GNU General Public License along +## with eCos; if not, write to the Free Software Foundation, Inc., +## 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +## +## As a special exception, if other files instantiate templates or use macros +## or inline functions from this file, or you compile this file and link it +## with other works to produce a work based on this file, this file does not +## by itself cause the resulting work to be covered by the GNU General Public +## License. However the source code for this file must still be made available +## in accordance with section (3) of the GNU General Public License. +## +## This exception does not invalidate any other reasons why a work based on +## this file might be covered by the GNU General Public License. +## +## Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +## at http://sources.redhat.com/ecos/ecos-license/ +## ------------------------------------------- +#####ECOSGPLCOPYRIGHTEND#### +# ==================================================================== +######DESCRIPTIONBEGIN#### +# +# Author(s): yoshinori sato +# Original data: yoshinori sato +# Contributors: +# Date: 2003-02-24 +# +#####DESCRIPTIONEND#### +# +# ==================================================================== + +cdl_package CYGPKG_HAL_H8300_H8S_EDOSK2674 { + display "EDOSK2674" + parent CYGPKG_HAL_H8300 + requires CYGPKG_HAL_H8300_H8S + implements CYGINT_HAL_VIRTUAL_VECTOR_SUPPORT + implements CYGINT_HAL_DEBUG_GDB_STUBS + implements CYGINT_HAL_DEBUG_GDB_STUBS_BREAK + define_header hal_h8300_h8s_edosk2674.h + include_dir cyg/hal + description " + The edosk2674 HAL package provides the support needed to run + eCos on a Hitach Micro System Europe EDOSK2674 evalution board." + + compile hal_diag.c plf_misc.c delay_us.S + + define_proc { + puts $::cdl_system_header "#define CYGBLD_HAL_TARGET_H <pkgconf/hal_h8300_h8s.h>" + puts $::cdl_system_header "#define CYGBLD_HAL_PLATFORM_H <pkgconf/hal_h8300_h8s_edosk2674.h>" + + puts $::cdl_header "#define CYG_HAL_H8300" + puts $::cdl_header "#define CYGNUM_HAL_H8300_SCI_PORTS 2" + puts $::cdl_header "#define CYGHWR_HAL_VECTOR_TABLE 0xffbd00" + puts $::cdl_header "#define HAL_PLATFORM_CPU \"H8S\"" + puts $::cdl_header "#define HAL_PLATFORM_BOARD \"EDOSK-2674R\"" + puts $::cdl_header "#define HAL_PLATFORM_EXTRA \"\"" + } + + cdl_component CYG_HAL_STARTUP { + display "Startup type" + flavor data + legal_values {"ROM" "RAM"} + default_value {"ROM"} + no_define + define -file system.h CYG_HAL_STARTUP + description " + When targetting the EDOSK2674 board it is possible to + build the system for either RAM bootstrap or ROM bootstrap. + RAM bootstrap generally requires that the board + is equipped with ROMs containing a suitable ROM monitor or + equivalent software that allows GDB to download the eCos + application and extend Memory on to the board. + The ROM bootstrap typically + requires that the eCos application be blown into EPROMs or + equivalent technology." + } + + cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS { + display "Number of communication channels on the board" + flavor data + calculated 1 + } + + cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_DEBUG_CHANNEL { + display "Debug serial port" + flavor data + legal_values 0 to CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS-1 + default_value 0 + description " + The EDOSK2674 board has only one serial port. This option + chooses which port will be used to connect to a host + running GDB." + } + + cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL { + display "Diagnostic serial port" + flavor data + legal_values 0 to CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS-1 + default_value 0 + description " + The CQ/7708 board has only one serial port. This option + chooses which port will be used for diagnostic output." + } + + # Real-time clock/counter specifics + cdl_component CYGNUM_HAL_RTC_CONSTANTS { + display "Real-time clock constants." + flavor none + + cdl_option CYGNUM_HAL_RTC_NUMERATOR { + display "Real-time clock numerator" + flavor data + calculated 1000000000 + } + cdl_option CYGNUM_HAL_RTC_DENOMINATOR { + display "Real-time clock denominator" + flavor data + calculated 100 + } + cdl_option CYGNUM_HAL_H8300_RTC_PRESCALE { + display "Real-time clock base prescale" + flavor data + calculated 8192 + } + # Isn't a nice way to handle freq requirement! + cdl_option CYGNUM_HAL_RTC_PERIOD { + display "Real-time clock period" + flavor data + calculated 10 + } + } + + cdl_option CYGHWR_HAL_H8300_CPG_INPUT { + display "OSC/Clock Freqency" + flavor data + default_value 33000000 + } + + cdl_component CYGBLD_GLOBAL_OPTIONS { + display "Global build options" + flavor none + parent CYGPKG_NONE + description " + Global build options including control over + compiler flags, linker flags and choice of toolchain." + + + cdl_option CYGBLD_GLOBAL_COMMAND_PREFIX { + display "Global command prefix" + flavor data + no_define + default_value { "h8300-elf" } + description " + This option specifies the command prefix used when + invoking the build tools." + } + + cdl_option CYGBLD_GLOBAL_CFLAGS { + display "Global compiler flags" + flavor data + no_define + default_value { "-Wall -Wpointer-arith -Wstrict-prototypes -Winline -Wundef -Woverloaded-virtual -g -O2 -ms -mint32 -fsigned-char -fdata-sections -fno-rtti -fno-exceptions -fvtable-gc -finit-priority" } + description " + This option controls the global compiler flags which + are used to compile all packages by + default. Individual packages may define + options which override these global flags." + } + + cdl_option CYGBLD_GLOBAL_LDFLAGS { + display "Global linker flags" + flavor data + no_define + default_value { "-g -nostdlib -Wl,--gc-sections -Wl,-static -ms -mint32" } + description " + This option controls the global linker flags. Individual + packages may define options which override these global flags." + } + cdl_option CYGBLD_BUILD_GDB_STUBS { + display "Build GDB stub ROM image" + default_value 0 + requires CYGSEM_HAL_ROM_MONITOR + requires CYGBLD_BUILD_COMMON_GDB_STUBS + requires CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + requires CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT + requires CYGDBG_HAL_DEBUG_GDB_THREAD_SUPPORT + no_define + description " + This option enables the building of the GDB stubs for the + board. The common HAL controls takes care of most of the + build process, but the final conversion from ELF image to + binary data is handled by the platform CDL, allowing + relocation of the data if necessary." + + make -priority 320 { + <PREFIX>/bin/gdb_module.bin : <PREFIX>/bin/gdb_module.img + $(OBJCOPY) -O binary $< $@ + } + } + } + + cdl_component CYGHWR_MEMORY_LAYOUT { + display "Memory layout" + flavor data + no_define + calculated { CYG_HAL_STARTUP == "RAM" ? "h8300_h8s_edosk2674_ram" : \ + "h8300_h8s_edosk2674_rom" } + + cdl_option CYGHWR_MEMORY_LAYOUT_LDI { + display "Memory layout linker script fragment" + flavor data + no_define + define -file system.h CYGHWR_MEMORY_LAYOUT_LDI + calculated { CYG_HAL_STARTUP == "RAM" ? "<pkgconf/mlt_h8300_h8s_edosk2674_ram.ldi>" : \ + "<pkgconf/mlt_h8300_h8s_edosk2674_rom.ldi>" } + } + + cdl_option CYGHWR_MEMORY_LAYOUT_H { + display "Memory layout header file" + flavor data + no_define + define -file system.h CYGHWR_MEMORY_LAYOUT_H + calculated { CYG_HAL_STARTUP == "RAM" ? "<pkgconf/mlt_h8300_h8s_edosk2674_ram.h>" : \ + "<pkgconf/mlt_h8300_h8s_edosk2674_rom.h>" } + } + } + cdl_option CYGSEM_HAL_ROM_MONITOR { + display "Behave as a ROM monitor" + flavor bool + default_value 0 + parent CYGPKG_HAL_ROM_MONITOR + requires { CYG_HAL_STARTUP == "ROM" } + description " + Enable this option if this program is to be used as a ROM monitor, + i.e. applications will be loaded into RAM on the board, and this + ROM monitor may process exceptions or interrupts generated from the + application. This enables features such as utilizing a separate + interrupt stack when exceptions are generated." + } + cdl_option CYGSEM_HAL_H8300_VECTOR_HOOK { + display "Interrupt Vector Hook" + flavor bool + default_value 1 + parent CYGPKG_HAL_ROM_MONITOR + description " + Interrupt Vector Table Hooking Support" + } + cdl_option CYGHWR_HAL_H8300_VECTOR_ADDRESS { + display "Hook Vector Address" + flavor data + default_value 0xffbe00 + parent CYGPKG_HAL_ROM_MONITOR + requires { CYGSEM_HAL_H8300_VECTOR_HOOK == 1 } + description " + Hooking Vector Table Address" + } + cdl_option CYGHAL_PLF_SCI_BASE { + display "SCI Base address" + flavor data + default_value 0xffff88 + description " + Used SCI Channel base address." + } +}
new file mode 100644 --- /dev/null +++ b/packages/hal/h8300/edosk2674/current/doc/README @@ -0,0 +1,2 @@ +Please visit http://homepage2.nifty.com/ysato/eCos/index.en.html for up to date +information, particularly on which GNU tools to use and patches.
new file mode 100644 --- /dev/null +++ b/packages/hal/h8300/edosk2674/current/include/hal_diag.h @@ -0,0 +1,75 @@ +#ifndef CYGONCE_HAL_HAL_DIAG_H +#define CYGONCE_HAL_HAL_DIAG_H + +/*============================================================================= +// +// hal_diag.h +// +// HAL Support for Kernel Diagnostic Routines +// +//============================================================================= +//####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT ANY +// WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License along +// with eCos; if not, write to the Free Software Foundation, Inc., +// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +// +// As a special exception, if other files instantiate templates or use macros +// or inline functions from this file, or you compile this file and link it +// with other works to produce a work based on this file, this file does not +// by itself cause the resulting work to be covered by the GNU General Public +// License. However the source code for this file must still be made available +// in accordance with section (3) of the GNU General Public License. +// +// This exception does not invalidate any other reasons why a work based on +// this file might be covered by the GNU General Public License. +// +// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +// at http://sources.redhat.com/ecos/ecos-license/ +// ------------------------------------------- +//####ECOSGPLCOPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): yoshinori sato +// Contributors: yoshinori sato +// Date: 2002-02-14 +// Purpose: HAL Support for Kernel Diagnostic Routines +// Description: Diagnostic routines for use during kernel development. +// Usage: #include <cyg/hal/hal_diag.h> +// +//####DESCRIPTIONEND#### +// +//===========================================================================*/ + +#include <pkgconf/hal.h> + +#include <cyg/infra/cyg_type.h> + +externC void hal_diag_init(void); +externC void hal_diag_write_char(cyg_uint8 c); +externC void hal_diag_read_char(cyg_uint8 *c); + +/*---------------------------------------------------------------------------*/ + +#define HAL_DIAG_INIT() hal_diag_init() + +#define HAL_DIAG_WRITE_CHAR(_c_) hal_diag_write_char(_c_) + +#define HAL_DIAG_READ_CHAR(_c_) hal_diag_read_char(&_c_) + +/*---------------------------------------------------------------------------*/ +/* end of hal_diag.h */ +#endif /* CYGONCE_HAL_HAL_DIAG_H */
new file mode 100644 --- /dev/null +++ b/packages/hal/h8300/edosk2674/current/include/pkgconf/mlt_h8300_h8s_edosk2674_ram.h @@ -0,0 +1,14 @@ +// eCos memory layout - Wed Nov 24 13:10:23 1999 + +// This is a generated file - changes will be lost if ConfigTool(MLT) is run + +#ifndef __ASSEMBLER__ +#include <cyg/infra/cyg_type.h> +#include <stddef.h> + +#endif + +#define CYGMEM_REGION_ram (0x420000) +#define CYGMEM_REGION_ram_SIZE (0x1E0000) +#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W) +
new file mode 100644 --- /dev/null +++ b/packages/hal/h8300/edosk2674/current/include/pkgconf/mlt_h8300_h8s_edosk2674_ram.ldi @@ -0,0 +1,29 @@ +// eCos memory layout - Fri Oct 20 08:25:16 2000 + +// This is a generated file - do not edit + +#include <cyg/infra/cyg_type.inc> + +OUTPUT_FORMAT("elf32-h8300") +OUTPUT_ARCH(h8300s) + +MEMORY +{ + ram : ORIGIN = 0x400000, LENGTH = 0x30000 + iram : ORIGIN = 0xff4000, LENGTH = 0x8000 +} + +SECTIONS +{ + SECTIONS_BEGIN + SECTION_text (ram, 0x400000, LMA_EQ_VMA) + SECTION_fini (ram, ALIGN (0x1), LMA_EQ_VMA) + SECTION_rodata (ram, ALIGN (0x1), LMA_EQ_VMA) + SECTION_rodata1 (ram, ALIGN (0x1), LMA_EQ_VMA) + SECTION_fixup (ram, ALIGN (0x1), LMA_EQ_VMA) + SECTION_gcc_except_table (ram, ALIGN (0x1), LMA_EQ_VMA) + SECTION_data (ram, ALIGN (0x4),LMA_EQ_VMA) + SECTION_bss (ram, ALIGN (0x4),LMA_EQ_VMA) + SECTION_int_hook_table (iram, CYGHWR_HAL_H8300_VECTOR_ADDRESS, FOLLOWING(.data)) + SECTIONS_END +}
new file mode 100644 --- /dev/null +++ b/packages/hal/h8300/edosk2674/current/include/pkgconf/mlt_h8300_h8s_edosk2674_ram.mlt @@ -0,0 +1,12 @@ +version 0 +region ram 400000 10000 0 ! +section text 0 1 0 1 0 1 0 1 400000 400000 fini fini ! +section fini 0 1 0 1 0 1 0 1 rodata rodata ! +section rodata 0 1 0 1 0 1 0 1 rodata1 rodata1 ! +section rodata1 0 1 0 1 0 1 0 1 fixup fixup ! +section fixup 0 1 0 1 0 1 0 1 gcc_except_table gcc_except_table ! +section gcc_except_table 0 1 0 1 0 1 0 1 int_hook_table int_hook_table ! +section int_hook_table 0 1 0 1 0 1 0 1 data data ! +section data 0 4 0 1 0 1 0 1 bss bss ! +section bss 0 4 0 1 0 1 0 0 ! +
new file mode 100644 --- /dev/null +++ b/packages/hal/h8300/edosk2674/current/include/pkgconf/mlt_h8300_h8s_edosk2674_rom.h @@ -0,0 +1,18 @@ +// eCos memory layout - Wed Nov 24 13:10:23 1999 + +// This is a generated file - changes will be lost if ConfigTool(MLT) is run + +#ifndef __ASSEMBLER__ +#include <cyg/infra/cyg_type.h> +#include <stddef.h> + +#endif + +#define CYGMEM_REGION_ram (0x400000) +#if !defined(CYGPKG_IO_ETH_DRIVERS) +#define CYGMEM_REGION_ram_SIZE (0x800000) +#else +#define CYGMEM_REGION_ram_SIZE (0x800000-0xC000) +#endif +#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W) +
new file mode 100644 --- /dev/null +++ b/packages/hal/h8300/edosk2674/current/include/pkgconf/mlt_h8300_h8s_edosk2674_rom.ldi @@ -0,0 +1,42 @@ +// eCos memory layout - Fri Oct 20 08:25:16 2000 + +// This is a generated file - do not edit + +#include <cyg/infra/cyg_type.inc> + +OUTPUT_FORMAT("elf32-h8300") +OUTPUT_ARCH(h8300s) + +MEMORY +{ +#define IRAM_TOP 0xff4000 + rom : ORIGIN = 0x000000, LENGTH = 0x100000 +#if !defined(CYGPKG_IO_ETH_DRIVERS) +#define WORK IRAM_TOP + ram : ORIGIN = WORK, LENGTH = 0x8000 +#else +#define WORK 0xBF4000 + ram : ORIGIN = WORK, LENGTH = 0xC000 + iram : ORIGIN = IRAM_TOP, LENGTH = 0x8000 +#endif +} + +SECTIONS +{ + SECTIONS_BEGIN + SECTION_rom_vectors (rom, 0x000000, LMA_EQ_VMA) + SECTION_text (rom, ALIGN (0x1), LMA_EQ_VMA) + SECTION_fini (rom, ALIGN (0x1), LMA_EQ_VMA) + SECTION_rodata (rom, ALIGN (0x1), LMA_EQ_VMA) + SECTION_rodata1 (rom, ALIGN (0x1), LMA_EQ_VMA) + SECTION_fixup (rom, ALIGN (0x1), LMA_EQ_VMA) + SECTION_gcc_except_table (rom, ALIGN (0x1), LMA_EQ_VMA) + SECTION_data (ram, WORK,FOLLOWING (.gcc_except_table)) + SECTION_bss (ram, ALIGN (0x4),LMA_EQ_VMA) +#if !defined(CYGPKG_IO_ETH_DRIVERS) + SECTION_int_hook_table (ram, CYGHWR_HAL_H8300_VECTOR_ADDRESS, FOLLOWING(.data)) +#else + SECTION_int_hook_table (iram, CYGHWR_HAL_H8300_VECTOR_ADDRESS, FOLLOWING(.data)) +#endif + SECTIONS_END +}
new file mode 100644 --- /dev/null +++ b/packages/hal/h8300/edosk2674/current/include/pkgconf/mlt_h8300_h8s_edosk2674_rom.mlt @@ -0,0 +1,12 @@ +version 0 +region ram ff4000 ffbfff 0 ! +section rom_vectors 0 1 0 1 1 1 1 1 0 60000 text text ! +section text 0 1 0 1 0 1 0 1 fini fini ! +section fini 0 1 0 1 0 1 0 1 rodata rodata ! +section rodata 0 1 0 1 0 1 0 1 rodata1 rodata1 ! +section rodata1 0 1 0 1 0 1 0 1 fixup fixup ! +section fixup 0 1 0 1 0 1 0 1 gcc_except_table gcc_except_table ! +section gcc_except_table 0 1 0 1 0 1 0 1 data data ! +section data 0 4 0 1 0 1 0 1 bss bss ! +section bss 0 4 0 1 0 1 0 1 heap1 heap1 ! +section heap1 0 8 0 0 0 0 0 0 !
new file mode 100644 --- /dev/null +++ b/packages/hal/h8300/edosk2674/current/include/platform.inc @@ -0,0 +1,130 @@ +#ifndef CYGONCE_HAL_PLATFORM_INC +#define CYGONCE_HAL_PLATFORM_INC +##============================================================================= +## +## platform.inc +## +## EDOSK-2764R "board" assembler header file +## +##============================================================================= +#####ECOSGPLCOPYRIGHTBEGIN#### +## ------------------------------------------- +## This file is part of eCos, the Embedded Configurable Operating System. +## Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +## +## eCos is free software; you can redistribute it and/or modify it under +## the terms of the GNU General Public License as published by the Free +## Software Foundation; either version 2 or (at your option) any later version. +## +## eCos is distributed in the hope that it will be useful, but WITHOUT ANY +## WARRANTY; without even the implied warranty of MERCHANTABILITY or +## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +## for more details. +## +## You should have received a copy of the GNU General Public License along +## with eCos; if not, write to the Free Software Foundation, Inc., +## 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +## +## As a special exception, if other files instantiate templates or use macros +## or inline functions from this file, or you compile this file and link it +## with other works to produce a work based on this file, this file does not +## by itself cause the resulting work to be covered by the GNU General Public +## License. However the source code for this file must still be made available +## in accordance with section (3) of the GNU General Public License. +## +## This exception does not invalidate any other reasons why a work based on +## this file might be covered by the GNU General Public License. +## +## Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +## at http://sources.redhat.com/ecos/ecos-license/ +## ------------------------------------------- +#####ECOSGPLCOPYRIGHTEND#### +##============================================================================= +#######DESCRIPTIONBEGIN#### +## +## Author(s): yoshinori sato +## Contributors: yoshinori sato +## Date: 2003-02-23 +## Purpose: EDOSK-2674R "board" definitions. +## Description: This file contains various definitions and macros that are +## required for writing assembly code for the am31 simulator. +## Currently there are none +## Usage: +## #include <cyg/hal/platform.inc> +## ... +## +## +######DESCRIPTIONEND#### +## +##============================================================================= + +#include <pkgconf/hal.h> + +#include <cyg/hal/mod_regs_bsc.h> +#include <cyg/hal/mod_regs_pio.h> +#include <cyg/hal/mod_regs_intc.h> + +##----------------------------------------------------------------------------- + +#define CYGPKG_HAL_H8300_MEMC_DEFINED + .macro hal_memc_init +#if defined(CYG_HAL_STARTUP_ROM) +;BSC/GPIO setup + mov.l #init_regs,er0 + mov.w #0xffff,e2 +1: + mov.w @er0+,r2 + beq 2f + mov.w @er0+,r1 + mov.b r1l,@er2 + bra 1b + +#define INIT_REGS_DATA(REGS,DATA) \ + .word ((REGS) & 0xffff),DATA + +init_regs: +INIT_REGS_DATA(CYGARC_ASTCR,0xff) +INIT_REGS_DATA(CYGARC_RDNCR,0x00) +INIT_REGS_DATA(CYGARC_ABWCR,0x80) +INIT_REGS_DATA(CYGARC_WTCRAH,0x27) +INIT_REGS_DATA(CYGARC_WTCRAL,0x77) +INIT_REGS_DATA(CYGARC_WTCRBH,0x71) +INIT_REGS_DATA(CYGARC_WTCRBL,0x22) +INIT_REGS_DATA(CYGARC_CSACRH,0x80) +INIT_REGS_DATA(CYGARC_CSACRL,0x80) +INIT_REGS_DATA(CYGARC_BROMCRH,0xa0) +INIT_REGS_DATA(CYGARC_BROMCRL,0xa0) +INIT_REGS_DATA(CYGARC_P3DDR,0x3a) +INIT_REGS_DATA(CYGARC_P3ODR,0x06) +INIT_REGS_DATA(CYGARC_PADDR,0xff) +INIT_REGS_DATA(CYGARC_PFDDR,0xfe) +INIT_REGS_DATA(CYGARC_PGDDR,0x0f) +INIT_REGS_DATA(CYGARC_PHDDR,0x0f) +INIT_REGS_DATA(CYGARC_PFCR0,0xff) +INIT_REGS_DATA(CYGARC_PFCR2,0x0d) +INIT_REGS_DATA(CYGARC_ITSR, 0x00) +INIT_REGS_DATA(CYGARC_ITSR+1,0x3f) + + .word 0 +2: +;SDRAM setup +#define SDRAM_SMR 0x400040 + + mov.b #0,r0l + mov.b r0l,@CYGARC_DRACCR:16 + mov.w #0x188,r0 + mov.w r0,@CYGARC_REFCR:16 + mov.w #0x85b4,r0 + mov.w r0,@CYGARC_DRAMCR:16 + mov.b #0,r1l + mov.b r1l,@SDRAM_SMR + mov.w #0x84b4,r0 + mov.w r0,@CYGARC_DRAMCR:16 + +;special thanks to Arizona Cooperative Power +#endif + .endm + +#------------------------------------------------------------------------------ +#endif // ifndef CYGONCE_HAL_PLATFORM_INC +# end of platform.inc
new file mode 100644 --- /dev/null +++ b/packages/hal/h8300/edosk2674/current/include/plf_intr.h @@ -0,0 +1,76 @@ +#ifndef CYGONCE_HAL_PLF_INTR_H +#define CYGONCE_HAL_PLF_INTR_H + +//========================================================================== +// +// plf_intr.h +// +// EDOSK-2674R interrupt and clock support +// +//========================================================================== +//####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT ANY +// WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License along +// with eCos; if not, write to the Free Software Foundation, Inc., +// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +// +// As a special exception, if other files instantiate templates or use macros +// or inline functions from this file, or you compile this file and link it +// with other works to produce a work based on this file, this file does not +// by itself cause the resulting work to be covered by the GNU General Public +// License. However the source code for this file must still be made available +// in accordance with section (3) of the GNU General Public License. +// +// This exception does not invalidate any other reasons why a work based on +// this file might be covered by the GNU General Public License. +// +// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +// at http://sources.redhat.com/ecos/ecos-license/ +// ------------------------------------------- +//####ECOSGPLCOPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): yoshinori sato +// Contributors: yoshinori sato +// Date: 2003-02-23 +// Purpose: Define Interrupt support +// Description: The macros defined here provide the HAL APIs for handling +// interrupts and the clock for the simulator. This file +// is empty since none are required! +// +// Usage: +// #include <cyg/hal/plf_intr.h> +// ... +// +// +//####DESCRIPTIONEND#### +// +//========================================================================== + + +//-------------------------------------------------------------------------- + +externC void h8s_reset (void); +externC void hal_delay_us(int usecs); + +#define HAL_PLATFORM_RESET(x) +#define HAL_PLATFORM_RESET_ENTRY &h8s_reset + +#define HAL_DELAY_US(n) hal_delay_us(n) + +//-------------------------------------------------------------------------- +#endif // ifndef CYGONCE_HAL_PLF_INTR_H +// End of plf_intr.h
new file mode 100644 --- /dev/null +++ b/packages/hal/h8300/edosk2674/current/include/plf_stub.h @@ -0,0 +1,86 @@ +#ifndef CYGONCE_HAL_PLF_STUB_H +#define CYGONCE_HAL_PLF_STUB_H + +//============================================================================= +// +// plf_stub.h +// +// Platform header for GDB stub support. +// +//============================================================================= +//####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT ANY +// WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License along +// with eCos; if not, write to the Free Software Foundation, Inc., +// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +// +// As a special exception, if other files instantiate templates or use macros +// or inline functions from this file, or you compile this file and link it +// with other works to produce a work based on this file, this file does not +// by itself cause the resulting work to be covered by the GNU General Public +// License. However the source code for this file must still be made available +// in accordance with section (3) of the GNU General Public License. +// +// This exception does not invalidate any other reasons why a work based on +// this file might be covered by the GNU General Public License. +// +// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +// at http://sources.redhat.com/ecos/ecos-license/ +// ------------------------------------------- +//####ECOSGPLCOPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jskov +// Contributors:jskov +// Date: 1999-05-18 +// Purpose: Platform HAL stub support for H8S simulator +// Usage: #include <cyg/hal/plf_stub.h> +// +//####DESCRIPTIONEND#### +// +//============================================================================= + +#include <pkgconf/system.h> +#include <pkgconf/hal.h> + +#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + +#include <cyg/infra/cyg_type.h> // CYG_UNUSED_PARAM, externC + +#include <cyg/hal/h8300_stub.h> // architecture stub support + +#include <cyg/hal/hal_diag.h> // hal_diag_led_on + +//---------------------------------------------------------------------------- +// Define some platform specific communication details. This is mostly +// handled by hal_if now, but we need to make sure the comms tables are +// properly initialized. + +externC void cyg_hal_plf_comms_init(void); + +#define HAL_STUB_PLATFORM_INIT_SERIAL() cyg_hal_plf_comms_init() + +#define HAL_STUB_PLATFORM_SET_BAUD_RATE(baud) CYG_UNUSED_PARAM(int, (baud)) +#define HAL_STUB_PLATFORM_INTERRUPTIBLE 0 + +//---------------------------------------------------------------------------- +// Stub initializer. +#define HAL_STUB_PLATFORM_INIT() CYG_EMPTY_STATEMENT + +#endif // ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS +//----------------------------------------------------------------------------- +#endif // CYGONCE_HAL_PLF_STUB_H +// End of plf_stub.h
new file mode 100644 --- /dev/null +++ b/packages/hal/h8300/edosk2674/current/src/delay_us.S @@ -0,0 +1,26 @@ +;;delay_us + +#include <pkgconf/hal.h> + +#include <cyg/hal/arch.inc> +#include <cyg/hal/basetype.h> +#include <cyg/hal/mod_regs_tmr.h> + +#define DELAY_COUNT (CYGHWR_HAL_H8300_PROCESSOR_SPEED/1000000)/8*25 + +// .file "delay_us.S" + .h8300s + .text + + .global CYG_LABEL_DEFN(hal_delay_us) +CYG_LABEL_DEFN(hal_delay_us): + shlr.l er0 + shlr.l er0 + shlr.l er0 + mov.l er0,er0 +1: + ble 4f + dec.l #1,er0 + bra 1b +4: + rts
new file mode 100644 --- /dev/null +++ b/packages/hal/h8300/edosk2674/current/src/hal_diag.c @@ -0,0 +1,95 @@ +/*============================================================================= +// +// hal_diag.c +// +// HAL diagnostic output code +// +//============================================================================= +//####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT ANY +// WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License along +// with eCos; if not, write to the Free Software Foundation, Inc., +// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +// +// As a special exception, if other files instantiate templates or use macros +// or inline functions from this file, or you compile this file and link it +// with other works to produce a work based on this file, this file does not +// by itself cause the resulting work to be covered by the GNU General Public +// License. However the source code for this file must still be made available +// in accordance with section (3) of the GNU General Public License. +// +// This exception does not invalidate any other reasons why a work based on +// this file might be covered by the GNU General Public License. +// +// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +// at http://sources.redhat.com/ecos/ecos-license/ +// ------------------------------------------- +//####ECOSGPLCOPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): ysato +// Contributors: ysato +// Date: 2002-04-05 +// Purpose: HAL diagnostic output +// Description: Implementations of HAL diagnostic output support. +// +//####DESCRIPTIONEND#### +// +//===========================================================================*/ + +#include <pkgconf/hal.h> + +#include <cyg/hal/hal_diag.h> +#include <cyg/hal/h8_sci.h> +#include <cyg/hal/var_intr.h> + +#define SCI_BASE ((cyg_uint8*)CYGHAL_PLF_SCI_BASE) + +const static channel_data_t channel = { (cyg_uint8*)SCI_BASE, 0, 0}; + +void +cyg_hal_plf_comms_init(void) +{ + static int initialized = 0; + + if (initialized) + return; + + initialized = 1; + + cyg_hal_plf_sci_init(0, 0, CYGNUM_HAL_INTERRUPT_RXI0, SCI_BASE); +} + +void hal_diag_init(void) +{ + cyg_hal_plf_sci_init_channel(&channel); +} + +void +hal_diag_write_char( cyg_uint8 c ) +{ + cyg_hal_plf_sci_putc(&channel, c); +} + +void +hal_diag_read_char(cyg_uint8 *c) +{ + *c = (char) cyg_hal_plf_sci_getc(&channel); +} + +/*===========================================================================*/ +/* EOF hal_diag.c */ +
new file mode 100644 --- /dev/null +++ b/packages/hal/h8300/edosk2674/current/src/plf_misc.c @@ -0,0 +1,129 @@ +//========================================================================== +// +// plf_misc.c +// +// HAL platform miscellaneous functions +// +//========================================================================== +//####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT ANY +// WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License along +// with eCos; if not, write to the Free Software Foundation, Inc., +// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +// +// As a special exception, if other files instantiate templates or use macros +// or inline functions from this file, or you compile this file and link it +// with other works to produce a work based on this file, this file does not +// by itself cause the resulting work to be covered by the GNU General Public +// License. However the source code for this file must still be made available +// in accordance with section (3) of the GNU General Public License. +// +// This exception does not invalidate any other reasons why a work based on +// this file might be covered by the GNU General Public License. +// +// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +// at http://sources.redhat.com/ecos/ecos-license/ +// ------------------------------------------- +//####ECOSGPLCOPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): yoshinori sato +// Contributors: yoshinori sato +// Date: 2002-04-05 +// Purpose: HAL miscellaneous functions +// Description: This file contains miscellaneous functions provided by the +// HAL. +// +//####DESCRIPTIONEND#### +// +//========================================================================*/ + +#include <pkgconf/hal.h> + +#include <cyg/infra/cyg_type.h> // Base types + +#include <cyg/hal/hal_arch.h> // architectural definitions +#include <cyg/hal/hal_io.h> +#include <cyg/hal/hal_if.h> +#include <cyg/hal/plf_intr.h> +#include <cyg/hal/var_arch.h> + +/*------------------------------------------------------------------------*/ + +void hal_platform_init(void) +{ + hal_if_init(); +} + +void h8s_reset(void) +{ + __asm__ ("jmp @@4\n\t"); +} + +/*------------------------------------------------------------------------*/ +/* Control C ISR support */ + +#if defined(CYGDBG_HAL_DEBUG_GDB_CTRLC_SUPPORT) + +struct Hal_SavedRegisters *hal_saved_interrupt_state; + +#endif + +/*------------------------------------------------------------------------*/ +/* clock support */ + +void hal_clock_initialize(cyg_uint32 period) +{ + cyg_uint8 prescale; + cyg_uint8 tmp; +#if CYGNUM_HAL_H8300_RTC_PRESCALE == 8 + prescale = 0x01; +#else +#if CYGNUM_HAL_H8300_RTC_PRESCALE == 64 + prescale = 0x02; +#else +#if CYGNUM_HAL_H8300_RTC_PRESCALE == 8192 + prescale = 0x03; +#else +#error illigal RTC prescale setting +#endif +#endif +#endif + HAL_READ_UINT8(CYGARC_MSTPCRL, tmp); + tmp &= ~0x01; + HAL_WRITE_UINT8(CYGARC_MSTPCRL, tmp); + HAL_WRITE_UINT8(CYGARC_8TCORA1, period); + HAL_WRITE_UINT8(CYGARC_8TCNT1, 0x00); + HAL_WRITE_UINT8(CYGARC_8TCR1, 0x48 | prescale); + HAL_WRITE_UINT8(CYGARC_8TCSR1, 0x00); +} + +void hal_clock_reset(cyg_uint32 vector, cyg_uint32 period) +{ + HAL_WRITE_UINT8(CYGARC_8TCR1,0x00); + HAL_WRITE_UINT8(CYGARC_8TCSR1,0x00); + hal_clock_initialize(period); +} + +void hal_clock_read(cyg_uint32 *pvalue) +{ + CYG_BYTE val; + HAL_READ_UINT8(CYGARC_8TCNT1,val); + *pvalue = val; +} + +/*------------------------------------------------------------------------*/ +/* End of plf_misc.c */
--- a/packages/hal/h8300/h8300h/current/ChangeLog +++ b/packages/hal/h8300/h8300h/current/ChangeLog @@ -1,3 +1,8 @@ +2003-07-10 Nick Garnett <nickg@balti.calivar.com> + + * <general>: Added Yoshinori Sato's changes, see entries below, + plus a few small changes of my own. + 2003-04-10 Nick Garnett <nickg@balti.calivar.com> * src/h8300_h8300h.ld: @@ -10,6 +15,24 @@ 2003-04-10 Nick Garnett <nickg@balti.c Added libsupc++.a to GROUP() directive for GCC versions later than 3.0. +2003-03-09 Yoshinori Sato <ysato@users.sourceforge.jp> + + * src/h8300h_stub.c + move arch gdb stub support. + +2003-02-22 Yoshinori Sato <ysato@users.sourceforge.jp> + + * include/mod_regs_pio.h: P7DR define. + * include/mod_regs_tmr.h: remove WDT regs. + * include/var_arch.h: HAL_SaveRegisters add ccr. + * include/variant.h: hal_cpu_save_all/hal_cpu_load_all ccr store. + and CPU depend macros add. + * src/var_misc.c: Nested interrupt support fix. + +2003-10-17 Yoshinori Sato <ysato@users.sourceforge.jp> + + * src/h8300_h8300h.ld: CYGHWR_HAL_H8300_VECTOR_ADDRESS support. + 2002-08-14 Yoshinori Sato <qzb04471@nifty.ne.jp> * include/mod_regs_wdt.h: New file. Providing watchdog hardware data.
--- a/packages/hal/h8300/h8300h/current/cdl/hal_h8300_h8300h.cdl +++ b/packages/hal/h8300/h8300h/current/cdl/hal_h8300_h8300h.cdl @@ -66,7 +66,7 @@ cdl_package CYGPKG_HAL_H8300_H8300H { puts $::cdl_header "#include <pkgconf/hal_h8300.h>" } - compile var_misc.c h8_sci.c + compile var_misc.c h8300h_stub.c make { <PREFIX>/lib/target.ld: <PACKAGE>/src/h8300_h8300h.ld @@ -110,10 +110,4 @@ cdl_package CYGPKG_HAL_H8300_H8300H { the input clock speed and the divider setting." } } - cdl_option CYGNUM_HAL_H8300_H8300H_SCI_BAUD_RATE { - display "SCI serial port default baud rate" - flavor data - legal_values { 4800 9600 14400 19200 38400 57600 115200 } - default_value { 38400 } - } }
--- a/packages/hal/h8300/h8300h/current/include/mod_regs_pio.h +++ b/packages/hal/h8300/h8300h/current/include/mod_regs_pio.h @@ -69,7 +69,7 @@ #define CYGARC_P4DR 0xFFFFD3 #define CYGARC_P5DR 0xFFFFD4 #define CYGARC_P6DR 0xFFFFD5 -/*#define CYGARC_P7DR 0xFFFFD6*/ +#define CYGARC_P7DR 0xFFFFD6 #define CYGARC_P8DR 0xFFFFD7 #define CYGARC_P9DR 0xFFFFD8 #define CYGARC_PADR 0xFFFFD9
--- a/packages/hal/h8300/h8300h/current/include/mod_regs_tmr.h +++ b/packages/hal/h8300/h8300h/current/include/mod_regs_tmr.h @@ -5,7 +5,7 @@ // // mod_regs_tmr.h // -// 16bit/8bit/WatchDog Timer Register +// 16bit/8bit Timer Register // //========================================================================== //####ECOSGPLCOPYRIGHTBEGIN#### @@ -105,8 +105,4 @@ #define CYGARC_8TCNT2 0xFFFF98 #define CYGARC_8TCNT3 0xFFFF99 -#define CYGARC_TCSR 0xFFFF8C -#define CYGARC_TCNT 0xFFFF8D -#define CYGARC_RSTCSR 0xFFFF8F - #endif
--- a/packages/hal/h8300/h8300h/current/include/var_arch.h +++ b/packages/hal/h8300/h8300h/current/include/var_arch.h @@ -65,22 +65,21 @@ typedef struct HAL_SavedRegisters { // These are common to all saved states and are in the order // stored and loaded by the movm instruction. - CYG_ADDRWORD er0; - CYG_ADDRWORD er1; - CYG_ADDRWORD er2; - CYG_ADDRWORD er3; - CYG_ADDRWORD er4; - CYG_ADDRWORD er5; - CYG_ADDRWORD er6; + CYG_WORD32 er0; + CYG_WORD32 er1; + CYG_WORD32 er2; + CYG_WORD32 er3; + CYG_WORD32 er4; + CYG_WORD32 er5; + CYG_WORD32 er6; /* On interrupts the PC and PSW are pushed automatically by the */ /* CPU and SP is pushed for debugging reasons. On a thread switch */ /* the saved context is made to look the same. */ - CYG_ADDRWORD sp; /* Saved copy of SP in some states */ - CYG_WORD32 ccr; - CYG_ADDRWORD pc; /* Program Counter */ - + CYG_WORD32 sp; + CYG_WORD32 ccr; + CYG_WORD32 pc; } HAL_SavedRegisters; // Internal peripheral registers @@ -93,6 +92,7 @@ typedef struct HAL_SavedRegisters #include <cyg/hal/mod_regs_sys.h> #include <cyg/hal/mod_regs_tmr.h> #include <cyg/hal/mod_regs_tpc.h> +#include <cyg/hal/mod_regs_wdt.h> //-------------------------------------------------------------------------- #endif // CYGONCE_HAL_VAR_ARCH_H
--- a/packages/hal/h8300/h8300h/current/include/var_intr.h +++ b/packages/hal/h8300/h8300h/current/include/var_intr.h @@ -197,6 +197,48 @@ externC void hal_interrupt_configure(int #define HAL_INTERRUPT_CONFIGURE_DEFINED //-------------------------------------------------------------------------- +// Interrupt control macros + +#define HAL_DISABLE_INTERRUPTS(_old_) \ + asm volatile ( \ + "sub.l er0,er0\n\t" \ + "stc ccr,r0l\n\t" \ + "orc #0x80,ccr\n\t" \ + "and.b #0xc0,r0l\n\t" \ + "mov.l er0,%0" \ + : "=r"(_old_) \ + : \ + : "er0" \ + ); + +#define HAL_ENABLE_INTERRUPTS() \ + asm volatile ( \ + "andc #0x3f,ccr" \ + ); + +#define HAL_RESTORE_INTERRUPTS(_old_) \ + asm volatile ( \ + "mov.l %0,er0\n\t" \ + "and.b #0xc0,r0l\n\t" \ + "stc ccr,r0h\n\t" \ + "and.b #0x3f,r0h\n\t" \ + "or.b r0h,r0l\n\t" \ + "ldc r0l,ccr" \ + : \ + : "r"(_old_) \ + : "er0" \ + ); + +#define HAL_QUERY_INTERRUPTS(_old_) \ + asm volatile ( \ + "sub.l er0,er0\n\t" \ + "stc ccr,r0l\n\t" \ + "and.b #0xc0,r0l\n\t" \ + "mov.l er0,%0" \ + : "=r"(_old_) \ + ); + +//-------------------------------------------------------------------------- // Clock control. externC void hal_clock_initialize(cyg_uint32 period);
--- a/packages/hal/h8300/h8300h/current/include/variant.inc +++ b/packages/hal/h8300/h8300h/current/include/variant.inc @@ -42,9 +42,9 @@ ##============================================================================= #######DESCRIPTIONBEGIN#### ## -## Author(s): nickg -## Contributors: nickg -## Date: 1999-04-06 +## Author(s): ysato +## Contributors: ysato +## Date: 2002-02-28 ## Purpose: H8/300H definitions. ## Description: This file contains various definitions and macros that are ## useful for writing assembly code for the H8/300H CPU variant. @@ -60,6 +60,7 @@ #include <pkgconf/hal.h> #include <cyg/hal/platform.inc> +#include <cyg/hal/basetype.h> #------------------------------------------------------------------------------ @@ -71,20 +72,29 @@ # CPU state save and restore macros .macro hal_cpu_save_all - stc ccr,@-sp - subs #2,sp subs #4,sp - mov.l er6,@-sp # push all registers + mov.l sp,@-sp + mov.l er6,@-sp ; push all registers mov.l er5,@-sp mov.l er4,@-sp mov.l er3,@-sp mov.l er2,@-sp mov.l er1,@-sp mov.l er0,@-sp + mov.w @(4*9:16,sp),r0 + sub.l er1,er1 + mov.b r0h,r1l + mov.l er1,@(4*8:16,sp) ; copy ccr + mov.l @sp,er0 + mov.l @(4:16,sp),er1 .endm .macro hal_cpu_load_all - mov.l @sp+,er0 # pop regs + mov.w @(4*8+2,sp),r0 + mov.w @(4*9,sp),r1 + mov.b r0l,r1h + mov.w r1,@(4*9,sp) ; set ccr to exception frame + mov.l @sp+,er0 ; pop regs mov.l @sp+,er1 mov.l @sp+,er2 mov.l @sp+,er3 @@ -92,13 +102,70 @@ mov.l @sp+,er5 mov.l @sp+,er6 adds #4,sp - adds #2,sp - ldc @sp+,ccr + adds #4,sp + .endm + + .macro hal_cpu_save_context + hal_cpu_save_all + .endm + + .macro h8300_var_interrupt_entry + mov.l @CYG_LABEL_DEFN(_intvector),er0 + shll.l er0 + shll.l er0 + mov.l @(CYG_LABEL_DEFN(hal_vsr_table),er0),er0 .endm + .macro h8300_var_call_pending_DSR + mov.l er5,@-sp ; save some work regs + mov.l er6,@-sp + mov.l sp,er6 ; save current SP + mov.l #__interrupt_stack,sp ; interrupt stack pointer + stc ccr,r5l ; save PSW + hal_cpu_int_enable ; enable interrupts + ; Call kernel code to invoke DSRs. + jsr @CYG_LABEL_DEFN(cyg_interrupt_call_pending_DSRs) + + ; On return the old SP in a2 and the old PSW in d2 will + ; have been preserved by the calling conventions. + + hal_cpu_int_merge r5l ; Restore previous PSW + mov.l er6,sp ; restore old SP + mov.l @sp+,er6 ; Retrieve old work regs + mov.l @sp+,er5 + rts ; and return + .endm + # Location of PC in saved register context (HAL_SavedRegisters) -#define SAVED_CONTEXT_PC_OFFSET 36 +#define SAVED_CONTEXT_PC_OFFSET (4*9) + + # Enable interrupts + .macro hal_cpu_int_enable + andc #0x3f,ccr + .endm + + # Disable interrupts + .macro hal_cpu_int_disable + orc #0xc0,ccr + .endm + + # Merge the interrupt enable state of the status register in + # \sr with the current sr. + .macro hal_cpu_int_merge sr wk=r0l + and.b #0xc0,\sr + stc ccr,\wk + and.b #0x3f,\wk + or \sr,\wk + ldc \wk,ccr + .endm + + .macro hal_cpu_set_int_level + ldc ccr,r0h + or.b #0xc0,r0h + and.b r0l,r0h + mov.b r0h,ccr + .endm ##----------------------------------------------------------------------------- # Default interrupt decoding macros. @@ -138,8 +205,6 @@ #endif - - #------------------------------------------------------------------------------ #endif // ifndef CYGONCE_HAL_VARIANT_INC # end of variant.inc
--- a/packages/hal/h8300/h8300h/current/src/h8300_h8300h.ld +++ b/packages/hal/h8300/h8300h/current/src/h8300_h8300h.ld @@ -39,16 +39,17 @@ #include <pkgconf/system.h> #include <cyg/hal/basetype.h> +#include <pkgconf/hal.h> STARTUP(vectors.o) ENTRY(CYG_LABEL_DEFN(_start)) #ifdef EXTRAS INPUT(extras.o) #endif -#if (__GNUC__ >= 3) -GROUP(libtarget.a libgcc.a libsupc++.a) -#else +//#if (__GNUC__ >= 3) +//GROUP(libtarget.a libgcc.a libsupc++.a) +//#else GROUP(libtarget.a libgcc.a) -#endif +//#endif #define ALIGN_LMA 4 #define FOLLOWING(_section_) AT ((LOADADDR (_section_) + SIZEOF (_section_) + ALIGN_LMA - 1) & ~ (ALIGN_LMA - 1)) @@ -64,10 +65,10 @@ GROUP(libtarget.a libgcc.a) #define SECTION_text(_region_, _vma_, _lma_) \ .text _vma_ : _lma_ \ - { CYG_LABEL_DEFN(__stext) = ABSOLUTE(.); \ + { CYG_LABEL_DEFN(_stext) = ABSOLUTE(.); \ *(.text*) *(.gnu.warning) *(.gnu.linkonce*) *(.init) } \ > _region_ \ - CYG_LABEL_DEFN(__etext) = .; PROVIDE (etext = .); + CYG_LABEL_DEFN(_etext) = .; PROVIDE (etext = .); #define SECTION_fini(_region_, _vma_, _lma_) \ .fini _vma_ : _lma_ \ @@ -94,13 +95,21 @@ GROUP(libtarget.a libgcc.a) { FORCE_OUTPUT; *(.gcc_except_table) } \ > _region_ -#define SECTION_int_fook_table(_region_, _vma_, _lma_) \ - .int_fook_table _vma_ : _lma_ \ - { CYG_LABEL_DEFN(__int_fook_start) = ABSOLUTE (.); \ - FORCE_OUTPUT; *(.int_fook_table) } \ +#if defined(CYGHWR_HAL_H8300_VECTOR_ADDRESS) +#define SECTION_int_hook_table(_region_, _vma_, _lma_) \ + .int_hook_table CYGHWR_HAL_H8300_VECTOR_ADDRESS : _lma_ \ + { CYG_LABEL_DEFN(__int_hook_start) = ABSOLUTE (.); \ + FORCE_OUTPUT; *(.int_hook_table) } \ > _region_ \ - CYG_LABEL_DEFN(__rom_int_fook_start) = LOADADDR (.int_fook_table); \ - CYG_LABEL_DEFN(__int_fook_end) = .; + CYG_LABEL_DEFN(__rom_int_hook_table) = LOADADDR(.int_hook_table); \ + CYG_LABEL_DEFN(__int_hook_end) = .; +#else +#define SECTION_int_hook_table(_region_, _vma_, _lma_) \ + .int_hook_table _vma_ : _lma_ \ + { CYG_LABEL_DEFN(__int_hook_start) = ABSOLUTE (.); \ + FORCE_OUTPUT; *(.int_hook_table) } \ + > _region_ +#endif #define SECTION_data(_region_, _vma_, _lma_) \ .data _vma_ : _lma_ \ @@ -134,5 +143,3 @@ GROUP(libtarget.a libgcc.a) #include CYGBLD_HAL_PLATFORM_H CYG_LABEL_DEFN(hal_virtual_vector_table) = CYGHWR_HAL_VECTOR_TABLE; - -
new file mode 100644 --- /dev/null +++ b/packages/hal/h8300/h8300h/current/src/h8300h_stub.c @@ -0,0 +1,286 @@ +//======================================================================== +// +// h8300h_stub.c +// +// Helper functions for H8/300H stub +// +//======================================================================== +//####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT ANY +// WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License along +// with eCos; if not, write to the Free Software Foundation, Inc., +// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +// +// As a special exception, if other files instantiate templates or use macros +// or inline functions from this file, or you compile this file and link it +// with other works to produce a work based on this file, this file does not +// by itself cause the resulting work to be covered by the GNU General Public +// License. However the source code for this file must still be made available +// in accordance with section (3) of the GNU General Public License. +// +// This exception does not invalidate any other reasons why a work based on +// this file might be covered by the GNU General Public License. +// +// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +// at http://sources.redhat.com/ecos/ecos-license/ +// ------------------------------------------- +//####ECOSGPLCOPYRIGHTEND#### +//======================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): Yoshinori Sato +// Contributors: Yoshinori Sato +// Date: 2002-05-03 +// Purpose: +// Description: Helper functions for H8/300H stub +// Usage: +// +//####DESCRIPTIONEND#### +// +//======================================================================== + +#include <stddef.h> + +#include <pkgconf/hal.h> + +#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + +#include <cyg/hal/hal_stub.h> +#include <cyg/hal/hal_arch.h> +#include <cyg/hal/hal_intr.h> + +#ifdef CYGDBG_HAL_DEBUG_GDB_THREAD_SUPPORT +#include <cyg/hal/dbg-threads-api.h> // dbg_currthread_id +#endif + +/*---------------------------------------------------------------------- + * Asynchronous interrupt support + */ + +typedef unsigned short t_inst; + +static struct +{ + t_inst *targetAddr; + t_inst savedInstr; +} asyncBuffer; + +/* Called to asynchronously interrupt a running program. + Must be passed address of instruction interrupted. + This is typically called in response to a debug port + receive interrupt. +*/ + +void +install_async_breakpoint(void *pc) +{ + asyncBuffer.targetAddr = pc; + asyncBuffer.savedInstr = *(t_inst *)pc; + *(t_inst *)pc = (t_inst)HAL_BREAKINST; + __instruction_cache(CACHE_FLUSH); + __data_cache(CACHE_FLUSH); +} + +/*--------------------------------------------------------------------*/ +/* Given a trap value TRAP, return the corresponding signal. */ + +int __computeSignal (unsigned int trap_number) +{ + switch (trap_number) { + case 11: + return SIGTRAP; + default: + return SIGINT; + } +} + +/*--------------------------------------------------------------------*/ +/* Return the trap number corresponding to the last-taken trap. */ + +int __get_trap_number (void) +{ + extern int CYG_LABEL_NAME(_intvector); + // The vector is not not part of the GDB register set so get it + // directly from the save context. + return CYG_LABEL_NAME(_intvector); +} + +/*--------------------------------------------------------------------*/ +/* Set the currently-saved pc register value to PC. This also updates NPC + as needed. */ + +void set_pc (target_register_t pc) +{ + put_register (PC, pc); +} + + +/*---------------------------------------------------------------------- + * Single-step support. Lifted from CygMon. + */ + +#define NUM_SS_BPTS 2 +static target_register_t break_mem [NUM_SS_BPTS] = {0, 0}; +static unsigned short break_mem_data [NUM_SS_BPTS]; + +/* Set a single-step breakpoint at ADDR. Up to two such breakpoints + can be set; WHICH specifies which one to set (0 or 1). */ + +static void +set_single_bp (int which, unsigned char *addr) +{ + if (break_mem[which] == 0) { + break_mem[which] = (target_register_t) addr; + break_mem_data[which] = *(unsigned short *)addr; + *(unsigned short *)addr = HAL_BREAKINST; + } +} + +/* Clear any single-step breakpoint(s) that may have been set. */ + +void __clear_single_step (void) +{ + int x; + for (x = 0; x < NUM_SS_BPTS; x++) + { + unsigned short* addr = (unsigned short *)break_mem[x]; + if (addr) { + *addr = break_mem_data[x]; + break_mem[x] = 0; + } + } +} + +/* Set breakpoint(s) to simulate a single step from the current PC. */ + +const static unsigned char opcode_length0[]={ + 0x04,0x02,0x04,0x02,0x04,0x02,0x04,0x02, /* 0x58 */ + 0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02, /* 0x60 */ + 0x02,0x02,0x11,0x11,0x02,0x02,0x04,0x04, /* 0x68 */ + 0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02, /* 0x70 */ + 0x08,0x04,0x06,0x04,0x04,0x04,0x04,0x04 /* 0x78 */ +}; + +const static unsigned char opcode_length1[]={ + 0x10,0x00,0x00,0x00,0x11,0x00,0x00,0x00, + 0x02,0x00,0x00,0x00,0x04,0x04,0x00,0x04 +}; + +static int insn_length(unsigned char *pc) +{ + if (*pc != 0x01 && (*pc < 0x58 || *pc>=0x80)) + return 2; + else + switch (*pc) { + case 0x01: + switch (*(pc+1) & 0xf0) { + case 0x00: + if (*(pc+2)== 0x78) { + return 10; + } else if (*(pc+2)== 0x6b) { + return (*(pc+3) & 0x20)?8:6; + } else { + return (*(pc+2) & 0x02)?6:4; + } + case 0x40: + return (*(pc+2) & 0x02)?8:6; + default: + return opcode_length1[*(pc+1)>>4]; + } + case 0x6a: + case 0x6b: + return (*(pc+1) & 0x20)?6:4; + default: + return opcode_length0[*pc-0x58]; + } +} + +void __single_step (void) +{ + unsigned int pc = get_register (PC); + unsigned int next; + unsigned int opcode; + + opcode = *(unsigned short *)pc; + next = pc + insn_length((unsigned char *)pc); + if (opcode == 0x5470) { + /* rts */ + unsigned long *sp; + sp = (unsigned long *)get_register(SP); + next = *(sp+2) & 0x00ffffff; + } else if (((opcode & 0xf000) == 0x4000) || ((opcode & 0xff00) == 0x5500)) { + /* b**:8 */ + char dsp; + dsp = (opcode & 0xff); + set_single_bp(1,(unsigned char *)(pc+2+dsp)); + } else if (((opcode & 0xff00) == 0x5800) || ((opcode & 0xff00) == 0x5c00)) { + /* b**:16 */ + short dsp; + dsp = *(short *)(pc+2); + set_single_bp(1,(unsigned char *)(pc+4+dsp)); + } else if ((opcode & 0xfb00) != 0x5800) { + /* jmp / jsr */ + int regs; + const short reg_tbl[]={ER0,ER1,ER2,ER3,ER4,ER5,ER6,SP}; + switch(opcode & 0xfb00) { + case 0x5900: + regs = (opcode & 0x0070) >> 8; + next = get_register(reg_tbl[regs]); + break; + case 0x5a00: + next = *(unsigned long *)(pc) & 0x00ffffff; + break; + case 0x5b00: + next = *(unsigned long *)(opcode & 0xff); + break; + } + } + set_single_bp(0,(unsigned char *)next); +} + +void __install_breakpoints (void) +{ + /* NOP since single-step HW exceptions are used instead of + breakpoints. */ +} + +void __clear_breakpoints (void) +{ + +} + + +/* If the breakpoint we hit is in the breakpoint() instruction, return a + non-zero value. */ + +externC void CYG_LABEL_NAME(breakinst)(void); +int +__is_breakpoint_function () +{ + return get_register (PC) == (target_register_t)&CYG_LABEL_NAME(breakinst); +} + + +/* Skip the current instruction. */ + +void __skipinst (void) +{ + unsigned long pc = get_register (PC); + + pc+=insn_length((unsigned char *)pc); + put_register (PC, (target_register_t) pc); +} + +#endif // CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
deleted file mode 100644 --- a/packages/hal/h8300/h8300h/current/src/h8_sci.c +++ /dev/null @@ -1,321 +0,0 @@ -//============================================================================= -// -// h8_sci.c -// -// Simple driver for the H8/300H Serial Communication Interface (SCI) -// -//============================================================================= -//####ECOSGPLCOPYRIGHTBEGIN#### -// ------------------------------------------- -// This file is part of eCos, the Embedded Configurable Operating System. -// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. -// -// eCos is free software; you can redistribute it and/or modify it under -// the terms of the GNU General Public License as published by the Free -// Software Foundation; either version 2 or (at your option) any later version. -// -// eCos is distributed in the hope that it will be useful, but WITHOUT ANY -// WARRANTY; without even the implied warranty of MERCHANTABILITY or -// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -// for more details. -// -// You should have received a copy of the GNU General Public License along -// with eCos; if not, write to the Free Software Foundation, Inc., -// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. -// -// As a special exception, if other files instantiate templates or use macros -// or inline functions from this file, or you compile this file and link it -// with other works to produce a work based on this file, this file does not -// by itself cause the resulting work to be covered by the GNU General Public -// License. However the source code for this file must still be made available -// in accordance with section (3) of the GNU General Public License. -// -// This exception does not invalidate any other reasons why a work based on -// this file might be covered by the GNU General Public License. -// -// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. -// at http://sources.redhat.com/ecos/ecos-license/ -// ------------------------------------------- -//####ECOSGPLCOPYRIGHTEND#### -//============================================================================= -//#####DESCRIPTIONBEGIN#### -// -// Author(s): ysato -// Contributors:ysato -// Date: 2002-03-21 -// Description: Simple driver for the H8/300H Serial Communication Interface -// Clients of this file can configure the behavior with: -// CYGNUM_SCI_PORTS: number of SCI ports -// -//####DESCRIPTIONEND#### -// -//============================================================================= - -#include <pkgconf/hal.h> - -#ifdef CYGNUM_HAL_H8300_SCI_PORTS - -#include <cyg/hal/hal_io.h> // IO macros -#include <cyg/hal/drv_api.h> // CYG_ISR_HANDLED -#include <cyg/hal/hal_misc.h> // Helper functions -#include <cyg/hal/hal_intr.h> // HAL_ENABLE/MASK/UNMASK_INTERRUPTS -#include <cyg/hal/hal_arch.h> // SAVE/RESTORE GP -#include <cyg/hal/hal_if.h> // Calling-if API -#include <cyg/hal/mod_regs_sci.h> // serial register definitions - -#include <cyg/hal/h8_sci.h> // our header - -//-------------------------------------------------------------------------- - -void -cyg_hal_plf_sci_init_channel(void* chan) -{ - cyg_uint8 tmp; - cyg_uint8* base = ((channel_data_t *)chan)->base; - - // Disable Tx/Rx interrupts, but enable Tx/Rx - HAL_WRITE_UINT8(base+_REG_SCSCR, - CYGARC_REG_SCSCR_TE|CYGARC_REG_SCSCR_RE); - - // 8-1-no parity. - HAL_WRITE_UINT8(base+_REG_SCSMR, 0); - - // Set speed to CYGNUM_HAL_H8300_H8300H_SCI_DEFAULT_BAUD_RATE - HAL_READ_UINT8(base+_REG_SCSMR, tmp); - tmp &= ~CYGARC_REG_SCSMR_CKSx_MASK; - tmp |= CYGARC_SCBRR_CKSx(CYGNUM_HAL_H8300_H8300H_SCI_BAUD_RATE); - HAL_WRITE_UINT8(base+_REG_SCSMR, tmp); - HAL_WRITE_UINT8(base+_REG_SCBRR, CYGARC_SCBRR_N(CYGNUM_HAL_H8300_H8300H_SCI_BAUD_RATE)); -} - -static cyg_bool -cyg_hal_plf_sci_getc_nonblock(void* __ch_data, cyg_uint8* ch) -{ - cyg_uint8* base = ((channel_data_t*)__ch_data)->base; - cyg_uint8 sr; - - HAL_READ_UINT8(base+_REG_SCSSR, sr); - if (sr & CYGARC_REG_SCSSR_ORER) { - // Serial RX overrun. Clear error and let caller try again. - HAL_WRITE_UINT8(base+_REG_SCSSR, - CYGARC_REG_SCSSR_CLEARMASK & ~CYGARC_REG_SCSSR_ORER); - return false; - } - - if ((sr & CYGARC_REG_SCSSR_RDRF) == 0) - return false; - - HAL_READ_UINT8(base+_REG_SCRDR, *ch); - - // Clear buffer full flag. - HAL_WRITE_UINT8(base+_REG_SCSSR, sr & ~CYGARC_REG_SCSSR_RDRF); - - return true; -} - -cyg_uint8 -cyg_hal_plf_sci_getc(void* __ch_data) -{ - cyg_uint8 ch; - CYGARC_HAL_SAVE_GP(); - - while(!cyg_hal_plf_sci_getc_nonblock(__ch_data, &ch)); - - CYGARC_HAL_RESTORE_GP(); - return ch; -} - -void -cyg_hal_plf_sci_putc(void* __ch_data, cyg_uint8 c) -{ - cyg_uint8* base = ((channel_data_t*)__ch_data)->base; - cyg_uint8 sr; - CYGARC_HAL_SAVE_GP(); - - do { - HAL_READ_UINT8(base+_REG_SCSSR, sr); - } while ((sr & CYGARC_REG_SCSSR_TDRE) == 0); - - HAL_WRITE_UINT8(base+_REG_SCTDR, c); - - // Clear empty flag. - HAL_WRITE_UINT8(base+_REG_SCSSR, sr & ~CYGARC_REG_SCSSR_TDRE); - - // Hang around until the character has been safely sent. - do { - HAL_READ_UINT8(base+_REG_SCSSR, sr); - } while ((sr & CYGARC_REG_SCSSR_TDRE) == 0); - - CYGARC_HAL_RESTORE_GP(); -} - - -static channel_data_t channels[CYGNUM_HAL_H8300_SCI_PORTS]; - -static void -cyg_hal_plf_sci_write(void* __ch_data, const cyg_uint8* __buf, - cyg_uint32 __len) -{ - CYGARC_HAL_SAVE_GP(); - - while(__len-- > 0) - cyg_hal_plf_sci_putc(__ch_data, *__buf++); - - CYGARC_HAL_RESTORE_GP(); -} - -static void -cyg_hal_plf_sci_read(void* __ch_data, cyg_uint8* __buf, cyg_uint32 __len) -{ - CYGARC_HAL_SAVE_GP(); - - while(__len-- > 0) - *__buf++ = cyg_hal_plf_sci_getc(__ch_data); - - CYGARC_HAL_RESTORE_GP(); -} - -cyg_bool -cyg_hal_plf_sci_getc_timeout(void* __ch_data, cyg_uint8* ch) -{ - channel_data_t* chan = (channel_data_t*)__ch_data; - int delay_count; - cyg_bool res; - CYGARC_HAL_SAVE_GP(); - - delay_count = chan->msec_timeout * 20; // delay in .1 ms steps - - for(;;) { - res = cyg_hal_plf_sci_getc_nonblock(__ch_data, ch); - if (res || 0 == delay_count--) - break; - - CYGACC_CALL_IF_DELAY_US(50); - } - - CYGARC_HAL_RESTORE_GP(); - return res; -} - -static int -cyg_hal_plf_sci_control(void *__ch_data, __comm_control_cmd_t __func, ...) -{ - static int irq_state = 0; - channel_data_t* chan = (channel_data_t*)__ch_data; - cyg_uint8 scr; - int ret = 0; - CYGARC_HAL_SAVE_GP(); - - switch (__func) { - case __COMMCTL_IRQ_ENABLE: - irq_state = 1; - HAL_INTERRUPT_UNMASK(chan->isr_vector); - HAL_READ_UINT8(chan->base+_REG_SCSCR, scr); - scr |= CYGARC_REG_SCSCR_RIE; - HAL_WRITE_UINT8(chan->base+_REG_SCSCR, scr); - break; - case __COMMCTL_IRQ_DISABLE: - ret = irq_state; - irq_state = 0; - HAL_INTERRUPT_UNMASK(chan->isr_vector); - HAL_READ_UINT8(chan->base+_REG_SCSCR, scr); - scr &= ~CYGARC_REG_SCSCR_RIE; - HAL_WRITE_UINT8(chan->base+_REG_SCSCR, scr); - break; - case __COMMCTL_DBG_ISR_VECTOR: - ret = chan->isr_vector; - break; - case __COMMCTL_SET_TIMEOUT: - { - va_list ap; - - va_start(ap, __func); - - ret = chan->msec_timeout; - chan->msec_timeout = va_arg(ap, cyg_uint32); - - va_end(ap); - } - default: - break; - } - CYGARC_HAL_RESTORE_GP(); - return ret; -} - -static int -cyg_hal_plf_sci_isr(void *__ch_data, int* __ctrlc, - CYG_ADDRWORD __vector, CYG_ADDRWORD __data) -{ - cyg_uint8 c, sr; - cyg_uint8* base = ((channel_data_t*)__ch_data)->base; - int res = 0; - CYGARC_HAL_SAVE_GP(); - - *__ctrlc = 0; - HAL_READ_UINT8(base+_REG_SCSSR, sr); - if (sr & CYGARC_REG_SCSSR_ORER) { - // Serial RX overrun. Clear error and hope protocol recovers. - HAL_WRITE_UINT8(base+_REG_SCSSR, - CYGARC_REG_SCSSR_CLEARMASK & ~CYGARC_REG_SCSSR_ORER); - res = CYG_ISR_HANDLED; - } else if (sr & CYGARC_REG_SCSSR_RDRF) { - // Received character - HAL_READ_UINT8(base+_REG_SCRDR, c); - - // Clear buffer full flag. - HAL_WRITE_UINT8(base+_REG_SCSSR, - CYGARC_REG_SCSSR_CLEARMASK & ~CYGARC_REG_SCSSR_RDRF); - - if( cyg_hal_is_break( &c , 1 ) ) - *__ctrlc = 1; - - res = CYG_ISR_HANDLED; - } - - CYGARC_HAL_RESTORE_GP(); - return res; -} - -void -cyg_hal_plf_sci_init(int sci_index, int comm_index, - int rcv_vect, cyg_uint8* base) -{ - channel_data_t* chan = &channels[sci_index]; - hal_virtual_comm_table_t* comm; - int cur = CYGACC_CALL_IF_SET_CONSOLE_COMM(CYGNUM_CALL_IF_SET_COMM_ID_QUERY_CURRENT); - - // Initialize channel table - chan->base = base; - chan->isr_vector = rcv_vect; - chan->msec_timeout = 1000; - - // Disable interrupts. - HAL_INTERRUPT_MASK(chan->isr_vector); - - // Init channel - - cyg_hal_plf_sci_init_channel(chan); - - // Setup procs in the vector table - - // Initialize channel procs - CYGACC_CALL_IF_SET_CONSOLE_COMM(comm_index); - comm = CYGACC_CALL_IF_CONSOLE_PROCS(); - CYGACC_COMM_IF_CH_DATA_SET(*comm, chan); - CYGACC_COMM_IF_WRITE_SET(*comm, cyg_hal_plf_sci_write); - CYGACC_COMM_IF_READ_SET(*comm, cyg_hal_plf_sci_read); - CYGACC_COMM_IF_PUTC_SET(*comm, cyg_hal_plf_sci_putc); - CYGACC_COMM_IF_GETC_SET(*comm, cyg_hal_plf_sci_getc); - CYGACC_COMM_IF_CONTROL_SET(*comm, cyg_hal_plf_sci_control); - CYGACC_COMM_IF_DBG_ISR_SET(*comm, cyg_hal_plf_sci_isr); - CYGACC_COMM_IF_GETC_TIMEOUT_SET(*comm, cyg_hal_plf_sci_getc_timeout); - - // Restore original console - CYGACC_CALL_IF_SET_CONSOLE_COMM(cur); -} - -#endif // CYGNUM_HAL_H8300_H8300H_SCI_PORTS - -//----------------------------------------------------------------------------- -// end of sh_sci.c
--- a/packages/hal/h8300/h8300h/current/src/var_misc.c +++ b/packages/hal/h8300/h8300h/current/src/var_misc.c @@ -40,9 +40,9 @@ //========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): nickg -// Contributors: nickg, jlarmour -// Date: 1999-01-21 +// Author(s): ysato +// Contributors: ysato +// Date: 2002-03-01 // Purpose: HAL miscellaneous functions // Description: This file contains miscellaneous functions provided by the // HAL. @@ -77,7 +77,7 @@ struct int_regs { #define REGS_DEF(ier,isr,mask,status) \ {(CYG_BYTE *)ier,(CYG_BYTE *)isr,mask,status} -struct int_regs interrupt_registers[]= { +const struct int_regs interrupt_registers[]= { REGS_DEF(CYGARC_IER,CYGARC_ISR,0x01,0x01), REGS_DEF(CYGARC_IER,CYGARC_ISR,0x02,0x02), REGS_DEF(CYGARC_IER,CYGARC_ISR,0x04,0x04), @@ -136,7 +136,10 @@ void hal_interrupt_mask(int vector) { CYG_BYTE ier; - struct int_regs *regs=&interrupt_registers[vector-12]; + const struct int_regs *regs; + if( vector < 12 ) + return; + regs=&interrupt_registers[vector-12]; if (vector == CYGNUM_HAL_INTERRUPT_WDT) { HAL_READ_UINT8(CYGARC_TCSR,ier); ier &= ~0x20; @@ -156,7 +159,10 @@ void hal_interrupt_unmask(int vector) { CYG_BYTE ier; - struct int_regs *regs=&interrupt_registers[vector-12]; + const struct int_regs *regs; + if( vector < 12 ) + return; + regs=&interrupt_registers[vector-12]; if (vector == CYGNUM_HAL_INTERRUPT_WDT) { HAL_READ_UINT8(CYGARC_TCSR,ier); ier |= 0x20; @@ -176,7 +182,10 @@ void hal_interrupt_acknowledge(int vector) { CYG_BYTE isr; - struct int_regs *regs=&interrupt_registers[vector-12]; + const struct int_regs *regs; + if( vector < 12 ) + return; + regs=&interrupt_registers[vector-12]; if (vector >= CYGNUM_HAL_INTERRUPT_DEND0A && vector <= CYGNUM_HAL_INTERRUPT_DEND1B) return; @@ -195,7 +204,7 @@ hal_interrupt_acknowledge(int vector) } } -const short priority_table[]={ +const char priority_table[]={ 7, 6, 5, 5, 4, 4,-1,-1, 3, 3,-1, 3, 2, 2, 2, 2, 1, 1, 1, 1, 0, 0, 0, 0, @@ -205,19 +214,26 @@ const short priority_table[]={ 9,9,9,9 }; +CYG_BYTE cyg_hal_level_table[64]; + void hal_interrupt_set_level(int vector,int level) { CYG_BYTE *ipr; CYG_BYTE ipr_mask; - int priority = priority_table[vector-12]; + int priority; + if( vector < 12 ) + return; + priority = priority_table[vector-12]; ipr = (CYG_BYTE *)CYGARC_IPRA + ((priority & 0xf8) >> 3); if (priority>=0) { ipr_mask = 1 << (priority & 0x07); if (level == 0) { *ipr &= ~ipr_mask; + cyg_hal_level_table[vector] = 0x00; } else { *ipr |= ipr_mask; + cyg_hal_level_table[vector] = 0x80; } } else { CYG_FAIL("Unknown interrupt vector"); @@ -240,8 +256,6 @@ hal_interrupt_configure(int vector,int l } CYG_ASSERT(!(up && level), "Cannot trigger on high level!"); HAL_WRITE_UINT8(CYGARC_ISCR,iscr); - } else { - CYG_FAIL("Unhandled interrupt vector"); } }
new file mode 100644 --- /dev/null +++ b/packages/hal/h8300/h8max/current/ChangeLog @@ -0,0 +1,38 @@ +2003-03-09 Yoshinori Sato <ysato@users.sourceforge.jp> + + * New package. + +//=========================================================================== +//####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT ANY +// WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License along +// with eCos; if not, write to the Free Software Foundation, Inc., +// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +// +// As a special exception, if other files instantiate templates or use macros +// or inline functions from this file, or you compile this file and link it +// with other works to produce a work based on this file, this file does not +// by itself cause the resulting work to be covered by the GNU General Public +// License. However the source code for this file must still be made available +// in accordance with section (3) of the GNU General Public License. +// +// This exception does not invalidate any other reasons why a work based on +// this file might be covered by the GNU General Public License. +// +// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +// at http://sources.redhat.com/ecos/ecos-license/ +// ------------------------------------------- +//####ECOSGPLCOPYRIGHTEND#### +//===========================================================================
new file mode 100644 --- /dev/null +++ b/packages/hal/h8300/h8max/current/cdl/hal_h8300_h8300h_h8max.cdl @@ -0,0 +1,292 @@ +# ==================================================================== +# +# hal_h8300_h8300h_h8max.cdl +# +# H8MAX board HAL package configuration data +# +# ==================================================================== +#####ECOSGPLCOPYRIGHTBEGIN#### +## ------------------------------------------- +## This file is part of eCos, the Embedded Configurable Operating System. +## Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +## +## eCos is free software; you can redistribute it and/or modify it under +## the terms of the GNU General Public License as published by the Free +## Software Foundation; either version 2 or (at your option) any later version. +## +## eCos is distributed in the hope that it will be useful, but WITHOUT ANY +## WARRANTY; without even the implied warranty of MERCHANTABILITY or +## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +## for more details. +## +## You should have received a copy of the GNU General Public License along +## with eCos; if not, write to the Free Software Foundation, Inc., +## 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +## +## As a special exception, if other files instantiate templates or use macros +## or inline functions from this file, or you compile this file and link it +## with other works to produce a work based on this file, this file does not +## by itself cause the resulting work to be covered by the GNU General Public +## License. However the source code for this file must still be made available +## in accordance with section (3) of the GNU General Public License. +## +## This exception does not invalidate any other reasons why a work based on +## this file might be covered by the GNU General Public License. +## +## Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +## at http://sources.redhat.com/ecos/ecos-license/ +## ------------------------------------------- +#####ECOSGPLCOPYRIGHTEND#### +# ==================================================================== +######DESCRIPTIONBEGIN#### +# +# Author(s): yoshinori sato +# Original data: bartv +# Contributors: yoshinori sato +# Date: 2002-08-10 +# +#####DESCRIPTIONEND#### +# +# ==================================================================== + +cdl_package CYGPKG_HAL_H8300_H8300H_H8MAX { + display "H8MAX" + parent CYGPKG_HAL_H8300 + requires CYGPKG_HAL_H8300_H8300H + implements CYGINT_HAL_VIRTUAL_VECTOR_SUPPORT + implements CYGINT_HAL_DEBUG_GDB_STUBS + implements CYGINT_HAL_DEBUG_GDB_STUBS_BREAK + implements CYGINT_HAL_PLF_IF_IDE + define_header hal_h8300_h8300h_h8max.h + include_dir cyg/hal + description " + The h8max HAL package provides the support needed to run + eCos on a H8MAX micom board." + + compile hal_diag.c plf_misc.c delay_us.S + + define_proc { + puts $::cdl_system_header "#define CYGBLD_HAL_TARGET_H <pkgconf/hal_h8300_h8300h.h>" + puts $::cdl_system_header "#define CYGBLD_HAL_PLATFORM_H <pkgconf/hal_h8300_h8300h_h8max.h>" + puts $::cdl_system_header "#define CYGBLD_HAL_PLATFORM_IO_H <cyg/hal/plf_io.h>" + + puts $::cdl_header "#define CYG_HAL_H8300" + puts $::cdl_header "#define CYGNUM_HAL_H8300_SCI_PORTS 1" + puts $::cdl_header "#define CYGHWR_HAL_VECTOR_TABLE 0xfffe20" + puts $::cdl_header "#define HAL_PLATFORM_CPU \"H8/300H\"" + puts $::cdl_header "#define HAL_PLATFORM_BOARD \"H8MAX\"" + puts $::cdl_header "#define HAL_PLATFORM_EXTRA \"\"" + } + + cdl_component CYG_HAL_STARTUP { + display "Startup type" + flavor data + legal_values {"ROM" "RAM"} + default_value {"ROM"} + no_define + define -file system.h CYG_HAL_STARTUP + description " + When targetting the H8MAX board it is possible to + build the system for either RAM bootstrap or ROM bootstrap. + RAM bootstrap generally requires that the board + is equipped with ROMs containing a suitable ROM monitor or + equivalent software that allows GDB to download the eCos + application and extend Memory on to the board. + The ROM bootstrap typically + requires that the eCos application be blown into EPROMs or + equivalent technology." + } + + cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS { + display "Number of communication channels on the board" + flavor data + calculated 1 + } + + cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_DEBUG_CHANNEL { + display "Debug serial port" + flavor data + legal_values 0 to CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS-1 + default_value 0 + description " + The AKI3068NET board has only one serial port. This option + chooses which port will be used to connect to a host + running GDB." + } + + cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL { + display "Diagnostic serial port" + flavor data + legal_values 0 to CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS-1 + default_value 0 + description " + The H8MAX board has only one serial port. This option + chooses which port will be used for diagnostic output." + } + + # Real-time clock/counter specifics + cdl_component CYGNUM_HAL_RTC_CONSTANTS { + display "Real-time clock constants." + flavor none + + cdl_option CYGNUM_HAL_RTC_NUMERATOR { + display "Real-time clock numerator" + flavor data + calculated 1000000000 + } + cdl_option CYGNUM_HAL_RTC_DENOMINATOR { + display "Real-time clock denominator" + flavor data + calculated 100 + } + cdl_option CYGNUM_HAL_H8300_RTC_PRESCALE { + display "Real-time clock base prescale" + flavor data + calculated 8192 + } + # Isn't a nice way to handle freq requirement! + cdl_option CYGNUM_HAL_RTC_PERIOD { + display "Real-time clock period" + flavor data + calculated 10 + } + } + + cdl_option CYGHWR_HAL_H8300_CPG_INPUT { + display "OSC/Clock Freqency" + flavor data + default_value 25000000 + } + + cdl_option CYGHWR_HAL_H8MAX_EXTRAM { + display "Extend DRAM Using" + flavor bool + default_value 1 + } + + cdl_component CYGBLD_GLOBAL_OPTIONS { + display "Global build options" + flavor none + parent CYGPKG_NONE + description " + Global build options including control over + compiler flags, linker flags and choice of toolchain." + + + cdl_option CYGBLD_GLOBAL_COMMAND_PREFIX { + display "Global command prefix" + flavor data + no_define + default_value { "h8300-elf" } + description " + This option specifies the command prefix used when + invoking the build tools." + } + + cdl_option CYGBLD_GLOBAL_CFLAGS { + display "Global compiler flags" + flavor data + no_define + default_value { "-Wall -Wpointer-arith -Wstrict-prototypes -Winline -Wundef -Woverloaded-virtual -g -O2 -mh -mint32 -fsigned-char -fdata-sections -fno-rtti -fno-exceptions -fvtable-gc -finit-priority" } + description " + This option controls the global compiler flags which + are used to compile all packages by + default. Individual packages may define + options which override these global flags." + } + + cdl_option CYGBLD_GLOBAL_LDFLAGS { + display "Global linker flags" + flavor data + no_define + default_value { "-g -nostdlib -Wl,--gc-sections -Wl,-static -mh -mint32" } + description " + This option controls the global linker flags. Individual + packages may define options which override these global flags." + } + cdl_option CYGBLD_BUILD_GDB_STUBS { + display "Build GDB stub ROM image" + default_value 0 + requires CYGSEM_HAL_ROM_MONITOR + requires CYGBLD_BUILD_COMMON_GDB_STUBS + requires CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + requires CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT + requires CYGDBG_HAL_DEBUG_GDB_THREAD_SUPPORT + no_define + description " + This option enables the building of the GDB stubs for the + board. The common HAL controls takes care of most of the + build process, but the final conversion from ELF image to + binary data is handled by the platform CDL, allowing + relocation of the data if necessary." + + make -priority 320 { + <PREFIX>/bin/gdb_module.bin : <PREFIX>/bin/gdb_module.img + $(OBJCOPY) -O binary $< $@ + } + } + } + + cdl_component CYGHWR_MEMORY_LAYOUT { + display "Memory layout" + flavor data + no_define + calculated { CYG_HAL_STARTUP == "RAM" ? "h8300_h8300h_h8max_ram" : \ + "h8300_h8300h_h8max_rom" } + + cdl_option CYGHWR_MEMORY_LAYOUT_LDI { + display "Memory layout linker script fragment" + flavor data + no_define + define -file system.h CYGHWR_MEMORY_LAYOUT_LDI + calculated { CYG_HAL_STARTUP == "RAM" ? "<pkgconf/mlt_h8300_h8300h_h8max_ram.ldi>" : \ + "<pkgconf/mlt_h8300_h8300h_h8max_rom.ldi>" } + } + + cdl_option CYGHWR_MEMORY_LAYOUT_H { + display "Memory layout header file" + flavor data + no_define + define -file system.h CYGHWR_MEMORY_LAYOUT_H + calculated { CYG_HAL_STARTUP == "RAM" ? "<pkgconf/mlt_h8300_h8300h_h8max_ram.h>" : \ + "<pkgconf/mlt_h8300_h8300h_h8max_rom.h>" } + } + } + cdl_option CYGSEM_HAL_ROM_MONITOR { + display "Behave as a ROM monitor" + flavor bool + default_value 0 + parent CYGPKG_HAL_ROM_MONITOR + requires { CYG_HAL_STARTUP == "ROM" } + description " + Enable this option if this program is to be used as a ROM monitor, + i.e. applications will be loaded into RAM on the board, and this + ROM monitor may process exceptions or interrupts generated from the + application. This enables features such as utilizing a separate + interrupt stack when exceptions are generated." + } + cdl_option CYGSEM_HAL_H8300_VECTOR_HOOK { + display "Interrupt Vector Hook" + flavor bool + default_value 1 + parent CYGPKG_HAL_ROM_MONITOR + description " + Interrupt Vector Table Hooking Support" + } + cdl_option CYGHWR_HAL_H8300_VECTOR_ADDRESS { + display "Hook Vector Address" + flavor data + default_value 0xffbf20 + parent CYGPKG_HAL_ROM_MONITOR + requires { CYGSEM_HAL_H8300_VECTOR_HOOK == 1 } + description " + Hooking Vector Table Address" + } + cdl_option CYGHAL_PLF_SCI_BASE { + display "SCI Base address" + flavor data + default_value 0xffffb8 + description " + Used SCI Channel base address." + } +}
new file mode 100644 --- /dev/null +++ b/packages/hal/h8300/h8max/current/include/hal_diag.h @@ -0,0 +1,80 @@ +#ifndef CYGONCE_HAL_HAL_DIAG_H +#define CYGONCE_HAL_HAL_DIAG_H + +/*============================================================================= +// +// hal_diag.h +// +// HAL Support for Kernel Diagnostic Routines +// +//============================================================================= +//####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT ANY +// WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License along +// with eCos; if not, write to the Free Software Foundation, Inc., +// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +// +// As a special exception, if other files instantiate templates or use macros +// or inline functions from this file, or you compile this file and link it +// with other works to produce a work based on this file, this file does not +// by itself cause the resulting work to be covered by the GNU General Public +// License. However the source code for this file must still be made available +// in accordance with section (3) of the GNU General Public License. +// +// This exception does not invalidate any other reasons why a work based on +// this file might be covered by the GNU General Public License. +// +// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +// at http://sources.redhat.com/ecos/ecos-license/ +// ------------------------------------------- +//####ECOSGPLCOPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): yoshinori sato +// Contributors: yoshinori sato +// Date: 2002-04-06 +// Purpose: HAL Support for Kernel Diagnostic Routines +// Description: Diagnostic routines for use during kernel development. +// Usage: #include <cyg/hal/hal_diag.h> +// +//####DESCRIPTIONEND#### +// +//===========================================================================*/ + +#include <pkgconf/hal.h> + +#include <cyg/infra/cyg_type.h> + +externC void hal_diag_init(void); +externC void hal_diag_write_char(cyg_uint8 c); +externC void hal_diag_read_char(cyg_uint8 *c); + +/*---------------------------------------------------------------------------*/ + +#define HAL_DIAG_INIT() hal_diag_init() + +#define HAL_DIAG_WRITE_CHAR(_c_) hal_diag_write_char(_c_) + +#define HAL_DIAG_READ_CHAR(_c_) hal_diag_read_char(&_c_) + +//----------------------------------------------------------------------------- +// Simple LED control. +externC void hal_diag_led_on( void ); +externC void hal_diag_led_off( void ); + +/*---------------------------------------------------------------------------*/ +/* end of hal_diag.h */ +#endif /* CYGONCE_HAL_HAL_DIAG_H */
new file mode 100644 --- /dev/null +++ b/packages/hal/h8300/h8max/current/include/pkgconf/mlt_h8300_h8300h_h8max_ram.h @@ -0,0 +1,14 @@ +// eCos memory layout - Wed Nov 24 13:10:23 1999 + +// This is a generated file - changes will be lost if ConfigTool(MLT) is run + +#ifndef __ASSEMBLER__ +#include <cyg/infra/cyg_type.h> +#include <stddef.h> + +#endif + +#define CYGMEM_REGION_ram (0x420000) +#define CYGMEM_REGION_ram_SIZE (0x1E0000) +#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W) +
new file mode 100644 --- /dev/null +++ b/packages/hal/h8300/h8max/current/include/pkgconf/mlt_h8300_h8300h_h8max_ram.ldi @@ -0,0 +1,31 @@ +// eCos memory layout - Fri Oct 20 08:25:16 2000 + +// This is a generated file - do not edit + +#include <cyg/infra/cyg_type.inc> + +OUTPUT_FORMAT("elf32-h8300") +OUTPUT_ARCH(h8300h) + +MEMORY +{ + ram : ORIGIN = 0x400000, LENGTH = 0x30000 + iram : ORIGIN = 0xffbf20, LENGTH = 0x4000 +} + +SECTIONS +{ + SECTIONS_BEGIN + SECTION_text (ram, 0x400000, LMA_EQ_VMA) + SECTION_fini (ram, ALIGN (0x1), LMA_EQ_VMA) + SECTION_rodata (ram, ALIGN (0x1), LMA_EQ_VMA) + SECTION_rodata1 (ram, ALIGN (0x1), LMA_EQ_VMA) + SECTION_fixup (ram, ALIGN (0x1), LMA_EQ_VMA) + SECTION_gcc_except_table (ram, ALIGN (0x1), LMA_EQ_VMA) + SECTION_data (ram, ALIGN (0x4),LMA_EQ_VMA) + SECTION_bss (ram, ALIGN (0x4),LMA_EQ_VMA) + SECTION_int_hook_table (iram, CYGHWR_HAL_H8300_VECTOR_ADDRESS, FOLLOWING(.data)) + SECTIONS_END +} + +fook_table_address = 0xffbf20;
new file mode 100644 --- /dev/null +++ b/packages/hal/h8300/h8max/current/include/pkgconf/mlt_h8300_h8300h_h8max_ram.mlt @@ -0,0 +1,12 @@ +version 0 +region ram 400000 10000 0 ! +section text 0 1 0 1 0 1 0 1 400000 400000 fini fini ! +section fini 0 1 0 1 0 1 0 1 rodata rodata ! +section rodata 0 1 0 1 0 1 0 1 rodata1 rodata1 ! +section rodata1 0 1 0 1 0 1 0 1 fixup fixup ! +section fixup 0 1 0 1 0 1 0 1 gcc_except_table gcc_except_table ! +section gcc_except_table 0 1 0 1 0 1 0 1 int_hook_table int_hook_table ! +section int_hook_table 0 1 0 1 0 1 0 1 data data ! +section data 0 4 0 1 0 1 0 1 bss bss ! +section bss 0 4 0 1 0 1 0 0 ! +
new file mode 100644 --- /dev/null +++ b/packages/hal/h8300/h8max/current/include/pkgconf/mlt_h8300_h8300h_h8max_rom.h @@ -0,0 +1,18 @@ +// eCos memory layout - Wed Nov 24 13:10:23 1999 + +// This is a generated file - changes will be lost if ConfigTool(MLT) is run + +#ifndef __ASSEMBLER__ +#include <cyg/infra/cyg_type.h> +#include <stddef.h> + +#endif + +#define CYGMEM_REGION_ram (0x400000) +#if !defined(CYGPKG_IO_ETH_DRIVERS) +#define CYGMEM_REGION_ram_SIZE (0x200000) +#else +#define CYGMEM_REGION_ram_SIZE (0x200000-0xC000) +#endif +#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W) +
new file mode 100644 --- /dev/null +++ b/packages/hal/h8300/h8max/current/include/pkgconf/mlt_h8300_h8300h_h8max_rom.ldi @@ -0,0 +1,42 @@ +// eCos memory layout - Fri Oct 20 08:25:16 2000 + +// This is a generated file - do not edit + +#include <cyg/infra/cyg_type.inc> + +OUTPUT_FORMAT("elf32-h8300") +OUTPUT_ARCH(h8300h) + +MEMORY +{ +#define IRAM_TOP 0xffbf20 + rom : ORIGIN = 0x000000, LENGTH = 0x60000 +#if !defined(CYGPKG_IO_ETH_DRIVERS) +#define WORK IRAM_TOP+0x100 + ram : ORIGIN = WORK, LENGTH = 0x4000-0x100 +#else +#define WORK 0x5f4000 + ram : ORIGIN = WORK, LENGTH = 0xC000 + iram : ORIGIN = IRAM_TOP, LENGTH = 0x4000 +#endif +} + +SECTIONS +{ + SECTIONS_BEGIN + SECTION_rom_vectors (rom, 0x000000, LMA_EQ_VMA) + SECTION_text (rom, ALIGN (0x1), LMA_EQ_VMA) + SECTION_fini (rom, ALIGN (0x1), LMA_EQ_VMA) + SECTION_rodata (rom, ALIGN (0x1), LMA_EQ_VMA) + SECTION_rodata1 (rom, ALIGN (0x1), LMA_EQ_VMA) + SECTION_fixup (rom, ALIGN (0x1), LMA_EQ_VMA) + SECTION_gcc_except_table (rom, ALIGN (0x1), LMA_EQ_VMA) + SECTION_data (ram, WORK,FOLLOWING (.gcc_except_table)) + SECTION_bss (ram, ALIGN (0x4),LMA_EQ_VMA) +#if !defined(CYGPKG_IO_ETH_DRIVERS) + SECTION_int_hook_table (ram, CYGHWR_HAL_H8300_VECTOR_ADDRESS, FOLLOWING(.data)) +#else + SECTION_int_hook_table (iram, CYGHWR_HAL_H8300_VECTOR_ADDRESS, FOLLOWING(.data)) +#endif + SECTIONS_END +}
new file mode 100644 --- /dev/null +++ b/packages/hal/h8300/h8max/current/include/pkgconf/mlt_h8300_h8300h_h8max_rom.mlt @@ -0,0 +1,12 @@ +version 0 +region ram ffbf20 ffff20 0 ! +section rom_vectors 0 1 0 1 1 1 1 1 0 60000 text text ! +section text 0 1 0 1 0 1 0 1 fini fini ! +section fini 0 1 0 1 0 1 0 1 rodata rodata ! +section rodata 0 1 0 1 0 1 0 1 rodata1 rodata1 ! +section rodata1 0 1 0 1 0 1 0 1 fixup fixup ! +section fixup 0 1 0 1 0 1 0 1 gcc_except_table gcc_except_table ! +section gcc_except_table 0 1 0 1 0 1 0 1 data data ! +section data 0 4 0 1 0 1 0 1 bss bss ! +section bss 0 4 0 1 0 1 0 1 heap1 heap1 ! +section heap1 0 8 0 0 0 0 0 0 !
new file mode 100644 --- /dev/null +++ b/packages/hal/h8300/h8max/current/include/platform.inc @@ -0,0 +1,145 @@ +#ifndef CYGONCE_HAL_PLATFORM_INC +#define CYGONCE_HAL_PLATFORM_INC +##============================================================================= +## +## platform.inc +## +## H8MAX "board" assembler header file +## +##============================================================================= +#####ECOSGPLCOPYRIGHTBEGIN#### +## ------------------------------------------- +## This file is part of eCos, the Embedded Configurable Operating System. +## Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +## +## eCos is free software; you can redistribute it and/or modify it under +## the terms of the GNU General Public License as published by the Free +## Software Foundation; either version 2 or (at your option) any later version. +## +## eCos is distributed in the hope that it will be useful, but WITHOUT ANY +## WARRANTY; without even the implied warranty of MERCHANTABILITY or +## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +## for more details. +## +## You should have received a copy of the GNU General Public License along +## with eCos; if not, write to the Free Software Foundation, Inc., +## 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +## +## As a special exception, if other files instantiate templates or use macros +## or inline functions from this file, or you compile this file and link it +## with other works to produce a work based on this file, this file does not +## by itself cause the resulting work to be covered by the GNU General Public +## License. However the source code for this file must still be made available +## in accordance with section (3) of the GNU General Public License. +## +## This exception does not invalidate any other reasons why a work based on +## this file might be covered by the GNU General Public License. +## +## Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +## at http://sources.redhat.com/ecos/ecos-license/ +## ------------------------------------------- +#####ECOSGPLCOPYRIGHTEND#### +##============================================================================= +#######DESCRIPTIONBEGIN#### +## +## Author(s): Yoshinori Sato +## Contributors: Yoshinori Sato,Masahiro Ochiai +## Date: 2002-08-10 +## Purpose: H8MAX "board" definitions. +## Description: This file contains various definitions and macros that are +## required for writing assembly code for the H8MAX board +## Currently there are none +## Usage: +## #include <cyg/hal/platform.inc> +## ... +## +## +######DESCRIPTIONEND#### +## +##============================================================================= + +#include <pkgconf/hal.h> + +#include <cyg/hal/mod_regs_bsc.h> +#include <cyg/hal/mod_regs_pio.h> + +##----------------------------------------------------------------------------- + +#define CYGPKG_HAL_H8300_MEMC_DEFINED + .macro hal_memc_init +#if defined(CYG_HAL_STARTUP_ROM) + mov.l #init_regs,er0 +1: + mov.w @er0+,r2 + beq 1f + cmp.w #0xf000,r2 + bhi 2f + mov.w #0x00fe,e2 + bra 3f +2: + mov.w #0x00ff,e2 +3: + mov.w @er0+,r1 + mov.b r1l,@er2 + bra 1b + +init_regs: +#define INIT_REGS_DATA(REGS,DATA) \ + .word (REGS & 0xffff),DATA +init_regs: +INIT_REGS_DATA(CYGARC_RTCOR,195) +INIT_REGS_DATA(CYGARC_RTMCSR,0x17) +INIT_REGS_DATA(CYGARC_DRCRB,0xb8) +INIT_REGS_DATA(CYGARC_DRCRA,0x38) +INIT_REGS_DATA(CYGARC_ASTCR,0xfa) +INIT_REGS_DATA(CYGARC_ABWCR,0xe0) +INIT_REGS_DATA(CYGARC_BCR ,0xc7) +INIT_REGS_DATA(CYGARC_CSCR ,0x1f) +INIT_REGS_DATA(CYGARC_WCRH ,0xfd) +INIT_REGS_DATA(CYGARC_WCRL ,0x44) +INIT_REGS_DATA(CYGARC_P1DDR,0xff) +INIT_REGS_DATA(CYGARC_P2DDR,0xff) +INIT_REGS_DATA(CYGARC_P6DDR,0xf6) +INIT_REGS_DATA(CYGARC_P8DDR,0xee) + .word 0 +;; Special Thanks Masahiro Ochiai + +;; DRAM Setup delay +1: + mov.b #8,r0h +2: + mov.b #0,r0l +3: + dec.b r0l + bne 3b + mov.b @CYGARC_RTMCSR,r0l + bpl 2b + dec r0h + bne 2b +#endif + .endm + +#define CYGPKG_HAL_H8300_DIAG_DEFINED + + .macro hal_diag_init + mov.b #0x83,r0l + mov.b r0l,@CYGARC_PADDR + mov.b #0,r0l + mov.b r0l,@CYGARC_PADR + .endm + + .macro hal_diag_excpt_start + .endm + + .macro hal_diag_intr_start + .endm + + .macro hal_diag_restore + .endm + + .macro hal_diag_data + .endm + +#------------------------------------------------------------------------------ +#endif // ifndef CYGONCE_HAL_PLATFORM_INC +# end of platform.inc
new file mode 100644 --- /dev/null +++ b/packages/hal/h8300/h8max/current/include/plf_intr.h @@ -0,0 +1,76 @@ +#ifndef CYGONCE_HAL_PLF_INTR_H +#define CYGONCE_HAL_PLF_INTR_H + +//========================================================================== +// +// plf_intr.h +// +// H8MAX board interrupt and clock support +// +//========================================================================== +//####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT ANY +// WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License along +// with eCos; if not, write to the Free Software Foundation, Inc., +// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +// +// As a special exception, if other files instantiate templates or use macros +// or inline functions from this file, or you compile this file and link it +// with other works to produce a work based on this file, this file does not +// by itself cause the resulting work to be covered by the GNU General Public +// License. However the source code for this file must still be made available +// in accordance with section (3) of the GNU General Public License. +// +// This exception does not invalidate any other reasons why a work based on +// this file might be covered by the GNU General Public License. +// +// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +// at http://sources.redhat.com/ecos/ecos-license/ +// ------------------------------------------- +//####ECOSGPLCOPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jlarmour +// Contributors: ysato +// Date: ysato +// Purpose: Define Interrupt support +// Description: The macros defined here provide the HAL APIs for handling +// interrupts and the clock for the simulator. This file +// is empty since none are required! +// +// Usage: +// #include <cyg/hal/plf_intr.h> +// ... +// +// +//####DESCRIPTIONEND#### +// +//========================================================================== + + +//-------------------------------------------------------------------------- + +externC void h8300h_reset (void); +externC void hal_delay_us(int usecs); + +#define HAL_PLATFORM_RESET(x) +#define HAL_PLATFORM_RESET_ENTRY &h8300h_reset + +#define HAL_DELAY_US(n) hal_delay_us((n)) + +//-------------------------------------------------------------------------- +#endif // ifndef CYGONCE_HAL_PLF_INTR_H +// End of plf_intr.h
new file mode 100644 --- /dev/null +++ b/packages/hal/h8300/h8max/current/include/plf_io.h @@ -0,0 +1,97 @@ +#ifndef CYGONCE_HAL_PLF_IO_H +#define CYGONCE_HAL_PLF_IO_H + +//============================================================================= +// +// plf_io.h +// +// platform specific IO support +// +//============================================================================= +//####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT ANY +// WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License along +// with eCos; if not, write to the Free Software Foundation, Inc., +// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +// +// As a special exception, if other files instantiate templates or use macros +// or inline functions from this file, or you compile this file and link it +// with other works to produce a work based on this file, this file does not +// by itself cause the resulting work to be covered by the GNU General Public +// License. However the source code for this file must still be made available +// in accordance with section (3) of the GNU General Public License. +// +// This exception does not invalidate any other reasons why a work based on +// this file might be covered by the GNU General Public License. +// +// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +// at http://sources.redhat.com/ecos/ecos-license/ +// ------------------------------------------- +//####ECOSGPLCOPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): ysato +// Contributors: ysato +// Date: 2002-08-29 +// Purpose: H8MAX IO support +// Description: The macros defined here provide the HAL APIs for handling +// basic IO +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#include <pkgconf/system.h> + +//----------------------------------------------------------------------------- +// IDE interface macros +// +#define HAL_IDE_NUM_CONTROLLERS 1 + +// Initialize the IDE controller(s). +#define HAL_IDE_INIT() + +#define IDE_CMD_ADDRESS 0x200000 +#define IDE_CTL_ADDRESS 0x600000 + +#define HAL_IDE_READ_UINT8( __ctlr, __regno, __val ) \ + HAL_READ_UINT8(IDE_CMD_ADDRESS + ((__regno)<<1)+1 , (__val)) +#define HAL_IDE_READ_UINT16( __ctlr, __regno, __val ) \ + hal_ide_read_uint16_swap(__regno,&(__val) ) +#define HAL_IDE_READ_ALTSTATUS( __ctlr, __val ) \ + HAL_READ_UINT16(IDE_CTL_ADDRESS + 12, (__val)) + +#define HAL_IDE_WRITE_UINT8( __ctlr, __regno, __val ) \ + HAL_WRITE_UINT16(IDE_CMD_ADDRESS + ((__regno)<<1)+1 , (__val)) +#define HAL_IDE_WRITE_UINT16( __ctlr, __regno, __val ) \ + hal_ide_write_uint16_swap(__regno, __val ) +#define HAL_IDE_WRITE_CONTROL( __ctlr, __val ) \ + HAL_WRITE_UINT16(IDE_CTL_ADDRESS + 12, (__val)) + +static inline void hal_ide_read_uint16_swap(CYG_WORD16 __regno, CYG_WORD16 *__val ) +{ + CYG_WORD16 d; + d = *(volatile CYG_WORD16 *)(IDE_CMD_ADDRESS + (__regno <<1)); + *__val = (d >> 8) | (d << 8); +} + +static inline void hal_ide_write_uint16_swap(CYG_WORD16 __regno, CYG_WORD16 __val ) +{ + *(volatile CYG_WORD16 *)(IDE_CMD_ADDRESS + (__regno <<1)) = (__val >> 8) | (__val << 8); +} +//----------------------------------------------------------------------------- +#endif +// end of plf_io.h
new file mode 100644 --- /dev/null +++ b/packages/hal/h8300/h8max/current/include/plf_stub.h @@ -0,0 +1,90 @@ +#ifndef CYGONCE_HAL_PLF_STUB_H +#define CYGONCE_HAL_PLF_STUB_H + +//============================================================================= +// +// plf_stub.h +// +// Platform header for GDB stub support. +// +//============================================================================= +//####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT ANY +// WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License along +// with eCos; if not, write to the Free Software Foundation, Inc., +// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +// +// As a special exception, if other files instantiate templates or use macros +// or inline functions from this file, or you compile this file and link it +// with other works to produce a work based on this file, this file does not +// by itself cause the resulting work to be covered by the GNU General Public +// License. However the source code for this file must still be made available +// in accordance with section (3) of the GNU General Public License. +// +// This exception does not invalidate any other reasons why a work based on +// this file might be covered by the GNU General Public License. +// +// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +// at http://sources.redhat.com/ecos/ecos-license/ +// ------------------------------------------- +//####ECOSGPLCOPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jskov +// Contributors:jskov,ysato +// Date: 1999-05-18 +// Purpose: Platform HAL stub support for H8/300H simulator +// Usage: #include <cyg/hal/plf_stub.h> +// +//####DESCRIPTIONEND#### +// +//============================================================================= + +#include <pkgconf/system.h> +#include <pkgconf/hal.h> + +#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + +#include <cyg/infra/cyg_type.h> // CYG_UNUSED_PARAM, externC + +#include <cyg/hal/h8300_stub.h> // architecture stub support + +#include <cyg/hal/hal_diag.h> // hal_diag_led_on + +//---------------------------------------------------------------------------- +// Define some platform specific communication details. This is mostly +// handled by hal_if now, but we need to make sure the comms tables are +// properly initialized. + +externC void cyg_hal_plf_comms_init(void); + +#define HAL_STUB_PLATFORM_INIT_SERIAL() cyg_hal_plf_comms_init() + +#define HAL_STUB_PLATFORM_SET_BAUD_RATE(baud) CYG_UNUSED_PARAM(int, (baud)) +#define HAL_STUB_PLATFORM_INTERRUPTIBLE 0 + +//---------------------------------------------------------------------------- +// Stub initializer. +#ifdef CYGSEM_HAL_ROM_MONITOR +# define HAL_STUB_PLATFORM_INIT() hal_diag_led_on() +#else +# define HAL_STUB_PLATFORM_INIT() CYG_EMPTY_STATEMENT +#endif + +#endif // ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS +//----------------------------------------------------------------------------- +#endif // CYGONCE_HAL_PLF_STUB_H +// End of plf_stub.h
new file mode 100644 --- /dev/null +++ b/packages/hal/h8300/h8max/current/src/delay_us.S @@ -0,0 +1,25 @@ +;;delay_us + +#include <pkgconf/hal.h> + +#include <cyg/hal/arch.inc> +#include <cyg/hal/basetype.h> +#include <cyg/hal/mod_regs_tmr.h> + +// .file "delay_us.S" + .h8300h + .text + + .global CYG_LABEL_DEFN(hal_delay_us) +CYG_LABEL_DEFN(hal_delay_us): + shlr.l er0 + shlr.l er0 + shlr.l er0 + mov.l er0,er0 +1: + ble 4f + dec.l #1,er0 + bra 1b +4: + rts +
new file mode 100644 --- /dev/null +++ b/packages/hal/h8300/h8max/current/src/hal_diag.c @@ -0,0 +1,187 @@ +/*============================================================================= +// +// hal_diag.c +// +// HAL diagnostic output code +// +//============================================================================= +//####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT ANY +// WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License along +// with eCos; if not, write to the Free Software Foundation, Inc., +// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +// +// As a special exception, if other files instantiate templates or use macros +// or inline functions from this file, or you compile this file and link it +// with other works to produce a work based on this file, this file does not +// by itself cause the resulting work to be covered by the GNU General Public +// License. However the source code for this file must still be made available +// in accordance with section (3) of the GNU General Public License. +// +// This exception does not invalidate any other reasons why a work based on +// this file might be covered by the GNU General Public License. +// +// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +// at http://sources.redhat.com/ecos/ecos-license/ +// ------------------------------------------- +//####ECOSGPLCOPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): ysato +// Contributors: ysato +// Date: 2002-04-05 +// Purpose: HAL diagnostic output +// Description: Implementations of HAL diagnostic output support. +// +//####DESCRIPTIONEND#### +// +//===========================================================================*/ + +#include <pkgconf/hal.h> + +#include <cyg/hal/hal_diag.h> +#include <cyg/hal/h8_sci.h> +#include <cyg/hal/var_intr.h> +#include <cyg/hal/hal_intr.h> +#include <cyg/hal/hal_misc.h> + +#define SCI_BASE ((cyg_uint8*)CYGHAL_PLF_SCI_BASE) + +const static channel_data_t channel = { (cyg_uint8*)SCI_BASE, 0, 0}; + +void +cyg_hal_plf_comms_init(void) +{ + static int initialized = 0; + + if (initialized) + return; + + initialized = 1; + + cyg_hal_plf_sci_init(0, 0, CYGNUM_HAL_INTERRUPT_RXI1, SCI_BASE); +} + +//============================================================================= +// Led control +//============================================================================= +#define LED CYGARC_PADR + +void +hal_diag_led_on( void ) +{ + HAL_WRITE_UINT8(LED, 0x01); +} + +void +hal_diag_led_off( void ) +{ + HAL_WRITE_UINT8(LED, 0); +} + +//============================================================================= +// Compatibility with older stubs +//============================================================================= + +#if defined(CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS) +#include <cyg/hal/hal_stub.h> // hal_output_gdb_string +#endif + +void hal_diag_init(void) +{ + cyg_hal_plf_sci_init_channel(&channel); +} + +void +hal_diag_write_char( cyg_uint8 c ) +{ +#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + static char line[100]; + static int pos = 0; + + // No need to send CRs + if( c == '\r' ) return; + + line[pos++] = c; + + if( c == '\n' || pos == sizeof(line) ) + { + CYG_INTERRUPT_STATE old; + + // Disable interrupts. This prevents GDB trying to interrupt us + // while we are in the middle of sending a packet. The serial + // receive interrupt will be seen when we re-enable interrupts + // later. + + CYG_HAL_GDB_ENTER_CRITICAL_IO_REGION(old); + + while(1) + { + char c1; + static char hex[] = "0123456789ABCDEF"; + cyg_uint8 csum = 0; + int i; + + cyg_hal_plf_sci_putc(&channel, '$'); + cyg_hal_plf_sci_putc(&channel, 'O'); + csum += 'O'; + for( i = 0; i < pos; i++ ) + { + char ch = line[i]; + char h = hex[(ch>>4)&0xF]; + char l = hex[ch&0xF]; + cyg_hal_plf_sci_putc(&channel, h); + cyg_hal_plf_sci_putc(&channel, l); + csum += h; + csum += l; + } + cyg_hal_plf_sci_putc(&channel, '#'); + cyg_hal_plf_sci_putc(&channel, hex[(csum>>4)&0xF]); + cyg_hal_plf_sci_putc(&channel, hex[csum&0xF]); + + // Wait for the ACK character '+' from GDB here and handle + // receiving a ^C instead. + c1 = (char) cyg_hal_plf_sci_getc(&channel); + + if( c1 == '+' ) + break; // a good acknowledge + + // Check for user break. + if( cyg_hal_is_break( &c1, 1 ) ) + cyg_hal_user_break( NULL ); + + // otherwise, loop round again + } + + pos = 0; + + // And re-enable interrupts + CYG_HAL_GDB_LEAVE_CRITICAL_IO_REGION(old); + } +#else // CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + cyg_hal_plf_sci_putc(&channel, c); +#endif +} + +void +hal_diag_read_char(cyg_uint8 *c) +{ + *c = (char) cyg_hal_plf_sci_getc(&channel); +} + +/*===========================================================================*/ +/* EOF hal_diag.c */ +
new file mode 100644 --- /dev/null +++ b/packages/hal/h8300/h8max/current/src/plf_misc.c @@ -0,0 +1,161 @@ +//========================================================================== +// +// plf_misc.c +// +// HAL platform miscellaneous functions +// +//========================================================================== +//####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT ANY +// WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License along +// with eCos; if not, write to the Free Software Foundation, Inc., +// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +// +// As a special exception, if other files instantiate templates or use macros +// or inline functions from this file, or you compile this file and link it +// with other works to produce a work based on this file, this file does not +// by itself cause the resulting work to be covered by the GNU General Public +// License. However the source code for this file must still be made available +// in accordance with section (3) of the GNU General Public License. +// +// This exception does not invalidate any other reasons why a work based on +// this file might be covered by the GNU General Public License. +// +// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +// at http://sources.redhat.com/ecos/ecos-license/ +// ------------------------------------------- +//####ECOSGPLCOPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): ysayo +// Contributors: ysato +// Date: 2002-08-10 +// Purpose: HAL miscellaneous functions +// Description: This file contains miscellaneous functions provided by the +// HAL. +// +//####DESCRIPTIONEND#### +// +//========================================================================*/ + +#include <pkgconf/hal.h> + +#include <cyg/infra/cyg_type.h> // Base types + +#include <cyg/hal/hal_arch.h> // architectural definitions +#include <cyg/hal/hal_io.h> +#include <cyg/hal/hal_if.h> +#include <cyg/hal/plf_intr.h> +#include <cyg/hal/var_arch.h> + +/*------------------------------------------------------------------------*/ + +void hal_platform_init(void) +{ + hal_if_init(); +} + +void h8300h_reset(void) +{ + __asm__ ("ldc #0x80,ccr\n" + "jmp @@0\n\t"); +} + +/*------------------------------------------------------------------------*/ +/* Control C ISR support */ + +#if defined(CYGDBG_HAL_DEBUG_GDB_CTRLC_SUPPORT) + +struct Hal_SavedRegisters *hal_saved_interrupt_state; + +#endif + +/*------------------------------------------------------------------------*/ +/* clock support */ + +void hal_clock_initialize(cyg_uint32 period) +{ + CYG_BYTE prescale; +#if CYGNUM_HAL_H8300_RTC_PRESCALE == 8 + prescale = 0x01; +#else +#if CYGNUM_HAL_H8300_RTC_PRESCALE == 64 + prescale = 0x02; +#else +#if CYGNUM_HAL_H8300_RTC_PRESCALE == 8192 + prescale = 0x03; +#else +#error illigal RTC prescale setting +#endif +#endif +#endif + HAL_WRITE_UINT8(CYGARC_TCORA3,period); + HAL_WRITE_UINT8(CYGARC_8TCNT3,0x00); + HAL_WRITE_UINT8(CYGARC_8TCR3,0x48 | prescale); + HAL_WRITE_UINT8(CYGARC_8TCSR3,0x00); +} + +void hal_clock_reset(cyg_uint32 vector, cyg_uint32 period) +{ + HAL_WRITE_UINT8(CYGARC_8TCR3,0x00); + HAL_WRITE_UINT8(CYGARC_8TCSR3,0x00); + hal_clock_initialize(period); +} + +void hal_clock_read(cyg_uint32 *pvalue) +{ + CYG_BYTE val; + HAL_READ_UINT8(CYGARC_8TCNT3,val); + *pvalue = val; +} + +//--------------------------------------------------------------------------- +// Low-level delay (in microseconds) + +#if 0 +void hal_delay_us(int usecs) +{ + volatile CYG_BYTE *tcr = (CYG_BYTE *)CYGARC_8TCR2; + volatile CYG_BYTE *tcnt = (CYG_BYTE *)CYGARC_8TCNT2; + short clocks_per_us = (CYGHWR_HAL_H8300_PROCESSOR_SPEED/1000000)/8*25; + //short clocks_per_us = (CYGHWR_HAL_H8300_PROCESSOR_SPEED/1000000)/20; + unsigned char val1,val2; + short diff; + + usecs /= 25; + + *tcnt = 0x00; + *tcr = 0x01; + + diff = 0; + while (usecs > 0) { + while (diff < clocks_per_us) { + val1 = *tcnt; + while ((val2 = *tcnt) == val1); + if (val2 < val1) + diff += val2 + 0x100 - val1; + else + diff += val2 - val1; + } + usecs -= diff / clocks_per_us; + diff -= clocks_per_us; + } + *tcr = 0x00; +} +#endif + +/*------------------------------------------------------------------------*/ +/* End of plf_misc.c */
new file mode 100644 --- /dev/null +++ b/packages/hal/h8300/h8s/current/ChangeLog @@ -0,0 +1,38 @@ +2003-03-09 Yoshinori Sato <ysato@users.sourceforge.jp> + + * New package. + +//=========================================================================== +//####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT ANY +// WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License along +// with eCos; if not, write to the Free Software Foundation, Inc., +// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +// +// As a special exception, if other files instantiate templates or use macros +// or inline functions from this file, or you compile this file and link it +// with other works to produce a work based on this file, this file does not +// by itself cause the resulting work to be covered by the GNU General Public +// License. However the source code for this file must still be made available +// in accordance with section (3) of the GNU General Public License. +// +// This exception does not invalidate any other reasons why a work based on +// this file might be covered by the GNU General Public License. +// +// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +// at http://sources.redhat.com/ecos/ecos-license/ +// ------------------------------------------- +//####ECOSGPLCOPYRIGHTEND#### +//===========================================================================
new file mode 100644 --- /dev/null +++ b/packages/hal/h8300/h8s/current/cdl/hal_h8300_h8s.cdl @@ -0,0 +1,121 @@ +# ==================================================================== +# +# hal_h8300_h8s.cdl +# +# H8S variant architectural HAL package configuration data +# +# ==================================================================== +#####ECOSGPLCOPYRIGHTBEGIN#### +## ------------------------------------------- +## This file is part of eCos, the Embedded Configurable Operating System. +## Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +## +## eCos is free software; you can redistribute it and/or modify it under +## the terms of the GNU General Public License as published by the Free +## Software Foundation; either version 2 or (at your option) any later version. +## +## eCos is distributed in the hope that it will be useful, but WITHOUT ANY +## WARRANTY; without even the implied warranty of MERCHANTABILITY or +## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +## for more details. +## +## You should have received a copy of the GNU General Public License along +## with eCos; if not, write to the Free Software Foundation, Inc., +## 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +## +## As a special exception, if other files instantiate templates or use macros +## or inline functions from this file, or you compile this file and link it +## with other works to produce a work based on this file, this file does not +## by itself cause the resulting work to be covered by the GNU General Public +## License. However the source code for this file must still be made available +## in accordance with section (3) of the GNU General Public License. +## +## This exception does not invalidate any other reasons why a work based on +## this file might be covered by the GNU General Public License. +## +## Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +## at http://sources.redhat.com/ecos/ecos-license/ +## ------------------------------------------- +#####ECOSGPLCOPYRIGHTEND#### +# ==================================================================== +######DESCRIPTIONBEGIN#### +# +# Author(s): ysato +# Original data: nickg +# Contributors: ysato +# Date: 2003-01-01 +# +#####DESCRIPTIONEND#### +# +# ==================================================================== + +cdl_package CYGPKG_HAL_H8300_H8S { + display "H8S variant" + parent CYGPKG_HAL_H8300 + implements CYGINT_HAL_H8300_VARIANT + hardware + include_dir cyg/hal + define_header hal_h8300_h8s.h + description " + The H8S variant HAL package provides generic + support for this processor architecture. It is also + necessary to select a specific target platform HAL + package." + + define_proc { + puts $::cdl_header "#include <pkgconf/hal_h8300.h>" + } + + compile var_misc.c h8s_stub.c + + make { + <PREFIX>/lib/target.ld: <PACKAGE>/src/h8300_h8s.ld + $(CC) -E -P -Wp,-MD,target.tmp -DEXTRAS=1 -xc $(INCLUDE_PATH) $(CFLAGS) -o $@ $< + @echo $@ ": \\" > $(notdir $@).deps + @tail +2 target.tmp >> $(notdir $@).deps + @echo >> $(notdir $@).deps + @rm target.tmp + } + + cdl_option CYGBLD_LINKER_SCRIPT { + display "Linker script" + flavor data + no_define + calculated { "src/h8300_h8s.ld" } + } + + cdl_component CYGHWR_HAL_H8S_CLOCK_SETTINGS { + display "H8S on-chip generic clock controls" + description " + The various clocks used by the system are controlled by + these options, some of which are derived from platform + settings." + flavor none + no_define + + cdl_option CYGHWR_HAL_H8300_DIVIDER_RATE { + display "Divider Rate (1/n)" + flavor data + legal_values { 1 2 4 8 } + default_value 1 + description " + The system clock divide rate setting" + } + cdl_option CYGHWR_HAL_H8300_MULT_RATE { + display "PLL Multiplier Rate (Nx)" + flavor data + legal_values { 1 2 4 } + default_value 1 + description " + The system clock divide rate setting" + } + cdl_option CYGHWR_HAL_H8300_PROCESSOR_SPEED { + display "Processor clock speed (MHz)" + flavor data + calculated { CYGHWR_HAL_H8300_CPG_INPUT * CYGHWR_HAL_H8300_MULT_RATE / CYGHWR_HAL_H8300_DIVIDER_RATE } + description " + The core (CPU) speed is computed from + the input clock speed and the divider setting." + } + } +}
new file mode 100644 --- /dev/null +++ b/packages/hal/h8300/h8s/current/include/h8_sci.h @@ -0,0 +1,80 @@ +//============================================================================= +// +// h8_sci.h +// +// Simple driver for the H8S Serial Communication Interface (SCI) +// +//============================================================================= +//####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT ANY +// WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License along +// with eCos; if not, write to the Free Software Foundation, Inc., +// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +// +// As a special exception, if other files instantiate templates or use macros +// or inline functions from this file, or you compile this file and link it +// with other works to produce a work based on this file, this file does not +// by itself cause the resulting work to be covered by the GNU General Public +// License. However the source code for this file must still be made available +// in accordance with section (3) of the GNU General Public License. +// +// This exception does not invalidate any other reasons why a work based on +// this file might be covered by the GNU General Public License. +// +// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +// at http://sources.redhat.com/ecos/ecos-license/ +// ------------------------------------------- +//####ECOSGPLCOPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jskov +// Contributors:jskov +// Date: 1999-05-17 +// +//####DESCRIPTIONEND#### +// +//============================================================================= + +#include <pkgconf/hal.h> + +//-------------------------------------------------------------------------- +// Exported functions + +externC void cyg_hal_plf_sci_init_channel(void* __ch_data); +externC cyg_uint8 cyg_hal_plf_sci_getc(void* __ch_data); +externC void cyg_hal_plf_sci_putc(void* __ch_data, cyg_uint8 c); +externC void cyg_hal_plf_sci_init(int sci_index, int comm_index, + int rcv_vect, cyg_uint8* base); + +//-------------------------------------------------------------------------- +// SCI register offsets +#define _REG_SCSMR 0x0 // serial mode register +#define _REG_SCBRR 0x1 // bit rate register +#define _REG_SCSCR 0x2 // serial control register +#define _REG_SCTDR 0x3 // transmit data register +#define _REG_SCSSR 0x4 // serial status register +#define _REG_SCRDR 0x5 // receive data register + +//-------------------------------------------------------------------------- + +typedef struct { + cyg_uint8* base; + cyg_int32 msec_timeout; + int isr_vector; +} channel_data_t; + +//-------------------------------------------------------------------------- +// end of h8_sci.h
new file mode 100644 --- /dev/null +++ b/packages/hal/h8300/h8s/current/include/mod_regs_adc.h @@ -0,0 +1,90 @@ +#ifndef CYGONCE_MOD_REGS_ADC_H +#define CYGONCE_MOD_REGS_ADC_H + +//========================================================================== +// +// mod_regs_adc.h +// +// A/D D/A Converter Register +// +//========================================================================== +//####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT ANY +// WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License along +// with eCos; if not, write to the Free Software Foundation, Inc., +// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +// +// As a special exception, if other files instantiate templates or use macros +// or inline functions from this file, or you compile this file and link it +// with other works to produce a work based on this file, this file does not +// by itself cause the resulting work to be covered by the GNU General Public +// License. However the source code for this file must still be made available +// in accordance with section (3) of the GNU General Public License. +// +// This exception does not invalidate any other reasons why a work based on +// this file might be covered by the GNU General Public License. +// +// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +// at http://sources.redhat.com/ecos/ecos-license/ +// ------------------------------------------- +//####ECOSGPLCOPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): yoshinori sato +// Contributors: yoshinori sato +// Date: 2003-01-01 +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#define CYGARC_DASTCR 0xFEE01A +#define CYGARC_DADR0 0xFFFFA4 +#define CYGARC_DADR1 0xFFFFA5 +#define CYGARC_DACR01 0xFFFFA6 +#define CYGARC_DADR2 0xFFFFA8 +#define CYGARC_DADR3 0xFFFFA9 +#define CYGARC_DACR23 0xFFFFAA + +#define CYGARC_ADDRA 0xFFFF90 +#define CYGARC_ADDRAH 0xFFFF90 +#define CYGARC_ADDRAL 0xFFFF91 +#define CYGARC_ADDRB 0xFFFF92 +#define CYGARC_ADDRBH 0xFFFF92 +#define CYGARC_ADDRBL 0xFFFF93 +#define CYGARC_ADDRC 0xFFFF94 +#define CYGARC_ADDRCH 0xFFFF94 +#define CYGARC_ADDRCL 0xFFFF95 +#define CYGARC_ADDRD 0xFFFF96 +#define CYGARC_ADDRDH 0xFFFF96 +#define CYGARC_ADDRDL 0xFFFF97 +#define CYGARC_ADDRE 0xFFFF98 +#define CYGARC_ADDREH 0xFFFF98 +#define CYGARC_ADDREL 0xFFFF99 +#define CYGARC_ADDRF 0xFFFF9A +#define CYGARC_ADDRFH 0xFFFF9A +#define CYGARC_ADDRFL 0xFFFF9B +#define CYGARC_ADDRG 0xFFFF9C +#define CYGARC_ADDRGH 0xFFFF9C +#define CYGARC_ADDRGL 0xFFFF9D +#define CYGARC_ADDRH 0xFFFF9E +#define CYGARC_ADDRHH 0xFFFF9E +#define CYGARC_ADDRHL 0xFFFF9F + +#define CYGARC_ADCSR 0xFFFFA0 +#define CYGARC_ADCR 0xFFFFA1 + +#endif
new file mode 100644 --- /dev/null +++ b/packages/hal/h8300/h8s/current/include/mod_regs_bsc.h @@ -0,0 +1,72 @@ +#ifndef CYGONCE_MOD_REGS_BSC_H +#define CYGONCE_MOD_REGS_BSC_H + +//========================================================================== +// +// mod_regs_bsc.h +// +// Bus Controler Register +// +//========================================================================== +//####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT ANY +// WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License along +// with eCos; if not, write to the Free Software Foundation, Inc., +// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +// +// As a special exception, if other files instantiate templates or use macros +// or inline functions from this file, or you compile this file and link it +// with other works to produce a work based on this file, this file does not +// by itself cause the resulting work to be covered by the GNU General Public +// License. However the source code for this file must still be made available +// in accordance with section (3) of the GNU General Public License. +// +// This exception does not invalidate any other reasons why a work based on +// this file might be covered by the GNU General Public License. +// +// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +// at http://sources.redhat.com/ecos/ecos-license/ +// ------------------------------------------- +//####ECOSGPLCOPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): yoshinori sato +// Contributors: yoshinori sato +// Date: 2003-01-01 +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#define CYGARC_ABWCR 0xFFFEC0 +#define CYGARC_ASTCR 0xFFFEC1 +#define CYGARC_WTCRAH 0xFFFEC2 +#define CYGARC_WTCRAL 0xFFFEC3 +#define CYGARC_WTCRBH 0xFFFEC4 +#define CYGARC_WTCRBL 0xFFFEC5 +#define CYGARC_RDNCR 0xFFFEC6 +#define CYGARC_CSACRH 0xFFFEC8 +#define CYGARC_CSACRL 0xFFFEC9 +#define CYGARC_BROMCRH 0xFFFECA +#define CYGARC_BROMCRL 0xFFFECB +#define CYGARC_BCR 0xFFFECC +#define CYGARC_DRAMCR 0xFFFED0 +#define CYGARC_DRACCR 0xFFFED2 +#define CYGARC_REFCR 0xFFFED4 +#define CYGARC_RTCNT 0xFFFED6 +#define CYGARC_RTCOR 0xFFFED7 + +#endif
new file mode 100644 --- /dev/null +++ b/packages/hal/h8300/h8s/current/include/mod_regs_dmac.h @@ -0,0 +1,108 @@ +#ifndef CYGONCE_MOD_REGS_DMAC_H +#define CYGONCE_MOD_REGS_DMAC_H + +//========================================================================== +// +// mod_regs_dmac.h +// +// DMA Controler Register +// +//========================================================================== +//####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT ANY +// WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License along +// with eCos; if not, write to the Free Software Foundation, Inc., +// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +// +// As a special exception, if other files instantiate templates or use macros +// or inline functions from this file, or you compile this file and link it +// with other works to produce a work based on this file, this file does not +// by itself cause the resulting work to be covered by the GNU General Public +// License. However the source code for this file must still be made available +// in accordance with section (3) of the GNU General Public License. +// +// This exception does not invalidate any other reasons why a work based on +// this file might be covered by the GNU General Public License. +// +// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +// at http://sources.redhat.com/ecos/ecos-license/ +// ------------------------------------------- +//####ECOSGPLCOPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): yoshinori sato +// Contributors: yoshinori sato +// Date: 2003-01-01 +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#define CYGARC_MAR0AH 0xFFFEE0 +#define CYGARC_MAR0AL 0xFFFEE2 +#define CYGARC_IOAR0A 0xFFFEE4 +#define CYGARC_ETCR0A 0xFFFEE6 +#define CYGARC_MAR0BH 0xFFFEE8 +#define CYGARC_MAR0BL 0xFFFEEA +#define CYGARC_IOAR0B 0xFFFEEC +#define CYGARC_ETCR0B 0xFFFEEE +#define CYGARC_MAR1AH 0xFFFEF0 +#define CYGARC_MAR1AL 0xFFFEF2 +#define CYGARC_IOAR1A 0xFFFEF4 +#define CYGARC_ETCR1A 0xFFFEF6 +#define CYGARC_MAR1BH 0xFFFEF8 +#define CYGARC_MAR1BL 0xFFFEFA +#define CYGARC_IOAR1B 0xFFFEFC +#define CYGARC_ETCR1B 0xFFFEFE +#define CYGARC_DMAWER 0xFFFF20 +#define CYGARC_DMATCR 0xFFFF21 +#define CYGARC_DMACR0A 0xFFFF22 +#define CYGARC_DMACR0B 0xFFFF23 +#define CYGARC_DMACR1A 0xFFFF24 +#define CYGARC_DMACR1B 0xFFFF25 +#define CYGARC_DMABCRH 0xFFFF26 +#define CYGARC_DMABCRL 0xFFFF27 + +#define CYGARC_EDSAR0 0xFFFDC0 +#define CYGARC_EDDAR0 0xFFFDC4 +#define CYGARC_EDTCR0 0xFFFDC8 +#define CYGARC_EDMDR0 0xFFFDCC +#define CYGARC_EDMDR0H 0xFFFDCC +#define CYGARC_EDMDR0L 0xFFFDCD +#define CYGARC_EDACR0 0xFFFDCE +#define CYGARC_EDSAR1 0xFFFDD0 +#define CYGARC_EDDAR1 0xFFFDD4 +#define CYGARC_EDTCR1 0xFFFDD8 +#define CYGARC_EDMDR1 0xFFFDDC +#define CYGARC_EDMDR1H 0xFFFDDC +#define CYGARC_EDMDR1L 0xFFFDDD +#define CYGARC_EDACR1 0xFFFDDE +#define CYGARC_EDSAR2 0xFFFDE0 +#define CYGARC_EDDAR2 0xFFFDE4 +#define CYGARC_EDTCR2 0xFFFDE8 +#define CYGARC_EDMDR2 0xFFFDEC +#define CYGARC_EDMDR2H 0xFFFDEC +#define CYGARC_EDMDR2L 0xFFFDED +#define CYGARC_EDACR2 0xFFFDEE +#define CYGARC_EDSAR3 0xFFFDF0 +#define CYGARC_EDDAR3 0xFFFDF4 +#define CYGARC_EDTCR3 0xFFFDF8 +#define CYGARC_EDMDR3 0xFFFDFC +#define CYGARC_EDMDR3H 0xFFFDFC +#define CYGARC_EDMDR3L 0xFFFDFD +#define CYGARC_EDACR3 0xFFFDFE + +#endif
new file mode 100644 --- /dev/null +++ b/packages/hal/h8300/h8s/current/include/mod_regs_intc.h @@ -0,0 +1,78 @@ +#ifndef CYGONCE_MOD_REGS_INTC_H +#define CYGONCE_MOD_REGS_INTC_H + +//========================================================================== +// +// mod_regs_intc.h +// +// Interrupt Controler Register +// +//========================================================================== +//####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT ANY +// WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License along +// with eCos; if not, write to the Free Software Foundation, Inc., +// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +// +// As a special exception, if other files instantiate templates or use macros +// or inline functions from this file, or you compile this file and link it +// with other works to produce a work based on this file, this file does not +// by itself cause the resulting work to be covered by the GNU General Public +// License. However the source code for this file must still be made available +// in accordance with section (3) of the GNU General Public License. +// +// This exception does not invalidate any other reasons why a work based on +// this file might be covered by the GNU General Public License. +// +// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +// at http://sources.redhat.com/ecos/ecos-license/ +// ------------------------------------------- +//####ECOSGPLCOPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): yoshinori sato +// Contributors: yoshinori sato +// Date: 2003-01-01 +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#define CYGARC_IPRA 0xFFFE00 +#define CYGARC_IPRB 0xFFFE02 +#define CYGARC_IPRC 0xFFFE04 +#define CYGARC_IPRD 0xFFFE06 +#define CYGARC_IPRE 0xFFFE08 +#define CYGARC_IPRF 0xFFFE0A +#define CYGARC_IPRG 0xFFFE0C +#define CYGARC_IPRH 0xFFFE0E +#define CYGARC_IPRI 0xFFFE10 +#define CYGARC_IPRJ 0xFFFE12 +#define CYGARC_IPRK 0xFFFE14 +#define CYGARC_ITSR 0xFFFE16 +#define CYGARC_SSIER 0xFFFE18 +#define CYGARC_ISCRH 0xFFFE1A +#define CYGARC_ISCRL 0xFFFE1C + +#define CYGARC_INTCR 0xFFFF31 +#define CYGARC_IER 0xFFFF32 +#define CYGARC_IERH 0xFFFF32 +#define CYGARC_IERL 0xFFFF33 +#define CYGARC_ISR 0xFFFF34 +#define CYGARC_ISRH 0xFFFF34 +#define CYGARC_ISRL 0xFFFF35 + +#endif
new file mode 100644 --- /dev/null +++ b/packages/hal/h8300/h8s/current/include/mod_regs_pio.h @@ -0,0 +1,121 @@ +#ifndef CYGONCE_MOD_REGS_PIO_H +#define CYGONCE_MOD_REGS_PIO_H + +//========================================================================== +// +// mod_regs_pio.h +// +// I/O Port Controler Register +// +//========================================================================== +//####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT ANY +// WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License along +// with eCos; if not, write to the Free Software Foundation, Inc., +// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +// +// As a special exception, if other files instantiate templates or use macros +// or inline functions from this file, or you compile this file and link it +// with other works to produce a work based on this file, this file does not +// by itself cause the resulting work to be covered by the GNU General Public +// License. However the source code for this file must still be made available +// in accordance with section (3) of the GNU General Public License. +// +// This exception does not invalidate any other reasons why a work based on +// this file might be covered by the GNU General Public License. +// +// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +// at http://sources.redhat.com/ecos/ecos-license/ +// ------------------------------------------- +//####ECOSGPLCOPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): yoshinori sato +// Contributors: yoshinori sato +// Date: 2002-02-19 +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#define CYGARC_P1DDR 0xFFFE20 +#define CYGARC_P2DDR 0xFFFE21 +#define CYGARC_P3DDR 0xFFFE22 +#define CYGARC_P4DDR 0xFFFE23 +#define CYGARC_P5DDR 0xFFFE24 +#define CYGARC_P6DDR 0xFFFE25 +#define CYGARC_P7DDR 0xFFFE26 +#define CYGARC_P8DDR 0xFFFE27 +#define CYGARC_P9DDR 0xFFFE28 +#define CYGARC_PADDR 0xFFFE29 +#define CYGARC_PBDDR 0xFFFE2A +#define CYGARC_PCDDR 0xFFFE2B +#define CYGARC_PDDDR 0xFFFE2C +#define CYGARC_PEDDR 0xFFFE2D +#define CYGARC_PFDDR 0xFFFE2E +#define CYGARC_PGDDR 0xFFFE2F +#define CYGARC_PHDDR 0xFFFF74 + +#define CYGARC_PFCR0 0xFFFE32 +#define CYGARC_PFCR1 0xFFFE33 +#define CYGARC_PFCR2 0xFFFE34 + +#define CYGARC_PAPCR 0xFFFE36 +#define CYGARC_PBPCR 0xFFFE37 +#define CYGARC_PCPCR 0xFFFE38 +#define CYGARC_PDPCR 0xFFFE39 +#define CYGARC_PEPCR 0xFFFE3A + +#define CYGARC_P3ODR 0xFFFE3C +#define CYGARC_PAODR 0xFFFE3D + +#define CYGARC_P1DR 0xFFFF60 +#define CYGARC_P2DR 0xFFFF61 +#define CYGARC_P3DR 0xFFFF62 +#define CYGARC_P4DR 0xFFFF63 +#define CYGARC_P5DR 0xFFFF64 +#define CYGARC_P6DR 0xFFFF65 +#define CYGARC_P7DR 0xFFFF66 +#define CYGARC_P8DR 0xFFFF67 +#define CYGARC_P9DR 0xFFFF68 +#define CYGARC_PADR 0xFFFF69 +#define CYGARC_PBDR 0xFFFF6A +#define CYGARC_PCDR 0xFFFF6B +#define CYGARC_PDDR 0xFFFF6C +#define CYGARC_PEDR 0xFFFF6D +#define CYGARC_PFDR 0xFFFF6E +#define CYGARC_PGDR 0xFFFF6F +#define CYGARC_PHDR 0xFFFF72 + +#define CYGARC_PORT1 0xFFFF50 +#define CYGARC_PORT2 0xFFFF51 +#define CYGARC_PORT3 0xFFFF52 +#define CYGARC_PORT4 0xFFFF53 +#define CYGARC_PORT5 0xFFFF54 +#define CYGARC_PORT6 0xFFFF55 +#define CYGARC_PORT7 0xFFFF56 +#define CYGARC_PORT8 0xFFFF57 +#define CYGARC_PORT9 0xFFFF58 +#define CYGARC_PORTA 0xFFFF59 +#define CYGARC_PORTB 0xFFFF5A +#define CYGARC_PORTC 0xFFFF5B +#define CYGARC_PORTD 0xFFFF5C +#define CYGARC_PORTE 0xFFFF5D +#define CYGARC_PORTF 0xFFFF5E +#define CYGARC_PORTG 0xFFFF5F +#define CYGARC_PORTH 0xFFFF70 + +#endif
new file mode 100644 --- /dev/null +++ b/packages/hal/h8300/h8s/current/include/mod_regs_ppg.h @@ -0,0 +1,65 @@ +#ifndef CYGONCE_MOD_REGS_TPC_H +#define CYGONCE_MOD_REGS_TPC_H + +//========================================================================== +// +// mod_regs_ppg.h +// +// Programable Pulse Generator Register +// +//========================================================================== +//####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT ANY +// WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License along +// with eCos; if not, write to the Free Software Foundation, Inc., +// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +// +// As a special exception, if other files instantiate templates or use macros +// or inline functions from this file, or you compile this file and link it +// with other works to produce a work based on this file, this file does not +// by itself cause the resulting work to be covered by the GNU General Public +// License. However the source code for this file must still be made available +// in accordance with section (3) of the GNU General Public License. +// +// This exception does not invalidate any other reasons why a work based on +// this file might be covered by the GNU General Public License. +// +// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +// at http://sources.redhat.com/ecos/ecos-license/ +// ------------------------------------------- +//####ECOSGPLCOPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): yoshinori sato +// Contributors: yoshinori sato +// Date: 2002-02-19 +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#define CYGARC_PCR 0xFFFF46 +#define CYGARC_PMR 0xFFFF47 +#define CYGARC_NDERH 0xFFFF48 +#define CYGARC_NDERL 0xFFFF49 +#define CYGARC_PODRH 0xFFFF4A +#define CYGARC_PODRL 0xFFFF4B +#define CYGARC_NDRH1 0xFFFF4C +#define CYGARC_NDRL1 0xFFFF4D +#define CYGARC_NDRH2 0xFFFF4E +#define CYGARC_NDRL2 0xFFFF4F + +#endif
new file mode 100644 --- /dev/null +++ b/packages/hal/h8300/h8s/current/include/mod_regs_sci.h @@ -0,0 +1,147 @@ +#ifndef CYGONCE_MOD_REGS_SCI_H +#define CYGONCE_MOD_REGS_SCI_H + +//========================================================================== +// +// mod_regs_sci.h +// +// Serial Communication Interface Register +// +//========================================================================== +//####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT ANY +// WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License along +// with eCos; if not, write to the Free Software Foundation, Inc., +// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +// +// As a special exception, if other files instantiate templates or use macros +// or inline functions from this file, or you compile this file and link it +// with other works to produce a work based on this file, this file does not +// by itself cause the resulting work to be covered by the GNU General Public +// License. However the source code for this file must still be made available +// in accordance with section (3) of the GNU General Public License. +// +// This exception does not invalidate any other reasons why a work based on +// this file might be covered by the GNU General Public License. +// +// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +// at http://sources.redhat.com/ecos/ecos-license/ +// ------------------------------------------- +//####ECOSGPLCOPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): yoshinori sato +// Contributors: yoshinori sato +// Date: 2002-02-19 +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#define CYGARC_SMR0 0xFFFF78 +#define CYGARC_BRR0 0xFFFF79 +#define CYGARC_SCR0 0xFFFF7A +#define CYGARC_TDR0 0xFFFF7B +#define CYGARC_SSR0 0xFFFF7C +#define CYGARC_RDR0 0xFFFF7D +#define CYGARC_SCMR0 0xFFFF7E +#define CYGARC_SMR1 0xFFFF80 +#define CYGARC_BRR1 0xFFFF81 +#define CYGARC_SCR1 0xFFFF82 +#define CYGARC_TDR1 0xFFFF83 +#define CYGARC_SSR1 0xFFFF84 +#define CYGARC_RDR1 0xFFFF85 +#define CYGARC_SCMR1 0xFFFF86 +#define CYGARC_SMR2 0xFFFF88 +#define CYGARC_BRR2 0xFFFF89 +#define CYGARC_SCR2 0xFFFF8A +#define CYGARC_TDR2 0xFFFF8B +#define CYGARC_SSR2 0xFFFF8C +#define CYGARC_RDR2 0xFFFF8D +#define CYGARC_SCMR2 0xFFFF8E + +#define CYGARC_IRCR0 0xFFFE1E +#define CYGARC_SEMR 0xFFFDA8 + +// Serial Mode Register +#define CYGARC_REG_SCSMR_CA 0x80 // communication mode +#define CYGARC_REG_SCSMR_CHR 0x40 // character length (7 if set) +#define CYGARC_REG_SCSMR_PE 0x20 // parity enable +#define CYGARC_REG_SCSMR_OE 0x10 // parity mode +#define CYGARC_REG_SCSMR_STOP 0x08 // stop bit length +#define CYGARC_REG_SCSMR_MP 0x04 // multiprocessor mode +#define CYGARC_REG_SCSMR_CKS1 0x02 // clock select 1 +#define CYGARC_REG_SCSMR_CKS0 0x01 // clock select 0 +#define CYGARC_REG_SCSMR_CKSx_MASK 0x03 // mask + +// Serial Control Register +#define CYGARC_REG_SCSCR_TIE 0x80 // transmit interrupt enable +#define CYGARC_REG_SCSCR_RIE 0x40 // receive interrupt enable +#define CYGARC_REG_SCSCR_TE 0x20 // transmit enable +#define CYGARC_REG_SCSCR_RE 0x10 // receive enable +#define CYGARC_REG_SCSCR_MPIE 0x08 // multiprocessor interrupt enable +#define CYGARC_REG_SCSCR_TEIE 0x04 // transmit-end interrupt enable +#define CYGARC_REG_SCSCR_CKE1 0x02 // clock enable 1 +#define CYGARC_REG_SCSCR_CKE0 0x01 // clock enable 0 + +// Serial Status Register +#define CYGARC_REG_SCSSR_TDRE 0x80 // transmit data register empty +#define CYGARC_REG_SCSSR_RDRF 0x40 // receive data register full +#define CYGARC_REG_SCSSR_ORER 0x20 // overrun error +#define CYGARC_REG_SCSSR_FER 0x10 // framing error +#define CYGARC_REG_SCSSR_PER 0x08 // parity error +#define CYGARC_REG_SCSSR_TEND 0x04 // transmit end +#define CYGARC_REG_SCSSR_MPB 0x02 // multiprocessor bit +#define CYGARC_REG_SCSSR_MPBT 0x01 // multiprocessor bit transfer + +// When clearing the status register, always write the value: +// CYGARC_REG_SCSSR_CLEARMASK & ~bit +// to prevent other bits than the one of interest to be cleared. +#define CYGARC_REG_SCSSR_CLEARMASK 0xf8 + +// Baud rate values calculation, depending on peripheral clock (Pf) +// n is CKS setting (0-3) +// N = (Pf/(64*2^(2n-1)*B))-1 +// With CYGARC_SCBRR_CKSx providing the values 1, 4, 16, 64 we get +// N = (Pf/(32*_CKS*B))-1 +// +// The CYGARC_SCBRR_OPTIMAL_CKS macro should compute the minimal CKS +// setting for the given baud rate and peripheral clock. +// +// The error of the CKS+count value can be computed by: +// E(%) = ((Pf/((N+1)*B*(64^(n-1)))-1)*100 +// +#define CYGARC_SCBRR_PRESCALE(_b_) \ +((((CYGHWR_HAL_H8300_PROCESSOR_SPEED/32/1/(_b_))-1)<256) ? 1 : \ + (((CYGHWR_HAL_H8300_PROCESSOR_SPEED/32/4/(_b_))-1)<256) ? 4 : \ + (((CYGHWR_HAL_H8300_PROCESSOR_SPEED/32/16/(_b_))-1)<256) ? 16 : 64) + +// Add half the divisor to reduce rounding errors to .5 +#define CYGARC_SCBRR_ROUNDING(_b_) \ + 16*CYGARC_SCBRR_PRESCALE(_b_)*(_b_) + +// These two macros provide the static values we need to stuff into the +// registers. +#define CYGARC_SCBRR_CKSx(_b_) \ + ((1 == CYGARC_SCBRR_PRESCALE(_b_)) ? 0 : \ + (4 == CYGARC_SCBRR_PRESCALE(_b_)) ? 1 : \ + (16 == CYGARC_SCBRR_PRESCALE(_b_)) ? 2 : 3) +#define CYGARC_SCBRR_N(_b_) \ + (((_b_) < 4800) ? 0 : \ + ((_b_) > 115200) ? 0 : \ + (((CYGHWR_HAL_H8300_PROCESSOR_SPEED+CYGARC_SCBRR_ROUNDING(_b_))/32/CYGARC_SCBRR_PRESCALE(_b_)/(_b_))-1)) + +#endif
new file mode 100644 --- /dev/null +++ b/packages/hal/h8300/h8s/current/include/mod_regs_sys.h @@ -0,0 +1,67 @@ +#ifndef CYGONCE_MOD_REGS_SYS_H +#define CYGONCE_MOD_REGS_SYS_H + +//========================================================================== +// +// mod_regs_sys.h +// +// System Controler Register +// +//========================================================================== +//####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT ANY +// WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License along +// with eCos; if not, write to the Free Software Foundation, Inc., +// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +// +// As a special exception, if other files instantiate templates or use macros +// or inline functions from this file, or you compile this file and link it +// with other works to produce a work based on this file, this file does not +// by itself cause the resulting work to be covered by the GNU General Public +// License. However the source code for this file must still be made available +// in accordance with section (3) of the GNU General Public License. +// +// This exception does not invalidate any other reasons why a work based on +// this file might be covered by the GNU General Public License. +// +// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +// at http://sources.redhat.com/ecos/ecos-license/ +// ------------------------------------------- +//####ECOSGPLCOPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): yoshinori sato +// Contributors: yoshinori sato +// Date: 2002-02-19 +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#define CYGARC_MDCR 0xFFFF3E +#define CYGARC_SYSCR 0xFFFF3D +#define CYGARC_MSTPCRH 0xFFFF40 +#define CYGARC_MSTPCRL 0xFFFF41 +#define CYGARC_FLMCR1 0xFFFFC8 +#define CYGARC_FLMCR2 0xFFFFC9 +#define CYGARC_EBR1 0xFFFFCA +#define CYGARC_EBR2 0xFFFFCB +#define CTGARC_RAMCR 0xFFFECE +#define CYGARC_SBYCR 0xFFFF3A +#define CYGARC_SCKCR 0xFFFF3B +#define CYGARC_PLLCR 0xFFFF45 + +#endif
new file mode 100644 --- /dev/null +++ b/packages/hal/h8300/h8s/current/include/mod_regs_tmr.h @@ -0,0 +1,127 @@ +#ifndef CYGONCE_MOD_REGS_TMR_H +#define CYGONCE_MOD_REGS_TMR_H + +//========================================================================== +// +// mod_regs_tmr.h +// +// TPU/TMR Register +// +//========================================================================== +//####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT ANY +// WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License along +// with eCos; if not, write to the Free Software Foundation, Inc., +// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +// +// As a special exception, if other files instantiate templates or use macros +// or inline functions from this file, or you compile this file and link it +// with other works to produce a work based on this file, this file does not +// by itself cause the resulting work to be covered by the GNU General Public +// License. However the source code for this file must still be made available +// in accordance with section (3) of the GNU General Public License. +// +// This exception does not invalidate any other reasons why a work based on +// this file might be covered by the GNU General Public License. +// +// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +// at http://sources.redhat.com/ecos/ecos-license/ +// ------------------------------------------- +//####ECOSGPLCOPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): yoshinori sato +// Contributors: yoshinori sato +// Date: 2002-02-19 +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#define CYGARC_TSTR 0xFFFFC0 +#define CYGARC_TSNC 0XFFFFC1 + +#define CYGARC_TCR0 0xFFFFD0 +#define CYGARC_TMDR0 0xFFFFD1 +#define CYGARC_TIORH0 0xFFFFD2 +#define CYGARC_TIORL0 0xFFFFD3 +#define CYGARC_TIER0 0xFFFFD4 +#define CYGARC_TSR0 0xFFFFD5 +#define CYGARC_TCNT0 0xFFFFD6 +#define CYGARC_GRA0 0xFFFFD8 +#define CYGARC_GRB0 0xFFFFDA +#define CYGARC_GRC0 0xFFFFDC +#define CYGARC_GRD0 0xFFFFDE +#define CYGARC_TCR1 0xFFFFE0 +#define CYGARC_TMDR1 0xFFFFE1 +#define CYGARC_TIORH1 0xFFFFE2 +#define CYGARC_TIORL1 0xFFFFE3 +#define CYGARC_TIER1 0xFFFFE4 +#define CYGARC_TSR1 0xFFFFE5 +#define CYGARC_TCNT1 0xFFFFE6 +#define CYGARC_GRA1 0xFFFFE8 +#define CYGARC_GRB1 0xFFFFEA +#define CYGARC_TCR2 0xFFFFF0 +#define CYGARC_TMDR2 0xFFFFF1 +#define CYGARC_TIORH2 0xFFFFF2 +#define CYGARC_TIORL2 0xFFFFF3 +#define CYGARC_TIER2 0xFFFFF4 +#define CYGARC_TSR2 0xFFFFF5 +#define CYGARC_TCNT2 0xFFFFF6 +#define CYGARC_GRA2 0xFFFFF8 +#define CYGARC_GRB2 0xFFFFFA +#define CYGARC_TCR3 0xFFFE80 +#define CYGARC_TMDR3 0xFFFE81 +#define CYGARC_TIORH3 0xFFFE82 +#define CYGARC_TIORL3 0xFFFE83 +#define CYGARC_TIER3 0xFFFE84 +#define CYGARC_TSR3 0xFFFE85 +#define CYGARC_TCNT3 0xFFFE86 +#define CYGARC_GRA3 0xFFFE88 +#define CYGARC_GRB3 0xFFFE8A +#define CYGARC_GRC3 0xFFFE8C +#define CYGARC_GRD3 0xFFFE8E +#define CYGARC_TCR4 0xFFFE90 +#define CYGARC_TMDR4 0xFFFE91 +#define CYGARC_TIORH4 0xFFFE92 +#define CYGARC_TIORL4 0xFFFE93 +#define CYGARC_TIER4 0xFFFE94 +#define CYGARC_TSR4 0xFFFE95 +#define CYGARC_TCNT4 0xFFFE96 +#define CYGARC_GRA4 0xFFFE98 +#define CYGARC_GRB4 0xFFFE9A +#define CYGARC_TCR5 0xFFFEA0 +#define CYGARC_TMDR5 0xFFFEA1 +#define CYGARC_TIORH5 0xFFFEA2 +#define CYGARC_TIORL5 0xFFFEA3 +#define CYGARC_TIER5 0xFFFEA4 +#define CYGARC_TSR5 0xFFFEA5 +#define CYGARC_TCNT5 0xFFFEA6 +#define CYGARC_GRA5 0xFFFEA8 +#define CYGARC_GRB5 0xFFFEAA + +#define CYGARC_8TCR0 0xFFFFB0 +#define CYGARC_8TCR1 0xFFFFB1 +#define CYGARC_8TCSR0 0xFFFFB2 +#define CYGARC_8TCSR1 0xFFFFB3 +#define CYGARC_8TCORA0 0xFFFFB4 +#define CYGARC_8TCORA1 0xFFFFB5 +#define CYGARC_8TCORB0 0xFFFFB6 +#define CYGARC_8TCORB1 0xFFFFB7 +#define CYGARC_8TCNT0 0xFFFFB8 +#define CYGARC_8TCNT1 0xFFFFB9 + +#endif
new file mode 100644 --- /dev/null +++ b/packages/hal/h8300/h8s/current/include/mod_regs_wdt.h @@ -0,0 +1,75 @@ +#ifndef CYGONCE_MOD_REGS_WDT_H +#define CYGONCE_MOD_REGS_WDT_H + +//========================================================================== +// +// mod_regs_wdt.h +// +// Watchdog Timer Register +// +//========================================================================== +//####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT ANY +// WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License along +// with eCos; if not, write to the Free Software Foundation, Inc., +// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +// +// As a special exception, if other files instantiate templates or use macros +// or inline functions from this file, or you compile this file and link it +// with other works to produce a work based on this file, this file does not +// by itself cause the resulting work to be covered by the GNU General Public +// License. However the source code for this file must still be made available +// in accordance with section (3) of the GNU General Public License. +// +// This exception does not invalidate any other reasons why a work based on +// this file might be covered by the GNU General Public License. +// +// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +// at http://sources.redhat.com/ecos/ecos-license/ +// ------------------------------------------- +//####ECOSGPLCOPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): yoshinori sato +// Contributors: yoshinori sato +// Date: 2002-02-19 +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#define CYGARC_TCSR 0xFFFFBC +#define CYGARC_TCNT 0xFFFFBD +#define CYGARC_RSTCSRW 0xFFFFBE +#define CYGARC_RSTCSRR 0xFFFFBF + +#define CYGARC_TCNT_MAGIC 0x5A00 +#define CYGARC_TCSR_MAGIC 0xA500 + +#define CYGARC_WDT_OVF 0x80 +#define CYGARC_WDT_WT 0x40 +#define CYGARC_WDT_TME 0x20 +#define CYGARC_WDT_CKS2 0x04 +#define CYGARC_WDT_CKS1 0x02 +#define CYGARC_WDT_CKS0 0x01 + +#define CYGARC_WDT_CKS 0x05 //8192 + +#define CYGARC_WDT_PERIOD ((1000000000/(CYGHWR_HAL_H8300_PROCESSOR_SPEED/8192))*256) + +#endif + +// EOF mod_regs_wdt.h
new file mode 100644 --- /dev/null +++ b/packages/hal/h8300/h8s/current/include/var_arch.h @@ -0,0 +1,107 @@ +#ifndef CYGONCE_HAL_VAR_ARCH_H +#define CYGONCE_HAL_VAR_ARCH_H + +//========================================================================== +// +// var_arch.h +// +// Architecture specific abstractions +// +//========================================================================== +//####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT ANY +// WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License along +// with eCos; if not, write to the Free Software Foundation, Inc., +// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +// +// As a special exception, if other files instantiate templates or use macros +// or inline functions from this file, or you compile this file and link it +// with other works to produce a work based on this file, this file does not +// by itself cause the resulting work to be covered by the GNU General Public +// License. However the source code for this file must still be made available +// in accordance with section (3) of the GNU General Public License. +// +// This exception does not invalidate any other reasons why a work based on +// this file might be covered by the GNU General Public License. +// +// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +// at http://sources.redhat.com/ecos/ecos-license/ +// ------------------------------------------- +//####ECOSGPLCOPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): yoshinori sato +// Contributors: yoshinori sato +// Date: 2002-02-14 +// Purpose: Define architecture abstractions +// Description: This file contains any extra or modified definitions for +// this variant of the architecture. +// Usage: #include <cyg/hal/var_arch.h> +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#include <pkgconf/hal.h> +#include <cyg/infra/cyg_type.h> + +//-------------------------------------------------------------------------- +// Processor saved states: + +typedef struct HAL_SavedRegisters +{ + // These are common to all saved states and are in the order + // stored and loaded by the movm instruction. + CYG_WORD32 er6; + CYG_WORD32 er5; + CYG_WORD32 er4; + CYG_WORD32 er3; + CYG_WORD32 er2; + CYG_WORD32 er1; + CYG_WORD32 er0; + + /* On interrupts the PC and PSW are pushed automatically by the */ + /* CPU and SP is pushed for debugging reasons. On a thread switch */ + /* the saved context is made to look the same. */ + + CYG_WORD32 sp; /* Saved copy of SP in some states */ + CYG_WORD32 ccr; + CYG_WORD32 exr; + CYG_WORD32 pc; +} HAL_SavedRegisters; + +// Internal peripheral registers +#include <cyg/hal/mod_regs_adc.h> +#include <cyg/hal/mod_regs_bsc.h> +#include <cyg/hal/mod_regs_dmac.h> +#include <cyg/hal/mod_regs_intc.h> +#include <cyg/hal/mod_regs_pio.h> +#include <cyg/hal/mod_regs_sci.h> +#include <cyg/hal/mod_regs_sys.h> +#include <cyg/hal/mod_regs_tmr.h> +#include <cyg/hal/mod_regs_ppg.h> +#include <cyg/hal/mod_regs_wdt.h> + +//-------------------------------------------------------------------------- + +#ifndef HAL_THREAD_INIT_CONTEXT_EXTRA +#define HAL_THREAD_INIT_CONTEXT_EXTRA(_regs_, _id_) \ + (_regs_)->exr = 0; +#endif + +//-------------------------------------------------------------------------- +#endif // CYGONCE_HAL_VAR_ARCH_H +// End of var_arch.h
new file mode 100644 --- /dev/null +++ b/packages/hal/h8300/h8s/current/include/var_intr.h @@ -0,0 +1,329 @@ +#ifndef CYGONCE_HAL_VAR_INTR_H +#define CYGONCE_HAL_VAR_INTR_H + +//========================================================================== +// +// var_intr.h +// +// H8S Interrupt and clock support +// +//========================================================================== +//####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT ANY +// WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License along +// with eCos; if not, write to the Free Software Foundation, Inc., +// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +// +// As a special exception, if other files instantiate templates or use macros +// or inline functions from this file, or you compile this file and link it +// with other works to produce a work based on this file, this file does not +// by itself cause the resulting work to be covered by the GNU General Public +// License. However the source code for this file must still be made available +// in accordance with section (3) of the GNU General Public License. +// +// This exception does not invalidate any other reasons why a work based on +// this file might be covered by the GNU General Public License. +// +// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +// at http://sources.redhat.com/ecos/ecos-license/ +// ------------------------------------------- +//####ECOSGPLCOPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): yoshinori sato +// Contributors: yoshinori sato +// Date: 2003-01-01 +// Purpose: H8S Interrupt Support +// Description: The macros defined here provide the HAL APIs for handling +// interrupts and the clock for H8/300H variants of the H8/300 +// architecture. +// +// Usage: +// #include <cyg/hal/var_intr.h> +// ... +// +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#include <pkgconf/hal.h> + +#include <cyg/infra/cyg_type.h> + +#include <cyg/hal/plf_intr.h> +#include <cyg/hal/var_arch.h> + +//-------------------------------------------------------------------------- +// Interrupt vectors. + +// The level-specific hardware vectors +// These correspond to VSRs and are the values to use for HAL_VSR_GET/SET +#define CYGNUM_HAL_VECTOR_RESET_P 0 +#define CYGNUM_HAL_VECTOR_RESET_M 1 +#define CYGNUM_HAL_VECTOR_RSV2 2 +#define CYGNUM_HAL_VECTOR_RSV3 3 +#define CYGNUM_HAL_VECTOR_RSV4 4 +#define CYGNUM_HAL_VECTOR_TRACE 5 +#define CYGNUM_HAL_VECTOR_DIRECT 6 +#define CYGNUM_HAL_VECTOR_NMI 7 +#define CYGNUM_HAL_VECTOR_TRAP0 8 +#define CYGNUM_HAL_VECTOR_TRAP1 9 +#define CYGNUM_HAL_VECTOR_TRAP2 10 +#define CYGNUM_HAL_VECTOR_TRAP3 11 + +#define CYGNUM_HAL_VSR_MIN 0 +#define CYGNUM_HAL_VSR_MAX 11 +#define CYGNUM_HAL_VSR_COUNT 12 + +// Exception numbers. These are the values used when passed out to an +// external exception handler using cyg_hal_deliver_exception() + +#define CYGNUM_HAL_EXCEPTION_NMI CYGNUM_HAL_VECTOR_NMI + +#if 0 +#define CYGNUM_HAL_EXCEPTION_DATA_ACCESS 0 +#endif + +#define CYGNUM_HAL_EXCEPTION_MIN CYGNUM_HAL_VSR_MIN +#define CYGNUM_HAL_EXCEPTION_MAX CYGNUM_HAL_VSR_MAX +#define CYGNUM_HAL_EXCEPTION_COUNT CYGNUM_HAL_VSR_COUNT + +// The decoded interrupts +#define CYGNUM_HAL_INTERRUPT_EXTERNAL_0 16 +#define CYGNUM_HAL_INTERRUPT_EXTERNAL_1 17 +#define CYGNUM_HAL_INTERRUPT_EXTERNAL_2 18 +#define CYGNUM_HAL_INTERRUPT_EXTERNAL_3 19 +#define CYGNUM_HAL_INTERRUPT_EXTERNAL_4 20 +#define CYGNUM_HAL_INTERRUPT_EXTERNAL_5 21 +#define CYGNUM_HAL_INTERRUPT_EXTERNAL_6 22 +#define CYGNUM_HAL_INTERRUPT_EXTERNAL_7 23 +#define CYGNUM_HAL_INTERRUPT_EXTERNAL_8 24 +#define CYGNUM_HAL_INTERRUPT_EXTERNAL_9 25 +#define CYGNUM_HAL_INTERRUPT_EXTERNAL_10 26 +#define CYGNUM_HAL_INTERRUPT_EXTERNAL_11 27 +#define CYGNUM_HAL_INTERRUPT_EXTERNAL_12 28 +#define CYGNUM_HAL_INTERRUPT_EXTERNAL_13 29 +#define CYGNUM_HAL_INTERRUPT_EXTERNAL_14 30 +#define CYGNUM_HAL_INTERRUPT_EXTERNAL_15 31 + +#define CYGNUM_HAL_INTERRUPT_DTC 32 +#define CYGNUM_HAL_INTERRUPT_WDT 33 +#define CYGNUM_HAL_INTERRUPT_RSV34 34 +#define CYGNUM_HAL_INTERRUPT_RFSHCMI 35 +#define CYGNUM_HAL_INTERRUPT_RSV36 36 +#define CYGNUM_HAL_INTERRUPT_RSV37 37 +#define CYGNUM_HAL_INTERRUPT_ADI 38 +#define CYGNUM_HAL_INTERRUPT_RSV39 39 + +#define CYGNUM_HAL_INTERRUPT_TGI0A 40 +#define CYGNUM_HAL_INTERRUPT_TGI0B 41 +#define CYGNUM_HAL_INTERRUPT_TGI0C 42 +#define CYGNUM_HAL_INTERRUPT_TGI0D 43 +#define CYGNUM_HAL_INTERRUPT_TGI0V 44 +#define CYGNUM_HAL_INTERRUPT_RSV45 45 +#define CYGNUM_HAL_INTERRUPT_RSV46 46 +#define CYGNUM_HAL_INTERRUPT_RSV47 47 + +#define CYGNUM_HAL_INTERRUPT_TGI1A 48 +#define CYGNUM_HAL_INTERRUPT_TGI1B 49 +#define CYGNUM_HAL_INTERRUPT_TGI1V 50 +#define CYGNUM_HAL_INTERRUPT_TGI1U 51 + +#define CYGNUM_HAL_INTERRUPT_TGI2A 52 +#define CYGNUM_HAL_INTERRUPT_TGI2B 53 +#define CYGNUM_HAL_INTERRUPT_TGI2V 54 +#define CYGNUM_HAL_INTERRUPT_TGI2U 55 + +#define CYGNUM_HAL_INTERRUPT_TGI3A 56 +#define CYGNUM_HAL_INTERRUPT_TGI3B 57 +#define CYGNUM_HAL_INTERRUPT_TGI3C 58 +#define CYGNUM_HAL_INTERRUPT_TGI3D 59 +#define CYGNUM_HAL_INTERRUPT_TGI3V 60 +#define CYGNUM_HAL_INTERRUPT_RSV61 61 +#define CYGNUM_HAL_INTERRUPT_RSV62 62 +#define CYGNUM_HAL_INTERRUPT_RSV63 63 + +#define CYGNUM_HAL_INTERRUPT_TGI4A 64 +#define CYGNUM_HAL_INTERRUPT_TGI4B 65 +#define CYGNUM_HAL_INTERRUPT_TGI4V 66 +#define CYGNUM_HAL_INTERRUPT_TGI4U 67 + +#define CYGNUM_HAL_INTERRUPT_TGI5A 68 +#define CYGNUM_HAL_INTERRUPT_TGI5B 69 +#define CYGNUM_HAL_INTERRUPT_TGI5V 70 +#define CYGNUM_HAL_INTERRUPT_TGI5U 71 + +#define CYGNUM_HAL_INTERRUPT_CMIA0 72 +#define CYGNUM_HAL_INTERRUPT_CMIB0 73 +#define CYGNUM_HAL_INTERRUPT_OVI0 74 +#define CYGNUM_HAL_INTERRUPT_RSV75 75 + +#define CYGNUM_HAL_INTERRUPT_CMIA1 76 +#define CYGNUM_HAL_INTERRUPT_CMIB1 77 +#define CYGNUM_HAL_INTERRUPT_OVI1 78 +#define CYGNUM_HAL_INTERRUPT_RSV79 79 + +#define CYGNUM_HAL_INTERRUPT_DEND0A 80 +#define CYGNUM_HAL_INTERRUPT_DEND0B 81 +#define CYGNUM_HAL_INTERRUPT_DEND1A 82 +#define CYGNUM_HAL_INTERRUPT_DEND1B 83 + +#define CYGNUM_HAL_INTERRUPT_EXDEND0 84 +#define CYGNUM_HAL_INTERRUPT_EXDEND1 85 +#define CYGNUM_HAL_INTERRUPT_EXDEND2 86 +#define CYGNUM_HAL_INTERRUPT_EXDEND3 87 + +#define CYGNUM_HAL_INTERRUPT_ERI0 88 +#define CYGNUM_HAL_INTERRUPT_RXI0 89 +#define CYGNUM_HAL_INTERRUPT_TXI0 90 +#define CYGNUM_HAL_INTERRUPT_TEI0 91 + +#define CYGNUM_HAL_INTERRUPT_ERI1 92 +#define CYGNUM_HAL_INTERRUPT_RXI1 93 +#define CYGNUM_HAL_INTERRUPT_TXI1 94 +#define CYGNUM_HAL_INTERRUPT_TEI1 95 + +#define CYGNUM_HAL_INTERRUPT_ERI2 96 +#define CYGNUM_HAL_INTERRUPT_RXI2 97 +#define CYGNUM_HAL_INTERRUPT_TXI2 98 +#define CYGNUM_HAL_INTERRUPT_TEI2 99 + +#define CYGNUM_HAL_INTERRUPT_RSV100 100 +#define CYGNUM_HAL_INTERRUPT_RSV101 101 +#define CYGNUM_HAL_INTERRUPT_RSV102 102 +#define CYGNUM_HAL_INTERRUPT_RSV103 103 +#define CYGNUM_HAL_INTERRUPT_RSV104 104 +#define CYGNUM_HAL_INTERRUPT_RSV105 105 +#define CYGNUM_HAL_INTERRUPT_RSV106 106 +#define CYGNUM_HAL_INTERRUPT_RSV107 107 +#define CYGNUM_HAL_INTERRUPT_RSV108 108 +#define CYGNUM_HAL_INTERRUPT_RSV109 109 +#define CYGNUM_HAL_INTERRUPT_RSV110 110 +#define CYGNUM_HAL_INTERRUPT_RSV111 111 +#define CYGNUM_HAL_INTERRUPT_RSV112 112 +#define CYGNUM_HAL_INTERRUPT_RSV113 113 +#define CYGNUM_HAL_INTERRUPT_RSV114 114 +#define CYGNUM_HAL_INTERRUPT_RSV115 115 +#define CYGNUM_HAL_INTERRUPT_RSV116 116 +#define CYGNUM_HAL_INTERRUPT_RSV117 117 +#define CYGNUM_HAL_INTERRUPT_RSV118 118 +#define CYGNUM_HAL_INTERRUPT_RSV119 119 +#define CYGNUM_HAL_INTERRUPT_RSV120 120 +#define CYGNUM_HAL_INTERRUPT_RSV121 121 +#define CYGNUM_HAL_INTERRUPT_RSV122 122 +#define CYGNUM_HAL_INTERRUPT_RSV123 123 +#define CYGNUM_HAL_INTERRUPT_RSV124 124 +#define CYGNUM_HAL_INTERRUPT_RSV125 125 +#define CYGNUM_HAL_INTERRUPT_RSV126 126 +#define CYGNUM_HAL_INTERRUPT_RSV127 127 + + +#define CYGNUM_HAL_ISR_MIN 16 +#define CYGNUM_HAL_ISR_MAX 127 + +#define CYGNUM_HAL_ISR_COUNT (3+((CYGNUM_HAL_ISR_MAX+1)/4)) + +// The vector used by the Real time clock + +#define CYGNUM_HAL_INTERRUPT_RTC CYGNUM_HAL_INTERRUPT_CMIA1 + +//-------------------------------------------------------------------------- +// Interrupt vector translation. + +#if !defined(HAL_TRANSLATE_VECTOR) && !defined(CYGIMP_HAL_COMMON_INTERRUPTS_CHAIN) + +#define HAL_TRANSLATE_VECTOR(_vector_,_index_) \ + _index_ = (_vector_) + +#endif + +//-------------------------------------------------------------------------- +// H8/300H specific version of HAL_INTERRUPT_CONFIGURE + +#define HAL_INTERRUPT_CONFIGURE( _vector_, _level_, _up_ ) \ + hal_interrupt_configure( _vector_, _level_, _up_ ) + +externC void hal_interrupt_configure(int vector,int level,int up); + +#define HAL_INTERRUPT_CONFIGURE_DEFINED + +//-------------------------------------------------------------------------- +// Interrupt control macros + +#define HAL_DISABLE_INTERRUPTS(_old_) \ + asm volatile ( \ + "sub.l er0,er0\n\t" \ + "stc exr,r0l\n\t" \ + "orc #0x7,exr\n\t" \ + "and.b #0x07,r0l\n\t" \ + "mov.l er0,%0" \ + : "=r"(_old_) \ + : \ + : "er0" \ + ); + +#define HAL_ENABLE_INTERRUPTS() \ + asm volatile ( \ + "andc #0xf8,exr" \ + ); + +#define HAL_RESTORE_INTERRUPTS(_old_) \ + asm volatile ( \ + "mov.l %0,er0\n\t" \ + "and.b #0x07,r0l\n\t" \ + "stc exr,r0h\n\t" \ + "and.b #0xf8,r0h\n\t" \ + "or.b r0h,r0l\n\t" \ + "ldc r0l,exr" \ + : \ + : "r"(_old_) \ + : "er0" \ + ); + +#define HAL_QUERY_INTERRUPTS(_old_) \ + asm volatile ( \ + "sub.l er0,er0\n\t" \ + "stc exr,r0l\n\t" \ + "and.b #0x07,r0l\n\t" \ + "mov.l er0,%0" \ + : "=r"(_old_) \ + ); + +//-------------------------------------------------------------------------- +// Clock control. + +externC void hal_clock_initialize(cyg_uint32 period); +externC void hal_clock_reset(cyg_uint32 vector,cyg_uint32 period); +externC void hal_clock_read(cyg_uint32 *pvalue); + +#define HAL_CLOCK_INITIALIZE( _period_ ) \ + hal_clock_initialize( _period_ ) + +#define HAL_CLOCK_RESET( _vector_, _period_ ) \ + hal_clock_reset( _vector_, _period_ ) + +#define HAL_CLOCK_READ( _pvalue_ ) \ + hal_clock_read( _pvalue_ ) + +// FIXME: above line should not use CYGNUM_KERNEL_COUNTERS_RTC_PERIOD since +// this means the HAL gets configured by kernel options even when the +// kernel is disabled! + + +//-------------------------------------------------------------------------- +#endif // ifndef CYGONCE_HAL_VAR_INTR_H +// End of var_intr.h
new file mode 100644 --- /dev/null +++ b/packages/hal/h8300/h8s/current/include/variant.inc @@ -0,0 +1,215 @@ +#ifndef CYGONCE_HAL_VARIANT_INC +#define CYGONCE_HAL_VARIANT_INC +##============================================================================= +## +## variant.inc +## +## H8S assembler header file +## +##============================================================================= +#####ECOSGPLCOPYRIGHTBEGIN#### +## ------------------------------------------- +## This file is part of eCos, the Embedded Configurable Operating System. +## Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +## +## eCos is free software; you can redistribute it and/or modify it under +## the terms of the GNU General Public License as published by the Free +## Software Foundation; either version 2 or (at your option) any later version. +## +## eCos is distributed in the hope that it will be useful, but WITHOUT ANY +## WARRANTY; without even the implied warranty of MERCHANTABILITY or +## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +## for more details. +## +## You should have received a copy of the GNU General Public License along +## with eCos; if not, write to the Free Software Foundation, Inc., +## 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +## +## As a special exception, if other files instantiate templates or use macros +## or inline functions from this file, or you compile this file and link it +## with other works to produce a work based on this file, this file does not +## by itself cause the resulting work to be covered by the GNU General Public +## License. However the source code for this file must still be made available +## in accordance with section (3) of the GNU General Public License. +## +## This exception does not invalidate any other reasons why a work based on +## this file might be covered by the GNU General Public License. +## +## Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +## at http://sources.redhat.com/ecos/ecos-license/ +## ------------------------------------------- +#####ECOSGPLCOPYRIGHTEND#### +##============================================================================= +#######DESCRIPTIONBEGIN#### +## +## Author(s): ysato +## Contributors: ysato +## Date: 2003-01-01 +## Purpose: H8S definitions. +## Description: This file contains various definitions and macros that are +## useful for writing assembly code for the H8/300H CPU variant. +## Usage: +## #include <cyg/hal/variant.inc> +## ... +## +## +######DESCRIPTIONEND#### +## +##============================================================================= + +#include <pkgconf/hal.h> + +#include <cyg/hal/platform.inc> +#include <cyg/hal/basetype.h> + + +#------------------------------------------------------------------------------ +# Register definitions + +#define INTCR 0xffff31 + +#------------------------------------------------------------------------------ +# CPU state save and restore macros + + .macro hal_cpu_save_all + subs #4,sp ; reserve space + subs #2,sp + mov.l sp,@-sp + stm er0-er3,@-sp + stm er4-er6,@-sp + sub.w e0,e0 + mov.w e0,@(4*9:16,sp) ; clear exr high word + mov.l @(4*10:16,sp),r0 + sub.l er1,er1 + mov.b r0h,r1l + mov.l er1,@(4*8:16,sp) ; copy ccr + mov.l @(4*6:16,sp),er0 + mov.l @(4*5:16,sp),er1 + .endm + + .macro hal_cpu_load_all + mov.w @(4*8+2:16,sp),r0 + mov.w @(4*10:16,sp),r1 + mov.b r0l,r1h + mov.w r1,@(4*10:16,sp) ; set ccr + ldm @sp+,er4-er6 + ldm @sp+,er0-er3 + add.l #10,sp + .endm + + .macro hal_cpu_save_context + sub.w r2,r2 + stc exr,r2l + mov.w r2,@-sp + hal_cpu_save_all + .endm + + .macro h8300_var_interrupt_entry + mov.l @CYG_LABEL_DEFN(_intvector),er0 + shll.l #2,er0 + mov.l @(CYG_LABEL_DEFN(hal_vsr_table),er0),er0 + .endm + + .macro h8300_var_call_pending_DSR + mov.l er5,@-sp ; save some work regs + mov.l er6,@-sp + mov.l sp,er6 ; save current SP + mov.l #__interrupt_stack,sp ; interrupt stack pointer + stc exr,r5l ; save PSW + hal_cpu_int_enable ; enable interrupts + + ; Call kernel code to invoke DSRs. + jsr @CYG_LABEL_DEFN(cyg_interrupt_call_pending_DSRs) + + ; On return the old SP in a2 and the old PSW in d2 will + ; have been preserved by the calling conventions. + + hal_cpu_int_merge r5l ; Restore previous PSW + mov.l er6,sp ; restore old SP + mov.l @sp+,er6 ; Retrieve old work regs + mov.l @sp+,er5 + rts ; and return + .endm + +# Location of PC in saved register context (HAL_SavedRegisters) +#define SAVED_CONTEXT_PC_OFFSET (4*10) + + # Enable interrupts + .macro hal_cpu_int_enable + andc #0xf8,exr + .endm + + # Disable interrupts + .macro hal_cpu_int_disable + orc #0x07,exr + .endm + + # Merge the interrupt enable state of the status register in + # \sr with the current sr. + .macro hal_cpu_int_merge sr wk=r0l + and.b #0x07,\sr + stc exr,\wk + and.b #0xf8,\wk + or.b \sr,\wk + ldc \wk,exr + .endm + + .macro hal_cpu_set_int_level + ldc exr,r0h + and.b #0xf8,r0h + or.b r0l,r0h + mov.b r0h,exr + .endm + +##----------------------------------------------------------------------------- +# Default interrupt decoding macros. + +#ifndef CYGPKG_HAL_H8300_INTC_DEFINED + +#define CYG_ISR_TABLE_SIZE 128 + + .macro hal_intc_init + mov.b @INTCR,r0l + bclr #4,r0l + bset #5,r0l + mov.b r0l,@INTCR ; interrupt mode 2 + .endm + +#define CYGPKG_HAL_H8300_INTC_DEFINED + +#endif + + + +#ifndef CYGPKG_HAL_H8300_MON_DEFINED + + .macro hal_mon_init + .endm + +#if !(defined(CYG_HAL_STARTUP_ROM) || \ + defined(CYGPKG_HAL_H8300_H8300H_SIM) || \ + !defined(CYGSEM_HAL_USE_ROM_MONITOR)) + +#define CYG_HAL_H8300_VSR_TABLE_DEFINED + +#endif + + + +#define CYGPKG_HAL_H8300_MON_DEFINED + +#endif + +#ifndef CYGPKG_HAL_H8300_CPU_INIT_DEFINED +#define CYGPKG_HAL_H8300_CPU_INIT_DEFINED + # Initialize CPU + .macro hal_cpu_init + # Set up the PSW + ldc #0x80,ccr + ldc #0x07,exr + .endm +#endif + +#------------------------------------------------------------------------------ +#endif // ifndef CYGONCE_HAL_VARIANT_INC +# end of variant.inc
new file mode 100644 --- /dev/null +++ b/packages/hal/h8300/h8s/current/src/h8300_h8s.ld @@ -0,0 +1,142 @@ +//=========================================================================== +// +// MLT linker script for H8/300H +// +//=========================================================================== +//####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT ANY +// WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License along +// with eCos; if not, write to the Free Software Foundation, Inc., +// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +// +// As a special exception, if other files instantiate templates or use macros +// or inline functions from this file, or you compile this file and link it +// with other works to produce a work based on this file, this file does not +// by itself cause the resulting work to be covered by the GNU General Public +// License. However the source code for this file must still be made available +// in accordance with section (3) of the GNU General Public License. +// +// This exception does not invalidate any other reasons why a work based on +// this file might be covered by the GNU General Public License. +// +// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +// at http://sources.redhat.com/ecos/ecos-license/ +// ------------------------------------------- +//####ECOSGPLCOPYRIGHTEND#### +//=========================================================================== + +#include <pkgconf/system.h> +#include <cyg/hal/basetype.h> +#include <pkgconf/hal.h> +STARTUP(vectors.o) +ENTRY(CYG_LABEL_DEFN(_start)) +#ifdef EXTRAS +INPUT(extras.o) +#endif +GROUP(libtarget.a libgcc.a) + + + +#define ALIGN_LMA 4 +#define FOLLOWING(_section_) AT ((LOADADDR (_section_) + SIZEOF (_section_) + ALIGN_LMA - 1) & ~ (ALIGN_LMA - 1)) +#define LMA_EQ_VMA +#define FORCE_OUTPUT . = . + +#define SECTIONS_BEGIN + +#define SECTION_rom_vectors(_region_, _vma_, _lma_) \ + .vectors _vma_ : _lma_ \ + { FORCE_OUTPUT; KEEP (*(.vectors)) } \ + > _region_ + +#define SECTION_text(_region_, _vma_, _lma_) \ + .text _vma_ : _lma_ \ + { CYG_LABEL_DEFN(_stext) = ABSOLUTE(.); \ + *(.text*) *(.gnu.warning) *(.gnu.linkonce*) *(.init) } \ + > _region_ \ + CYG_LABEL_DEFN(_etext) = .; PROVIDE (etext = .); + +#define SECTION_fini(_region_, _vma_, _lma_) \ + .fini _vma_ : _lma_ \ + { FORCE_OUTPUT; *(.fini) } \ + > _region_ + +#define SECTION_rodata(_region_, _vma_, _lma_) \ + .rodata _vma_ : _lma_ \ + { FORCE_OUTPUT; *(.rodata*) } \ + > _region_ + +#define SECTION_rodata1(_region_, _vma_, _lma_) \ + .rodata1 _vma_ : _lma_ \ + { FORCE_OUTPUT; *(.rodata1) } \ + > _region_ + +#define SECTION_fixup(_region_, _vma_, _lma_) \ + .fixup _vma_ : _lma_ \ + { FORCE_OUTPUT; *(.fixup) } \ + > _region_ + +#define SECTION_gcc_except_table(_region_, _vma_, _lma_) \ + .gcc_except_table _vma_ : _lma_ \ + { FORCE_OUTPUT; *(.gcc_except_table) } \ + > _region_ + +#if defined(CYGHWR_HAL_H8300_VECTOR_ADDRESS) +#define SECTION_int_hook_table(_region_, _vma_, _lma_) \ + .int_hook_table CYGHWR_HAL_H8300_VECTOR_ADDRESS : _lma_ \ + { CYG_LABEL_DEFN(__int_hook_start) = ABSOLUTE (.); \ + FORCE_OUTPUT; *(.int_hook_table) } \ + > _region_ \ + CYG_LABEL_DEFN(__rom_int_hook_table) = LOADADDR(.int_hook_table); \ + CYG_LABEL_DEFN(__int_hook_end) = .; +#else +#define SECTION_int_hook_table(_region_, _vma_, _lma_) \ + .int_hook_table _vma_ : _lma_ \ + { CYG_LABEL_DEFN(__int_hook_start) = ABSOLUTE (.); \ + FORCE_OUTPUT; *(.int_hook_table) } \ + > _region_ +#endif + +#define SECTION_data(_region_, _vma_, _lma_) \ + .data _vma_ : _lma_ \ + { CYG_LABEL_DEFN(__ram_data_start) = ABSOLUTE (.); *(.data*) *(.data1) \ + . = ALIGN(4); \ + KEEP(*( SORT (.ecos.table.*))) ; \ + . = ALIGN(4); \ + CYG_LABEL_DEFN(_GOT1_START_) = ABSOLUTE (.); *(.got1) CYG_LABEL_DEFN(_GOT1_END_) = ABSOLUTE (.); \ + CYG_LABEL_DEFN(_GOT2_START_) = ABSOLUTE (.); *(.got2) CYG_LABEL_DEFN(_GOT2_END_) = ABSOLUTE (.); \ + . = ALIGN (4); \ + CYG_LABEL_DEFN(__CTOR_LIST__) = ABSOLUTE (.); KEEP (*(SORT (.ctors*))) CYG_LABEL_DEFN(__CTOR_END__) = ABSOLUTE (.); \ + CYG_LABEL_DEFN(__DTOR_LIST__) = ABSOLUTE (.); KEEP (*(SORT (.dtors*))) CYG_LABEL_DEFN(__DTOR_END__) = ABSOLUTE (.); \ + CYG_LABEL_DEFN(_GOT_START) = ABSOLUTE (.); CYG_LABEL_DEFN(_GLOBAL_OFFSET_TABLE_) = ABSOLUTE (.) + 32768; CYG_LABEL_DEFN(_SDA_BASE_) = ABSOLUTE (.); \ + *(.got.plt) *(.got) CYG_LABEL_DEFN(_GOT_END_) = ABSOLUTE (.); \ + *(.dynamic) *(.sdata*) *(.sbss*) } \ + > _region_ \ + CYG_LABEL_DEFN(__rom_data_start) = LOADADDR (.data); \ + CYG_LABEL_DEFN(__ram_data_end) = .; PROVIDE (CYG_LABEL_DEFN(__ram_data_end) = .); CYG_LABEL_DEFN(_edata) = .; PROVIDE (edata = .); + +#define SECTION_bss(_region_, _vma_, _lma_) \ + .bss _vma_ : _lma_ \ + { CYG_LABEL_DEFN(__bss_start) = ABSOLUTE (.); \ + *(.scommon) *(.dynbss) *(.bss) *(COMMON) \ + CYG_LABEL_DEFN(__bss_end) = ABSOLUTE (.); } \ + > _region_ + +#define SECTIONS_END . = ALIGN(4); _end = .; PROVIDE (end = .); + +#include CYGHWR_MEMORY_LAYOUT_LDI +#include CYGBLD_HAL_PLATFORM_H + +CYG_LABEL_DEFN(hal_virtual_vector_table) = CYGHWR_HAL_VECTOR_TABLE;
new file mode 100644 --- /dev/null +++ b/packages/hal/h8300/h8s/current/src/h8s_stub.c @@ -0,0 +1,286 @@ +//======================================================================== +// +// h8s_stub.c +// +// Helper functions for H8S stub +// +//======================================================================== +//####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT ANY +// WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License along +// with eCos; if not, write to the Free Software Foundation, Inc., +// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +// +// As a special exception, if other files instantiate templates or use macros +// or inline functions from this file, or you compile this file and link it +// with other works to produce a work based on this file, this file does not +// by itself cause the resulting work to be covered by the GNU General Public +// License. However the source code for this file must still be made available +// in accordance with section (3) of the GNU General Public License. +// +// This exception does not invalidate any other reasons why a work based on +// this file might be covered by the GNU General Public License. +// +// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +// at http://sources.redhat.com/ecos/ecos-license/ +// ------------------------------------------- +//####ECOSGPLCOPYRIGHTEND#### +//======================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): Yoshinori Sato +// Contributors: Yoshinori Sato +// Date: 2002-05-03 +// Purpose: +// Description: Helper functions for H8S stub +// Usage: +// +//####DESCRIPTIONEND#### +// +//======================================================================== + +#include <stddef.h> + +#include <pkgconf/hal.h> + +#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + +#include <cyg/hal/hal_stub.h> +#include <cyg/hal/hal_arch.h> +#include <cyg/hal/hal_intr.h> + +#ifdef CYGDBG_HAL_DEBUG_GDB_THREAD_SUPPORT +#include <cyg/hal/dbg-threads-api.h> // dbg_currthread_id +#endif + +/*---------------------------------------------------------------------- + * Asynchronous interrupt support + */ + +typedef unsigned short t_inst; + +static struct +{ + t_inst *targetAddr; + t_inst savedInstr; +} asyncBuffer; + +/* Called to asynchronously interrupt a running program. + Must be passed address of instruction interrupted. + This is typically called in response to a debug port + receive interrupt. +*/ + +void +install_async_breakpoint(void *pc) +{ + asyncBuffer.targetAddr = pc; + asyncBuffer.savedInstr = *(t_inst *)pc; + *(t_inst *)pc = (t_inst)HAL_BREAKINST; + __instruction_cache(CACHE_FLUSH); + __data_cache(CACHE_FLUSH); +} + +/*--------------------------------------------------------------------*/ +/* Given a trap value TRAP, return the corresponding signal. */ + +int __computeSignal (unsigned int trap_number) +{ + switch (trap_number) { + case 11: + return SIGTRAP; + default: + return SIGINT; + } +} + +/*--------------------------------------------------------------------*/ +/* Return the trap number corresponding to the last-taken trap. */ + +int __get_trap_number (void) +{ + extern int CYG_LABEL_NAME(_intvector); + // The vector is not not part of the GDB register set so get it + // directly from the save context. + return CYG_LABEL_NAME(_intvector); +} + +/*--------------------------------------------------------------------*/ +/* Set the currently-saved pc register value to PC. This also updates NPC + as needed. */ + +void set_pc (target_register_t pc) +{ + put_register (PC, pc); +} + + +/*---------------------------------------------------------------------- + * Single-step support. Lifted from CygMon. + */ + +#define NUM_SS_BPTS 2 +static target_register_t break_mem [NUM_SS_BPTS] = {0, 0}; +static unsigned short break_mem_data [NUM_SS_BPTS]; + +/* Set a single-step breakpoint at ADDR. Up to two such breakpoints + can be set; WHICH specifies which one to set (0 or 1). */ + +static void +set_single_bp (int which, unsigned char *addr) +{ + if (break_mem[which] == 0) { + break_mem[which] = (target_register_t) addr; + break_mem_data[which] = *(unsigned short *)addr; + *(unsigned short *)addr = HAL_BREAKINST; + } +} + +/* Clear any single-step breakpoint(s) that may have been set. */ + +void __clear_single_step (void) +{ + int x; + for (x = 0; x < NUM_SS_BPTS; x++) + { + unsigned short* addr = (unsigned short *)break_mem[x]; + if (addr) { + *addr = break_mem_data[x]; + break_mem[x] = 0; + } + } +} + +/* Set breakpoint(s) to simulate a single step from the current PC. */ + +const static unsigned char opcode_length0[]={ + 0x04,0x02,0x04,0x02,0x04,0x02,0x04,0x02, /* 0x58 */ + 0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02, /* 0x60 */ + 0x02,0x02,0x11,0x11,0x02,0x02,0x04,0x04, /* 0x68 */ + 0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02, /* 0x70 */ + 0x08,0x04,0x06,0x04,0x04,0x04,0x04,0x04 /* 0x78 */ +}; + +const static unsigned char opcode_length1[]={ + 0x10,0x00,0x00,0x00,0x11,0x00,0x00,0x00, + 0x02,0x00,0x00,0x00,0x04,0x04,0x00,0x04 +}; + +static int insn_length(unsigned char *pc) +{ + if (*pc != 0x01 && (*pc < 0x58 || *pc>=0x80)) + return 2; + else + switch (*pc) { + case 0x01: + switch (*(pc+1) & 0xf0) { + case 0x00: + if (*(pc+2)== 0x78) { + return 10; + } else if (*(pc+2)== 0x6b) { + return (*(pc+3) & 0x20)?8:6; + } else { + return (*(pc+2) & 0x02)?6:4; + } + case 0x40: + return (*(pc+2) & 0x02)?8:6; + default: + return opcode_length1[*(pc+1)>>4]; + } + case 0x6a: + case 0x6b: + return (*(pc+1) & 0x20)?6:4; + default: + return opcode_length0[*pc-0x58]; + } +} + +void __single_step (void) +{ + unsigned int pc = get_register (PC); + unsigned int next; + unsigned int opcode; + + opcode = *(unsigned short *)pc; + next = pc + insn_length((unsigned char *)pc); + if (opcode == 0x5470) { + /* rts */ + unsigned long *sp; + sp = (unsigned long *)get_register(SP); + next = *(sp+2) & 0x00ffffff; + } else if (((opcode & 0xf000) == 0x4000) || ((opcode & 0xff00) == 0x5500)) { + /* b**:8 */ + char dsp; + dsp = (opcode & 0xff); + set_single_bp(1,(unsigned char *)(pc+2+dsp)); + } else if (((opcode & 0xff00) == 0x5800) || ((opcode & 0xff00) == 0x5c00)) { + /* b**:16 */ + short dsp; + dsp = *(short *)(pc+2); + set_single_bp(1,(unsigned char *)(pc+4+dsp)); + } else if ((opcode & 0xfb00) != 0x5800) { + /* jmp / jsr */ + int regs; + const short reg_tbl[]={ER0,ER1,ER2,ER3,ER4,ER5,ER6,SP}; + switch(opcode & 0xfb00) { + case 0x5900: + regs = (opcode & 0x0070) >> 8; + next = get_register(reg_tbl[regs]); + break; + case 0x5a00: + next = *(unsigned long *)(pc) & 0x00ffffff; + break; + case 0x5b00: + next = *(unsigned long *)(opcode & 0xff); + break; + } + } + set_single_bp(0,(unsigned char *)next); +} + +void __install_breakpoints (void) +{ + /* NOP since single-step HW exceptions are used instead of + breakpoints. */ +} + +void __clear_breakpoints (void) +{ + +} + + +/* If the breakpoint we hit is in the breakpoint() instruction, return a + non-zero value. */ + +externC void CYG_LABEL_NAME(breakinst)(void); +int +__is_breakpoint_function () +{ + return get_register (PC) == (target_register_t)&CYG_LABEL_NAME(breakinst); +} + + +/* Skip the current instruction. */ + +void __skipinst (void) +{ + unsigned long pc = get_register (PC); + + pc+=insn_length((unsigned char *)pc); + put_register (PC, (target_register_t) pc); +} + +#endif // CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
new file mode 100644 --- /dev/null +++ b/packages/hal/h8300/h8s/current/src/var_misc.c @@ -0,0 +1,300 @@ +//========================================================================== +// +// var_misc.c +// +// HAL CPU variant miscellaneous functions +// +//========================================================================== +//####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT ANY +// WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License along +// with eCos; if not, write to the Free Software Foundation, Inc., +// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +// +// As a special exception, if other files instantiate templates or use macros +// or inline functions from this file, or you compile this file and link it +// with other works to produce a work based on this file, this file does not +// by itself cause the resulting work to be covered by the GNU General Public +// License. However the source code for this file must still be made available +// in accordance with section (3) of the GNU General Public License. +// +// This exception does not invalidate any other reasons why a work based on +// this file might be covered by the GNU General Public License. +// +// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +// at http://sources.redhat.com/ecos/ecos-license/ +// ------------------------------------------- +//####ECOSGPLCOPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): ysato +// Contributors: ysato +// Date: 2002-12-31 +// Purpose: HAL miscellaneous functions +// Description: This file contains miscellaneous functions provided by the +// HAL. +// +//####DESCRIPTIONEND#### +// +//========================================================================*/ + +#include <pkgconf/hal.h> + +#include <cyg/infra/cyg_type.h> // Base types +#include <cyg/infra/cyg_trac.h> // tracing macros +#include <cyg/infra/cyg_ass.h> // assertion macros +#include <cyg/hal/var_arch.h> +#include <cyg/hal/var_intr.h> +#include <cyg/hal/hal_io.h> + +/*------------------------------------------------------------------------*/ +/* Variant specific initialization routine. */ + +void hal_variant_init(void) +{ +} + +struct int_regs { + CYG_BYTE *ier; + CYG_BYTE *isr; + CYG_BYTE mask; + CYG_BYTE status; +}; + +#define REGS_DEF(ier,isr,mask,status) \ + {(CYG_BYTE *)ier,(CYG_BYTE *)isr,mask,status} + +const struct int_regs interrupt_registers[]= { + REGS_DEF(CYGARC_IERL,CYGARC_ISRL,0x01,0x01), + REGS_DEF(CYGARC_IERL,CYGARC_ISRL,0x02,0x02), + REGS_DEF(CYGARC_IERL,CYGARC_ISRL,0x04,0x04), + REGS_DEF(CYGARC_IERL,CYGARC_ISRL,0x08,0x08), + REGS_DEF(CYGARC_IERL,CYGARC_ISRL,0x10,0x10), + REGS_DEF(CYGARC_IERL,CYGARC_ISRL,0x20,0x20), + REGS_DEF(CYGARC_IERL,CYGARC_ISRL,0x40,0x40), + REGS_DEF(CYGARC_IERL,CYGARC_ISRL,0x80,0x80), + REGS_DEF(CYGARC_IERH,CYGARC_ISRH,0x01,0x01), + REGS_DEF(CYGARC_IERH,CYGARC_ISRH,0x02,0x02), + REGS_DEF(CYGARC_IERH,CYGARC_ISRH,0x04,0x04), + REGS_DEF(CYGARC_IERH,CYGARC_ISRH,0x08,0x08), + REGS_DEF(CYGARC_IERH,CYGARC_ISRH,0x10,0x10), + REGS_DEF(CYGARC_IERH,CYGARC_ISRH,0x20,0x20), + REGS_DEF(CYGARC_IERH,CYGARC_ISRH,0x40,0x40), + REGS_DEF(CYGARC_IERH,CYGARC_ISRH,0x80,0x80), + REGS_DEF(NULL,NULL,0,0), + REGS_DEF(CYGARC_TCSR,CYGARC_TCSR,0x20,0x80), + REGS_DEF(NULL,NULL,0,0), + REGS_DEF(CYGARC_REFCR,CYGARC_REFCR,0x40,0x80), + REGS_DEF(NULL,NULL,0,0), + REGS_DEF(NULL,NULL,0,0), + REGS_DEF(CYGARC_ADCSR,CYGARC_ADCSR,0x40,0x80), + REGS_DEF(NULL,NULL,0,0), + REGS_DEF(CYGARC_TIER0,CYGARC_TSR0,0x01,0x01), + REGS_DEF(CYGARC_TIER0,CYGARC_TSR0,0x02,0x02), + REGS_DEF(CYGARC_TIER0,CYGARC_TSR0,0x04,0x04), + REGS_DEF(CYGARC_TIER0,CYGARC_TSR0,0x08,0x08), + REGS_DEF(CYGARC_TIER0,CYGARC_TSR0,0x10,0x10), + REGS_DEF(NULL,NULL,0,0), + REGS_DEF(NULL,NULL,0,0), + REGS_DEF(NULL,NULL,0,0), + REGS_DEF(CYGARC_TIER1,CYGARC_TSR1,0x01,0x01), + REGS_DEF(CYGARC_TIER1,CYGARC_TSR1,0x02,0x02), + REGS_DEF(CYGARC_TIER1,CYGARC_TSR1,0x10,0x10), + REGS_DEF(CYGARC_TIER1,CYGARC_TSR1,0x20,0x20), + REGS_DEF(CYGARC_TIER2,CYGARC_TSR2,0x01,0x01), + REGS_DEF(CYGARC_TIER2,CYGARC_TSR2,0x02,0x02), + REGS_DEF(CYGARC_TIER2,CYGARC_TSR2,0x10,0x10), + REGS_DEF(CYGARC_TIER2,CYGARC_TSR2,0x20,0x20), + REGS_DEF(CYGARC_TIER3,CYGARC_TSR3,0x01,0x01), + REGS_DEF(CYGARC_TIER3,CYGARC_TSR3,0x02,0x02), + REGS_DEF(CYGARC_TIER3,CYGARC_TSR3,0x04,0x04), + REGS_DEF(CYGARC_TIER3,CYGARC_TSR3,0x08,0x08), + REGS_DEF(CYGARC_TIER3,CYGARC_TSR3,0x10,0x10), + REGS_DEF(NULL,NULL,0,0), + REGS_DEF(NULL,NULL,0,0), + REGS_DEF(NULL,NULL,0,0), + REGS_DEF(CYGARC_TIER4,CYGARC_TSR4,0x01,0x01), + REGS_DEF(CYGARC_TIER4,CYGARC_TSR4,0x02,0x02), + REGS_DEF(CYGARC_TIER4,CYGARC_TSR4,0x10,0x10), + REGS_DEF(CYGARC_TIER4,CYGARC_TSR4,0x20,0x20), + REGS_DEF(CYGARC_TIER5,CYGARC_TSR5,0x01,0x01), + REGS_DEF(CYGARC_TIER5,CYGARC_TSR5,0x02,0x02), + REGS_DEF(CYGARC_TIER5,CYGARC_TSR5,0x10,0x10), + REGS_DEF(CYGARC_TIER5,CYGARC_TSR5,0x20,0x20), + REGS_DEF(CYGARC_8TCR0,CYGARC_8TCSR0,0x40,0x40), + REGS_DEF(CYGARC_8TCR0,CYGARC_8TCSR0,0x80,0x80), + REGS_DEF(CYGARC_8TCR0,CYGARC_8TCSR0,0x20,0x20), + REGS_DEF(NULL,NULL,0,0), + REGS_DEF(CYGARC_8TCR1,CYGARC_8TCSR1,0x40,0x40), + REGS_DEF(CYGARC_8TCR1,CYGARC_8TCSR1,0x80,0x80), + REGS_DEF(CYGARC_8TCR1,CYGARC_8TCSR1,0x20,0x20), + REGS_DEF(NULL,NULL,0,0), + REGS_DEF(CYGARC_DMABCRL,CYGARC_DMABCRL,0x01,0x10), + REGS_DEF(CYGARC_DMABCRL,CYGARC_DMABCRL,0x02,0x20), + REGS_DEF(CYGARC_DMABCRL,CYGARC_DMABCRL,0x04,0x40), + REGS_DEF(CYGARC_DMABCRL,CYGARC_DMABCRL,0x08,0x80), + REGS_DEF(CYGARC_EDMDR0L,CYGARC_EDMDR0L,0x80,0x40), + REGS_DEF(CYGARC_EDMDR1L,CYGARC_EDMDR1L,0x80,0x40), + REGS_DEF(CYGARC_EDMDR2L,CYGARC_EDMDR2L,0x80,0x40), + REGS_DEF(CYGARC_EDMDR3L,CYGARC_EDMDR3L,0x80,0x40), + REGS_DEF(CYGARC_SCR0,CYGARC_SSR0,0x40,0x30), + REGS_DEF(CYGARC_SCR0,CYGARC_SSR0,0x40,0x40), + REGS_DEF(CYGARC_SCR0,CYGARC_SSR0,0x80,0x80), + REGS_DEF(CYGARC_SCR0,CYGARC_SSR0,0x04,0x04), + REGS_DEF(CYGARC_SCR1,CYGARC_SSR1,0x40,0x30), + REGS_DEF(CYGARC_SCR1,CYGARC_SSR1,0x40,0x40), + REGS_DEF(CYGARC_SCR1,CYGARC_SSR1,0x80,0x80), + REGS_DEF(CYGARC_SCR1,CYGARC_SSR1,0x04,0x04), + REGS_DEF(CYGARC_SCR2,CYGARC_SSR2,0x40,0x30), + REGS_DEF(CYGARC_SCR2,CYGARC_SSR2,0x40,0x40), + REGS_DEF(CYGARC_SCR2,CYGARC_SSR2,0x80,0x80), + REGS_DEF(CYGARC_SCR2,CYGARC_SSR2,0x04,0x04), + REGS_DEF(NULL,NULL,0,0), + REGS_DEF(NULL,NULL,0,0), + REGS_DEF(NULL,NULL,0,0), + REGS_DEF(NULL,NULL,0,0), + REGS_DEF(NULL,NULL,0,0), + REGS_DEF(NULL,NULL,0,0), + REGS_DEF(NULL,NULL,0,0), + REGS_DEF(NULL,NULL,0,0), + REGS_DEF(NULL,NULL,0,0), + REGS_DEF(NULL,NULL,0,0), + REGS_DEF(NULL,NULL,0,0), + REGS_DEF(NULL,NULL,0,0), + REGS_DEF(NULL,NULL,0,0), + REGS_DEF(NULL,NULL,0,0), + REGS_DEF(NULL,NULL,0,0), + REGS_DEF(NULL,NULL,0,0), + REGS_DEF(NULL,NULL,0,0), + REGS_DEF(NULL,NULL,0,0), + REGS_DEF(NULL,NULL,0,0), + REGS_DEF(NULL,NULL,0,0), + REGS_DEF(NULL,NULL,0,0), + REGS_DEF(NULL,NULL,0,0), + REGS_DEF(NULL,NULL,0,0), + REGS_DEF(NULL,NULL,0,0), + REGS_DEF(NULL,NULL,0,0), + REGS_DEF(NULL,NULL,0,0), + REGS_DEF(NULL,NULL,0,0), + REGS_DEF(NULL,NULL,0,0), +}; + +void +hal_interrupt_mask(int vector) +{ + CYG_BYTE ier; + const struct int_regs *regs=&interrupt_registers[vector-12]; + if (vector == CYGNUM_HAL_INTERRUPT_WDT) { + HAL_READ_UINT8(CYGARC_TCSR,ier); + ier &= ~0x20; + HAL_WRITE_UINT16(CYGARC_TCSR,0xa500 | ier); + } else { + if ((vector > 16) && regs->ier) { + HAL_READ_UINT8(regs->ier,ier); + ier &= ~(regs->mask); + HAL_WRITE_UINT8(regs->ier,ier); + } else { + CYG_FAIL("Unknown interrupt vector"); + } + } +} + +void +hal_interrupt_unmask(int vector) +{ + CYG_BYTE ier; + const struct int_regs *regs=&interrupt_registers[vector-12]; + if (vector == CYGNUM_HAL_INTERRUPT_WDT) { + HAL_READ_UINT8(CYGARC_TCSR,ier); + ier |= 0x20; + HAL_WRITE_UINT16(CYGARC_TCSR,0xa500 | ier); + } else { + if ((vector > 16) && regs->ier) { + HAL_READ_UINT8(regs->ier,ier); + ier |= regs->mask; + HAL_WRITE_UINT8(regs->ier,ier); + } else { + CYG_FAIL("Unknown interrupt vector"); + } + } +} + +void +hal_interrupt_acknowledge(int vector) +{ + CYG_BYTE isr; + const struct int_regs *regs=&interrupt_registers[vector-12]; + if (vector >= CYGNUM_HAL_INTERRUPT_DEND0A && + vector <= CYGNUM_HAL_INTERRUPT_DEND1B) + return; + if (vector == CYGNUM_HAL_INTERRUPT_WDT) { + HAL_READ_UINT8(CYGARC_TCSR,isr); + isr &= ~0x80; + HAL_WRITE_UINT16(CYGARC_TCSR,0xa500 | isr); + } else { + if ((vector > 16) && regs->isr) { + HAL_READ_UINT8(regs->isr,isr); + isr &= ~(regs->status); + HAL_WRITE_UINT8(regs->isr,isr); + } else { + CYG_FAIL("Unknown interrupt vector"); + } + } +} + +void +hal_interrupt_set_level(int vector,int level) +{ + CYG_WORD *ipr; + CYG_WORD ipr_mask; + int offset; + if ((vector < CYGNUM_HAL_INTERRUPT_EXTERNAL_0) || + (vector > CYGNUM_HAL_INTERRUPT_EXTERNAL_15)) { + return; + } else { + vector -= 16; + ipr = (CYG_WORD *)CYGARC_IPRA + vector/4; + offset = (3 - (vector & 3)) * 4; + ipr_mask = 0x0f << offset; + *ipr &= ~ipr_mask; + *ipr |= (level & 0x07) << offset; + } +} + +void +hal_interrupt_configure(int vector,int level,int up) +{ + CYG_WORD iscr,mask; + CYG_WORD *iscr_ptr; + int conf=1; + if (level) conf = 0; + if (up) conf = 2; + CYG_ASSERT(!(up && level), "Cannot trigger on high level!"); + if (vector >= CYGNUM_HAL_INTERRUPT_EXTERNAL_0 && + vector <= CYGNUM_HAL_INTERRUPT_EXTERNAL_15) { + iscr_ptr = (vector <= CYGNUM_HAL_INTERRUPT_EXTERNAL_7)?CYGARC_ISCRL:CYGARC_ISCRH; + mask = 3 << ((vector - CYGNUM_HAL_INTERRUPT_EXTERNAL_0) & 7) * 2; + HAL_READ_UINT16(iscr_ptr,iscr); + iscr &= ~mask; + iscr |= conf << ((vector - CYGNUM_HAL_INTERRUPT_EXTERNAL_0) & 7) * 2; + HAL_WRITE_UINT16(iscr_ptr,iscr); + } else { + CYG_FAIL("Unhandled interrupt vector"); + } +} + +/*------------------------------------------------------------------------*/ +/* End of var_misc.c */
--- a/packages/hal/h8300/sim/current/ChangeLog +++ b/packages/hal/h8300/sim/current/ChangeLog @@ -6,6 +6,27 @@ 2003-07-18 Nick Garnett <nickg@balti.c "default_value" from "calculated". This makes it easier to change these values globally. +2003-03-09 Yoshinori Sato <ysato@users.sourceforge.jp> + + * cdl/hal_h8300_h8300h_sim.cdl + * src/hal_diag.c + CYGHAL_PLF_SCI_BASE add. + +2002-10-13 Yoshinori Sato <ysato@users.sourceforge.jp> + + * cdl/hal_h8300_h8300h_sim.cdl + GLOBAL_LD_FLAGS add -mint32 option. + +2002-10-13 Yoshinori Sato <ysato@users.sourceforge.jp> + + * include/pkgconf/mlt_h8300_h8300h_sim_ram.ldi + typo fix. + +2002-05-27 Yoshinori Sato <ysato@users.sourceforge.jp> + + * src/hal_diag.c + delete hal_diag_led_on/hal_diag_led_off. + 2002-04-29 Jonathan Larmour <jlarmour@redhat.com> * src/delay_us.S:
--- a/packages/hal/h8300/sim/current/cdl/hal_h8300_h8300h_sim.cdl +++ b/packages/hal/h8300/sim/current/cdl/hal_h8300_h8300h_sim.cdl @@ -173,7 +173,7 @@ cdl_package CYGPKG_HAL_H8300_H8300H_SIM display "Global linker flags" flavor data no_define - default_value { "-g -nostdlib -Wl,--gc-sections -Wl,-static -mh" } + default_value { "-g -nostdlib -Wl,--gc-sections -Wl,-static -mh -mint32" } description " This option controls the global linker flags. Individual packages may define options which override these global flags." @@ -202,4 +202,11 @@ cdl_package CYGPKG_HAL_H8300_H8300H_SIM calculated { "<pkgconf/mlt_h8300_h8300h_sim_ram.h>" } } } + cdl_option CYGHAL_PLF_SCI_BASE { + display "SCI Base address" + flavor data + default_value 0xffffb0 + description " + Used SCI Channel base address." + } }
--- a/packages/hal/h8300/sim/current/include/pkgconf/mlt_h8300_h8300h_sim_ram.ldi +++ b/packages/hal/h8300/sim/current/include/pkgconf/mlt_h8300_h8300h_sim_ram.ldi @@ -22,7 +22,7 @@ SECTIONS SECTION_rodata1 (ram, ALIGN (0x1), LMA_EQ_VMA) SECTION_fixup (ram, ALIGN (0x1), LMA_EQ_VMA) SECTION_gcc_except_table (ram, ALIGN (0x1), LMA_EQ_VMA) - SECTION_int_fook_table (ram, ALIGN (0x1), LMA_EQ_VMA) + SECTION_int_hook_table (ram, ALIGN (0x1), LMA_EQ_VMA) SECTION_data (ram, ALIGN (0x4), LMA_EQ_VMA) SECTION_bss (ram, ALIGN (0x4), LMA_EQ_VMA) CYG_LABEL_DEFN(__heap1) = ALIGN (0x8);
--- a/packages/hal/h8300/sim/current/include/platform.inc +++ b/packages/hal/h8300/sim/current/include/platform.inc @@ -4,7 +4,7 @@ ## ## platform.inc ## -## AM31 simulator "board" assembler header file +## H8/300H simulator "board" assembler header file ## ##============================================================================= #####ECOSGPLCOPYRIGHTBEGIN#### @@ -43,9 +43,9 @@ #######DESCRIPTIONBEGIN#### ## ## Author(s): jlarmour -## Contributors: jlarmour -## Date: 1999-09-09 -## Purpose: AM31 Simulator "board" definitions. +## Contributors: yoshinori sato +## Date: 2002-02-20 +## Purpose: H8/300H Simulator "board" definitions. ## Description: This file contains various definitions and macros that are ## required for writing assembly code for the am31 simulator. ## Currently there are none
--- a/packages/hal/h8300/sim/current/include/plf_intr.h +++ b/packages/hal/h8300/sim/current/include/plf_intr.h @@ -44,7 +44,7 @@ //#####DESCRIPTIONBEGIN#### // // Author(s): jlarmour -// Contributors: jlarmour +// Contributors: jlarmour,ysato // Date: 1999-09-09 // Purpose: Define Interrupt support // Description: The macros defined here provide the HAL APIs for handling
--- a/packages/hal/h8300/sim/current/include/plf_stub.h +++ b/packages/hal/h8300/sim/current/include/plf_stub.h @@ -44,7 +44,7 @@ //#####DESCRIPTIONBEGIN#### // // Author(s): jskov -// Contributors:jskov +// Contributors:jskov,ysato // Date: 1999-05-18 // Purpose: Platform HAL stub support for H8/300H simulator // Usage: #include <cyg/hal/plf_stub.h>
--- a/packages/hal/h8300/sim/current/src/hal_diag.c +++ b/packages/hal/h8300/sim/current/src/hal_diag.c @@ -40,9 +40,9 @@ //============================================================================= //#####DESCRIPTIONBEGIN#### // -// Author(s): dsm -// Contributors: dsm -// Date: 1998-03-13 +// Author(s): yoshinori sato +// Contributors: yoshinori sato +// Date: 2002-02-16 // Purpose: HAL diagnostic output // Description: Implementations of HAL diagnostic output support. // @@ -56,9 +56,9 @@ #include <cyg/hal/h8_sci.h> #include <cyg/hal/var_intr.h> -#define SCI_BASE ((cyg_uint8*)0xffffb0) +#define SCI_BASE ((cyg_uint8*)CYGHAL_PLF_SCI_BASE) -static channel_data_t channel = { (cyg_uint8*)SCI_BASE, 0, 0}; +const static channel_data_t channel = { (cyg_uint8*)SCI_BASE, 0, 0}; void cyg_hal_plf_comms_init(void)
--- a/packages/hal/h8300/sim/current/src/plf_misc.c +++ b/packages/hal/h8300/sim/current/src/plf_misc.c @@ -40,9 +40,9 @@ //========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): nickg -// Contributors: nickg, jlarmour -// Date: 1999-09-09 +// Author(s): yoshinori sato +// Contributors: yoshinori sato +// Date: 2002-02-17 // Purpose: HAL miscellaneous functions // Description: This file contains miscellaneous functions provided by the // HAL.
new file mode 100644 --- /dev/null +++ b/packages/hal/h8300/sim_s/current/ChangeLog @@ -0,0 +1,38 @@ +2003-02-21 Yoshinori Sato <qzb04471@nifty.ne.jp> + + * New package. + +//=========================================================================== +//####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT ANY +// WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License along +// with eCos; if not, write to the Free Software Foundation, Inc., +// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +// +// As a special exception, if other files instantiate templates or use macros +// or inline functions from this file, or you compile this file and link it +// with other works to produce a work based on this file, this file does not +// by itself cause the resulting work to be covered by the GNU General Public +// License. However the source code for this file must still be made available +// in accordance with section (3) of the GNU General Public License. +// +// This exception does not invalidate any other reasons why a work based on +// this file might be covered by the GNU General Public License. +// +// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +// at http://sources.redhat.com/ecos/ecos-license/ +// ------------------------------------------- +//####ECOSGPLCOPYRIGHTEND#### +//===========================================================================
new file mode 100644 --- /dev/null +++ b/packages/hal/h8300/sim_s/current/cdl/hal_h8300_h8s_sim.cdl @@ -0,0 +1,212 @@ +# ==================================================================== +# +# hal_h8300_h8s_sim.cdl +# +# H8S SIM HAL package configuration data +# +# ==================================================================== +#####ECOSGPLCOPYRIGHTBEGIN#### +## ------------------------------------------- +## This file is part of eCos, the Embedded Configurable Operating System. +## Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +## +## eCos is free software; you can redistribute it and/or modify it under +## the terms of the GNU General Public License as published by the Free +## Software Foundation; either version 2 or (at your option) any later version. +## +## eCos is distributed in the hope that it will be useful, but WITHOUT ANY +## WARRANTY; without even the implied warranty of MERCHANTABILITY or +## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +## for more details. +## +## You should have received a copy of the GNU General Public License along +## with eCos; if not, write to the Free Software Foundation, Inc., +## 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +## +## As a special exception, if other files instantiate templates or use macros +## or inline functions from this file, or you compile this file and link it +## with other works to produce a work based on this file, this file does not +## by itself cause the resulting work to be covered by the GNU General Public +## License. However the source code for this file must still be made available +## in accordance with section (3) of the GNU General Public License. +## +## This exception does not invalidate any other reasons why a work based on +## this file might be covered by the GNU General Public License. +## +## Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +## at http://sources.redhat.com/ecos/ecos-license/ +## ------------------------------------------- +#####ECOSGPLCOPYRIGHTEND#### +# ==================================================================== +######DESCRIPTIONBEGIN#### +# +# Author(s): ysato +# Original data: bartv +# Contributors: +# Date: 2003-01-01 +# +#####DESCRIPTIONEND#### +# +# ==================================================================== + +cdl_package CYGPKG_HAL_H8300_H8S_SIM { + display "H8S simulator" + parent CYGPKG_HAL_H8300 + requires CYGPKG_HAL_H8300_H8S + implements CYGINT_HAL_VIRTUAL_VECTOR_SUPPORT + implements CYGINT_HAL_DEBUG_GDB_STUBS + implements CYGINT_HAL_DEBUG_GDB_STUBS_BREAK + define_header hal_h8300_h8s_sim.h + include_dir cyg/hal + description " + The minimal simulator HAL package is provided for use when + only a simple simulation of the processor architecture is + desired, as opposed to detailed simulation of any specific + board. In particular it is not possible to simulate any of + the I/O devices, so device drivers cannot be used." + + compile hal_diag.c plf_misc.c delay_us.S + + define_proc { + puts $::cdl_system_header "#define CYGBLD_HAL_TARGET_H <pkgconf/hal_h8300_h8s.h>" + puts $::cdl_system_header "#define CYGBLD_HAL_PLATFORM_H <pkgconf/hal_h8300_h8s_sim.h>" + + puts $::cdl_header "#define CYG_HAL_H8300" + puts $::cdl_header "#define CYGNUM_HAL_H8300_SCI_PORTS 1" + puts $::cdl_header "#define CYGHWR_HAL_VECTOR_TABLE 0xfff000" + } + + cdl_component CYG_HAL_STARTUP { + display "Startup type" + flavor data + legal_values {"RAM"} + default_value {"RAM"} + no_define + define -file system.h CYG_HAL_STARTUP + description " + Only supports RAM startup." + } + + cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS { + display "Number of communication channels on the board" + flavor data + calculated 1 + } + + cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_DEBUG_CHANNEL { + display "Debug serial port" + flavor data + legal_values 0 to CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS-1 + default_value 0 + description " + The CQ/7708 board has only one serial port. This option + chooses which port will be used to connect to a host + running GDB." + } + + # Real-time clock/counter specifics + cdl_component CYGNUM_HAL_RTC_CONSTANTS { + display "Real-time clock constants." + flavor none + + cdl_option CYGNUM_HAL_RTC_NUMERATOR { + display "Real-time clock numerator" + flavor data + calculated 1000000000 + } + cdl_option CYGNUM_HAL_RTC_DENOMINATOR { + display "Real-time clock denominator" + flavor data + calculated 100 + } + cdl_option CYGNUM_HAL_H8300_RTC_PRESCALE { + display "Real-time clock base prescale" + flavor data + calculated 8192 + } + # Isn't a nice way to handle freq requirement! + cdl_option CYGNUM_HAL_RTC_PERIOD { + display "Real-time clock period" + flavor data + calculated 10 + } + } + + cdl_option CYGHWR_HAL_H8300_CPG_INPUT { + display "OSC/Clock Freqency" + flavor data + default_value 8000000 + } + + cdl_component CYGBLD_GLOBAL_OPTIONS { + display "Global build options" + flavor none + parent CYGPKG_NONE + description " + Global build options including control over + compiler flags, linker flags and choice of toolchain." + + + cdl_option CYGBLD_GLOBAL_COMMAND_PREFIX { + display "Global command prefix" + flavor data + no_define + default_value { "h8300-elf" } + description " + This option specifies the command prefix used when + invoking the build tools." + } + + cdl_option CYGBLD_GLOBAL_CFLAGS { + display "Global compiler flags" + flavor data + no_define + default_value { "-Wall -Wpointer-arith -Wstrict-prototypes -Winline -Wundef -Woverloaded-virtual -g -O2 -ms -mint32 -fsigned-char -fdata-sections -fno-rtti -fno-exceptions -fvtable-gc -finit-priority" } + description " + This option controls the global compiler flags which + are used to compile all packages by + default. Individual packages may define + options which override these global flags." + } + + cdl_option CYGBLD_GLOBAL_LDFLAGS { + display "Global linker flags" + flavor data + no_define + default_value { "-g -nostdlib -Wl,--gc-sections -Wl,-static -ms -mint32" } + description " + This option controls the global linker flags. Individual + packages may define options which override these global flags." + } + } + + cdl_component CYGHWR_MEMORY_LAYOUT { + display "Memory layout" + flavor data + no_define + calculated { "h8300_h8s_sim_ram" } + + cdl_option CYGHWR_MEMORY_LAYOUT_LDI { + display "Memory layout linker script fragment" + flavor data + no_define + define -file system.h CYGHWR_MEMORY_LAYOUT_LDI + calculated { "<pkgconf/mlt_h8300_h8s_sim_ram.ldi>" } + } + + cdl_option CYGHWR_MEMORY_LAYOUT_H { + display "Memory layout header file" + flavor data + no_define + define -file system.h CYGHWR_MEMORY_LAYOUT_H + calculated { "<pkgconf/mlt_h8300_h8s_sim_ram.h>" } + } + } + cdl_option CYGHAL_PLF_SCI_BASE { + display "SCI Base address" + flavor data + default_value 0xffff78 + description " + Used SCI Channel base address." + } +}
new file mode 100644 --- /dev/null +++ b/packages/hal/h8300/sim_s/current/doc/README @@ -0,0 +1,2 @@ +Please visit http://homepage2.nifty.com/ysato/eCos/index.en.html for up to date +information, particularly on which GNU tools to use and patches.
new file mode 100644 --- /dev/null +++ b/packages/hal/h8300/sim_s/current/include/hal_diag.h @@ -0,0 +1,75 @@ +#ifndef CYGONCE_HAL_HAL_DIAG_H +#define CYGONCE_HAL_HAL_DIAG_H + +/*============================================================================= +// +// hal_diag.h +// +// HAL Support for Kernel Diagnostic Routines +// +//============================================================================= +//####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT ANY +// WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License along +// with eCos; if not, write to the Free Software Foundation, Inc., +// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +// +// As a special exception, if other files instantiate templates or use macros +// or inline functions from this file, or you compile this file and link it +// with other works to produce a work based on this file, this file does not +// by itself cause the resulting work to be covered by the GNU General Public +// License. However the source code for this file must still be made available +// in accordance with section (3) of the GNU General Public License. +// +// This exception does not invalidate any other reasons why a work based on +// this file might be covered by the GNU General Public License. +// +// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +// at http://sources.redhat.com/ecos/ecos-license/ +// ------------------------------------------- +//####ECOSGPLCOPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): yoshinori sato +// Contributors: yoshinori sato +// Date: 2002-02-14 +// Purpose: HAL Support for Kernel Diagnostic Routines +// Description: Diagnostic routines for use during kernel development. +// Usage: #include <cyg/hal/hal_diag.h> +// +//####DESCRIPTIONEND#### +// +//===========================================================================*/ + +#include <pkgconf/hal.h> + +#include <cyg/infra/cyg_type.h> + +externC void hal_diag_init(void); +externC void hal_diag_write_char(cyg_uint8 c); +externC void hal_diag_read_char(cyg_uint8 *c); + +/*---------------------------------------------------------------------------*/ + +#define HAL_DIAG_INIT() hal_diag_init() + +#define HAL_DIAG_WRITE_CHAR(_c_) hal_diag_write_char(_c_) + +#define HAL_DIAG_READ_CHAR(_c_) hal_diag_read_char(&_c_) + +/*---------------------------------------------------------------------------*/ +/* end of hal_diag.h */ +#endif /* CYGONCE_HAL_HAL_DIAG_H */
new file mode 100644 --- /dev/null +++ b/packages/hal/h8300/sim_s/current/include/pkgconf/mlt_h8300_h8s_sim_ram.h @@ -0,0 +1,18 @@ +// eCos memory layout - Wed Nov 24 13:10:23 1999 + +// This is a generated file - changes will be lost if ConfigTool(MLT) is run + +#ifndef __ASSEMBLER__ +#include <cyg/infra/cyg_type.h> +#include <stddef.h> + +#endif + +#define CYGMEM_REGION_ram (0x200000) +#define CYGMEM_REGION_ram_SIZE (0x200000) +#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W) +#ifndef __ASSEMBLER__ +extern char CYG_LABEL_NAME (__heap1) []; +#endif +#define CYGMEM_SECTION_heap1 (CYG_LABEL_NAME (__heap1)) +#define CYGMEM_SECTION_heap1_SIZE (0x300000 - (size_t) CYG_LABEL_NAME (__heap1))
new file mode 100644 --- /dev/null +++ b/packages/hal/h8300/sim_s/current/include/pkgconf/mlt_h8300_h8s_sim_ram.ldi @@ -0,0 +1,30 @@ +// eCos memory layout - Fri Oct 20 08:25:16 2000 + +// This is a generated file - do not edit + +#include <cyg/infra/cyg_type.inc> + +OUTPUT_FORMAT("elf32-h8300") +OUTPUT_ARCH(h8300s) + +MEMORY +{ + ram : ORIGIN = 0x000000, LENGTH = 0x200000 +} + +SECTIONS +{ + SECTIONS_BEGIN + SECTION_rom_vectors (ram, 0x000000, LMA_EQ_VMA) + SECTION_text (ram, ALIGN (0x1), LMA_EQ_VMA) + SECTION_fini (ram, ALIGN (0x1), LMA_EQ_VMA) + SECTION_rodata (ram, ALIGN (0x1), LMA_EQ_VMA) + SECTION_rodata1 (ram, ALIGN (0x1), LMA_EQ_VMA) + SECTION_fixup (ram, ALIGN (0x1), LMA_EQ_VMA) + SECTION_gcc_except_table (ram, ALIGN (0x1), LMA_EQ_VMA) + SECTION_int_hook_table (ram, ALIGN (0x1), LMA_EQ_VMA) + SECTION_data (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_bss (ram, ALIGN (0x4), LMA_EQ_VMA) + CYG_LABEL_DEFN(__heap1) = ALIGN (0x8); + SECTIONS_END +}
new file mode 100644 --- /dev/null +++ b/packages/hal/h8300/sim_s/current/include/pkgconf/mlt_h8300_h8s_sim_ram.mlt @@ -0,0 +1,12 @@ +version 0 +region ram 200000 200000 0 ! +section rom_vectors 0 1 0 1 1 1 1 1 200000 200000 text text ! +section text 0 1 0 1 0 1 0 1 fini fini ! +section fini 0 1 0 1 0 1 0 1 rodata rodata ! +section rodata 0 1 0 1 0 1 0 1 rodata1 rodata1 ! +section rodata1 0 1 0 1 0 1 0 1 fixup fixup ! +section fixup 0 1 0 1 0 1 0 1 gcc_except_table gcc_except_table ! +section gcc_except_table 0 1 0 1 0 1 0 1 data data ! +section data 0 4 0 1 0 1 0 1 bss bss ! +section bss 0 4 0 1 0 1 0 1 heap1 heap1 ! +section heap1 0 8 0 0 0 0 0 0 !
new file mode 100644 --- /dev/null +++ b/packages/hal/h8300/sim_s/current/include/platform.inc @@ -0,0 +1,66 @@ +#ifndef CYGONCE_HAL_PLATFORM_INC +#define CYGONCE_HAL_PLATFORM_INC +##============================================================================= +## +## platform.inc +## +## H8S simulator assembler header file +## +##============================================================================= +#####ECOSGPLCOPYRIGHTBEGIN#### +## ------------------------------------------- +## This file is part of eCos, the Embedded Configurable Operating System. +## Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +## +## eCos is free software; you can redistribute it and/or modify it under +## the terms of the GNU General Public License as published by the Free +## Software Foundation; either version 2 or (at your option) any later version. +## +## eCos is distributed in the hope that it will be useful, but WITHOUT ANY +## WARRANTY; without even the implied warranty of MERCHANTABILITY or +## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +## for more details. +## +## You should have received a copy of the GNU General Public License along +## with eCos; if not, write to the Free Software Foundation, Inc., +## 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +## +## As a special exception, if other files instantiate templates or use macros +## or inline functions from this file, or you compile this file and link it +## with other works to produce a work based on this file, this file does not +## by itself cause the resulting work to be covered by the GNU General Public +## License. However the source code for this file must still be made available +## in accordance with section (3) of the GNU General Public License. +## +## This exception does not invalidate any other reasons why a work based on +## this file might be covered by the GNU General Public License. +## +## Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +## at http://sources.redhat.com/ecos/ecos-license/ +## ------------------------------------------- +#####ECOSGPLCOPYRIGHTEND#### +##============================================================================= +#######DESCRIPTIONBEGIN#### +## +## Author(s): yoshinori sato +## Contributors: yoshinori sato +## Date: 2003-02-23 +## Purpose: H8S simulator definitions. +## Description: This file contains various definitions and macros that are +## required for writing assembly code for the am31 simulator. +## Currently there are none +## Usage: +## #include <cyg/hal/platform.inc> +## ... +## +## +######DESCRIPTIONEND#### +## +##============================================================================= + +##----------------------------------------------------------------------------- + + +#------------------------------------------------------------------------------ +#endif // ifndef CYGONCE_HAL_PLATFORM_INC +# end of platform.inc
new file mode 100644 --- /dev/null +++ b/packages/hal/h8300/sim_s/current/include/plf_intr.h @@ -0,0 +1,76 @@ +#ifndef CYGONCE_HAL_PLF_INTR_H +#define CYGONCE_HAL_PLF_INTR_H + +//========================================================================== +// +// plf_intr.h +// +// EDOSK-2674R interrupt and clock support +// +//========================================================================== +//####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT ANY +// WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License along +// with eCos; if not, write to the Free Software Foundation, Inc., +// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +// +// As a special exception, if other files instantiate templates or use macros +// or inline functions from this file, or you compile this file and link it +// with other works to produce a work based on this file, this file does not +// by itself cause the resulting work to be covered by the GNU General Public +// License. However the source code for this file must still be made available +// in accordance with section (3) of the GNU General Public License. +// +// This exception does not invalidate any other reasons why a work based on +// this file might be covered by the GNU General Public License. +// +// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +// at http://sources.redhat.com/ecos/ecos-license/ +// ------------------------------------------- +//####ECOSGPLCOPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): yoshinori sato +// Contributors: yoshinori sato +// Date: 2003-02-23 +// Purpose: Define Interrupt support +// Description: The macros defined here provide the HAL APIs for handling +// interrupts and the clock for the simulator. This file +// is empty since none are required! +// +// Usage: +// #include <cyg/hal/plf_intr.h> +// ... +// +// +//####DESCRIPTIONEND#### +// +//========================================================================== + + +//-------------------------------------------------------------------------- + +externC void h8s_reset (void); +externC void hal_delay_us(int usecs); + +#define HAL_PLATFORM_RESET(x) +#define HAL_PLATFORM_RESET_ENTRY &h8s_reset + +#define HAL_DELAY_US(n) hal_delay_us(n) + +//-------------------------------------------------------------------------- +#endif // ifndef CYGONCE_HAL_PLF_INTR_H +// End of plf_intr.h
new file mode 100644 --- /dev/null +++ b/packages/hal/h8300/sim_s/current/include/plf_stub.h @@ -0,0 +1,86 @@ +#ifndef CYGONCE_HAL_PLF_STUB_H +#define CYGONCE_HAL_PLF_STUB_H + +//============================================================================= +// +// plf_stub.h +// +// Platform header for GDB stub support. +// +//============================================================================= +//####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT ANY +// WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License along +// with eCos; if not, write to the Free Software Foundation, Inc., +// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +// +// As a special exception, if other files instantiate templates or use macros +// or inline functions from this file, or you compile this file and link it +// with other works to produce a work based on this file, this file does not +// by itself cause the resulting work to be covered by the GNU General Public +// License. However the source code for this file must still be made available +// in accordance with section (3) of the GNU General Public License. +// +// This exception does not invalidate any other reasons why a work based on +// this file might be covered by the GNU General Public License. +// +// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +// at http://sources.redhat.com/ecos/ecos-license/ +// ------------------------------------------- +//####ECOSGPLCOPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jskov +// Contributors:jskov +// Date: 1999-05-18 +// Purpose: Platform HAL stub support for H8S simulator +// Usage: #include <cyg/hal/plf_stub.h> +// +//####DESCRIPTIONEND#### +// +//============================================================================= + +#include <pkgconf/system.h> +#include <pkgconf/hal.h> + +#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + +#include <cyg/infra/cyg_type.h> // CYG_UNUSED_PARAM, externC + +#include <cyg/hal/h8300_stub.h> // architecture stub support + +#include <cyg/hal/hal_diag.h> // hal_diag_led_on + +//---------------------------------------------------------------------------- +// Define some platform specific communication details. This is mostly +// handled by hal_if now, but we need to make sure the comms tables are +// properly initialized. + +externC void cyg_hal_plf_comms_init(void); + +#define HAL_STUB_PLATFORM_INIT_SERIAL() cyg_hal_plf_comms_init() + +#define HAL_STUB_PLATFORM_SET_BAUD_RATE(baud) CYG_UNUSED_PARAM(int, (baud)) +#define HAL_STUB_PLATFORM_INTERRUPTIBLE 0 + +//---------------------------------------------------------------------------- +// Stub initializer. +#define HAL_STUB_PLATFORM_INIT() CYG_EMPTY_STATEMENT + +#endif // ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS +//----------------------------------------------------------------------------- +#endif // CYGONCE_HAL_PLF_STUB_H +// End of plf_stub.h
new file mode 100644 --- /dev/null +++ b/packages/hal/h8300/sim_s/current/src/delay_us.S @@ -0,0 +1,26 @@ +;;delay_us + +#include <pkgconf/hal.h> + +#include <cyg/hal/arch.inc> +#include <cyg/hal/basetype.h> +#include <cyg/hal/mod_regs_tmr.h> + +#define DELAY_COUNT (CYGHWR_HAL_H8300_PROCESSOR_SPEED/1000000)/8*25 + +// .file "delay_us.S" + .h8300s + .text + + .global CYG_LABEL_DEFN(hal_delay_us) +CYG_LABEL_DEFN(hal_delay_us): + shlr.l er0 + shlr.l er0 + shlr.l er0 + mov.l er0,er0 +1: + ble 4f + dec.l #1,er0 + bra 1b +4: + rts
new file mode 100644 --- /dev/null +++ b/packages/hal/h8300/sim_s/current/src/hal_diag.c @@ -0,0 +1,95 @@ +/*============================================================================= +// +// hal_diag.c +// +// HAL diagnostic output code +// +//============================================================================= +//####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT ANY +// WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License along +// with eCos; if not, write to the Free Software Foundation, Inc., +// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +// +// As a special exception, if other files instantiate templates or use macros +// or inline functions from this file, or you compile this file and link it +// with other works to produce a work based on this file, this file does not +// by itself cause the resulting work to be covered by the GNU General Public +// License. However the source code for this file must still be made available +// in accordance with section (3) of the GNU General Public License. +// +// This exception does not invalidate any other reasons why a work based on +// this file might be covered by the GNU General Public License. +// +// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +// at http://sources.redhat.com/ecos/ecos-license/ +// ------------------------------------------- +//####ECOSGPLCOPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): ysato +// Contributors: ysato +// Date: 2003-02-23 +// Purpose: HAL diagnostic output +// Description: Implementations of HAL diagnostic output support. +// +//####DESCRIPTIONEND#### +// +//===========================================================================*/ + +#include <pkgconf/hal.h> + +#include <cyg/hal/hal_diag.h> +#include <cyg/hal/h8_sci.h> +#include <cyg/hal/var_intr.h> + +#define SCI_BASE ((cyg_uint8*)CYGHAL_PLF_SCI_BASE) + +const static channel_data_t channel = { (cyg_uint8*)SCI_BASE, 0, 0}; + +void +cyg_hal_plf_comms_init(void) +{ + static int initialized = 0; + + if (initialized) + return; + + initialized = 1; + + cyg_hal_plf_sci_init(0, 0, CYGNUM_HAL_INTERRUPT_RXI0, SCI_BASE); +} + +void hal_diag_init(void) +{ + cyg_hal_plf_sci_init_channel(&channel); +} + +void +hal_diag_write_char( cyg_uint8 c ) +{ + cyg_hal_plf_sci_putc(&channel, c); +} + +void +hal_diag_read_char(cyg_uint8 *c) +{ + *c = (char) cyg_hal_plf_sci_getc(&channel); +} + +/*===========================================================================*/ +/* EOF hal_diag.c */ +
new file mode 100644 --- /dev/null +++ b/packages/hal/h8300/sim_s/current/src/plf_misc.c @@ -0,0 +1,129 @@ +//========================================================================== +// +// plf_misc.c +// +// HAL platform miscellaneous functions +// +//========================================================================== +//####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT ANY +// WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License along +// with eCos; if not, write to the Free Software Foundation, Inc., +// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +// +// As a special exception, if other files instantiate templates or use macros +// or inline functions from this file, or you compile this file and link it +// with other works to produce a work based on this file, this file does not +// by itself cause the resulting work to be covered by the GNU General Public +// License. However the source code for this file must still be made available +// in accordance with section (3) of the GNU General Public License. +// +// This exception does not invalidate any other reasons why a work based on +// this file might be covered by the GNU General Public License. +// +// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +// at http://sources.redhat.com/ecos/ecos-license/ +// ------------------------------------------- +//####ECOSGPLCOPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): yoshinori sato +// Contributors: yoshinori sato +// Date: 2002-02-17 +// Purpose: HAL miscellaneous functions +// Description: This file contains miscellaneous functions provided by the +// HAL. +// +//####DESCRIPTIONEND#### +// +//========================================================================*/ + +#include <pkgconf/hal.h> + +#include <cyg/infra/cyg_type.h> // Base types + +#include <cyg/hal/hal_arch.h> // architectural definitions +#include <cyg/hal/hal_io.h> +#include <cyg/hal/hal_if.h> +#include <cyg/hal/plf_intr.h> +#include <cyg/hal/var_arch.h> + +/*------------------------------------------------------------------------*/ + +void hal_platform_init(void) +{ + hal_if_init(); +} + +void h8s_reset(void) +{ + __asm__ ("jmp @@0\n\t"); +} + +/*------------------------------------------------------------------------*/ +/* Control C ISR support */ + +#if defined(CYGDBG_HAL_DEBUG_GDB_CTRLC_SUPPORT) + +struct Hal_SavedRegisters *hal_saved_interrupt_state; + +#endif + +/*------------------------------------------------------------------------*/ +/* clock support */ + +void hal_clock_initialize(cyg_uint32 period) +{ + cyg_uint8 prescale; + cyg_uint8 tmp; +#if CYGNUM_HAL_H8300_RTC_PRESCALE == 8 + prescale = 0x01; +#else +#if CYGNUM_HAL_H8300_RTC_PRESCALE == 64 + prescale = 0x02; +#else +#if CYGNUM_HAL_H8300_RTC_PRESCALE == 8192 + prescale = 0x03; +#else +#error illigal RTC prescale setting +#endif +#endif +#endif + HAL_READ_UINT8(CYGARC_MSTPCRL, tmp); + tmp &= ~0x01; + HAL_WRITE_UINT8(CYGARC_MSTPCRL, tmp); + HAL_WRITE_UINT8(CYGARC_8TCORA1, period); + HAL_WRITE_UINT8(CYGARC_8TCNT1, 0x00); + HAL_WRITE_UINT8(CYGARC_8TCR1, 0x48 | prescale); + HAL_WRITE_UINT8(CYGARC_8TCSR1, 0x00); +} + +void hal_clock_reset(cyg_uint32 vector, cyg_uint32 period) +{ + HAL_WRITE_UINT8(CYGARC_8TCR1,0x00); + HAL_WRITE_UINT8(CYGARC_8TCSR1,0x00); + hal_clock_initialize(period); +} + +void hal_clock_read(cyg_uint32 *pvalue) +{ + CYG_BYTE val; + HAL_READ_UINT8(CYGARC_8TCNT1,val); + *pvalue = val; +} + +/*------------------------------------------------------------------------*/ +/* End of plf_misc.c */
--- a/packages/infra/current/ChangeLog +++ b/packages/infra/current/ChangeLog @@ -1,3 +1,8 @@ +2003-10-03 Nick Garnett <nickg@balti.calivar.com> + + * tests/cxxsupp.cxx: Added ifdef to disable this test on H8/300 + targets. The H8/300 toolchain does not currently have C++ support. + 2003-07-01 Michael Checky <Michael_Checky@ThermoKing.com> * src/diag.cxx: Added support for the 'z' qualifier in format strings.
--- a/packages/infra/current/tests/cxxsupp.cxx +++ b/packages/infra/current/tests/cxxsupp.cxx @@ -54,6 +54,9 @@ #include <cyg/infra/testcase.h> #include <cyg/infra/diag.h> +// The H8300 does not have C++ support in its toolchain +#ifndef CYGPKG_HAL_H8300 + #include <new> //========================================================================== @@ -171,5 +174,18 @@ void Pure::inline_fun1() diag_printf("%s(%d) called\n",__PRETTY_FUNCTION__,instance); } +#else + +__externC void +cyg_start( void ) +{ + + CYG_TEST_INIT(); + + CYG_TEST_NA("C++ not supported on this architecture\n"); +} + +#endif + //========================================================================== // EOF cxxsupp.cxx