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annotate packages/hal/arm/ebsa285/current/include/hal_platform_setup.h @ 76:435cced73e2f ecos-v1_3_1-release

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eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
author jlarmour
date Tue, 28 Mar 2000 14:10:45 +0000
parents
children 95f3e12a6327
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76
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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1 #ifndef CYGONCE_HAL_PLATFORM_SETUP_H
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2 #define CYGONCE_HAL_PLATFORM_SETUP_H
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3
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4 /*=============================================================================
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5 //
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6 // hal_platform_setup.h
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7 //
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8 // Platform specific support for HAL (assembly code)
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9 //
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10 //=============================================================================
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11 //####COPYRIGHTBEGIN####
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12 //
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13 // -------------------------------------------
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14 // The contents of this file are subject to the Red Hat eCos Public License
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15 // Version 1.1 (the "License"); you may not use this file except in
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16 // compliance with the License. You may obtain a copy of the License at
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17 // http://www.redhat.com/
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18 //
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19 // Software distributed under the License is distributed on an "AS IS"
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20 // basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the
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21 // License for the specific language governing rights and limitations under
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22 // the License.
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23 //
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24 // The Original Code is eCos - Embedded Configurable Operating System,
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25 // released September 30, 1998.
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26 //
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27 // The Initial Developer of the Original Code is Red Hat.
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28 // Portions created by Red Hat are
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29 // Copyright (C) 1998, 1999, 2000 Red Hat, Inc.
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30 // All Rights Reserved.
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31 // -------------------------------------------
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32 //
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33 //####COPYRIGHTEND####
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34 //=============================================================================
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35 //#####DESCRIPTIONBEGIN####
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36 //
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37 // Author(s): hmt
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38 // Contributors: hmt
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39 // Date: 1999-04-21
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40 // Purpose: Intel EBSA285 platform specific support routines
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41 // Description:
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42 // Usage: #include <cyg/hal/hal_platform_setup.h>
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43 //
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44 //####DESCRIPTIONEND####
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45 //
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46 //===========================================================================*/
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47
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48 #include <pkgconf/system.h> // System-wide configuration info
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49 #include CYGBLD_HAL_PLATFORM_H // Platform specific configuration
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50 #include <cyg/hal/hal_ebsa285.h> // Platform specific hardware definitions
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51 #include <cyg/hal/hal_mmu.h> // MMU definitions
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52
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53 // Note that we do NOT define CYGHWR_HAL_ARM_HAS_MMU so that at reset we
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54 // jump straight into the ROM; this makes it unnecessary to take any
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55 // special steps to switch from executing in the ROM alias at low
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56 // addresses. Make no difference for RAM start.
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57
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58
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59 // Define macro used to diddle the LEDs during early initialization.
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60 // Can use r0+r1. Argument in \x.
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61 #define CYGHWR_LED_MACRO \
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62 ldr r0,=0x42000148 /* SA110_XBUS_CYCLE_ARBITER */ ;\
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63 ldr r0,[r0] ;\
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64 tsts r0,#0x00800000 /* SA110_XBUS_CYCLE_ARBITER_ENABLED */ ;\
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65 bne 667f /* Don't touch if PCI arbiter enabled */;\
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66 ldr r0,=0x40012000 /* SA110_XBUS_XCS2 */ ;\
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67 mov r1,#7&(~(\x)) ;\
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68 str r1,[r0] ;\
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69 667:
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70
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71 // The main useful output of this file is PLATFORM_SETUP1: it invokes lots
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72 // of other stuff (may depend on RAM or ROM start). The other stuff is
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73 // divided into further macros to make it easier to manage what's enabled
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74 // when.
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75
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76 // Dependence on ROM/RAM start removed when meminit code fixed up.
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77 #define PLATFORM_SETUP1 \
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78 PLATFORM_FLUSH_DISABLE_CACHES \
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79 INIT_XBUS_ACCESS \
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80 ALLOW_CLOCK_SWITCHING \
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81 CALL_MEMINIT_CODE \
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82 BASIC_PCI_SETUP \
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83
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84
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85 // Discard and disable all caches: we are about to be writing vectors...
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86 #define PLATFORM_FLUSH_DISABLE_CACHES \
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87 /* flush and disable the caches */ \
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88 mrc p15,0,r1,c1,c0,0 ;\
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89 bic r1,r1,#0x1000 /* ICache off */ ;\
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90 bic r1,r1,#0x000D /* DCache off and MM off */ ;\
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91 mcr p15,0,r1,c1,c0,0 ;\
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92 mov r1, #0 ;\
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93 mcr p15,0,r1,c7,c6,0 /* DCache invalidate (discard) */ ;\
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94 mcr p15,0,r1,c7,c5,0 /* ICache invalidate */ ;\
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95 mcr p15,0,r1,c8,c6,0 /* DCache TLB invalidate */ ;\
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96 mcr p15,0,r1,c8,c5,0 /* ICache TLB invalidate */ ;\
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97 nop ;\
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98 nop /* be sure invalidate "takes" before doing owt else */ ;\
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99 nop ;
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100
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101
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102 // Allow clock switching: very early in the startup
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103 #define ALLOW_CLOCK_SWITCHING \
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104 mov r0, #0 ;\
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105 mcr p15,0,r0,c15,c1,2 ;\
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106
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107
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108 // Depending on jumper settings, either ignore or initialize the XBus.
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109 #define INIT_XBUS_ACCESS \
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110 ldr r1, =SA110_XBUS_CYCLE_ARBITER ;\
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111 ldr r0, [r1] ;\
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112 tsts r0, #SA110_XBUS_CYCLE_ARBITER_ENABLED ;\
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113 beq 777f ;\
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114 /* PCI arbiter enabled, so don't touch the XBus */ ;\
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115 ldr r0, =SA110_CONTROL ;\
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116 ldr r1, =0x04aa0000 ;\
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117 str r1, [r0] ;\
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118 b 778f ;\
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119 ;\
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120 /* set up XBus so we can read switch and write to LEDs */ ;\
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121 777: ldr r0, =SA110_CONTROL ;\
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122 ldr r1, =0x64aa0000 ;\
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123 str r1, [r0] ;\
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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124 ldr r0, =SA110_XBUS_CYCLE_ARBITER ;\
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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125 ldr r1, =0x100016db ;\
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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126 str r1, [r0] ;\
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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127 ldr r0, =SA110_XBUS_IO_STROBE_MASK ;\
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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128 ldr r1, =0xfcfcfcfc ;\
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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129 str r1, [r0] ;\
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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130 778: ;\
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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131
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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diff changeset
132 // Save lr and call mem init code
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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133 #define CALL_MEMINIT_CODE \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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134 mov r10, lr /* preserve lr */ ;\
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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135 bl __mem285_init ;\
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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136 mov r1, #0x40 /* [see hal_intr.h] */ ;\
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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137 str r0, [ r1 ] /* store the top of memory address */ ;\
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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138 mov lr, r10 /* in hal_dram_size for future use */ ;\
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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139
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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140
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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141 #define BASIC_PCI_SETUP \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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142 /**************************************************************** \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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143 * Basic PCI setup. \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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144 ****************************************************************/\
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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145 ldr r0, =SA110_CONTROL_STATUS_BASE ;\
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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146 ;\
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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147 /* Disable PCI Outbound interrupts */ ;\
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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148 mov r1, #12 ;\
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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149 str r1, [r0, #SA110_OUT_INT_MASK_o] ;\
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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150 ;\
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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diff changeset
151 /* Disable Doorbells */ ;\
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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diff changeset
152 mov r1, #0 ;\
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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153 str r1, [r0, #SA110_DOORBELL_PCI_MASK_o] ;\
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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154 str r1, [r0, #SA110_DOORBELL_SA_MASK_o] ;\
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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155 ;\
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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156 /* Map high PCI address bits to 0 */ ;\
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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157 str r1, [r0, #SA110_PCI_ADDR_EXT_o] ;\
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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158 ;\
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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diff changeset
159 /* Interrupt ID to 1 */ ;\
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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160 mov r1, #0x100 ;\
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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161 str r1, [r0, #SA110_PCI_CFG_INT_LINE_o] ;\
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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162 ;\
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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163 /* Remove PCI_reset */ ;\
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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164 ldr r1, [r0, #SA110_CONTROL_o] ;\
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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165 orr r1, r1, #0x200 ;\
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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166 str r1, [r0, #SA110_CONTROL_o] ;\
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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diff changeset
167 ;\
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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diff changeset
168 /* Open a 2MB window */ ;\
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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169 mov r1, #0x1c0000 ;\
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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170 str r1,[r0, #SA110_SDRAM_BASE_ADDRESS_MASK_o] ;\
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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171 mov r1, #0xe00000 ;\
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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172 str r1,[r0, #SA110_SDRAM_BASE_ADDRESS_OFFSET_o] ;\
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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173 ;\
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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diff changeset
174 /* Only init PCI if central function is set and */ ;\
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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diff changeset
175 /* standalone bit is cleared */ ;\
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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diff changeset
176 ldr r1, [r0, #SA110_CONTROL_o] ;\
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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177 tst r1, #SA110_CONTROL_CFN ;\
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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178 beq 1f ;\
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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diff changeset
179 ;\
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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180 ldr r1, =0x40012000 ;\
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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181 ldr r1, [r1] ;\
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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182 tst r1, #0x40 ;\
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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diff changeset
183 bne 1f ;\
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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diff changeset
184 ;\
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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diff changeset
185 /* Don't respond to any commands */ ;\
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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diff changeset
186 mov r1, #0 ;\
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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187 str r1, [r0, #SA110_PCI_CFG_COMMAND_o] ;\
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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188 ;\
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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189 str r1, [r0, #SA110_PCI_CFG_SDRAM_BAR_o] ;\
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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190 mov r1, #0x40000000 ;\
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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diff changeset
191 str r1, [r0, #SA110_PCI_CFG_CSR_MEM_BAR_o] ;\
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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diff changeset
192 mov r1, #0xf000 ;\
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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diff changeset
193 str r1, [r0, #SA110_PCI_CFG_CSR_IO_BAR_o] ;\
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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diff changeset
194 ;\
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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diff changeset
195 /* respond to I/O space & Memory transactions. */ ;\
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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196 mov r1, #0x17 ;\
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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197 str r1, [r0, #SA110_PCI_CFG_COMMAND_o] ;\
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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198 1: ;\
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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diff changeset
199 /* Signal PCI_init_complete */ ;\
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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diff changeset
200 ldr r1, [r0, #SA110_CONTROL_o] ;\
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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diff changeset
201 orr r1, r1, #SA110_CONTROL_INIT_COMPLETE ;\
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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diff changeset
202 str r1, [r0, #SA110_CONTROL_o] ;\
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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diff changeset
203
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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diff changeset
204
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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205 /*---------------------------------------------------------------------------*/
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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diff changeset
206 /* end of hal_platform_setup.h */
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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207 #endif /* CYGONCE_HAL_PLATFORM_SETUP_H */