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annotate packages/hal/mips/vrc4373/current/src/platform.S @ 76:435cced73e2f ecos-v1_3_1-release

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eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
author jlarmour
date Tue, 28 Mar 2000 14:10:45 +0000
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children 77cec8369160
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76
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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1 ##=============================================================================
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2 ##
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3 ## platform.S
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4 ##
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5 ## MIPS VRC4372 platform code
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6 ##
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7 ##=============================================================================
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8 #####COPYRIGHTBEGIN####
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9 #
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10 # -------------------------------------------
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11 # The contents of this file are subject to the Red Hat eCos Public License
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12 # Version 1.1 (the "License"); you may not use this file except in
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13 # compliance with the License. You may obtain a copy of the License at
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14 # http://www.redhat.com/
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15 #
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16 # Software distributed under the License is distributed on an "AS IS"
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17 # basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the
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18 # License for the specific language governing rights and limitations under
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19 # the License.
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20 #
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21 # The Original Code is eCos - Embedded Configurable Operating System,
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22 # released September 30, 1998.
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23 #
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24 # The Initial Developer of the Original Code is Red Hat.
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25 # Portions created by Red Hat are
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26 # Copyright (C) 1998, 1999, 2000 Red Hat, Inc.
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27 # All Rights Reserved.
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28 # -------------------------------------------
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29 #
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30 #####COPYRIGHTEND####
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31 ##=============================================================================
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32 #######DESCRIPTIONBEGIN####
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33 ##
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34 ## Author(s): nickg
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35 ## Contributors: nickg
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36 ## Date: 1999-04-20
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37 ## Purpose: MIPS vrc4372 platform code
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38 ## Description: Platform specific code for VRC4372 board.
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39 ##
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40 ##
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41 ##
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42 ##
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43 ######DESCRIPTIONEND####
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44 ##
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45 ##=============================================================================
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46
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47 #include <pkgconf/system.h>
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48 #include <pkgconf/hal.h>
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49
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50 #ifdef CYGPKG_KERNEL
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51 # include <pkgconf/kernel.h>
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52 #endif
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53
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54 #include <cyg/hal/arch.inc>
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55
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56 ##-----------------------------------------------------------------------------
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57 ## ISR springboard.
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58 ## This routine decodes the interrupt from the VRC4372 interrupt controller
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59 ## and vectors to it.
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60
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61 # On entry:
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62 # a0 = MIPS status register interrupt number (1,2 or 3)
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63 # a1 = ISR data value (= interrupt status reg address)
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64 # a2 = saved reg dump ptr
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65 # s0 = saved reg dump ptr
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66 # s1 = vector table offset
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67 # s2 = interrupt number
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68 # a3,v0,v1 etc available for use
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69
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70 .text
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71
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72 hal_isr_springboard:
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73
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74 lw v0,0(a1) # v0 = stat reg value
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75
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76 # The following code implements an ls bit index algorithm similar
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77 # to that in hal_lsbit_index() in hal_misc.c.
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78 negu v1,v0 # v1 = -v0
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79 and v1,v1,v0 # v1 &= v0 [isolate ls bit]
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80 sll v0,v1,16 # v0 = v1<<16
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81 subu v1,v0,v1 # v1 = v0 - v1
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82 sll a0,v1,6 # a0 = v1<<6
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83 addu v1,v1,a0 # v1 += a0
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84 sll a1,v1,4 # a1 = v1<<4
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85 addu v1,v1,a1 # v1 += a1
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86 la v0,hal_isr_springboard_table # v0 = table address
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87 srl v1,v1,26 # v1 = v1>>26
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88 addu v1,v1,v0 # v1 = table entry address
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89 lb a0,0(v1) # a0 = intc isr number
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90
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91 addi s2,a0,6 # s2 = eCos isr number
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92 sll s1,s2,2 # s1 = isr table index
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93
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94 la v1,hal_interrupt_handlers
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95 add v1,v1,s1 # v1 = isr handler address
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96 lw v1,0(v1) # v1 = isr handler
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97
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98 la a1,hal_interrupt_data
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99 add a1,a1,s1 # a1 = address of data ptr
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100 lw a1,0(a1) # a1 = data pointer
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101
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102 move a0,s2 # pass interrupt number
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103
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104 jr v1 # jump to handler, return is to
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105 # default vsr already in ra
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106 nop
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107
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108 hal_isr_springboard_table:
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109 .byte -1, 0, 1, 12, 2, 6, 0, 13
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110 .byte 3, 0, 7, 0, 0, 0, 0, 14
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111 .byte 10, 4, 0, 0, 8, 0, 0, 25
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112 .byte 0, 0, 0, 0, 0, 21, 27, 15
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113 .byte 31, 11, 5, 0, 0, 0, 0, 0
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114 .byte 9, 0, 0, 24, 0, 0, 20, 26
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115 .byte 30, 0, 0, 0, 0, 23, 0, 19
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116 .byte 29, 0, 22, 18, 28, 17, 16, 0
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117
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118 ##-----------------------------------------------------------------------------
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119 ## Data Load/Store Bus error VSR
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120 ##
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121 ## If the VRC4373 tries to access a PCI config space register that does
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122 ## not have a real device behind it, it provokes a bus error.
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123 ## This is a special bus error VSR that detects when we get a bus error
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124 ## from a PCI configuration space access and fixes it up to allow the
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125 ## program to continue.
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126 ## This VSR works in conjunction with hal_pci_config_read().
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127 ## Essentially, if we get a bus error it checks the EPC value and if it
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128 ## is at the instruction that accesses the PCI bus, in hal_pci_config_read(),
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129 ## it skips it and fixes the registers to allow the program to continue.
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130 ## None of this would be necessary if the VRC4373 behaved sensibly and
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131 ## returned 0xFFFFFFFF for reads from empty device slots like it should.
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132
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133 .text
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134
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135 .globl hal_bus_error_vsr
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136 hal_bus_error_vsr:
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137 # We come here with everything still in registers and:
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138 # K0 = vector number (==7*4)
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139 # K1 = address of this routine
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140
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141 # Check for special address
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142
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143 la k1,hal_pci_config_read_load
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144 mfc0 k0,epc
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145 bne k0,k1,1f
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146 nop
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147
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148 # We have a match, skip the offending instruction
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149 # and put 0xFFFFFFFF into V0.
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150 # First we must clear the EXL bit so that we can
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151 # write to EPC.
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152 mfc0 k1,status # Get status reg
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153 la v0,0xFFFFFFFD # mask for EXL
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154 and k1,v0,k1 # clear EXL
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155 mtc0 k1,status # return to CP0
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156 nop # let it work
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157 nop
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158 nop
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159 addi k0,k0,4 # skip offending instruction
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160 mtc0 k0,epc # return to EPC
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161 nop # let it work
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162 nop
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163 nop
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164 la v0,0xFFFFFFFF # Put 0xFFFFFFFF into v0
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165 sync # let everything settle
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166 eret # and return
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167 nop
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168
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169 # If this is not the special location, we need to continue
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170 # with the usual bus error handling. Since we no longer have
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171 # the original VSR table entry, we use the one just before it
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172 # (for instruction fetch bus error). At present this points
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173 # to the same error handler.
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174 1:
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175 la k1,hal_vsr_table # Get VSR table
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176 lw k1,24(k1) # Pick another vector to follow
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177 la k0,28 # but pretend we are still Bus Error
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178 jr k1 # go there
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179 nop
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180
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181
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182 ##-----------------------------------------------------------------------------
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183 ## PCI config space access function
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184 ##
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185 ## This is the only function that should be used to read data from the PCI
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186 ## configuration space data register. It works with the bus error VSR
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187 ## above to work around any bus errors provoked by the VRC4373.
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188
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189 FUNC_START(hal_pci_config_read)
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190
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191 hal_pci_config_read_load:
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192 lw v0,0(a0) # Read the value. If this bus-errors the
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193 # handler will skip this instruction and
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194 # put 0xFFFFFFFF into v0.
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195 jr ra # And return
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196 nop
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197
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198 FUNC_END(hal_pci_config_read)
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199
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200
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201 ##-----------------------------------------------------------------------------
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202 ## Breakpoint springboard
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203
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204 ## The following value has been determined by looking at the code that
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205 ## PMON puts in the interrupt vector. Clearly it will be different for
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206 ## different versions of PMON. A better approach might be to copy the original
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207 ## code out and execute that here. However, there is no guarantee that it is
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208 ## position independent.
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209
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210 #define CYGHWR_MIPS_PMON_EXEPTION_ENTRY 0xa0000dd4
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211
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212 .text
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213
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214 .globl hal_breakpoint_springboard
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215 hal_breakpoint_springboard:
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216
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217 # We enter here with all of the CPU state still
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218 # in its registers except:
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219 # K0 = vector index
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220 # K1 = address of this function
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221
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222 la k0,CYGHWR_MIPS_PMON_EXEPTION_ENTRY
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223 jr k0
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224 nop
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225
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226 ##-----------------------------------------------------------------------------
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227 ## ISR tables.
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228
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229 .extern hal_default_isr
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230
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231 .data
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232
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233 .globl hal_interrupt_handlers
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234 hal_interrupt_handlers:
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235 .long hal_default_isr
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236 .long hal_isr_springboard
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237 .long hal_isr_springboard
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238 .long hal_isr_springboard
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239 .long hal_default_isr
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240 .long hal_default_isr
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241
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242 .rept 32
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243 .long hal_default_isr
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244 .endr
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245
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246 .globl hal_interrupt_data
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247 hal_interrupt_data:
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248
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249 .long 0
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250 .long CYGHWR_HAL_MIPS_VRC4373_INTC_STAT0
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251 .long CYGHWR_HAL_MIPS_VRC4373_INTC_STAT1
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252 .long CYGHWR_HAL_MIPS_VRC4373_INTC_STAT2
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253 .long 0
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254 .long 0
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255
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256 .rept 32
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257 .long 0
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258 .endr
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259
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260 .globl hal_interrupt_objects
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261 hal_interrupt_objects:
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262 .rept 38
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263 .long 0
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264 .endr
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265
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266 .globl cyg_hal_interrupt_level
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267 cyg_hal_interrupt_level:
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268 .rept 38
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269 .byte 0
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270 .endr
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271
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272 ##-----------------------------------------------------------------------------
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273 ## MMU setup.
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274 ## Much of this code is taken from the PMON sources, hence it does not fully
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275 ## conform to our normal coding conventions.
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276
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277 #if defined(CYG_HAL_STARTUP_ROM) || defined(CYG_HAL_STARTUP_ROMRAM)
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278
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279 ## DEFINITIONS FOR THE TLB SUPPORT
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280
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281 #define IO_PHYSICAL_BASE 0x80000000
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282 #define IO_VIRTUAL_BASE 0xc0000000
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283 #define NTLBENTRIES 32
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284 #define K0BASE 0x80000000
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285 #define TLBLO_G 0x00000001
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286 #define TLBLO_V 0x00000002
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287 #define TLBLO_D 0x00000004
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288 #define TLBPGMASK_MASK 0x01ffe000
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289 #define TLBINX_INXMASK 0x0000003f
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290 #define CFG_C_UNCACHED 2
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291 #define TLBLO_CSHIFT 3
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292 #define TLBLO_PFNSHIFT 6
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293 #define TLBLO_PFNMASK 0x3fffffc0
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294 #define TLBHI_VPN2MASK 0xffffe000
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295 #define TLBHI_VPN2SHIFT 13
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296 #define TLBHI_VPNMASK 0xfffff000
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297 #define TLBHI_VPNSHIFT 12
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298
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299
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300 #define TLBLO_UNCACHED (CFG_C_UNCACHED<<TLBLO_CSHIFT)
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301 #define PAGE_SIZE 0x01000000
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302 #define PADDR_INC 0x02000000
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303 #define NUMB_PG 8
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304
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305 .text
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306
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307 .set noreorder
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308
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309 .extern hal_mmu_setup_return
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310
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311 FUNC_START(hal_mmu_setup)
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312
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313 mtc0 zero,tlbhi
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314 nop
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315 li a0,0
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316 2:
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317 bal resettlb
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318 nop
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319 addi a0,a0,1
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320 bne a0,NTLBENTRIES,2b
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321 nop
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322
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323
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324 #define tlblo_even s0
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325 #define tlblo_odd s1
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326 #define vaddr s2
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327 #define paddr0 s3
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328 #define paddr1 s4
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329 #define pmask s5
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330 #define tmp s6
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331 #define ix k1
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332
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333
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334 li ix,0
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335 li vaddr,IO_VIRTUAL_BASE
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336 li paddr0,IO_PHYSICAL_BASE
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337 loop:
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338
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339 li a0,((PAGE_SIZE - 1) << 1)
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340 li a1,TLBPGMASK_MASK
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341 and pmask, a0,a1
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342
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343 li tlblo_even, TLBLO_V | TLBLO_D | TLBLO_G
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344 li tlblo_odd, TLBLO_V | TLBLO_D | TLBLO_G
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345
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346 li tmp,PAGE_SIZE
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347 add paddr1,paddr0,tmp
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348 li tmp,TLBHI_VPN2MASK
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349 and a1,vaddr,tmp
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350
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351 li tmp,TLBLO_PFNSHIFT
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352 srl a2,paddr0,tmp
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353 li tmp,TLBLO_PFNMASK
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354 and a2,a2,tmp
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355 or a2,a2,TLBLO_UNCACHED
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356 or a2,a2,tlblo_even
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357
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358 li tmp,TLBLO_PFNSHIFT
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359 srl a3,paddr1,tmp
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360 li tmp,TLBLO_PFNMASK
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361 and a3,a3,tmp
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362 or a3,a3,TLBLO_UNCACHED
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363 or a3,a3,tlblo_odd
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diff changeset
364
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365
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366 move a0,pmask
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367 or a0,a0,ix
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368
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369 bal map_tlb4000
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370 nop
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371
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372 addi ix,ix,1
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373
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374 li tmp,PADDR_INC
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375 add vaddr,vaddr,tmp
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376 add paddr0,paddr0,tmp
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377
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378 li tmp,NUMB_PG
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379 bne ix,tmp,loop
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380 nop
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381
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382 # Go back via a jump, not a return
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383 lar k0,hal_mmu_setup_return
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384 jr k0
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385 nop
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386
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387 FUNC_END(hal_mmu_setup)
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388
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diff changeset
389
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
390 ## Invalidate the TLB entry specified by index
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
391 ##
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
392 ## resettlb(index)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
393 ## a0 = index
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
394 ##
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
395 ## Uses : t0, t2, v0, a0
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
396
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
397 FUNC_START(resettlb)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
398
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
399 li t2,K0BASE & TLBHI_VPN2MASK
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
400 mfc0 t0,tlbhi # save current TLBHI
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
401 mfc0 v0,status # save SR and disable interrupts
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
402 mtc0 zero,status # clear interrupts
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
403 mtc0 t2,tlbhi # invalidate entry
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
404 mtc0 zero,tlblo0
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
405 mtc0 zero,tlblo1
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
406 mtc0 a0,index
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
407 nop; nop; nop; nop; nop; nop; nop; nop
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
408 tlbwi
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
409 nop; nop; nop; nop; nop; nop; nop; nop
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
410 mtc0 t0,tlbhi
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
411 mtc0 v0,status
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
412 j ra
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
413 nop
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
414
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
415 FUNC_END(resettlb)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
416
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
417 ## Setup R4000 TLB entry
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
418 ##
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
419 ## map_tlb4000(mask_index, tlbhi, pte_even, pte_odd)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
420 ## a0 = TLB entry index and page mask
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
421 ## a1 = virtual page number and PID
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
422 ## a2 = pte -- contents of even pte
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
423 ## a3 = pte -- contents of odd pte
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
424 ##
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
425 ##
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
426 ##
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
427 ## Uses : t0, t1, t2, v0, a0, a1, a2, a3
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
428
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
429 FUNC_START(map_tlb4000)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
430 and t2,a0,TLBPGMASK_MASK
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
431 and a0,TLBINX_INXMASK
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
432 mfc0 t1,tlbhi # save current TLBPID
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
433 mfc0 v0,status # save SR and disable interrupts
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
434 mtc0 zero,status # clear interrupts
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
435 mtc0 t2,pagemask # set
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
436 mtc0 a1,tlbhi # set VPN and TLBPID
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
437 mtc0 a2,tlblo0 # set PPN and access bits
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
438 mtc0 a3,tlblo1 # set PPN and access bits
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
439 mtc0 a0,index # set INDEX to wired entry
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
440 nop; nop; nop; nop; nop; nop; nop; nop
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
441 tlbwi # drop it in
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
442 nop; nop; nop; nop; nop; nop; nop; nop
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
443 mtc0 t1,tlbhi # restore TLBPID
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
444 mtc0 v0,status # restore SR
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
445 j ra
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
446 nop
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
447 FUNC_END(map_tlb4000)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
448
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
449 #endif
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
450
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
451 ##-----------------------------------------------------------------------------
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
452 ## MEMC initialization.
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
453 ## This also initializes the PCI bus and ISA bus bridge, so at the end of this
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
454 ## we should have full access to all the memory and devices we need.
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
455 ## This code is table driven, which is somewhat more compact that coding it all.
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
456 ## Table entries consist of an address and a value to store in that address.
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
457 ## A zero address terminates the table. Two special address values modify the
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
458 ## behaviour:
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
459 ## DELAY_LOOP loops for the number of iterations in the value field.
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
460 ## WRITE16 treats the next 2 words as an address and value to be written
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
461 ## with a 16 bit write cycle.
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
462
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
463 #if defined(CYG_HAL_STARTUP_ROM) || defined(CYG_HAL_STARTUP_ROMRAM)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
464
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
465 #define DELAY_LOOP 1
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
466 #define WRITE16 2
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
467
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
468
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
469 FUNC_START(hal_memc_setup)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
470
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
471 lar t0,hal_memc_setup_table
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
472 la t1,0xbfc00000
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
473 la t2,DELAY_LOOP
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
474 la t3,WRITE16
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
475 1:
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
476 lw a0,0(t0) # next table entry
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
477 lw a1,4(t0) # value to write
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
478 addiu t0,8 # go to next entry
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
479 beq a0,t2,2f # Check for delay
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
480 nop
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
481 beq a0,t3,3f # Check for 16 bit write
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
482 nop
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
483 beqz a0,9f # zero terminates loop
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
484 nop
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
485 sw a1,0(a0) # write it
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
486 lw zero,0(t1) # uncached read to flush write buffer
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
487 b 1b
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
488 nop
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
489 2:
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
490 lw zero,0(t1) # uncached read to flush write buffer
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
491 bnez a1,2b # count down by value in a1
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
492 addiu a1,-1 # decrement in delay slot
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
493 b 1b # go back to loop
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
494 nop
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
495 3:
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
496 lw a3,0(t0) # get next word
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
497 addiu t0,4 # skip it
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
498 sh a3,0(a1) # store halfword
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
499 lw zero,0(t1) # uncached read to flush write buffer
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
500 b 1b
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
501 nop
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
502 9:
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
503 jr ra
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
504 nop
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
505
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
506 FUNC_END(hal_memc_setup)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
507
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
508 ##-----------------------------------------------------------------------------
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
509 ## Definitions for the VRC4373, also known as the Nile I,
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
510 ## and maybe the Nile III as well.
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
511
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
512 #define N1_BASE 0xAF000000
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
513 #define N2_BASE 0xBC000000
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
514
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
515 #define BMCTRL (N1_BASE + 0x00)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
516 #define S1CTRL (N1_BASE + 0x04)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
517 #define S2CTRL (N1_BASE + 0x08)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
518 #define S3CTRL (N1_BASE + 0x0C)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
519 #define S4CTRL (N1_BASE + 0x10)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
520 #define PCIMSTRADDR1 (N1_BASE + 0x14)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
521 #define PCIMSTRADDR2 (N1_BASE + 0x18)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
522 #define PCISLAVADDR1 (N1_BASE + 0x1C)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
523 #define PCISLAVADDR2 (N1_BASE + 0x20)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
524 #define PCIMSTRIO (N1_BASE + 0x24)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
525 #define PCICNFGDATA (N1_BASE + 0x28)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
526 #define PCICNFGADDR (N1_BASE + 0x2C)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
527 #define PCIMBOX1 (N1_BASE + 0x30)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
528 #define PCIMBOX2 (N1_BASE + 0x34)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
529 #define DMACTRL1 (N1_BASE + 0x38)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
530 #define DMALCLADDR1 (N1_BASE + 0x3C)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
531 #define DMAPCIADDR1 (N1_BASE + 0x40)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
532 #define DMACTRL2 (N1_BASE + 0x44)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
533 #define DMALCLADDR2 (N1_BASE + 0x48)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
534 #define DMAPCIADDR2 (N1_BASE + 0x4C)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
535 #define BUSERRSTAT (N1_BASE + 0x50)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
536 #define INTCNTRL (N1_BASE + 0x54)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
537 #define REFRESHRATE (N1_BASE + 0x58)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
538 #define BOOTROMWPRTCT (N1_BASE + 0x5C)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
539 #define PCI_EXCL_ACC (N1_BASE + 0x60)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
540 #define PCI_ENABLE_REG (N1_BASE + 0x74)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
541 #define N3_POM_INIT (N1_BASE + 0x78)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
542 /*
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
543 #define N1RESERVED1 (N1_BASE + 0x60)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
544 */
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
545 #define N1PCIHEADER (N1_BASE + 0x100)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
546 #define N1PCICMD (N1PCIHEADER + 0x04)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
547 #define MBOXPCIADDR (N1PCIHEADER + 0x10)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
548
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
549 #define N1CLSIZE (N1PCIHEADER + 0x0c) /* Cache Line Size */
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
550 #define N1MLTIM (N1PCIHEADER + 0x0d)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
551 #define N1MBADD (N1PCIHEADER + 0x10)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
552 #define N1RSVD2 (N1PCIHEADER + 0x40) /* Word boundary */
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
553 #define N1RTYTIM (N1PCIHEADER + 0x41)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
554
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
555 ##-----------------------------------------------------------------------------
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
556 ## Definitions for the VRC4372, also known as the Nile II.
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
557
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
558 #define PCI_N2_DEV 0x00010000 /* PCI Device # - Nile 2 */
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
559
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
560 #define N2CLSIZE ( 0x0c) /* Cache Line Size */
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
561 #define N2IOADD ( 0x14)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
562 #define N2DSCTIM ( 0x40)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
563
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
564 #define IOCON (N2_BASE + 0x0000)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
565
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
566 /* GPIO Bus Controller Registers */
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
567 #define GPDIR (IOCON + 0x0100)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
568 #define GPOUT (IOCON + 0x0104)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
569 #define GPIN (IOCON + 0x0108)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
570
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
571 /* Interrupt Controller Registers */
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
572 #define INTPOL (IOCON + 0x200)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
573 #define INTTRIG (IOCON + 0x204)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
574 #define INTPINS (IOCON + 0x208)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
575 #define INTMASK0 (IOCON + 0x20C)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
576 #define INTSTAT0 (IOCON + 0x210)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
577 #define INTMASK1 (IOCON + 0x214)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
578 #define INTSTAT1 (IOCON + 0x218)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
579 #define INTMASK2 (IOCON + 0x21C)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
580 #define INTSTAT2 (IOCON + 0x220)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
581
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
582 /* IO Bus Controller Registers */
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
583 #if defined(CYGPKG_HAL_MIPS_MSBFIRST)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
584 // The 16 bit registers are swapped pairwise in each word.
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
585 #define IOPROF_00 (IOCON + 0x0402)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
586 #define IOPROF_01 (IOCON + 0x0400)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
587 #define IOPROF_02 (IOCON + 0x0406)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
588 #define IOPROF_03 (IOCON + 0x0404)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
589 #define IOPROF_04 (IOCON + 0x040A)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
590 #define IOPROF_05 (IOCON + 0x0408)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
591 #define IOPROF_06 (IOCON + 0x040E)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
592 #define IOPROF_07 (IOCON + 0x040C)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
593 #define IOPROF_08 (IOCON + 0x0412)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
594 #define IOPROF_09 (IOCON + 0x0410)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
595 #define IOPROF_0A (IOCON + 0x0416)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
596 #define IOPROF_0B (IOCON + 0x0414)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
597 #define IOPROF_0C (IOCON + 0x041a)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
598 #define IOPROF_10 (IOCON + 0x0422)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
599 #define IOPROF_11 (IOCON + 0x0420)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
600 #define IOPROF_12 (IOCON + 0x0426)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
601 #define IOPROF_13 (IOCON + 0x0424)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
602 #elif defined(CYGPKG_HAL_MIPS_LSBFIRST)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
603 #define IOPROF_00 (IOCON + 0x0400)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
604 #define IOPROF_01 (IOCON + 0x0402)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
605 #define IOPROF_02 (IOCON + 0x0404)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
606 #define IOPROF_03 (IOCON + 0x0406)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
607 #define IOPROF_04 (IOCON + 0x0408)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
608 #define IOPROF_05 (IOCON + 0x040A)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
609 #define IOPROF_06 (IOCON + 0x040C)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
610 #define IOPROF_07 (IOCON + 0x040E)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
611 #define IOPROF_08 (IOCON + 0x0410)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
612 #define IOPROF_09 (IOCON + 0x0412)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
613 #define IOPROF_0A (IOCON + 0x0414)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
614 #define IOPROF_0B (IOCON + 0x0416)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
615 #define IOPROF_0C (IOCON + 0x0418)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
616 #define IOPROF_10 (IOCON + 0x0420)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
617 #define IOPROF_11 (IOCON + 0x0422)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
618 #define IOPROF_12 (IOCON + 0x0424)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
619 #define IOPROF_13 (IOCON + 0x0426)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
620 #else
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
621 #error MIPS endianness not define by configuration
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
622 #endif
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
623 #define IOTOUT (IOCON + 0x0430)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
624 #define IOPOL (IOCON + 0x0434)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
625
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
626 ##-----------------------------------------------------------------------------
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
627 ## PCI definitions
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
628
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
629 #define PCI_IOSPACE_BASE 0x0c /* PCI I/O Space Adr */
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
630
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
631 #define PCIADR_REGNO 0x000000fc /* Register # mask */
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
632
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
633 #define PCI_CONFIG( dev, func, reg ) ( dev | ( reg & PCIADR_REGNO) )
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
634
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
635 #define PCI_COMMAND_STATUS_REG 0x04
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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diff changeset
636 #define PCI_MAP_REG_START 0x10
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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parents:
diff changeset
637 #define PCI_INTERRUPT_REG 0x3c
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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diff changeset
638
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
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diff changeset
639 ##-----------------------------------------------------------------------------
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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diff changeset
640 ## The initialization table
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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diff changeset
641
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
642 hal_memc_setup_table:
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
643
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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diff changeset
644 .long DELAY_LOOP, 0x00010000 # Wait for HW to settle
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
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diff changeset
645
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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parents:
diff changeset
646 # Set up SDRAM and SIMM1
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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diff changeset
647 .long BMCTRL, 0x0000803b # Base memory setup
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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parents:
diff changeset
648 .long S1CTRL, 0x0402013f # SIMM1
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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parents:
diff changeset
649
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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parents:
diff changeset
650 # Set up power-on memory state
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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parents:
diff changeset
651 .long N3_POM_INIT, 0x00000002 # Power-on memory init
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
652 .long DELAY_LOOP, 0x00000100 # wait a bit
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
653 .long N3_POM_INIT, 0x00000004 # Power-on memory init
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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parents:
diff changeset
654 .long DELAY_LOOP, 0x00000100 # wait a bit
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
655 .long N3_POM_INIT, 0x00000001 # Power-on memory init
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
656 .long DELAY_LOOP, 0x00000100 # wait a bit
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
657 .long REFRESHRATE, 0x00000300 # DRAM refresh rate
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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parents:
diff changeset
658
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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parents:
diff changeset
659 .long BOOTROMWPRTCT, 0xffffff3e # Write protect boot ROM
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
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diff changeset
660
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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diff changeset
661 # Set up PCI master address window
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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diff changeset
662 .long PCIMSTRADDR1, 0x1c0fd01c
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
663 .long PCIMSTRADDR2, 0x80081080
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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diff changeset
664
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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diff changeset
665 # Set up PCI slave address window
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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parents:
diff changeset
666 .long PCISLAVADDR1, 0x00081000
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
667 .long PCISLAVADDR2, 0x10081080
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
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diff changeset
668
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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parents:
diff changeset
669 # Map PCI IO space Phys == Local
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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diff changeset
670 .long PCIMSTRIO, (0x000fd000 | ( PCI_IOSPACE_BASE << 24) | PCI_IOSPACE_BASE)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
671
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
672 # VRC4373 Bridge config space
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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diff changeset
673
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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parents:
diff changeset
674 .long N1PCICMD, 0x00000006 # Memory space enable, bus master
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
675 .long N1CLSIZE, 0x00003000 # Master latency time
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
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diff changeset
676 .long N1MBADD, 0x20000000 # Mailbox base address
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
677 .long N1RSVD2, 0x0000f000 # Retry value
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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diff changeset
678
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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diff changeset
679 .long PCI_EXCL_ACC, 0x00000020 # PCI exclusive access register
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
680 .long PCI_ENABLE_REG, 0x00000005 # PCI config done, enable arbitration
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
681
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
682 # Set up 4372. This is configured entirely through its PCI
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
683 # configuration space. Hence the following all consist of
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
684 # writing an address to the PCICNFGADDR register followed
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
685 # by a write of the data to the PCICNFGDATA register.
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
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diff changeset
686
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
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diff changeset
687 .long PCICNFGADDR, PCI_CONFIG( PCI_N2_DEV, 0, PCI_COMMAND_STATUS_REG)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
688 .long PCICNFGDATA, 0x00000146
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
689
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
690 .long PCICNFGADDR, PCI_CONFIG( PCI_N2_DEV, 0, N2CLSIZE)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
691 .long PCICNFGDATA, 0x00003000
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
692
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
693 .long PCICNFGADDR, PCI_CONFIG( PCI_N2_DEV, 0, PCI_MAP_REG_START)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
694 .long PCICNFGDATA, 0x1c000000
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
695
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
696 .long PCICNFGADDR, PCI_CONFIG( PCI_N2_DEV, 0, N2IOADD)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
697 .long PCICNFGDATA, 0x80000000
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
698
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
699 .long PCICNFGADDR, PCI_CONFIG( PCI_N2_DEV, 0, PCI_INTERRUPT_REG)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
700 .long PCICNFGDATA, 0x00000000
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
701
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
702 .long PCICNFGADDR, PCI_CONFIG( PCI_N2_DEV, 0, N2DSCTIM)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
703 .long PCICNFGDATA, 0x0070f000
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
704
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
705 # Set up IO bus controller chip select profile registers to
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
706 # allow access to the devices.
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
707
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
708 .long WRITE16, IOPROF_00, 0x04d1 # RTC - DS1386
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
709 .long WRITE16, IOPROF_01, 0x007f # DUART - Z8530
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
710 .long WRITE16, IOPROF_02, 0x007f # Timer - Z8536
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
711 .long WRITE16, IOPROF_03, 0x00d9 # Parallel = 8255
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
712 .long WRITE16, IOPROF_06, 0x007f # 7 segment display
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
713 .long WRITE16, IOPROF_07, 0x007f # 7 segment display
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
714
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
715 # Configure the rest of the 4372
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
716
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
717 .long IOTOUT, 0x200003c0 # IO timout control
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
718 .long IOPOL, 0x00000000 # IO bus pin polarity
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
719 .long GPDIR, 0x000007c0 # GPIO pins 6-10 output
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
720 .long INTPOL, 0x00003fff # Interrupt polarity
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
721 .long INTTRIG, 0x00003fff # Interrupt trigger
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
722 .long INTSTAT0, 0x00000000 # Zero all int status regs
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
723 .long INTSTAT1, 0x00000000
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
724 .long INTSTAT2, 0x00000000
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
725
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
726 .long DELAY_LOOP, 0x00010000 # Wait for HW to settle
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
727
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
728 .long 0, 0
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
729
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
730 #endif
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
731
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
732 ##-----------------------------------------------------------------------------
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
733 ## end of platform.S
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
734