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annotate packages/io/serial/current/src/sh/sh_sci_7708.inl @ 76:435cced73e2f ecos-v1_3_1-release

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eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
author jlarmour
date Tue, 28 Mar 2000 14:10:45 +0000
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435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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1 //==========================================================================
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2 //
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3 // io/serial/sh/sh_sci_7708.c
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4 //
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5 // Serial I/O Interface Module definitions for SH3/7708
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6 //
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7 //==========================================================================
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8 //####COPYRIGHTBEGIN####
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9 //
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10 // -------------------------------------------
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11 // The contents of this file are subject to the Red Hat eCos Public License
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12 // Version 1.1 (the "License"); you may not use this file except in
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13 // compliance with the License. You may obtain a copy of the License at
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14 // http://www.redhat.com/
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15 //
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16 // Software distributed under the License is distributed on an "AS IS"
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17 // basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the
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18 // License for the specific language governing rights and limitations under
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19 // the License.
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20 //
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21 // The Original Code is eCos - Embedded Configurable Operating System,
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22 // released September 30, 1998.
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23 //
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24 // The Initial Developer of the Original Code is Red Hat.
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25 // Portions created by Red Hat are
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26 // Copyright (C) 1998, 1999, 2000 Red Hat, Inc.
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27 // All Rights Reserved.
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28 // -------------------------------------------
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29 //
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30 //####COPYRIGHTEND####
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31 //==========================================================================
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32 //#####DESCRIPTIONBEGIN####
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33 //
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34 // Author(s): jskov
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35 // Contributors:jskov
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36 // Date: 1999-06-16
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37 // Purpose: Defines SCI serial resources for SH3/7708.
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38 // Description:
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39 //
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40 //####DESCRIPTIONEND####
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41 //==========================================================================
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42
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43 // Controller bases in the SH3/7708 (only one)
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44 #define SH_SERIAL_SCI_BASE 0xfffffe80
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45
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46 // The SCI controller register layout on the SH3/7708.
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47 #define SCI_SCSMR 0 // serial mode register
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48 #define SCI_SCBRR 2 // bit rate register
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49 #define SCI_SCSCR 4 // serial control register
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50 #define SCI_SCTDR 6 // transmit data register
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51 #define SCI_SCSSR 8 // serial status register
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52 #define SCI_SCRDR 10 // receive data register
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53 #define SCI_SCSPTR -4 // serial port register
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54
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55 static sh_sci_info sh_serial_info = {CYGARC_REG_SCSPTR,
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56 CYGNUM_HAL_INTERRUPT_SCI_ERI,
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57 CYGNUM_HAL_INTERRUPT_SCI_RXI,
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58 CYGNUM_HAL_INTERRUPT_SCI_TXI,
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59 SH_SERIAL_SCI_BASE};
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60
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61 #if CYGNUM_IO_SERIAL_SH_EDK7708_SCI_BUFSIZE > 0
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62 static unsigned char sh_serial_out_buf[CYGNUM_IO_SERIAL_SH_EDK7708_SCI_BUFSIZE];
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63 static unsigned char sh_serial_in_buf[CYGNUM_IO_SERIAL_SH_EDK7708_SCI_BUFSIZE];
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64
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65 static SERIAL_CHANNEL_USING_INTERRUPTS(sh_serial_channel,
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66 sh_serial_funs,
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67 sh_serial_info,
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68 CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_SH_EDK7708_SCI_BAUD),
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69 CYG_SERIAL_STOP_DEFAULT,
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70 CYG_SERIAL_PARITY_DEFAULT,
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71 CYG_SERIAL_WORD_LENGTH_DEFAULT,
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72 CYG_SERIAL_FLAGS_DEFAULT,
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73 &sh_serial_out_buf[0],
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74 sizeof(sh_serial_out_buf),
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75 &sh_serial_in_buf[0],
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76 sizeof(sh_serial_in_buf)
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77 );
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78 #else
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79 static SERIAL_CHANNEL(sh_serial_channel,
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80 sh_serial_funs,
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81 sh_serial_info,
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82 CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_SH_EDK7708_SCI_BAUD),
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83 CYG_SERIAL_STOP_DEFAULT,
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84 CYG_SERIAL_PARITY_DEFAULT,
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85 CYG_SERIAL_WORD_LENGTH_DEFAULT,
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86 CYG_SERIAL_FLAGS_DEFAULT
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87 );
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88 #endif
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89
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90 DEVTAB_ENTRY(sh_serial_io,
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91 CYGDAT_IO_SERIAL_SH_EDK7708_SCI_NAME,
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92 0, // Does not depend on a lower level interface
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93 &cyg_io_serial_devio,
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94 sh_serial_init,
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95 sh_serial_lookup, // Serial driver may need initializing
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96 &sh_serial_channel
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97 );