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annotate packages/hal/arm/pid/current/include/hal_platform_ints.h @ 2:443894e2e912 ecos-v1_2_1-release

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Block commit of eCos version 1.2.1
author jlarmour
date Tue, 11 May 1999 12:24:34 +0000
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children c38311975d4f
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1 #ifndef CYGONCE_HAL_PLATFORM_INTS_H
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2 #define CYGONCE_HAL_PLATFORM_INTS_H
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3 //==========================================================================
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4 //
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5 // hal_platform_ints.h
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6 //
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7 // HAL Interrupt and clock support
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8 //
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9 //==========================================================================
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10 //####COPYRIGHTBEGIN####
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11 //
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12 // -------------------------------------------
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13 // The contents of this file are subject to the Cygnus eCos Public License
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14 // Version 1.0 (the "License"); you may not use this file except in
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15 // compliance with the License. You may obtain a copy of the License at
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16 // http://sourceware.cygnus.com/ecos
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17 //
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18 // Software distributed under the License is distributed on an "AS IS"
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19 // basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the
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20 // License for the specific language governing rights and limitations under
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21 // the License.
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22 //
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23 // The Original Code is eCos - Embedded Cygnus Operating System, released
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24 // September 30, 1998.
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25 //
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26 // The Initial Developer of the Original Code is Cygnus. Portions created
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27 // by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved.
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28 // -------------------------------------------
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29 //
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30 //####COPYRIGHTEND####
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31 //==========================================================================
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32 //#####DESCRIPTIONBEGIN####
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33 //
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34 // Author(s): gthomas
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35 // Contributors: gthomas
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36 // Date: 1999-02-20
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37 // Purpose: Define Interrupt support
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38 // Description: The interrupt details for the PID are defined here.
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39 // Usage:
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40 // #include <cyg/hal/hal_platform_ints.h>
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41 // ...
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42 //
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43 //
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44 //####DESCRIPTIONEND####
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45 //
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46 //==========================================================================
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47
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48 #define CYGNUM_HAL_INTERRUPT_unused 0
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49 #define CYGNUM_HAL_INTERRUPT_PROGRAMMED_INTERRUPT 1
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50 #define CYGNUM_HAL_INTERRUPT_DEBUG_Rx 2
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51 #define CYGNUM_HAL_INTERRUPT_DEBUG_Tx 3
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52 #define CYGNUM_HAL_INTERRUPT_TIMER1 4
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53 #define CYGNUM_HAL_INTERRUPT_TIMER2 5
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54 #define CYGNUM_HAL_INTERRUPT_PC_SLOTA 6
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55 #define CYGNUM_HAL_INTERRUPT_PC_SLOTB 7
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56 #define CYGNUM_HAL_INTERRUPT_SERIALA 8
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57 #define CYGNUM_HAL_INTERRUPT_SERIALB 9
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58 #define CYGNUM_HAL_INTERRUPT_PARALLEL_PORT 10
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59 #define CYGNUM_HAL_INTERRUPT_ASB0 11
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60 #define CYGNUM_HAL_INTERRUPT_ASB1 12
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61 #define CYGNUM_HAL_INTERRUPT_APB0 13
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62 #define CYGNUM_HAL_INTERRUPT_APB1 14
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63 #define CYGNUM_HAL_INTERRUPT_APB2 15
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64 #define CYGNUM_HAL_INTERRUPT_EXTERNAL_FIQ 16
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65
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66 #define CYGNUM_HAL_ISR_MIN 0
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67 #define CYGNUM_HAL_ISR_MAX 16
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68 #define CYGNUM_HAL_ISR_COUNT 17
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69
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70 // The vector used by the Real time clock
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71 #define CYGNUM_HAL_INTERRUPT_RTC CYGNUM_HAL_INTERRUPT_TIMER2
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72
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73 #endif // CYGONCE_HAL_PLATFORM_INTS_H