|
0
|
1 /*================================================================= |
|
|
2 // |
|
|
3 // intr.c |
|
|
4 // |
|
|
5 // HAL Interrupt API test |
|
|
6 // |
|
|
7 //========================================================================== |
|
|
8 //####COPYRIGHTBEGIN#### |
|
|
9 // |
|
|
10 // ------------------------------------------- |
|
|
11 // The contents of this file are subject to the Cygnus eCos Public License |
|
|
12 // Version 1.0 (the "License"); you may not use this file except in |
|
|
13 // compliance with the License. You may obtain a copy of the License at |
|
|
14 // http://sourceware.cygnus.com/ecos |
|
|
15 // |
|
|
16 // Software distributed under the License is distributed on an "AS IS" |
|
|
17 // basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the |
|
|
18 // License for the specific language governing rights and limitations under |
|
|
19 // the License. |
|
|
20 // |
|
|
21 // The Original Code is eCos - Embedded Cygnus Operating System, released |
|
|
22 // September 30, 1998. |
|
|
23 // |
|
|
24 // The Initial Developer of the Original Code is Cygnus. Portions created |
|
2
|
25 // by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. |
|
0
|
26 // ------------------------------------------- |
|
|
27 // |
|
|
28 //####COPYRIGHTEND#### |
|
|
29 //========================================================================== |
|
|
30 //#####DESCRIPTIONBEGIN#### |
|
|
31 // |
|
|
32 // Author(s): nickg |
|
|
33 // Contributors: nickg |
|
|
34 // Date: 1998-10-08 |
|
|
35 //####DESCRIPTIONEND#### |
|
|
36 */ |
|
|
37 |
|
|
38 #include <pkgconf/hal.h> |
|
|
39 |
|
|
40 #include <cyg/infra/testcase.h> |
|
|
41 |
|
|
42 #include <cyg/hal/hal_intr.h> |
|
|
43 |
|
2
|
44 #ifdef CYGPKG_KERNEL |
|
|
45 #include <pkgconf/kernel.h> // Need to look for the RTC config. |
|
|
46 |
|
|
47 // These are redefined below. |
|
|
48 #undef CYGNUM_KERNEL_COUNTERS_RTC_RESOLUTION |
|
|
49 #undef CYGNUM_KERNEL_COUNTERS_RTC_PERIOD |
|
|
50 #endif |
|
|
51 |
|
0
|
52 // ------------------------------------------------------------------------- |
|
|
53 |
|
|
54 #if defined(CYG_HAL_MN10300_STDEVAL1) |
|
|
55 |
|
|
56 #define CYGNUM_KERNEL_COUNTERS_RTC_RESOLUTION {1000000000, 100} |
|
|
57 #define CYGNUM_KERNEL_COUNTERS_RTC_PERIOD 150000 |
|
|
58 |
|
|
59 #endif |
|
|
60 #if defined(CYG_HAL_MN10300_SIM) |
|
|
61 |
|
|
62 #define CYGNUM_KERNEL_COUNTERS_RTC_RESOLUTION {1000000000, 100} |
|
|
63 #define CYGNUM_KERNEL_COUNTERS_RTC_PERIOD 9999 |
|
|
64 |
|
|
65 #endif |
|
|
66 |
|
|
67 #if defined(CYG_HAL_MIPS_JMR3904) |
|
|
68 |
|
|
69 #define CYGNUM_KERNEL_COUNTERS_RTC_RESOLUTION {1000000000, 100} |
|
|
70 #define CYGNUM_KERNEL_COUNTERS_RTC_PERIOD 15625 |
|
|
71 |
|
|
72 #endif |
|
|
73 #if defined(CYG_HAL_MIPS_SIM) |
|
|
74 |
|
|
75 #define CYGNUM_KERNEL_COUNTERS_RTC_RESOLUTION {1000000000, 1000} |
|
|
76 #define CYGNUM_KERNEL_COUNTERS_RTC_PERIOD 999 |
|
|
77 |
|
|
78 #endif |
|
|
79 |
|
2
|
80 #if defined(CYG_HAL_POWERPC_COGENT) |
|
0
|
81 |
|
|
82 #define CYGNUM_KERNEL_COUNTERS_RTC_RESOLUTION {1000000000, 100} |
|
|
83 #define CYGNUM_KERNEL_COUNTERS_RTC_PERIOD 20625 |
|
|
84 |
|
|
85 #endif |
|
2
|
86 #if defined(CYGPKG_HAL_POWERPC_SIM) |
|
|
87 |
|
|
88 #define CYGNUM_KERNEL_COUNTERS_RTC_RESOLUTION {1000000000, 100} |
|
|
89 #define CYGNUM_KERNEL_COUNTERS_RTC_PERIOD 999 |
|
|
90 |
|
|
91 #endif |
|
|
92 |
|
|
93 #if defined(CYG_HAL_I386_LINUX) |
|
|
94 #define CYGNUM_KERNEL_COUNTERS_RTC_RESOLUTION {1000000000, 100} |
|
|
95 #define CYGNUM_KERNEL_COUNTERS_RTC_PERIOD 10000 |
|
|
96 #endif |
|
0
|
97 |
|
|
98 #ifndef CYGNUM_KERNEL_COUNTERS_RTC_RESOLUTION |
|
|
99 |
|
|
100 #define CYGNUM_KERNEL_COUNTERS_RTC_RESOLUTION {1000000000, 100} |
|
|
101 #define CYGNUM_KERNEL_COUNTERS_RTC_PERIOD 9999 |
|
|
102 |
|
|
103 #endif |
|
|
104 |
|
|
105 // ------------------------------------------------------------------------- |
|
|
106 |
|
|
107 #define ISR_DATA 0xAAAA1234 |
|
|
108 |
|
|
109 // ------------------------------------------------------------------------- |
|
|
110 |
|
|
111 volatile cyg_count32 ticks = 0; |
|
|
112 |
|
|
113 // ------------------------------------------------------------------------- |
|
|
114 |
|
|
115 cyg_uint32 isr( cyg_uint32 vector, CYG_ADDRWORD data ) |
|
|
116 { |
|
|
117 CYG_TEST_CHECK( ISR_DATA == data , "Bad data passed to ISR"); |
|
2
|
118 CYG_TEST_CHECK( CYGNUM_HAL_INTERRUPT_RTC == vector , |
|
|
119 "Bad vector passed to ISR"); |
|
0
|
120 |
|
|
121 HAL_CLOCK_RESET( vector, CYGNUM_KERNEL_COUNTERS_RTC_PERIOD ); |
|
|
122 |
|
|
123 HAL_INTERRUPT_ACKNOWLEDGE( vector ); |
|
|
124 |
|
|
125 ticks++; |
|
|
126 |
|
|
127 return 0; |
|
|
128 } |
|
|
129 |
|
|
130 // ------------------------------------------------------------------------- |
|
|
131 |
|
|
132 void intr_main( void ) |
|
|
133 { |
|
|
134 CYG_INTERRUPT_STATE oldints; |
|
|
135 |
|
2
|
136 HAL_INTERRUPT_ATTACH( CYGNUM_HAL_INTERRUPT_RTC, isr, ISR_DATA, 0 ); |
|
0
|
137 |
|
|
138 HAL_CLOCK_INITIALIZE( CYGNUM_KERNEL_COUNTERS_RTC_PERIOD ); |
|
|
139 |
|
2
|
140 HAL_INTERRUPT_UNMASK( CYGNUM_HAL_INTERRUPT_RTC ); |
|
0
|
141 |
|
|
142 HAL_ENABLE_INTERRUPTS(); |
|
|
143 |
|
|
144 while( ticks < 10 ) |
|
|
145 { |
|
|
146 |
|
|
147 } |
|
|
148 |
|
|
149 HAL_DISABLE_INTERRUPTS(oldints); |
|
|
150 |
|
|
151 CYG_TEST_PASS_FINISH("HAL interrupt test"); |
|
2
|
152 |
|
0
|
153 } |
|
|
154 |
|
|
155 |
|
|
156 // ------------------------------------------------------------------------- |
|
|
157 |
|
|
158 externC void |
|
|
159 cyg_start( void ) |
|
|
160 { |
|
2
|
161 CYG_TEST_INIT(); |
|
|
162 |
|
|
163 // Attaching the ISR will not succeed if the kernel real-time |
|
|
164 // clock has been configured in. |
|
|
165 #ifndef CYGVAR_KERNEL_COUNTERS_CLOCK |
|
|
166 |
|
0
|
167 intr_main(); |
|
2
|
168 |
|
|
169 #else |
|
|
170 |
|
|
171 CYG_TEST_PASS_FINISH("N/A: Cannot override kernel real-time clock."); |
|
|
172 |
|
|
173 #endif |
|
0
|
174 } |
|
|
175 |
|
|
176 |
|
|
177 // ------------------------------------------------------------------------- |
|
|
178 /* EOF intr.c */ |
