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1 /* ppc_stub.c - helper functions for stub, generic to all PowerPC processors |
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2 * |
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3 * Copyright (c) 1998,1999 Cygnus Solutions |
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4 * |
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5 * The authors hereby grant permission to use, copy, modify, distribute, |
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6 * and license this software and its documentation for any purpose, provided |
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7 * that existing copyright notices are retained in all copies and that this |
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8 * notice is included verbatim in any distributions. No written agreement, |
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9 * license, or royalty fee is required for any of the authorized uses. |
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10 * Modifications to this software may be copyrighted by their authors |
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11 * and need not follow the licensing terms described here, provided that |
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12 * the new terms are clearly indicated on the first page of each file where |
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13 * they apply. |
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14 */ |
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15 |
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16 #include <stddef.h> |
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17 |
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18 #include <pkgconf/hal.h> |
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19 |
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20 #ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS |
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21 |
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22 #define CYGARC_HAL_COMMON_EXPORT_CPU_MACROS |
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23 #include <cyg/hal/ppc_regs.h> |
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24 |
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25 #include <cyg/hal/hal_stub.h> |
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26 #include <cyg/hal/hal_arch.h> |
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27 #include <cyg/hal/hal_intr.h> |
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28 |
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29 #ifdef CYGDBG_HAL_DEBUG_GDB_THREAD_SUPPORT |
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30 #include <cyg/hal/dbg-threads-api.h> // dbg_currthread_id |
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31 #endif |
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32 |
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33 /* Given a trap value TRAP, return the corresponding signal. */ |
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34 |
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35 int __computeSignal (unsigned int trap_number) |
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36 { |
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37 switch (trap_number) |
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38 { |
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39 case CYGNUM_HAL_VECTOR_MACHINE_CHECK: |
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40 /* Machine check */ |
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41 case CYGNUM_HAL_VECTOR_DSI: |
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42 /* Data access */ |
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43 return SIGSEGV; |
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44 |
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45 case CYGNUM_HAL_VECTOR_ISI: |
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46 /* Instruction access (Ifetch) */ |
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47 case CYGNUM_HAL_VECTOR_ALIGNMENT: |
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48 /* Data access */ |
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49 return SIGBUS; |
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50 |
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51 case CYGNUM_HAL_VECTOR_INTERRUPT: |
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52 /* External interrupt */ |
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53 return SIGINT; |
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54 |
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55 case CYGNUM_HAL_VECTOR_TRACE: |
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56 /* Instruction trace */ |
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57 return SIGTRAP; |
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58 |
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59 case CYGNUM_HAL_VECTOR_PROGRAM: |
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60 // The register PS contains the value of SRR1 at the time of |
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61 // exception entry. Bits 11-15 contain information about the |
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62 // cause of the exception. Bits 16-31 the PS (MSR) state. |
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63 switch ((get_register (PS) >> 17) & 0xf){ |
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64 case 1: /* trap */ |
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65 return SIGTRAP; |
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66 case 2: /* privileged instruction */ |
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67 case 4: /* illegal instruction */ |
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68 return SIGILL; |
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69 case 8: /* floating point */ |
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70 return SIGFPE; |
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71 default: /* should never happen! */ |
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72 return SIGTERM; |
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73 } |
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74 |
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75 case CYGNUM_HAL_VECTOR_RESERVED_A: |
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76 case CYGNUM_HAL_VECTOR_RESERVED_B: |
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77 return SIGILL; |
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78 |
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79 case CYGNUM_HAL_VECTOR_FP_UNAVAILABLE: |
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80 /* FPU disabled */ |
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81 case CYGNUM_HAL_VECTOR_FP_ASSIST: |
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82 /* FPU assist */ |
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83 return SIGFPE; |
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84 |
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85 case CYGNUM_HAL_VECTOR_DECREMENTER: |
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86 /* Decrementer alarm */ |
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87 return SIGALRM; |
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88 |
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89 case CYGNUM_HAL_VECTOR_SYSTEM_CALL: |
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90 /* System call */ |
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91 return SIGSYS; |
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92 |
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93 #if defined(CYG_HAL_POWERPC_MPC8xx) |
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94 case CYGNUM_HAL_VECTOR_SW_EMUL: |
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95 /* A SW_EMUL is generated instead of PROGRAM for illegal |
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96 instructions. */ |
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97 return SIGILL; |
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98 |
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99 case CYGNUM_HAL_VECTOR_DATA_BP: |
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100 case CYGNUM_HAL_VECTOR_INSTRUCTION_BP: |
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101 case CYGNUM_HAL_VECTOR_PERIPHERAL_BP: |
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102 case CYGNUM_HAL_VECTOR_NMI: |
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103 /* Developer port debugging exceptions. */ |
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104 return SIGTRAP; |
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105 |
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106 case CYGNUM_HAL_VECTOR_ITLB_MISS: |
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107 case CYGNUM_HAL_VECTOR_DTLB_MISS: |
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108 /* Software reload of TLB required. */ |
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109 return SIGTRAP; |
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110 |
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111 case CYGNUM_HAL_VECTOR_ITLB_ERROR: |
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112 /* Invalid instruction access. */ |
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113 return SIGBUS; |
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114 |
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115 case CYGNUM_HAL_VECTOR_DTLB_ERROR: |
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116 /* Invalid data access. */ |
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117 return SIGSEGV; |
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118 #endif // defined(CYG_HAL_POWERPC_MPC8xx) |
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119 |
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120 default: |
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121 return SIGTERM; |
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122 } |
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123 } |
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124 |
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125 |
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126 /* Return the trap number corresponding to the last-taken trap. */ |
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127 |
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128 int __get_trap_number (void) |
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129 { |
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130 // The vector is not not part of the GDB register set so get it |
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131 // directly from the save context. |
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132 return _hal_registers->vector >> 8; |
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133 } |
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134 |
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135 /* Set the currently-saved pc register value to PC. This also updates NPC |
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136 as needed. */ |
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137 |
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138 void set_pc (target_register_t pc) |
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139 { |
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140 put_register (PC, pc); |
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141 } |
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142 |
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143 |
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144 /*---------------------------------------------------------------------- |
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145 * Single-step support |
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146 */ |
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147 |
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148 /* Set things up so that the next user resume will execute one instruction. |
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149 This may be done by setting breakpoints or setting a single step flag |
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150 in the saved user registers, for example. */ |
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151 |
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152 static target_register_t irq_state; |
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153 |
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154 void __single_step (void) |
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155 { |
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156 target_register_t msr = get_register (PS); |
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157 |
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158 // Set single-step flag in the exception context. |
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159 msr |= (MSR_SE | MSR_BE); |
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160 // Disable interrupts. |
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161 irq_state = msr & MSR_EE; |
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162 msr &= ~MSR_EE; |
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163 |
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164 put_register (PS, msr); |
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165 } |
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166 |
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167 /* Clear the single-step state. */ |
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168 |
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169 void __clear_single_step (void) |
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170 { |
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171 target_register_t msr = get_register (PS); |
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172 |
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173 // Clear single-step flag in the exception context. |
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174 msr &= ~(MSR_SE | MSR_BE); |
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175 // Restore interrupt state. |
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176 // FIXME: Should check whether the executed instruction changed the |
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177 // interrupt state - or single-stepping a MSR changing instruction |
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178 // may result in a wrong EE. Not a very likely scenario though. |
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179 msr |= irq_state; |
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180 |
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181 put_register (PS, msr); |
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182 } |
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183 |
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184 |
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185 void __install_breakpoints (void) |
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186 { |
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187 /* NOP since single-step HW exceptions are used instead of |
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188 breakpoints. */ |
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189 } |
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190 |
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191 void __clear_breakpoints (void) |
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192 { |
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193 } |
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194 |
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195 |
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196 /* If the breakpoint we hit is in the breakpoint() instruction, return a |
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197 non-zero value. */ |
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198 |
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199 int |
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200 __is_breakpoint_function () |
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201 { |
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202 return get_register (PC) == (target_register_t)&CYG_LABEL_NAME(breakinst); |
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203 } |
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204 |
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205 |
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206 /* Skip the current instruction. Since this is only called by the |
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207 stub when the PC points to a breakpoint or trap instruction, |
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208 we can safely just skip 4. */ |
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209 |
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210 void __skipinst (void) |
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211 { |
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212 put_register (PC, get_register (PC) + 4); |
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213 } |
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214 |
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215 #endif // CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS |
