Mercurial > flash_v2

annotate packages/io/serial/current/src/arm/edb7xxx_serial.c @ 62:7a6ac9edc838 ecos-sw-2000-01-24

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Merge from eCos master repository on 2000-01-24-19:43:49-GMT
author jlarmour
date Mon, 24 Jan 2000 21:43:17 +0000
parents f10165814f1e
children c38311975d4f
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1 //==========================================================================
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2 //
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3 // io/serial/arm/edb7xxx_serial.c
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4 //
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5 // Cirrus Logic EDB7XXX Serial I/O Interface Module (interrupt driven)
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6 //
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7 //==========================================================================
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8 //####COPYRIGHTBEGIN####
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9 //
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10 // -------------------------------------------
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11 // The contents of this file are subject to the Cygnus eCos Public License
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12 // Version 1.0 (the "License"); you may not use this file except in
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13 // compliance with the License. You may obtain a copy of the License at
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14 // http://sourceware.cygnus.com/ecos
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15 //
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16 // Software distributed under the License is distributed on an "AS IS"
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17 // basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the
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18 // License for the specific language governing rights and limitations under
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19 // the License.
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20 //
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21 // The Original Code is eCos - Embedded Cygnus Operating System, released
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22 // September 30, 1998.
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23 //
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24 // The Initial Developer of the Original Code is Cygnus. Portions created
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25 // by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved.
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26 // -------------------------------------------
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27 //
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28 //####COPYRIGHTEND####
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29 //==========================================================================
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30 //#####DESCRIPTIONBEGIN####
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31 //
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32 // Author(s): gthomas
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33 // Contributors: gthomas
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34 // Date: 1999-02-04
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35 // Purpose: EDB7XXX Serial I/O module (interrupt driven version)
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36 // Description:
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37 //
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38 //####DESCRIPTIONEND####
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39 //
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40 //==========================================================================
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41
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42 #include <pkgconf/system.h>
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43 #include <pkgconf/io_serial.h>
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44 #include <pkgconf/io.h>
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45 #include <cyg/io/io.h>
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46 #include <cyg/hal/hal_intr.h>
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47 #include <cyg/io/devtab.h>
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48 #include <cyg/io/serial.h>
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49 #include <cyg/infra/diag.h>
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50
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51 #ifdef CYGPKG_IO_SERIAL_ARM_EDB7XXX
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52
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53 #include "edb7xxx_serial.h"
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54
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55 typedef struct edb7xxx_serial_info {
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56 CYG_ADDRWORD data, // Pointer to data register
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57 control, // Pointer to baud rate/line control register
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58 stat, // Pointer to system flags for this port
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59 syscon; // Pointer to system control for this port
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60 CYG_WORD tx_int_num, // Transmit interrupt number
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61 rx_int_num, // Receive interrupt number
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62 ms_int_num; // Modem Status Change interrupt number
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63 cyg_interrupt serial_tx_interrupt,
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64 serial_rx_interrupt,
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65 serial_ms_interrupt;
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66 cyg_handle_t serial_tx_interrupt_handle,
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67 serial_rx_interrupt_handle,
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68 serial_ms_interrupt_handle;
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69 bool tx_enabled;
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70 } edb7xxx_serial_info;
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71
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72 static bool edb7xxx_serial_init(struct cyg_devtab_entry *tab);
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73 static bool edb7xxx_serial_putc(serial_channel *chan, unsigned char c);
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74 static Cyg_ErrNo edb7xxx_serial_lookup(struct cyg_devtab_entry **tab,
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75 struct cyg_devtab_entry *sub_tab,
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76 const char *name);
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77 static unsigned char edb7xxx_serial_getc(serial_channel *chan);
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78 static bool edb7xxx_serial_set_config(serial_channel *chan, cyg_serial_info_t *config);
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79 static void edb7xxx_serial_start_xmit(serial_channel *chan);
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80 static void edb7xxx_serial_stop_xmit(serial_channel *chan);
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81
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82 static cyg_uint32 edb7xxx_serial_tx_ISR(cyg_vector_t vector, cyg_addrword_t data);
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83 static void edb7xxx_serial_tx_DSR(cyg_vector_t vector, cyg_ucount32 count, cyg_addrword_t data);
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84 static cyg_uint32 edb7xxx_serial_rx_ISR(cyg_vector_t vector, cyg_addrword_t data);
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85 static void edb7xxx_serial_rx_DSR(cyg_vector_t vector, cyg_ucount32 count, cyg_addrword_t data);
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86 static cyg_uint32 edb7xxx_serial_ms_ISR(cyg_vector_t vector, cyg_addrword_t data);
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87 static void edb7xxx_serial_ms_DSR(cyg_vector_t vector, cyg_ucount32 count, cyg_addrword_t data);
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88
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89 static SERIAL_FUNS(edb7xxx_serial_funs,
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90 edb7xxx_serial_putc,
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91 edb7xxx_serial_getc,
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92 edb7xxx_serial_set_config,
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93 edb7xxx_serial_start_xmit,
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94 edb7xxx_serial_stop_xmit
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95 );
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96
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97 #ifdef CYGPKG_IO_SERIAL_ARM_EDB7XXX_SERIAL1
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98 static edb7xxx_serial_info edb7xxx_serial_info1 = {UARTDR1, // Data register
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99 UBLCR1, // Port control
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100 SYSFLG1, // Status
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101 SYSCON1, // System config
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102 CYGNUM_HAL_INTERRUPT_UTXINT1, // Tx interrupt
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103 CYGNUM_HAL_INTERRUPT_URXINT1, // Rx interrupt
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104 0 /*CYGNUM_HAL_INTERRUPT_UMSINT*/}; // Modem control
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105 #if CYGNUM_IO_SERIAL_ARM_EDB7XXX_SERIAL1_BUFSIZE > 0
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106 static unsigned char edb7xxx_serial_out_buf1[CYGNUM_IO_SERIAL_ARM_EDB7XXX_SERIAL1_BUFSIZE];
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107 static unsigned char edb7xxx_serial_in_buf1[CYGNUM_IO_SERIAL_ARM_EDB7XXX_SERIAL1_BUFSIZE];
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108
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109 static SERIAL_CHANNEL_USING_INTERRUPTS(edb7xxx_serial_channel1,
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110 edb7xxx_serial_funs,
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111 edb7xxx_serial_info1,
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112 CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_ARM_EDB7XXX_SERIAL1_BAUD),
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113 CYG_SERIAL_STOP_DEFAULT,
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114 CYG_SERIAL_PARITY_DEFAULT,
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115 CYG_SERIAL_WORD_LENGTH_DEFAULT,
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116 CYG_SERIAL_FLAGS_DEFAULT,
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117 &edb7xxx_serial_out_buf1[0], sizeof(edb7xxx_serial_out_buf1),
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118 &edb7xxx_serial_in_buf1[0], sizeof(edb7xxx_serial_in_buf1)
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119 );
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120 #else
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121 static SERIAL_CHANNEL(edb7xxx_serial_channel1,
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122 edb7xxx_serial_funs,
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123 edb7xxx_serial_info1,
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124 CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_ARM_EDB7XXX_SERIAL1_BAUD),
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125 CYG_SERIAL_STOP_DEFAULT,
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126 CYG_SERIAL_PARITY_DEFAULT,
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127 CYG_SERIAL_WORD_LENGTH_DEFAULT,
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128 CYG_SERIAL_FLAGS_DEFAULT
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129 );
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130 #endif
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131
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132 DEVTAB_ENTRY(edb7xxx_serial_io1,
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133 CYGDAT_IO_SERIAL_ARM_EDB7XXX_SERIAL1_NAME,
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134 0, // Does not depend on a lower level interface
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135 &cyg_io_serial_devio,
54
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136 edb7xxx_serial_init,
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137 edb7xxx_serial_lookup, // Serial driver may need initializing
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138 &edb7xxx_serial_channel1
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139 );
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140 #endif // CYGPKG_IO_SERIAL_ARM_EDB7XXX_SERIAL2
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141
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142 #ifdef CYGPKG_IO_SERIAL_ARM_EDB7XXX_SERIAL2
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143 static edb7xxx_serial_info edb7xxx_serial_info2 = {UARTDR2, // Data register
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144 UBLCR2, // Port control
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145 SYSFLG2, // Status
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146 SYSCON2, // System config
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147 CYGNUM_HAL_INTERRUPT_UTXINT2, // Tx interrupt
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148 CYGNUM_HAL_INTERRUPT_URXINT2, // Rx interrupt
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149 0}; // No modem control
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150 #if CYGNUM_IO_SERIAL_ARM_EDB7XXX_SERIAL2_BUFSIZE > 0
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151 static unsigned char edb7xxx_serial_out_buf2[CYGNUM_IO_SERIAL_ARM_EDB7XXX_SERIAL2_BUFSIZE];
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152 static unsigned char edb7xxx_serial_in_buf2[CYGNUM_IO_SERIAL_ARM_EDB7XXX_SERIAL2_BUFSIZE];
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153
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154 static SERIAL_CHANNEL_USING_INTERRUPTS(edb7xxx_serial_channel2,
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155 edb7xxx_serial_funs,
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156 edb7xxx_serial_info2,
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157 CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_ARM_EDB7XXX_SERIAL2_BAUD),
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158 CYG_SERIAL_STOP_DEFAULT,
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159 CYG_SERIAL_PARITY_DEFAULT,
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160 CYG_SERIAL_WORD_LENGTH_DEFAULT,
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161 CYG_SERIAL_FLAGS_DEFAULT,
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162 &edb7xxx_serial_out_buf2[0], sizeof(edb7xxx_serial_out_buf2),
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163 &edb7xxx_serial_in_buf2[0], sizeof(edb7xxx_serial_in_buf2)
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164 );
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165 #else
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166 static SERIAL_CHANNEL(edb7xxx_serial_channel2,
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167 edb7xxx_serial_funs,
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168 edb7xxx_serial_info2,
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169 CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_ARM_EDB7XXX_SERIAL2_BAUD),
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170 CYG_SERIAL_STOP_DEFAULT,
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171 CYG_SERIAL_PARITY_DEFAULT,
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172 CYG_SERIAL_WORD_LENGTH_DEFAULT,
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173 CYG_SERIAL_FLAGS_DEFAULT
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174 );
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175 #endif
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176
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177 DEVTAB_ENTRY(edb7xxx_serial_io2,
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178 CYGDAT_IO_SERIAL_ARM_EDB7XXX_SERIAL2_NAME,
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179 0, // Does not depend on a lower level interface
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180 &cyg_io_serial_devio,
54
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181 edb7xxx_serial_init,
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182 edb7xxx_serial_lookup, // Serial driver may need initializing
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183 &edb7xxx_serial_channel2
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184 );
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185 #endif // CYGPKG_IO_SERIAL_ARM_EDB7XXX_SERIAL2
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186
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187 // Internal function to actually configure the hardware to desired baud rate, etc.
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188 static bool
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189 edb7xxx_serial_config_port(serial_channel *chan, cyg_serial_info_t *new_config, bool init)
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190 {
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191 edb7xxx_serial_info *edb7xxx_chan = (edb7xxx_serial_info *)chan->dev_priv;
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192 volatile cyg_uint32 *syscon = (volatile cyg_uint32 *)edb7xxx_chan->syscon;
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193 volatile cyg_uint32 *blcfg = (volatile cyg_uint32 *)edb7xxx_chan->control;
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194 unsigned int baud_divisor = select_baud[new_config->baud];
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195 cyg_uint32 _lcr;
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196 if (baud_divisor == 0) return false;
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197 // Disable port interrupts while changing hardware
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198 _lcr = select_word_length[new_config->word_length - CYGNUM_SERIAL_WORD_LENGTH_5] |
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199 select_stop_bits[new_config->stop] |
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200 select_parity[new_config->parity] |
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201 UBLCR_FIFOEN | UART_BITRATE(baud_divisor);
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202 #ifdef CYGDBG_IO_INIT
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203 diag_printf("Set CTL: %x = %x\n", blcfg, _lcr);
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204 #endif
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205 *blcfg = _lcr;
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206 *syscon |= SYSCON1_UART1EN;
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207 if (new_config != &chan->config) {
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208 chan->config = *new_config;
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209 }
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210 return true;
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211 }
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212
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213 // Function to initialize the device. Called at bootstrap time.
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214 static bool
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215 edb7xxx_serial_init(struct cyg_devtab_entry *tab)
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216 {
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217 serial_channel *chan = (serial_channel *)tab->priv;
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218 edb7xxx_serial_info *edb7xxx_chan = (edb7xxx_serial_info *)chan->dev_priv;
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219 #ifdef CYGDBG_IO_INIT
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220 diag_printf("EDB7XXX SERIAL init - dev: %x.%d\n", edb7xxx_chan->control, edb7xxx_chan->tx_int_num);
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221 #endif
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222 (chan->callbacks->serial_init)(chan); // Really only required for interrupt driven devices
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223 if (chan->out_cbuf.len != 0) {
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224 cyg_drv_interrupt_create(edb7xxx_chan->tx_int_num,
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225 99, // Priority - unused
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226 (cyg_addrword_t)chan, // Data item passed to interrupt handler
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227 edb7xxx_serial_tx_ISR,
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228 edb7xxx_serial_tx_DSR,
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229 &edb7xxx_chan->serial_tx_interrupt_handle,
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230 &edb7xxx_chan->serial_tx_interrupt);
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231 cyg_drv_interrupt_attach(edb7xxx_chan->serial_tx_interrupt_handle);
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232 cyg_drv_interrupt_mask(edb7xxx_chan->tx_int_num);
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233 edb7xxx_chan->tx_enabled = false;
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234 }
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235 if (chan->in_cbuf.len != 0) {
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236 cyg_drv_interrupt_create(edb7xxx_chan->rx_int_num,
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237 99, // Priority - unused
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238 (cyg_addrword_t)chan, // Data item passed to interrupt handler
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239 edb7xxx_serial_rx_ISR,
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240 edb7xxx_serial_rx_DSR,
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241 &edb7xxx_chan->serial_rx_interrupt_handle,
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242 &edb7xxx_chan->serial_rx_interrupt);
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243 cyg_drv_interrupt_attach(edb7xxx_chan->serial_rx_interrupt_handle);
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244 cyg_drv_interrupt_unmask(edb7xxx_chan->rx_int_num);
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245 }
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246 edb7xxx_serial_config_port(chan, &chan->config, true);
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247 return true;
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248 }
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249
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250 // This routine is called when the device is "looked" up (i.e. attached)
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251 static Cyg_ErrNo
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252 edb7xxx_serial_lookup(struct cyg_devtab_entry **tab,
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253 struct cyg_devtab_entry *sub_tab,
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254 const char *name)
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255 {
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256 serial_channel *chan = (serial_channel *)(*tab)->priv;
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257 (chan->callbacks->serial_init)(chan); // Really only required for interrupt driven devices
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258 return ENOERR;
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259 }
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260
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261 // Send a character to the device output buffer.
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262 // Return 'true' if character is sent to device
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263 static bool
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264 edb7xxx_serial_putc(serial_channel *chan, unsigned char c)
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265 {
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266 edb7xxx_serial_info *edb7xxx_chan = (edb7xxx_serial_info *)chan->dev_priv;
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267 volatile cyg_uint8 *data = (volatile cyg_uint8 *)edb7xxx_chan->data;
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268 volatile cyg_uint32 *stat = (volatile cyg_uint32 *)edb7xxx_chan->stat;
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269 if ((*stat & SYSFLG1_UTXFF1) == 0) {
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270 // Transmit buffer/FIFO is not full
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271 *data = c;
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272 return true;
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273 } else {
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274 // No space
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275 return false;
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276 }
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277 }
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278
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279 // Fetch a character from the device input buffer, waiting if necessary
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280 static unsigned char
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281 edb7xxx_serial_getc(serial_channel *chan)
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282 {
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283 unsigned char c;
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284 edb7xxx_serial_info *edb7xxx_chan = (edb7xxx_serial_info *)chan->dev_priv;
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285 volatile cyg_uint32 *data = (volatile cyg_uint32 *)edb7xxx_chan->data;
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286 volatile cyg_uint32 *stat = (volatile cyg_uint32 *)edb7xxx_chan->stat;
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287 while (*stat & SYSFLG1_URXFE1) ; // Wait for char
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288 c = *data;
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289 return c;
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290 }
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291
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292 // Set up the device characteristics; baud rate, etc.
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293 static bool
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294 edb7xxx_serial_set_config(serial_channel *chan, cyg_serial_info_t *config)
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295 {
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296 return edb7xxx_serial_config_port(chan, config, false);
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297 }
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298
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299 // Enable the transmitter (interrupt) on the device
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300 static void
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301 edb7xxx_serial_start_xmit(serial_channel *chan)
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302 {
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303 edb7xxx_serial_info *edb7xxx_chan = (edb7xxx_serial_info *)chan->dev_priv;
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304 edb7xxx_chan->tx_enabled = true;
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305 cyg_drv_interrupt_unmask(edb7xxx_chan->tx_int_num);
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306 }
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307
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308 // Disable the transmitter on the device
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309 static void
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310 edb7xxx_serial_stop_xmit(serial_channel *chan)
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311 {
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312 edb7xxx_serial_info *edb7xxx_chan = (edb7xxx_serial_info *)chan->dev_priv;
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313 cyg_drv_interrupt_mask(edb7xxx_chan->tx_int_num);
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314 edb7xxx_chan->tx_enabled = false;
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315 }
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316
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317 // Serial I/O - low level Tx interrupt handler (ISR)
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318 static cyg_uint32
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319 edb7xxx_serial_tx_ISR(cyg_vector_t vector, cyg_addrword_t data)
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320 {
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321 serial_channel *chan = (serial_channel *)data;
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322 edb7xxx_serial_info *edb7xxx_chan = (edb7xxx_serial_info *)chan->dev_priv;
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323 cyg_drv_interrupt_mask(edb7xxx_chan->tx_int_num);
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324 cyg_drv_interrupt_acknowledge(edb7xxx_chan->tx_int_num);
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325 return CYG_ISR_CALL_DSR; // Cause DSR to be run
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326 }
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327
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328 // Serial I/O - high level Tx interrupt handler (DSR)
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329 static void
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330 edb7xxx_serial_tx_DSR(cyg_vector_t vector, cyg_ucount32 count, cyg_addrword_t data)
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331 {
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332 serial_channel *chan = (serial_channel *)data;
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333 edb7xxx_serial_info *edb7xxx_chan = (edb7xxx_serial_info *)chan->dev_priv;
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334 (chan->callbacks->xmt_char)(chan);
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335 if (edb7xxx_chan->tx_enabled) {
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336 cyg_drv_interrupt_unmask(edb7xxx_chan->tx_int_num);
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337 }
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338 }
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339
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340 // Serial I/O - low level Rx interrupt handler (ISR)
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341 static cyg_uint32
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342 edb7xxx_serial_rx_ISR(cyg_vector_t vector, cyg_addrword_t data)
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343 {
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344 serial_channel *chan = (serial_channel *)data;
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345 edb7xxx_serial_info *edb7xxx_chan = (edb7xxx_serial_info *)chan->dev_priv;
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346 cyg_drv_interrupt_mask(edb7xxx_chan->rx_int_num);
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347 cyg_drv_interrupt_acknowledge(edb7xxx_chan->rx_int_num);
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348 return CYG_ISR_CALL_DSR; // Cause DSR to be run
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349 }
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350
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351 // Serial I/O - high level Rx interrupt handler (DSR)
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352 static void
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353 edb7xxx_serial_rx_DSR(cyg_vector_t vector, cyg_ucount32 count, cyg_addrword_t data)
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354 {
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355 serial_channel *chan = (serial_channel *)data;
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356 edb7xxx_serial_info *edb7xxx_chan = (edb7xxx_serial_info *)chan->dev_priv;
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357 volatile cyg_uint32 *datreg = (volatile cyg_uint32 *)edb7xxx_chan->data;
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358 volatile cyg_uint32 *stat = (volatile cyg_uint32 *)edb7xxx_chan->stat;
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359 while (!(*stat & SYSFLG1_URXFE1))
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360 (chan->callbacks->rcv_char)(chan, *datreg);
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361 cyg_drv_interrupt_unmask(edb7xxx_chan->rx_int_num);
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362 }
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363
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364 // Serial I/O - low level Ms interrupt handler (ISR)
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365 static cyg_uint32
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366 edb7xxx_serial_ms_ISR(cyg_vector_t vector, cyg_addrword_t data)
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367 {
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368 serial_channel *chan = (serial_channel *)data;
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369 edb7xxx_serial_info *edb7xxx_chan = (edb7xxx_serial_info *)chan->dev_priv;
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370 cyg_drv_interrupt_mask(edb7xxx_chan->ms_int_num);
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371 cyg_drv_interrupt_acknowledge(edb7xxx_chan->ms_int_num);
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372 return CYG_ISR_CALL_DSR; // Cause DSR to be run
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373 }
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374
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375 // Serial I/O - high level Ms interrupt handler (DSR)
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376 static void
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377 edb7xxx_serial_ms_DSR(cyg_vector_t vector, cyg_ucount32 count, cyg_addrword_t data)
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378 {
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379 }
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380 #endif // CYGPKG_IO_SERIAL_ARM_EDB7XXX
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381