Mercurial > flash_v2
annotate packages/hal/arm/pid/current/src/pid_misc.c @ 64:c38311975d4f ecos-sw-2000-01-28
Merge from eCos master repository on 2000-01-28-04:28:11-GMT
| author | jlarmour |
|---|---|
| date | Fri, 28 Jan 2000 04:59:39 +0000 |
| parents | a0774359f013 |
| children | bf00f99aec69 |
| rev | line source |
|---|---|
| 2 | 1 //========================================================================== |
| 2 // | |
| 3 // pid_misc.c | |
| 4 // | |
| 5 // HAL misc board support code for ARM PID7 | |
| 6 // | |
| 7 //========================================================================== | |
| 8 //####COPYRIGHTBEGIN#### | |
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9 // |
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10 // ------------------------------------------- |
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11 // The contents of this file are subject to the Red Hat eCos Public License |
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12 // Version 1.0 (the "License"); you may not use this file except in |
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13 // compliance with the License. You may obtain a copy of the License at |
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14 // http://sourceware.cygnus.com/ecos |
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15 // |
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16 // Software distributed under the License is distributed on an |
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17 // basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the |
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18 // License for the specific language governing rights and limitations under |
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19 // the License. |
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20 // |
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21 // The Original Code is eCos - Embedded Configurable Operating System, |
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22 // released September 30, 1998. |
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23 // |
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24 // The Initial Developer of the Original Code is Red Hat. |
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25 // Portions created by Red Hat are |
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26 // Copyright (C) 1998, 1999, 2000 Red Hat, Inc. |
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27 // All Rights Reserved. |
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28 // ------------------------------------------- |
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29 // |
| 2 | 30 //####COPYRIGHTEND#### |
| 31 //========================================================================== | |
| 32 //#####DESCRIPTIONBEGIN#### | |
| 33 // | |
| 34 // Author(s): gthomas | |
| 35 // Contributors: gthomas | |
| 36 // Date: 1999-02-20 | |
| 37 // Purpose: HAL board support | |
| 38 // Description: Implementations of HAL board interfaces | |
| 39 // | |
| 40 //####DESCRIPTIONEND#### | |
| 41 // | |
| 42 //===========================================================================*/ | |
| 43 | |
| 44 #include <pkgconf/hal.h> | |
| 45 | |
| 46 #include <cyg/infra/cyg_type.h> // base types | |
| 47 #include <cyg/infra/cyg_trac.h> // tracing macros | |
| 48 #include <cyg/infra/cyg_ass.h> // assertion macros | |
| 49 | |
| 50 #include <cyg/hal/hal_io.h> // IO macros | |
| 51 #include <cyg/hal/hal_arch.h> // Register state info | |
| 52 #include <cyg/hal/hal_diag.h> | |
| 53 #include <cyg/hal/hal_intr.h> // necessary? | |
| 54 | |
| 55 /*------------------------------------------------------------------------*/ | |
| 56 // On-board timer | |
| 57 /*------------------------------------------------------------------------*/ | |
| 58 | |
| 59 // Timer registers | |
| 60 #define CYG_DEVICE_TIMER_BASE 0x0A800020 | |
| 61 #define CYG_DEVICE_TIMER_LOAD \ | |
| 62 ((volatile cyg_uint32 *) (CYG_DEVICE_TIMER_BASE + 0x00)) | |
| 63 // Load value, read/write | |
| 64 #define CYG_DEVICE_TIMER_CURRENT \ | |
| 65 ((volatile cyg_uint32 *) (CYG_DEVICE_TIMER_BASE + 0x04)) | |
| 66 // Current value, read | |
| 67 #define CYG_DEVICE_TIMER_CONTROL \ | |
| 68 ((volatile cyg_uint32 *) (CYG_DEVICE_TIMER_BASE + 0x08)) | |
| 69 // Control register, read/write | |
| 70 #define CYG_DEVICE_TIMER_CLEAR \ | |
| 71 ((volatile cyg_uint32 *) (CYG_DEVICE_TIMER_BASE + 0x0C)) | |
| 72 // Clears interrrupt, write only | |
| 73 | |
| 74 // Clock/timer control register | |
| 75 #define CTL_ENABLE 0x80 // Bit 7: 1 - counter enabled | |
| 76 #define CTL_DISABLE 0x00 // 0 - counter disabled | |
| 77 #define CTL_FREERUN 0x00 // Bit 6: 0 - free running counter | |
| 78 #define CTL_PERIODIC 0x40 // 1 - periodic timer mode | |
| 79 #define CTL_SCALE_1 0x00 // Bits 32: 00 - Scale clock by 1 | |
| 80 #define CTL_SCALE_16 0x04 // 01 - Scale by 16 | |
| 81 #define CTL_SCALE_256 0x08 // 10 - Scale by 256 | |
| 82 // 12.8us/tick | |
| 83 | |
| 84 // Interrupt controller registers | |
| 85 #define CYG_DEVICE_ICTL_BASE 0x0A000000 | |
| 86 #define CYG_DEVICE_IRQ_Status \ | |
| 87 ((volatile cyg_uint32 *) (CYG_DEVICE_ICTL_BASE + 0x00)) | |
| 88 // Current status, read only | |
| 89 #define CYG_DEVICE_IRQ_Enable \ | |
| 90 ((volatile cyg_uint32 *) (CYG_DEVICE_ICTL_BASE + 0x08)) | |
| 91 // Enable status, read only | |
| 92 #define CYG_DEVICE_IRQ_EnableSet \ | |
| 93 ((volatile cyg_uint32 *) (CYG_DEVICE_ICTL_BASE + 0x08)) | |
| 94 // Enable (1's only), write only | |
| 95 #define CYG_DEVICE_IRQ_EnableClear \ | |
| 96 ((volatile cyg_uint32 *) (CYG_DEVICE_ICTL_BASE + 0x0C)) | |
| 97 // Disable (1's only), write only | |
| 98 | |
| 99 static cyg_uint32 _period; | |
| 100 | |
| 101 void hal_clock_initialize(cyg_uint32 period) | |
| 102 { | |
| 103 //diag_init(); diag_printf("%s(%d)\n", __PRETTY_FUNCTION__, period); | |
| 104 //diag_printf("psr = %x\n", psr()); | |
| 105 HAL_WRITE_UINT32(CYG_DEVICE_TIMER_CONTROL, CTL_DISABLE); // Turn off | |
| 106 HAL_WRITE_UINT32(CYG_DEVICE_TIMER_LOAD, period); | |
| 107 HAL_WRITE_UINT32(CYG_DEVICE_TIMER_CONTROL, | |
| 108 CTL_ENABLE | CTL_PERIODIC | CTL_SCALE_16); | |
| 109 _period = period; | |
| 110 } | |
| 111 | |
| 112 void hal_clock_reset(cyg_uint32 vector, cyg_uint32 period) | |
| 113 { | |
| 114 //diag_init(); diag_printf("%s\n", __PRETTY_FUNCTION__); | |
| 115 HAL_WRITE_UINT32(CYG_DEVICE_TIMER_CLEAR, 0); | |
| 116 _period = period; | |
| 117 } | |
| 118 | |
| 119 void hal_clock_read(cyg_uint32 *pvalue) | |
| 120 { | |
| 121 cyg_uint32 value; | |
| 122 // diag_init(); diag_printf("%s\n", __PRETTY_FUNCTION__); | |
| 123 HAL_READ_UINT32(CYG_DEVICE_TIMER_CURRENT, value); | |
| 124 value &= 0xFFFF; | |
| 125 *pvalue = _period - (value & 0xFFFF); // Note: counter is only 16 bits | |
| 126 // and decreases | |
| 127 } | |
| 128 | |
| 129 void hal_hardware_init(void) | |
| 130 { | |
| 131 // Any hardware/platform initialization that needs to be done. | |
| 132 HAL_WRITE_UINT32(CYG_DEVICE_IRQ_EnableClear, 0xFFFF); // Clear all | |
| 133 // interrupt sources | |
| 134 } | |
| 135 | |
| 136 // | |
| 137 // This routine is called to respond to a hardware interrupt (IRQ). It | |
| 138 // should interrogate the hardware and return the IRQ vector number. | |
| 139 | |
| 140 int hal_IRQ_handler(void) | |
| 141 { | |
| 142 // Do hardware-level IRQ handling | |
| 143 int irq_status, vector; | |
| 144 HAL_READ_UINT32(CYG_DEVICE_IRQ_Status, irq_status); | |
| 145 //diag_init(); diag_printf("%s, status: %x\n", __PRETTY_FUNCTION__, irq_status); | |
| 146 for (vector = 1; vector < 16; vector++) { | |
| 147 if (irq_status & (1<<vector)) return vector; | |
| 148 } | |
| 149 return CYGNUM_HAL_INTERRUPT_unused; // This shouldn't happen! | |
| 150 } | |
| 151 | |
| 152 // | |
| 153 // Interrupt control | |
| 154 // | |
| 155 | |
| 156 void hal_interrupt_mask(int vector) | |
| 157 { | |
| 158 //diag_init(); diag_printf("%s(%d)\n", __PRETTY_FUNCTION__, vector); | |
| 159 HAL_WRITE_UINT32(CYG_DEVICE_IRQ_EnableClear, 1<<vector); | |
| 160 } | |
| 161 | |
| 162 #if 0 | |
| 163 void hal_interrupt_status(void) | |
| 164 { | |
| 165 int irq_status, irq_enable, timer_status, timer_value, timer_load; | |
| 166 HAL_READ_UINT32(CYG_DEVICE_IRQ_Status, irq_status); | |
| 167 HAL_READ_UINT32(CYG_DEVICE_IRQ_Enable, irq_enable); | |
| 168 HAL_READ_UINT32(CYG_DEVICE_TIMER_LOAD, timer_load); | |
| 169 HAL_READ_UINT32(CYG_DEVICE_TIMER_CURRENT, timer_value); | |
| 170 HAL_READ_UINT32(CYG_DEVICE_TIMER_CONTROL, timer_status); | |
| 171 diag_printf("Interrupt: IRQ: %x.%x, TIMER: %x.%x.%x, psr: %x\n", | |
| 172 irq_status, irq_enable, timer_status, timer_value, | |
| 173 timer_load, psr()); | |
| 174 } | |
| 175 #endif | |
| 176 | |
| 177 void hal_interrupt_unmask(int vector) | |
| 178 { | |
| 179 //diag_init(); diag_printf("%s(%d)\n", __PRETTY_FUNCTION__, vector); | |
| 180 HAL_WRITE_UINT32(CYG_DEVICE_IRQ_EnableSet, 1<<vector); | |
| 181 } | |
| 182 | |
| 183 void hal_interrupt_acknowledge(int vector) | |
| 184 { | |
| 185 //diag_init(); diag_printf("%s(%d)\n", __PRETTY_FUNCTION__, vector); | |
| 186 } | |
| 187 | |
| 188 void hal_interrupt_configure(int vector, int level, int up) | |
| 189 { | |
| 190 //diag_init(); diag_printf("%s(%d,%d,%d)\n", __PRETTY_FUNCTION__, vector, level, up); | |
| 191 } | |
| 192 | |
| 193 void hal_interrupt_set_level(int vector, int level) | |
| 194 { | |
| 195 //diag_init(); diag_printf("%s(%d,%d)\n", __PRETTY_FUNCTION__, vector, level); | |
| 196 } | |
| 197 | |
| 198 void hal_show_IRQ(int vector, int data, int handler) | |
| 199 { | |
| 200 // diag_printf("IRQ - vector: %x, data: %x, handler: %x\n", vector, data, handler); | |
| 201 } | |
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202 |
| 2 | 203 /*---------------------------------------------------------------------------*/ |
| 204 /* End of hal_misc.c */ |
