Mercurial > flash_v2
annotate packages/hal/arm/pid/current/include/hal_cache.h @ 210:d2c90368aeef
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| author | jlarmour |
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| date | Thu, 23 May 2002 22:59:51 +0000 |
| parents | e0c0827131d1 |
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| rev | line source |
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| 2 | 1 #ifndef CYGONCE_HAL_CACHE_H |
| 2 #define CYGONCE_HAL_CACHE_H | |
| 3 | |
| 4 //============================================================================= | |
| 5 // | |
| 6 // hal_cache.h | |
| 7 // | |
| 8 // HAL cache control API | |
| 9 // | |
| 10 //============================================================================= | |
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11 //####ECOSGPLCOPYRIGHTBEGIN#### |
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12 // ------------------------------------------- |
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13 // This file is part of eCos, the Embedded Configurable Operating System. |
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14 // Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. |
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15 // |
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16 // eCos is free software; you can redistribute it and/or modify it under |
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17 // the terms of the GNU General Public License as published by the Free |
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18 // Software Foundation; either version 2 or (at your option) any later version. |
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19 // |
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20 // eCos is distributed in the hope that it will be useful, but WITHOUT ANY |
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21 // WARRANTY; without even the implied warranty of MERCHANTABILITY or |
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22 // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
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23 // for more details. |
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24 // |
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25 // You should have received a copy of the GNU General Public License along |
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26 // with eCos; if not, write to the Free Software Foundation, Inc., |
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27 // 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. |
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28 // |
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29 // As a special exception, if other files instantiate templates or use macros |
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30 // or inline functions from this file, or you compile this file and link it |
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31 // with other works to produce a work based on this file, this file does not |
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32 // by itself cause the resulting work to be covered by the GNU General Public |
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33 // License. However the source code for this file must still be made available |
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34 // in accordance with section (3) of the GNU General Public License. |
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35 // |
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36 // This exception does not invalidate any other reasons why a work based on |
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37 // this file might be covered by the GNU General Public License. |
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38 // |
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39 // Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. |
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40 // at http://sources.redhat.com/ecos/ecos-license/ |
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41 // ------------------------------------------- |
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42 //####ECOSGPLCOPYRIGHTEND#### |
| 2 | 43 //============================================================================= |
| 44 //#####DESCRIPTIONBEGIN#### | |
| 45 // | |
| 46 // Author(s): nickg, gthomas | |
| 47 // Contributors: nickg, gthomas | |
| 48 // Date: 1998-09-28 | |
| 49 // Purpose: Cache control API | |
| 50 // Description: The macros defined here provide the HAL APIs for handling | |
| 51 // cache control operations. | |
| 52 // Usage: | |
| 53 // #include <cyg/hal/hal_cache.h> | |
| 54 // ... | |
| 55 // | |
| 56 // | |
| 57 //####DESCRIPTIONEND#### | |
| 58 // | |
| 59 //============================================================================= | |
| 60 | |
| 61 #include <cyg/infra/cyg_type.h> | |
| 62 | |
| 63 //----------------------------------------------------------------------------- | |
| 64 // Cache dimensions | |
| 65 | |
| 66 // Data cache | |
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67 //#define HAL_DCACHE_SIZE 0 // Size of data cache in bytes |
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68 //#define HAL_DCACHE_LINE_SIZE 0 // Size of a data cache line |
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69 //#define HAL_DCACHE_WAYS 0 // Associativity of the cache |
| 2 | 70 |
| 71 // Instruction cache | |
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72 //#define HAL_ICACHE_SIZE 0 // Size of cache in bytes |
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73 //#define HAL_ICACHE_LINE_SIZE 0 // Size of a cache line |
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74 //#define HAL_ICACHE_WAYS 0 // Associativity of the cache |
| 2 | 75 |
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76 //#define HAL_DCACHE_SETS (HAL_DCACHE_SIZE/(HAL_DCACHE_LINE_SIZE*HAL_DCACHE_WAYS)) |
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77 //#define HAL_ICACHE_SETS (HAL_ICACHE_SIZE/(HAL_ICACHE_LINE_SIZE*HAL_ICACHE_WAYS)) |
| 2 | 78 |
| 79 //----------------------------------------------------------------------------- | |
| 80 // Global control of data cache | |
| 81 | |
| 82 // Enable the data cache | |
| 83 #define HAL_DCACHE_ENABLE() | |
| 84 | |
| 85 // Disable the data cache | |
| 86 #define HAL_DCACHE_DISABLE() | |
| 87 | |
| 88 // Invalidate the entire cache | |
| 89 #define HAL_DCACHE_INVALIDATE_ALL() | |
| 90 | |
| 91 // Synchronize the contents of the cache with memory. | |
| 92 #define HAL_DCACHE_SYNC() | |
| 93 | |
| 94 // Purge contents of data cache | |
| 95 #define HAL_DCACHE_PURGE_ALL() | |
| 96 | |
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97 // Query the state of the data cache (does not affect the caching) |
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98 #define HAL_DCACHE_IS_ENABLED(_state_) \ |
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99 CYG_MACRO_START \ |
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100 (_state_) = 0; \ |
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101 CYG_MACRO_END |
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102 |
| 2 | 103 // Set the data cache refill burst size |
| 104 //#define HAL_DCACHE_BURST_SIZE(_size_) | |
| 105 | |
| 106 // Set the data cache write mode | |
| 107 //#define HAL_DCACHE_WRITE_MODE( _mode_ ) | |
| 108 | |
| 109 //#define HAL_DCACHE_WRITETHRU_MODE 0 | |
| 110 //#define HAL_DCACHE_WRITEBACK_MODE 1 | |
| 111 | |
| 112 // Load the contents of the given address range into the data cache | |
| 113 // and then lock the cache so that it stays there. | |
| 114 //#define HAL_DCACHE_LOCK(_base_, _size_) | |
| 115 | |
| 116 // Undo a previous lock operation | |
| 117 //#define HAL_DCACHE_UNLOCK(_base_, _size_) | |
| 118 | |
| 119 // Unlock entire cache | |
| 120 //#define HAL_DCACHE_UNLOCK_ALL() | |
| 121 | |
| 122 //----------------------------------------------------------------------------- | |
| 123 // Data cache line control | |
| 124 | |
| 125 // Allocate cache lines for the given address range without reading its | |
| 126 // contents from memory. | |
| 127 //#define HAL_DCACHE_ALLOCATE( _base_ , _size_ ) | |
| 128 | |
| 129 // Write dirty cache lines to memory and invalidate the cache entries | |
| 130 // for the given address range. | |
| 131 //#define HAL_DCACHE_FLUSH( _base_ , _size_ ) | |
| 132 | |
| 133 // Invalidate cache lines in the given range without writing to memory. | |
| 134 //#define HAL_DCACHE_INVALIDATE( _base_ , _size_ ) | |
| 135 | |
| 136 // Write dirty cache lines to memory for the given address range. | |
| 137 //#define HAL_DCACHE_STORE( _base_ , _size_ ) | |
| 138 | |
| 139 // Preread the given range into the cache with the intention of reading | |
| 140 // from it later. | |
| 141 //#define HAL_DCACHE_READ_HINT( _base_ , _size_ ) | |
| 142 | |
| 143 // Preread the given range into the cache with the intention of writing | |
| 144 // to it later. | |
| 145 //#define HAL_DCACHE_WRITE_HINT( _base_ , _size_ ) | |
| 146 | |
| 147 // Allocate and zero the cache lines associated with the given range. | |
| 148 //#define HAL_DCACHE_ZERO( _base_ , _size_ ) | |
| 149 | |
| 150 //----------------------------------------------------------------------------- | |
| 151 // Global control of Instruction cache | |
| 152 | |
| 153 // Enable the instruction cache | |
| 154 #define HAL_ICACHE_ENABLE() | |
| 155 | |
| 156 // Disable the instruction cache | |
| 157 #define HAL_ICACHE_DISABLE() | |
| 158 | |
| 159 // Invalidate the entire cache | |
| 160 #define HAL_ICACHE_INVALIDATE_ALL() | |
| 161 | |
| 162 // Synchronize the contents of the cache with memory. | |
| 163 #define HAL_ICACHE_SYNC() | |
| 164 | |
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165 // Query the state of the instruction cache (does not affect the caching) |
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166 #define HAL_ICACHE_IS_ENABLED(_state_) \ |
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167 CYG_MACRO_START \ |
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168 (_state_) = 0; \ |
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169 CYG_MACRO_END |
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170 |
| 2 | 171 // Set the instruction cache refill burst size |
| 172 //#define HAL_ICACHE_BURST_SIZE(_size_) | |
| 173 | |
| 174 // Load the contents of the given address range into the instruction cache | |
| 175 // and then lock the cache so that it stays there. | |
| 176 //#define HAL_ICACHE_LOCK(_base_, _size_) | |
| 177 | |
| 178 // Undo a previous lock operation | |
| 179 //#define HAL_ICACHE_UNLOCK(_base_, _size_) | |
| 180 | |
| 181 // Unlock entire cache | |
| 182 //#define HAL_ICACHE_UNLOCK_ALL() | |
| 183 | |
| 184 //----------------------------------------------------------------------------- | |
| 185 // Instruction cache line control | |
| 186 | |
| 187 // Invalidate cache lines in the given range without writing to memory. | |
| 188 //#define HAL_ICACHE_INVALIDATE( _base_ , _size_ ) | |
| 189 | |
| 190 //----------------------------------------------------------------------------- | |
| 191 #endif // ifndef CYGONCE_HAL_CACHE_H | |
| 192 // End of hal_cache.h |
