Mercurial > flash_v2
annotate packages/hal/common/current/src/hal_stub.c @ 10:d3fbcdfa1b2f ecos-sw-1999-05-29
Merge from eCos master repository on 1999-05-29-00:13:11-BST
| author | jlarmour |
|---|---|
| date | Fri, 28 May 1999 16:43:09 +0000 |
| parents | ece80412419a |
| children | 4cc3eff958ab |
| rev | line source |
|---|---|
| 2 | 1 //============================================================================= |
| 2 // | |
| 3 // hal_stub.c | |
| 4 // | |
| 5 // Helper functions for stub, specific to eCos HAL | |
| 6 // | |
| 7 //============================================================================= | |
| 8 //####COPYRIGHTBEGIN#### | |
| 9 // | |
| 10 // ------------------------------------------- | |
| 11 // The contents of this file are subject to the Cygnus eCos Public License | |
| 12 // Version 1.0 (the "License"); you may not use this file except in | |
| 13 // compliance with the License. You may obtain a copy of the License at | |
| 14 // http://sourceware.cygnus.com/ecos | |
| 15 // | |
| 16 // Software distributed under the License is distributed on an "AS IS" | |
| 17 // basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the | |
| 18 // License for the specific language governing rights and limitations under | |
| 19 // the License. | |
| 20 // | |
| 21 // The Original Code is eCos - Embedded Cygnus Operating System, released | |
| 22 // September 30, 1998. | |
| 23 // | |
| 24 // The Initial Developer of the Original Code is Cygnus. Portions created | |
| 25 // by Cygnus are Copyright (C) 1998, 1999 Cygnus Solutions. | |
| 26 // All Rights Reserved. | |
| 27 // ------------------------------------------- | |
| 28 // | |
| 29 //####COPYRIGHTEND#### | |
| 30 //============================================================================= | |
| 31 //#####DESCRIPTIONBEGIN#### | |
| 32 // | |
| 33 // Author(s): jskov (based on powerpc/cogent hal_stub.c) | |
| 34 // Contributors:jskov | |
| 35 // Date: 1999-02-12 | |
| 36 // Purpose: Helper functions for stub, specific to eCos HAL | |
| 37 // Description: Parts of the GDB stub requirements are provided by | |
| 38 // the eCos HAL, rather than target and/or board specific | |
| 39 // code. | |
| 40 // | |
| 41 //####DESCRIPTIONEND#### | |
| 42 // | |
| 43 //============================================================================= | |
| 44 | |
| 45 #include <pkgconf/hal.h> | |
| 46 | |
| 47 #ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS | |
| 48 | |
| 49 #include <cyg/hal/hal_stub.h> // Our header | |
| 50 | |
| 51 #include <cyg/hal/hal_arch.h> // HAL_BREAKINST | |
| 52 #include <cyg/hal/hal_cache.h> // HAL_xCACHE_x | |
| 53 #include <cyg/hal/hal_intr.h> // interrupt disable/restore | |
| 54 | |
| 55 #ifdef CYGDBG_HAL_DEBUG_GDB_THREAD_SUPPORT | |
| 56 #include <cyg/hal/dbg-threads-api.h> // dbg_currthread_id | |
| 57 #endif | |
| 58 | |
| 59 | |
| 60 //----------------------------------------------------------------------------- | |
| 61 // Extra eCos data. | |
| 62 | |
| 63 // Saved registers. | |
| 64 HAL_SavedRegisters *_hal_registers; | |
| 65 target_register_t * _registers; // Pointer to current set of registers | |
| 66 target_register_t registers[NUMREGS]; | |
| 67 target_register_t alt_registers[NUMREGS] ; // Thread or saved process state | |
| 68 | |
| 69 // Interrupt control. | |
| 70 static volatile __PFI __interruptible_control; | |
| 71 | |
| 72 //----------------------------------------------------------------------------- | |
| 73 // Register access | |
| 74 | |
| 75 // Return the currently-saved value corresponding to register REG of | |
| 76 // the exception context. | |
| 77 target_register_t | |
| 78 get_register (regnames_t reg) | |
| 79 { | |
| 80 return _registers[reg]; | |
| 81 } | |
| 82 | |
| 83 // Store VALUE in the register corresponding to WHICH in the exception | |
| 84 // context. | |
| 85 void | |
| 86 put_register (regnames_t which, target_register_t value) | |
| 87 { | |
| 88 _registers[which] = value; | |
| 89 } | |
| 90 | |
| 91 //----------------------------------------------------------------------------- | |
| 92 // Serial stuff | |
| 93 | |
| 94 // Write C to the current serial port. | |
| 95 void | |
| 96 putDebugChar (int c) | |
| 97 { | |
| 98 HAL_STUB_PLATFORM_PUT_CHAR(c); | |
| 99 } | |
| 100 | |
| 101 // Read one character from the current serial port. | |
| 102 int | |
| 103 getDebugChar (void) | |
| 104 { | |
| 105 return HAL_STUB_PLATFORM_GET_CHAR(); | |
| 106 } | |
| 107 | |
| 108 // Set the baud rate for the current serial port. | |
| 109 void | |
| 110 __set_baud_rate (int baud) | |
| 111 { | |
| 112 HAL_STUB_PLATFORM_SET_BAUD_RATE(baud); | |
| 113 } | |
| 114 | |
| 115 //----------------------------------------------------------------------------- | |
| 116 // GDB interrupt (BREAK) support. | |
| 117 | |
| 118 #ifdef CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT | |
| 119 | |
| 120 typedef unsigned long t_inst; | |
| 121 | |
| 122 typedef struct | |
| 123 { | |
| 124 t_inst *targetAddr; | |
| 125 t_inst savedInstr; | |
| 126 } instrBuffer; | |
| 127 | |
| 128 static instrBuffer break_buffer; | |
| 129 | |
| 130 void | |
| 131 cyg_hal_gdb_interrupt (target_register_t pc) | |
| 132 { | |
| 133 if (NULL == break_buffer.targetAddr) { | |
| 134 break_buffer.targetAddr = (t_inst*) pc; | |
| 135 break_buffer.savedInstr = *(t_inst*)pc; | |
| 136 *(t_inst*)pc = (t_inst)HAL_BREAKINST; | |
| 137 | |
| 138 __data_cache(CACHE_FLUSH); | |
| 139 __instruction_cache(CACHE_FLUSH); | |
| 140 } | |
| 141 } | |
| 142 | |
| 143 int | |
| 144 cyg_hal_gdb_remove_break (target_register_t pc) | |
| 145 { | |
| 146 if ((t_inst*)pc == break_buffer.targetAddr) { | |
| 147 *(t_inst*)pc = break_buffer.savedInstr; | |
| 148 break_buffer.targetAddr = NULL; | |
| 149 | |
| 150 __data_cache(CACHE_FLUSH); | |
| 151 __instruction_cache(CACHE_FLUSH); | |
| 152 return 1; | |
| 153 } | |
| 154 return 0; | |
| 155 } | |
| 156 | |
| 157 #endif // CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT | |
| 158 | |
| 159 // Use this function to disable serial interrupts whenever reply | |
| 160 // characters are expected from GDB. The reason we want to control | |
| 161 // whether the target can be interrupted or not is simply that GDB on | |
| 162 // the host will be sending acknowledge characters/commands while the | |
| 163 // stub is running - if serial interrupts were still active, the | |
| 164 // characters would never reach the (polling) getDebugChar. | |
| 165 static void | |
| 166 interruptible(int state) | |
| 167 { | |
| 168 static int __interrupts_suspended = 0; | |
| 169 | |
| 170 if (__interruptible_control) { | |
| 171 if (state) { | |
| 172 __interrupts_suspended--; | |
| 173 if (0 >= __interrupts_suspended) { | |
| 174 __interrupts_suspended = 0; | |
| 175 __interruptible_control(1); | |
| 176 } | |
| 177 } else { | |
| 178 __interrupts_suspended++; | |
| 179 if (1 == __interrupts_suspended) | |
| 180 __interruptible_control(0); | |
| 181 } | |
| 182 } | |
| 183 } | |
| 184 | |
| 185 //----------------------------------------------------------------------------- | |
| 186 // eCos stub entry and exit magic. | |
| 187 | |
| 188 #ifdef CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT | |
| 189 int cyg_hal_gdb_break; | |
| 190 #endif | |
| 191 | |
| 192 // Called at stub *entry* | |
| 193 static void | |
| 194 handle_exception_cleanup( void ) | |
| 195 { | |
| 196 interruptible(0); | |
| 197 | |
| 198 // Expand the HAL_SavedRegisters structure into the GDB register | |
| 199 // array format. | |
| 200 HAL_GET_GDB_REGISTERS(®isters[0], _hal_registers); | |
| 201 _registers = ®isters[0]; | |
| 202 | |
|
8
ece80412419a
Merge from eCos master repository on 1999-05-21-22:05:54-BST
jlarmour
parents:
6
diff
changeset
|
203 #ifdef HAL_STUB_PLATFORM_STUBS_FIXUP |
|
ece80412419a
Merge from eCos master repository on 1999-05-21-22:05:54-BST
jlarmour
parents:
6
diff
changeset
|
204 // Some architectures may need to fix the PC in case of a partial |
|
ece80412419a
Merge from eCos master repository on 1999-05-21-22:05:54-BST
jlarmour
parents:
6
diff
changeset
|
205 // or fully executed trap instruction. GDB only takes correct action |
|
ece80412419a
Merge from eCos master repository on 1999-05-21-22:05:54-BST
jlarmour
parents:
6
diff
changeset
|
206 // when the PC is pointing to the breakpoint instruction it set. |
|
ece80412419a
Merge from eCos master repository on 1999-05-21-22:05:54-BST
jlarmour
parents:
6
diff
changeset
|
207 // |
|
ece80412419a
Merge from eCos master repository on 1999-05-21-22:05:54-BST
jlarmour
parents:
6
diff
changeset
|
208 // Most architectures would leave PC pointing at the trap |
|
ece80412419a
Merge from eCos master repository on 1999-05-21-22:05:54-BST
jlarmour
parents:
6
diff
changeset
|
209 // instruction itself though, and so do not need to do anything |
|
ece80412419a
Merge from eCos master repository on 1999-05-21-22:05:54-BST
jlarmour
parents:
6
diff
changeset
|
210 // special. |
|
ece80412419a
Merge from eCos master repository on 1999-05-21-22:05:54-BST
jlarmour
parents:
6
diff
changeset
|
211 HAL_STUB_PLATFORM_STUBS_FIXUP(); |
|
ece80412419a
Merge from eCos master repository on 1999-05-21-22:05:54-BST
jlarmour
parents:
6
diff
changeset
|
212 #endif |
|
ece80412419a
Merge from eCos master repository on 1999-05-21-22:05:54-BST
jlarmour
parents:
6
diff
changeset
|
213 |
| 2 | 214 #ifdef CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT |
| 215 // FIXME: (there may be a better way to do this) | |
| 216 // If we hit a breakpoint set by the gdb interrupt stub, make it | |
| 217 // seem like an interrupt rather than having hit a breakpoint. | |
| 218 if (cyg_hal_gdb_remove_break(get_register (PC))) | |
| 219 cyg_hal_gdb_break = 1; | |
| 220 else | |
| 221 cyg_hal_gdb_break = 0; | |
| 222 #endif | |
| 223 } | |
| 224 | |
| 225 // Called at stub *exit* | |
| 226 static void | |
| 227 handle_exception_init( void ) | |
| 228 { | |
| 229 // Compact register array again. | |
| 230 HAL_SET_GDB_REGISTERS(_hal_registers, ®isters[0]); | |
| 231 | |
| 232 interruptible(1); | |
| 233 } | |
| 234 | |
| 235 | |
| 236 //----------------------------------------------------------------------------- | |
| 237 // Initialization. | |
| 238 | |
| 239 // Signal handler. | |
| 240 int | |
| 241 cyg_hal_process_signal (int signal) | |
| 242 { | |
| 243 // We don't care about the signal (atm). | |
| 244 return 0; | |
| 245 } | |
| 246 | |
| 247 // Install the standard set of trap handlers for the stub. | |
| 248 void | |
| 249 __install_traps (void) | |
| 250 { | |
| 251 // Set signal handling vector so we can treat 'C<signum>' as 'c'. | |
| 252 __process_signal_vec = &cyg_hal_process_signal; | |
|
8
ece80412419a
Merge from eCos master repository on 1999-05-21-22:05:54-BST
jlarmour
parents:
6
diff
changeset
|
253 // Set exit vector to reset vector. This will allow automatic reset on |
|
ece80412419a
Merge from eCos master repository on 1999-05-21-22:05:54-BST
jlarmour
parents:
6
diff
changeset
|
254 // some platforms. |
|
ece80412419a
Merge from eCos master repository on 1999-05-21-22:05:54-BST
jlarmour
parents:
6
diff
changeset
|
255 __process_exit_vec = &__reset; |
| 2 | 256 |
| 257 __cleanup_vec = &handle_exception_cleanup; | |
| 258 __init_vec = &handle_exception_init; | |
| 259 | |
| 260 #ifdef CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT | |
| 261 // Control of GDB interrupts. | |
| 262 __interruptible_control = HAL_STUB_PLATFORM_INTERRUPTIBLE; | |
| 263 #endif | |
| 264 | |
| 265 // Nothing further to do, handle_exception will be called when an | |
| 266 // exception occurs. | |
| 267 } | |
| 268 | |
| 269 // Initialize the hardware. | |
| 270 void | |
| 271 initHardware (void) | |
| 272 { | |
| 273 static int initialized = 0; | |
| 274 | |
| 275 if (!initialized) { | |
| 276 initialized = 1; | |
| 277 | |
|
10
d3fbcdfa1b2f
Merge from eCos master repository on 1999-05-29-00:13:11-BST
jlarmour
parents:
8
diff
changeset
|
278 #ifdef HAL_STUB_PLATFORM_INIT |
|
d3fbcdfa1b2f
Merge from eCos master repository on 1999-05-29-00:13:11-BST
jlarmour
parents:
8
diff
changeset
|
279 // If the platform defines any initialization code, call it here. |
|
d3fbcdfa1b2f
Merge from eCos master repository on 1999-05-29-00:13:11-BST
jlarmour
parents:
8
diff
changeset
|
280 HAL_STUB_PLATFORM_INIT(); |
|
d3fbcdfa1b2f
Merge from eCos master repository on 1999-05-29-00:13:11-BST
jlarmour
parents:
8
diff
changeset
|
281 #endif |
|
d3fbcdfa1b2f
Merge from eCos master repository on 1999-05-29-00:13:11-BST
jlarmour
parents:
8
diff
changeset
|
282 |
| 2 | 283 // Get serial port initialized. |
| 284 HAL_STUB_PLATFORM_INIT_SERIAL(); | |
| 285 | |
| 286 #ifdef CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT | |
| 287 // Get interrupt handler initialized. | |
| 288 HAL_STUB_PLATFORM_INIT_BREAK_IRQ(); | |
| 289 #endif | |
| 290 | |
| 291 #ifdef CYG_HAL_STARTUP_STUBS | |
| 292 // There may be extra initialization required when configured | |
| 293 // for stubs startup. | |
| 294 HAL_STUB_PLATFORM_STUBS_INIT(); | |
| 295 #endif | |
| 296 } | |
| 297 } | |
| 298 | |
| 299 // Reset the board. | |
| 300 void | |
| 301 __reset (void) | |
| 302 { | |
| 303 HAL_STUB_PLATFORM_RESET(); | |
| 304 } | |
| 305 | |
| 306 //----------------------------------------------------------------------------- | |
| 307 // Breakpoint support. | |
| 308 | |
| 309 #ifndef CYGPKG_HAL_ARM | |
| 310 // This function will generate a breakpoint exception. It is used at | |
| 311 // the beginning of a program to sync up with a debugger and can be | |
| 312 // used otherwise as a quick means to stop program execution and | |
| 313 // "break" into the debugger. | |
| 314 void | |
| 315 breakpoint() | |
| 316 { | |
| 317 HAL_BREAKPOINT(_breakinst); | |
| 318 } | |
| 319 | |
| 320 // This function returns the opcode for a 'trap' instruction. | |
| 321 unsigned long | |
| 322 __break_opcode () | |
| 323 { | |
| 324 return HAL_BREAKINST; | |
| 325 } | |
| 326 #endif | |
| 327 | |
| 328 // FIXME: Add support for multiple breakpoints (libstub/bplist-dynamic.c) | |
| 329 int __set_breakpoint (target_register_t addr) { return 0; } | |
| 330 int __remove_breakpoint (target_register_t addr) { return 0; } | |
| 331 | |
| 332 //----------------------------------------------------------------------------- | |
| 333 // Write the 'T' packet in BUFFER. SIGVAL is the signal the program received. | |
| 334 void | |
| 335 __build_t_packet (int sigval, char *buf) | |
| 336 { | |
| 337 target_register_t addr; | |
| 338 char *ptr = buf; | |
|
6
d376b777e2ce
Merge from eCos master repository on 1999-05-14-19:27:43-BST
jlarmour
parents:
2
diff
changeset
|
339 target_register_t sp; |
| 2 | 340 |
|
6
d376b777e2ce
Merge from eCos master repository on 1999-05-14-19:27:43-BST
jlarmour
parents:
2
diff
changeset
|
341 sp = (target_register_t) get_register (SP); |
| 2 | 342 |
| 343 *ptr++ = 'T'; | |
| 344 *ptr++ = __tohex (sigval >> 4); | |
| 345 *ptr++ = __tohex (sigval); | |
| 346 | |
| 347 #ifdef CYGDBG_HAL_DEBUG_GDB_THREAD_SUPPORT | |
| 348 // Include thread ID if thread manipulation is required. | |
| 349 { | |
| 350 int id; | |
| 351 | |
| 352 *ptr++ = 't'; | |
| 353 *ptr++ = 'h'; | |
| 354 *ptr++ = 'r'; | |
| 355 *ptr++ = 'e'; | |
| 356 *ptr++ = 'a'; | |
| 357 *ptr++ = 'd'; | |
| 358 *ptr++ = ':'; | |
| 359 | |
| 360 #if (CYG_BYTEORDER == CYG_MSBFIRST) | |
| 361 id = dbg_currthread_id (); | |
| 362 #else | |
| 363 // FIXME: Temporary workaround for PR 18903. Thread ID must be | |
| 364 // big-endian in the T packet. | |
| 365 { | |
| 366 unsigned char* bep = (unsigned char*)&id; | |
| 367 int be_id; | |
| 368 | |
| 369 be_id = dbg_currthread_id (); | |
| 370 *bep++ = (be_id >> 24) & 0xff ; | |
| 371 *bep++ = (be_id >> 16) & 0xff ; | |
| 372 *bep++ = (be_id >> 8) & 0xff ; | |
| 373 *bep++ = (be_id & 0xff) ; | |
| 374 } | |
| 375 #endif | |
| 376 ptr = __mem2hex((char *)&id, ptr, sizeof(id), 0); | |
| 377 *ptr++ = ';'; | |
| 378 } | |
| 379 #endif | |
| 380 | |
| 381 *ptr++ = __tohex (PC >> 4); | |
| 382 *ptr++ = __tohex (PC); | |
| 383 *ptr++ = ':'; | |
| 384 addr = get_register (PC); | |
| 385 ptr = __mem2hex((char *)&addr, ptr, sizeof(addr), 0); | |
| 386 *ptr++ = ';'; | |
| 387 | |
| 388 *ptr++ = __tohex (SP >> 4); | |
| 389 *ptr++ = __tohex (SP); | |
| 390 *ptr++ = ':'; | |
| 391 ptr = __mem2hex((char *)&sp, ptr, sizeof(sp), 0); | |
| 392 *ptr++ = ';'; | |
| 393 | |
| 394 *ptr++ = 0; | |
| 395 } | |
| 396 | |
| 397 | |
| 398 //----------------------------------------------------------------------------- | |
| 399 // Cache functions. | |
| 400 | |
| 401 // Perform the specified operation on the instruction cache. | |
| 402 // Returns 1 if the cache is enabled, 0 otherwise. | |
| 403 int | |
| 404 __instruction_cache (cache_control_t request) | |
| 405 { | |
| 406 int state = 1; | |
| 407 | |
| 408 switch (request) { | |
| 409 case CACHE_ENABLE: | |
| 410 HAL_ICACHE_ENABLE(); | |
| 411 break; | |
| 412 case CACHE_DISABLE: | |
| 413 HAL_ICACHE_DISABLE(); | |
| 414 state = 0; | |
| 415 break; | |
| 416 case CACHE_FLUSH: | |
| 417 HAL_ICACHE_SYNC(); | |
|
10
d3fbcdfa1b2f
Merge from eCos master repository on 1999-05-29-00:13:11-BST
jlarmour
parents:
8
diff
changeset
|
418 #ifndef CYGPKG_HAL_MIPS |
|
d3fbcdfa1b2f
Merge from eCos master repository on 1999-05-29-00:13:11-BST
jlarmour
parents:
8
diff
changeset
|
419 // SYNC and INVALIDATE_ALL are the same on the MIPS, |
|
d3fbcdfa1b2f
Merge from eCos master repository on 1999-05-29-00:13:11-BST
jlarmour
parents:
8
diff
changeset
|
420 // so avoid doing it twice. |
| 2 | 421 HAL_ICACHE_INVALIDATE_ALL(); |
|
10
d3fbcdfa1b2f
Merge from eCos master repository on 1999-05-29-00:13:11-BST
jlarmour
parents:
8
diff
changeset
|
422 #endif |
| 2 | 423 break; |
| 424 case CACHE_NOOP: | |
| 425 /* fall through */ | |
| 426 default: | |
| 427 break; | |
| 428 } | |
| 429 | |
| 430 #ifdef HAL_ICACHE_IS_ENABLED | |
| 431 HAL_ICACHE_IS_ENABLED(state); | |
| 432 #endif | |
| 433 | |
| 434 return state; | |
| 435 } | |
| 436 | |
| 437 // Perform the specified operation on the data cache. | |
| 438 // Returns 1 if the cache is enabled, 0 otherwise. | |
| 439 int | |
| 440 __data_cache (cache_control_t request) | |
| 441 { | |
| 442 int state = 1; | |
| 443 | |
| 444 switch (request) { | |
| 445 case CACHE_ENABLE: | |
| 446 HAL_DCACHE_ENABLE(); | |
| 447 break; | |
| 448 case CACHE_DISABLE: | |
| 449 HAL_DCACHE_DISABLE(); | |
| 450 state = 0; | |
| 451 break; | |
| 452 case CACHE_FLUSH: | |
| 453 HAL_DCACHE_SYNC(); | |
|
10
d3fbcdfa1b2f
Merge from eCos master repository on 1999-05-29-00:13:11-BST
jlarmour
parents:
8
diff
changeset
|
454 #ifndef CYGPKG_HAL_MIPS |
|
d3fbcdfa1b2f
Merge from eCos master repository on 1999-05-29-00:13:11-BST
jlarmour
parents:
8
diff
changeset
|
455 // SYNC and INVALIDATE_ALL are the same on the MIPS, |
|
d3fbcdfa1b2f
Merge from eCos master repository on 1999-05-29-00:13:11-BST
jlarmour
parents:
8
diff
changeset
|
456 // so avoid doing it twice. |
| 2 | 457 HAL_DCACHE_INVALIDATE_ALL(); |
|
10
d3fbcdfa1b2f
Merge from eCos master repository on 1999-05-29-00:13:11-BST
jlarmour
parents:
8
diff
changeset
|
458 #endif |
| 2 | 459 break; |
| 460 case CACHE_NOOP: | |
| 461 /* fall through */ | |
| 462 default: | |
| 463 break; | |
| 464 } | |
| 465 #ifdef HAL_DCACHE_IS_ENABLED | |
| 466 HAL_DCACHE_IS_ENABLED(state); | |
| 467 #endif | |
| 468 | |
| 469 return state; | |
| 470 } | |
| 471 | |
| 472 //----------------------------------------------------------------------------- | |
| 473 // Memory accessor functions. | |
| 474 | |
| 475 void *__mem_fault_handler = (void *)0; | |
| 476 | |
| 477 /* These are the "arguments" to __do_read_mem and __do_write_mem, | |
| 478 which are passed as globals to avoid squeezing them thru | |
| 479 __set_mem_fault_trap. */ | |
| 480 | |
| 481 static volatile target_register_t memCount; | |
| 482 | |
| 483 static void | |
| 484 __do_copy_mem (unsigned char* src, unsigned char* dst) | |
| 485 { | |
| 486 __mem_fault = 1; // Defaults to 'fail'. Is cleared | |
| 487 // when the copy loop completes. | |
| 488 __mem_fault_handler = &&err; | |
| 489 | |
| 490 while (memCount) | |
| 491 { | |
| 492 *dst++ = *src++; | |
| 493 memCount--; | |
| 494 } | |
| 495 | |
| 496 __mem_fault = 0; | |
| 497 | |
| 498 err: | |
| 499 __mem_fault_handler = (void *)0; | |
| 500 } | |
| 501 | |
| 502 /* | |
| 503 * __read_mem_safe: | |
| 504 * Get contents of target memory, abort on error. | |
| 505 */ | |
| 506 | |
| 507 int | |
| 508 __read_mem_safe (unsigned char *dst, target_register_t src, int count) | |
| 509 { | |
| 510 memCount = count; | |
| 511 __do_copy_mem((unsigned char*) src, (unsigned char*) dst); | |
| 512 return count - memCount; // return number of bytes successfully read | |
| 513 } | |
| 514 | |
| 515 /* | |
| 516 * __write_mem_safe: | |
| 517 * Set contents of target memory, abort on error. | |
| 518 */ | |
| 519 | |
| 520 int | |
| 521 __write_mem_safe (unsigned char *src, target_register_t dst, int count) | |
| 522 { | |
| 523 memCount = count; | |
| 524 __do_copy_mem((unsigned char*) src, (unsigned char*) dst); | |
| 525 return count - memCount; // return number of bytes successfully written | |
| 526 } | |
| 527 | |
| 528 //----------------------------------------------------------------------------- | |
| 529 // Target extras?! | |
| 530 int | |
| 531 __process_target_query(char * pkt, char * out, int maxOut) | |
| 532 { return 0 ; } | |
| 533 int | |
| 534 __process_target_set(char * pkt, char * out, int maxout) | |
| 535 { return 0 ; } | |
| 536 int | |
| 537 __process_target_packet(char * pkt, char * out, int maxout) | |
| 538 { return 0 ; } | |
| 539 | |
| 540 // GDB string output, making sure interrupts are disabled. | |
| 541 // This function gets used by some diag output functions. | |
| 542 void | |
| 543 hal_output_gdb_string(target_register_t str, int string_len) | |
| 544 { | |
| 545 unsigned long __state; | |
|
8
ece80412419a
Merge from eCos master repository on 1999-05-21-22:05:54-BST
jlarmour
parents:
6
diff
changeset
|
546 HAL_DISABLE_INTERRUPTS(__state); |
| 2 | 547 __output_gdb_string(str, string_len); |
| 548 HAL_RESTORE_INTERRUPTS(__state); | |
| 549 } | |
| 550 | |
| 551 #endif // CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS |