Mercurial > flash_v2

annotate packages/hal/arm/cl7211/current/src/hal_diag.c @ 38:e7ba79f6d3a8 ecos-sw-1999-09-23

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Merge from eCos master repository on 1999-09-23-20:10:25-BST
author jlarmour
date Thu, 23 Sep 1999 19:52:27 +0000
parents 5af43b635655
children a3cc6665b684
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1 /*=============================================================================
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2 //
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3 // hal_diag.c
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4 //
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5 // HAL diagnostic output code
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6 //
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7 //=============================================================================
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8 //####COPYRIGHTBEGIN####
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9 //
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10 // -------------------------------------------
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11 // The contents of this file are subject to the Cygnus eCos Public License
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12 // Version 1.0 (the "License"); you may not use this file except in
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13 // compliance with the License. You may obtain a copy of the License at
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14 // http://sourceware.cygnus.com/ecos
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15 //
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16 // Software distributed under the License is distributed on an "AS IS"
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17 // basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the
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18 // License for the specific language governing rights and limitations under
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19 // the License.
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20 //
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21 // The Original Code is eCos - Embedded Cygnus Operating System, released
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22 // September 30, 1998.
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23 //
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24 // The Initial Developer of the Original Code is Cygnus. Portions created
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25 // by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved.
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26 // -------------------------------------------
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27 //
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28 //####COPYRIGHTEND####
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29 //=============================================================================
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30 //#####DESCRIPTIONBEGIN####
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31 //
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32 // Author(s): nickg, gthomas
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33 // Contributors:nickg, gthomas
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34 // Date: 1998-03-02
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35 // Purpose: HAL diagnostic output
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36 // Description: Implementations of HAL diagnostic output support.
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37 //
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38 //####DESCRIPTIONEND####
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39 //
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40 //===========================================================================*/
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41
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42 #include <pkgconf/hal.h>
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43 #include <pkgconf/system.h>
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44 #include CYGBLD_HAL_PLATFORM_H
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45
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46 #include <cyg/infra/cyg_type.h> // base types
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47 #include <cyg/infra/cyg_trac.h> // tracing macros
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48 #include <cyg/infra/cyg_ass.h> // assertion macros
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49
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50 #include <cyg/hal/hal_arch.h> // basic machine info
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51 #include <cyg/hal/hal_intr.h> // interrupt macros
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52 #include <cyg/hal/hal_io.h> // IO macros
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53 #include <cyg/hal/hal_diag.h>
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54 #ifdef CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT
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55 #include <cyg/hal/drv_api.h>
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56 #endif
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57 #include <cyg/hal/hal_cl7211.h> // Hardware definitions
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58
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59 #if CYGHWR_HAL_ARM_CL7211_DIAG_PORT == 0
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60 #define CYG_DIAG_DEV_DATA UARTDR1
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61 #define CYG_DIAG_DEV_BLCR UBLCR1
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62 #define CYG_DIAG_DEV_STAT SYSFLG1
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63 #define CYG_DIAG_DEV_CTRL SYSCON1
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64 #define CYG_DIAG_DEV_INT CYGNUM_HAL_INTERRUPT_URXINT1
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65 #else
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66 #define CYG_DIAG_DEV_DATA UARTDR2
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67 #define CYG_DIAG_DEV_STAT SYSFLG2
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68 #define CYG_DIAG_DEV_CTRL SYSCON2
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69 #define CYG_DIAG_DEV_BLCR UBLCR2
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70 #define CYG_DIAG_DEV_INT CYGNUM_HAL_INTERRUPT_URXINT2
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71 #endif
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72
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73 // Assumption: all diagnostic output must be GDB packetized unless this is a ROM (i.e.
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74 // totally stand-alone) system.
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75
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76 #ifdef CYG_HAL_STARTUP_STUBS
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77 #define CYG_HAL_STARTUP_ROM
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78 #undef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
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79 #endif
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80
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81 #if defined(CYG_HAL_STARTUP_ROM) && !defined(CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS)
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82 #define HAL_DIAG_USES_HARDWARE
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83 #else
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84 #if CYGHWR_HAL_ARM_CL7211_DIAG_PORT != CYGHWR_HAL_ARM_CL7211_GDB_PORT
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85 #define HAL_DIAG_USES_HARDWARE
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86 #endif
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87 #endif
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88
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89
32
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90 /*---------------------------------------------------------------------------*/
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91 // CL7211 Serial Port (UARTx) for Debug
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92
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93 // Actually send character down the wire
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94 static void
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95 hal_diag_write_char_serial(char c)
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96 {
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97 cyg_uint32 stat;
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98 // Wait for Tx FIFO not full
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99 do {
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100 stat = *(volatile cyg_uint32 *)CYG_DIAG_DEV_STAT;
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101 } while ((stat & SYSFLG1_UTXFF1) != 0) ;
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102 *(volatile cyg_uint8 *)CYG_DIAG_DEV_DATA = c;
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103 }
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104
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105 static bool
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106 hal_diag_read_serial(char *c)
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107 {
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108 long timeout = 1000000000; // A long time...
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109 cyg_uint32 stat, val;
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110
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111 do {
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112 stat = *(volatile cyg_uint32 *)CYG_DIAG_DEV_STAT;
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113 if (--timeout == 0) return false;
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114 } while ((stat & SYSFLG1_URXFE1) != 0);
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115 // Need to read 32 bits
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116 val = *(volatile cyg_uint32 *)CYG_DIAG_DEV_DATA & 0xFF;
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117 *c = val;
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118 return true;
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119 }
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120
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121 #ifdef HAL_DIAG_USES_HARDWARE
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122
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123 void hal_diag_init(void)
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124 {
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125 static int init = 0;
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126 #ifndef CYG_HAL_STARTUP_ROM
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127 char *msg = "\n\rRAM CL7211 eCos\n\r";
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128 #endif
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129 if (init++) return;
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130
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131 // Enable port
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132 *(volatile cyg_uint32 *)CYG_DIAG_DEV_CTRL |= SYSCON1_UART1EN;
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133 // Configure
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134 *(volatile cyg_uint32 *)CYG_DIAG_DEV_BLCR =
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135 UART_BITRATE(CYGHWR_HAL_ARM_CL7211_DIAG_BAUD) |
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136 UBLCR_FIFOEN | UBLCR_WRDLEN8;
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137 #ifndef CYG_HAL_STARTUP_ROM
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138 while (*msg) hal_diag_write_char(*msg++);
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139 #endif
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140 }
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141
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142 #ifndef CYG_HAL_STARTUP_ROM
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143 #define DIAG_BUFSIZE 2048
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144 static char diag_buffer[DIAG_BUFSIZE];
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145 static int diag_bp = 0;
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146 #endif
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147
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148 void hal_diag_write_char(char c)
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149 {
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150 hal_diag_init();
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151 #ifndef CYG_HAL_STARTUP_ROM
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152 diag_buffer[diag_bp++] = c;
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153 if (diag_bp == sizeof(diag_buffer)) diag_bp = 0;
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154 #endif
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155 hal_diag_write_char_serial(c);
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156 }
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157
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158 void hal_diag_read_char(char *c)
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159 {
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160 while (!hal_diag_read_serial(c)) ;
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161 }
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162
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163 #else // HAL_DIAG relies on GDB
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164
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165 // Initialize diag port
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166 void hal_diag_init(void)
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167 {
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168 #if 0 // Assume port is already setup
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169 // Enable port
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170 *(volatile cyg_uint32 *)CYG_DIAG_DEV_CTRL |= SYSCON1_UART1EN;
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171 // Configure
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172 *(volatile cyg_uint32 *)CYG_DIAG_DEV_BLCR =
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173 UART_BITRATE(CYGHWR_HAL_ARM_CL7211_DIAG_BAUD) |
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174 UBLCR_FIFOEN | UBLCR_WRDLEN8;
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175 #endif
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176 }
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177
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178 void
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179 hal_diag_read_char(char *c)
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180 {
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181 while (!hal_diag_read_serial(c)) ;
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182 }
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183
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184 void
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185 hal_diag_write_char(char c)
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186 {
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187 static char line[100];
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188 static int pos = 0;
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189
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190 // No need to send CRs
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191 if( c == '\r' ) return;
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192
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193 line[pos++] = c;
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194
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195 if( c == '\n' || pos == sizeof(line) )
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196 {
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197
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198 CYG_INTERRUPT_STATE old;
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199
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200 // Disable interrupts. This prevents GDB trying to interrupt us
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201 // while we are in the middle of sending a packet. The serial
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202 // receive interrupt will be seen when we re-enable interrupts
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203 // later.
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204
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205 HAL_DISABLE_INTERRUPTS(old);
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206
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207 while(1)
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208 {
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209 static char hex[] = "0123456789ABCDEF";
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210 cyg_uint8 csum = 0;
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211 int i;
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212 char c1;
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213
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214 hal_diag_write_char_serial('$');
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215 hal_diag_write_char_serial('O');
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216 csum += 'O';
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217 for( i = 0; i < pos; i++ )
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218 {
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219 char ch = line[i];
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220 char h = hex[(ch>>4)&0xF];
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221 char l = hex[ch&0xF];
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222 hal_diag_write_char_serial(h);
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223 hal_diag_write_char_serial(l);
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224 csum += h;
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225 csum += l;
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226 }
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227 hal_diag_write_char_serial('#');
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228 hal_diag_write_char_serial(hex[(csum>>4)&0xF]);
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229 hal_diag_write_char_serial(hex[csum&0xF]);
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230
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231 // Wait for the ACK character '+' from GDB here and handle
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232 // receiving a ^C instead. This is the reason for this clause
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233 // being a loop.
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234 if (!hal_diag_read_serial(&c1))
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235 continue; // No response - try sending packet again
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236
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237 if( c1 == '+' )
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238 break; // a good acknowledge
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239
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240 #ifdef CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT
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241 cyg_drv_interrupt_acknowledge(CYG_DIAG_DEV_INT);
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242 if( c1 == 3 ) {
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243 // Ctrl-C: breakpoint.
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244 cyg_hal_gdb_interrupt (__builtin_return_address(0));
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245 break;
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246 }
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247 #endif
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248 // otherwise, loop round again
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249 }
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250
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251 pos = 0;
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252
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253
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254 // And re-enable interrupts
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255 HAL_RESTORE_INTERRUPTS(old);
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256
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257 }
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258 }
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259 #endif
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260
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261 /*---------------------------------------------------------------------------*/
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262 /* End of hal_diag.c */