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annotate packages/hal/mn10300/stdeval1/current/src/hal_diag.c @ 1777:c16341b1bac6 default tip
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| author | alexs |
|---|---|
| date | Mon, 12 Oct 2009 02:26:09 +0100 |
| parents | d2c90368aeef |
| children |
| rev | line source |
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| 0 | 1 /*============================================================================= |
| 2 // | |
| 2 | 3 // hal_diag.c |
| 0 | 4 // |
| 2 | 5 // HAL diagnostic output code |
| 0 | 6 // |
| 7 //============================================================================= | |
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8 //####ECOSGPLCOPYRIGHTBEGIN#### |
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9 // ------------------------------------------- |
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10 // This file is part of eCos, the Embedded Configurable Operating System. |
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11 // Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. |
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12 // |
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13 // eCos is free software; you can redistribute it and/or modify it under |
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14 // the terms of the GNU General Public License as published by the Free |
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15 // Software Foundation; either version 2 or (at your option) any later version. |
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16 // |
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17 // eCos is distributed in the hope that it will be useful, but WITHOUT ANY |
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18 // WARRANTY; without even the implied warranty of MERCHANTABILITY or |
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19 // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
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20 // for more details. |
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21 // |
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22 // You should have received a copy of the GNU General Public License along |
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23 // with eCos; if not, write to the Free Software Foundation, Inc., |
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24 // 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. |
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25 // |
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26 // As a special exception, if other files instantiate templates or use macros |
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27 // or inline functions from this file, or you compile this file and link it |
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28 // with other works to produce a work based on this file, this file does not |
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29 // by itself cause the resulting work to be covered by the GNU General Public |
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30 // License. However the source code for this file must still be made available |
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31 // in accordance with section (3) of the GNU General Public License. |
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32 // |
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33 // This exception does not invalidate any other reasons why a work based on |
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34 // this file might be covered by the GNU General Public License. |
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35 // |
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36 // Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. |
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37 // at http://sources.redhat.com/ecos/ecos-license/ |
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208
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38 // ------------------------------------------- |
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39 //####ECOSGPLCOPYRIGHTEND#### |
| 0 | 40 //============================================================================= |
| 41 //#####DESCRIPTIONBEGIN#### | |
| 42 // | |
| 2 | 43 // Author(s): nickg |
| 44 // Contributors: nickg | |
| 45 // Date: 1998-03-02 | |
| 0 | 46 // Purpose: HAL diagnostic output |
| 2 | 47 // Description: Implementations of HAL diagnostic output support. |
| 0 | 48 // |
| 49 //####DESCRIPTIONEND#### | |
| 50 // | |
| 51 //===========================================================================*/ | |
| 52 | |
| 53 #include <pkgconf/hal.h> | |
| 54 | |
| 55 #include <cyg/infra/cyg_type.h> // base types | |
| 56 #include <cyg/infra/cyg_trac.h> // tracing macros | |
| 57 #include <cyg/infra/cyg_ass.h> // assertion macros | |
| 58 | |
| 59 #include <cyg/hal/hal_diag.h> | |
| 60 #include <cyg/hal/hal_intr.h> | |
| 61 | |
| 62 /*---------------------------------------------------------------------------*/ | |
| 63 /* Select default diag channel to use */ | |
| 64 | |
| 65 //#define CYG_KERNEL_DIAG_ROMART | |
| 66 //#define CYG_KERNEL_DIAG_SERIAL1 | |
| 67 //#define CYG_KERNEL_DIAG_SERIAL2 | |
| 68 //#define CYG_KERNEL_DIAG_GDB | |
| 69 | |
| 70 #if !defined(CYG_KERNEL_DIAG_SERIAL1) && \ | |
| 71 !defined(CYG_KERNEL_DIAG_SERIAL2) && \ | |
| 72 !defined(CYG_KERNEL_DIAG_ROMART) | |
| 73 | |
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74 # if defined(CYG_HAL_MN10300_AM31_STDEVAL1) |
| 0 | 75 |
| 76 # if defined(CYG_HAL_STARTUP_RAM) | |
| 77 | |
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78 # if defined(CYGSEM_HAL_USE_ROM_MONITOR_CygMon) |
| 0 | 79 |
| 80 // If loaded into RAM via CYGMON we diag via | |
| 81 // serial 2 using GDB protocol | |
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82 |
| 0 | 83 # define CYG_KERNEL_DIAG_SERIAL2 |
| 84 # define CYG_KERNEL_DIAG_GDB | |
| 85 | |
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86 # elif defined(CYGSEM_HAL_USE_ROM_MONITOR_Sload) |
| 0 | 87 |
| 88 // If loaded into RAM via SLOAD we diag via | |
| 89 // serial 1 | |
| 90 | |
| 91 # define CYG_KERNEL_DIAG_SERIAL1 | |
| 92 | |
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93 # elif defined(CYGSEM_HAL_USE_ROM_MONITOR_GDB_stubs) |
| 0 | 94 |
| 95 // If loaded into RAM via GDB STUB ROM we diag via | |
| 96 // serial 1 using GDB protocol | |
| 97 | |
| 98 # define CYG_KERNEL_DIAG_SERIAL1 | |
| 99 # define CYG_KERNEL_DIAG_GDB | |
| 100 | |
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101 # endif // defined(CYGSEM_HAL_USE_ROM_MONITOR_CygMon) |
| 0 | 102 |
| 103 # elif defined(CYG_HAL_STARTUP_ROM) | |
| 104 | |
| 105 // If we are ROM resident, we diag via serial 1 | |
| 106 | |
| 107 # define CYG_KERNEL_DIAG_SERIAL1 | |
| 108 | |
| 109 # endif // defined(CYG_HAL_STARTUP_RAM) | |
| 110 | |
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111 # endif // defined(CYG_HAL_MN10300_AM31_STDEVAL1) |
| 0 | 112 |
| 113 #endif // if ... | |
| 114 | |
| 115 /*---------------------------------------------------------------------------*/ | |
| 116 // PromICE AI interface | |
| 117 | |
| 118 #if defined(CYG_HAL_MN10300_STDEVAL1_ROMART) || defined(CYG_KERNEL_DIAG_ROMART) | |
| 119 | |
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120 #ifdef CYG_HAL_MN10300_AM31_STDEVAL1 |
| 0 | 121 #define PROMICE_AILOC 0x40008000 |
| 122 #endif | |
| 123 | |
| 124 #define PROMICE_BUS_SIZE 16 | |
| 125 #define PROMICE_BURST_SIZE 1 | |
| 126 | |
| 127 #if PROMICE_BUS_SIZE == 16 | |
| 128 | |
| 129 typedef volatile struct | |
| 130 { | |
| 131 volatile cyg_uint16 zero; | |
| 132 // cyg_uint16 pad1[PROMICE_BURST_SIZE]; | |
| 133 volatile cyg_uint16 one; | |
| 134 // cyg_uint16 pad2[PROMICE_BURST_SIZE]; | |
| 135 volatile cyg_uint16 data; | |
| 136 // cyg_uint16 pad3[PROMICE_BURST_SIZE]; | |
| 137 volatile cyg_uint16 status; | |
| 138 | |
| 139 } AISTRUCT; | |
| 140 | |
| 141 #endif | |
| 142 | |
| 143 AISTRUCT *AI = (AISTRUCT *)PROMICE_AILOC; | |
| 144 | |
| 145 #define PROMICE_STATUS_TDA 0x01 | |
| 146 #define PROMICE_STATUS_HDA 0x02 | |
| 147 #define PROMICE_STATUS_OVR 0x04 | |
| 148 | |
| 149 | |
| 150 void ai_diag_init() | |
| 151 { | |
| 152 volatile cyg_uint8 junk; | |
| 153 | |
| 154 while( AI->status == 0xCC ) | |
| 155 continue; | |
| 156 | |
| 157 junk = AI->data; | |
| 158 } | |
| 159 | |
| 160 static void ai_write_char(cyg_uint8 data) | |
| 161 { | |
| 162 volatile cyg_uint8 junk; | |
| 163 int i; | |
| 164 | |
| 165 // Wait for tda == 0 | |
| 166 while( (AI->status & PROMICE_STATUS_TDA) == PROMICE_STATUS_TDA ) | |
| 167 continue; | |
| 168 | |
| 169 // Send start bit | |
| 170 junk = AI->one; | |
| 171 | |
| 172 for( i = 0; i < 8; i++ ) | |
| 173 { | |
| 174 // send ls bit of data | |
| 175 if( (data & 1) == 1 ) | |
| 176 junk = AI->one; | |
| 177 else | |
| 178 junk = AI->zero; | |
| 179 | |
| 180 // shift down for next bit | |
| 181 data >>= 1; | |
| 182 } | |
| 183 | |
| 184 // Send stop bit | |
| 185 junk = AI->one; | |
| 186 | |
| 187 // all done | |
| 188 } | |
| 189 | |
| 190 void ai_diag_write_char(char c) | |
| 191 { | |
| 192 ai_write_char((cyg_uint8)c); | |
| 193 } | |
| 194 | |
| 195 void ai_diag_drain() {} | |
| 196 | |
| 197 void ai_diag_read_char(char *c) { *c = '\n'; } | |
| 198 | |
| 199 void ai_writes(char *s) | |
| 200 { | |
| 201 while( *s ) ai_write_char( *s++ ); | |
| 202 } | |
| 203 | |
| 204 void ai_write_hex( cyg_uint32 x) | |
| 205 { | |
| 206 int i; | |
| 207 ai_writes("0x"); | |
| 208 for( i = 28; i >=0 ; i-=4 ) | |
| 209 { | |
| 210 char *d = "0123456789ABCDEF"; | |
| 211 ai_write_char( d[(x>>i)&0xf] ); | |
| 212 } | |
| 213 ai_write_char(' '); | |
| 214 } | |
| 215 | |
| 216 #if defined(CYG_KERNEL_DIAG_ROMART) | |
| 217 | |
| 218 #define hal_diag_init_serial ai_diag_init | |
| 219 #define hal_diag_write_char_serial ai_diag_write_char | |
| 220 #define hal_diag_drain_serial ai_diag_drain | |
| 221 #define hal_diag_read_char_serial ai_diag_read_char | |
| 222 | |
| 223 #endif | |
| 224 | |
| 225 #endif | |
| 226 | |
| 227 /*---------------------------------------------------------------------------*/ | |
| 228 // MN10300 Serial line | |
| 229 | |
| 230 #if defined(CYG_HAL_MN10300_STDEVAL1_SERIAL1) || defined(CYG_KERNEL_DIAG_SERIAL1) | |
| 231 | |
| 232 // We use serial1 on MN103002 | |
| 233 #define SERIAL1_CR ((volatile cyg_uint16 *)0x34000810) | |
| 234 #define SERIAL1_ICR ((volatile cyg_uint8 *) 0x34000814) | |
| 235 #define SERIAL1_TXR ((volatile cyg_uint8 *) 0x34000818) | |
| 236 #define SERIAL1_RXR ((volatile cyg_uint8 *) 0x34000819) | |
| 237 #define SERIAL1_SR ((volatile cyg_uint16 *)0x3400081c) | |
| 238 | |
| 239 // Timer 1 provided baud rate divisor | |
| 240 #define TIMER1_MD ((volatile cyg_uint8 *)0x34001001) | |
| 241 #define TIMER1_BR ((volatile cyg_uint8 *)0x34001011) | |
| 242 #define TIMER1_CR ((volatile cyg_uint8 *)0x34001021) | |
| 243 | |
| 244 #define PORT3_MD ((volatile cyg_uint8 *)0x36008025) | |
| 245 | |
| 246 // Mystery register | |
| 247 #define TMPSCNT ((volatile cyg_uint8 *)0x34001071) | |
| 248 | |
| 249 #define SIO1_LSTAT_TRDY 0x20 | |
| 250 #define SIO1_LSTAT_RRDY 0x10 | |
| 251 | |
| 252 void hal_diag_init_serial1(void) | |
| 253 { | |
| 254 // 48 translates to 38400 baud. | |
| 255 *TIMER1_BR = 48; | |
| 256 | |
| 257 // Timer1 sourced from IOCLK | |
| 258 *TIMER1_MD = 0x80; | |
| 259 | |
| 260 // Mode on PORT3, used for serial line controls. | |
| 261 *PORT3_MD = 0x01; | |
| 262 | |
| 263 // No interrupts for now. | |
| 264 *SERIAL1_ICR = 0x00; | |
| 265 | |
| 266 // Source from timer 1, 8bit chars, enable tx and rx | |
| 267 *SERIAL1_CR = 0xc084; | |
| 268 } | |
| 269 | |
| 270 void hal_diag_write_char_serial1(char c) | |
| 271 { | |
| 272 register volatile cyg_uint16 *volatile tty_status = SERIAL1_SR; | |
| 273 register volatile cyg_uint8 *volatile tty_tx = SERIAL1_TXR; | |
| 274 | |
| 275 while( (*tty_status & SIO1_LSTAT_TRDY) != 0 ) continue; | |
| 276 | |
| 277 *tty_tx = c; | |
| 278 } | |
| 279 | |
| 280 void hal_diag_drain_serial1(void) | |
| 281 { | |
| 282 register volatile cyg_uint16 *volatile tty_status = SERIAL1_SR; | |
| 283 | |
| 284 while( (*tty_status & SIO1_LSTAT_TRDY) != 0 ) continue; | |
| 285 } | |
| 286 | |
| 287 void hal_diag_read_char_serial1(char *c) | |
| 288 { | |
| 289 register volatile cyg_uint16 *volatile tty_status = SERIAL1_SR; | |
| 290 register volatile cyg_uint8 *volatile tty_rx = SERIAL1_RXR; | |
| 291 | |
| 292 while( (*tty_status & SIO1_LSTAT_RRDY) == 0 ) continue; | |
| 293 | |
| 294 *c = *tty_rx; | |
| 295 | |
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296 // We must ack the interrupt caused by that read to avoid |
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297 // confusing cygmon. |
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298 HAL_INTERRUPT_ACKNOWLEDGE( CYGNUM_HAL_INTERRUPT_SERIAL_1_RX ); |
| 0 | 299 } |
| 300 | |
| 301 #if defined(CYG_KERNEL_DIAG_SERIAL1) | |
| 302 | |
| 303 #define hal_diag_init_serial hal_diag_init_serial1 | |
| 304 #define hal_diag_write_char_serial hal_diag_write_char_serial1 | |
| 305 #define hal_diag_drain_serial hal_diag_drain_serial1 | |
| 306 #define hal_diag_read_char_serial hal_diag_read_char_serial1 | |
| 307 | |
| 308 #endif | |
| 309 | |
| 310 #endif | |
| 311 | |
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312 #if defined(CYG_HAL_MN10300_AM31_STDEVAL1) |
| 0 | 313 |
| 314 void led(int x) | |
| 315 { | |
| 316 *((cyg_uint8 *)0x36008004) = x<<4; | |
| 317 } | |
| 318 | |
| 319 #endif | |
| 320 | |
| 321 | |
| 322 /*---------------------------------------------------------------------------*/ | |
| 323 | |
| 324 #if defined(CYG_HAL_MN10300_STDEVAL1_SERIAL2) || defined(CYG_KERNEL_DIAG_SERIAL2) | |
| 325 | |
| 326 // We use serial2 on MN103002 | |
| 327 #define SERIAL2_CR ((volatile cyg_uint16 *)0x34000820) | |
| 328 #define SERIAL2_ICR ((volatile cyg_uint8 *) 0x34000824) | |
| 329 #define SERIAL2_TXR ((volatile cyg_uint8 *) 0x34000828) | |
| 330 #define SERIAL2_RXR ((volatile cyg_uint8 *) 0x34000829) | |
| 331 #define SERIAL2_SR ((volatile cyg_uint8 *)0x3400082c) | |
| 332 #define SERIAL2_TR ((volatile cyg_uint8 *)0x3400082d) | |
| 333 | |
| 334 // Timer 2 provided baud rate divisor | |
| 335 #define TIMER2_MD ((volatile cyg_uint8 *)0x34001002) | |
| 336 #define TIMER2_BR ((volatile cyg_uint8 *)0x34001012) | |
| 337 #define TIMER2_CR ((volatile cyg_uint8 *)0x34001022) | |
| 338 | |
| 339 #define PORT3_MD ((volatile cyg_uint8 *)0x36008025) | |
| 340 | |
| 341 // Mystery register | |
| 342 #define TMPSCNT ((volatile cyg_uint8 *)0x34001071) | |
| 343 | |
| 344 #define SIO2_LSTAT_TRDY 0x20 | |
| 345 #define SIO2_LSTAT_RRDY 0x10 | |
| 346 | |
| 347 void hal_diag_init_serial2(void) | |
| 348 { | |
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349 #if !defined(CYGSEM_HAL_USE_ROM_MONITOR_CygMon) |
| 0 | 350 |
| 351 // 16 and 22 translate to 38400 baud. | |
| 352 *TIMER2_BR = 16; | |
| 353 *SERIAL2_TR = 22; | |
| 354 | |
| 355 // Timer2 sourced from IOCLK | |
| 356 *TIMER2_MD = 0x80; | |
| 357 | |
| 358 // Mode on PORT3, used for serial line controls. | |
| 359 *PORT3_MD = 0x01; | |
| 360 | |
| 361 // No interrupts for now. | |
| 362 *SERIAL2_ICR = 0x00; | |
| 363 | |
| 364 // Source from timer 2, 8bit chars, enable tx and rx | |
| 365 *SERIAL2_CR = 0xc081; | |
| 366 | |
| 367 #endif | |
| 368 } | |
| 369 | |
| 370 void hal_diag_write_char_serial2(char c) | |
| 371 { | |
| 372 register volatile cyg_uint8 *volatile tty_status = SERIAL2_SR; | |
| 373 register volatile cyg_uint8 *volatile tty_tx = SERIAL2_TXR; | |
| 374 | |
| 375 while( (*tty_status & SIO2_LSTAT_TRDY) != 0 ) continue; | |
| 376 | |
| 377 *tty_tx = c; | |
| 378 } | |
| 379 | |
| 380 void hal_diag_drain_serial2(void) | |
| 381 { | |
| 382 register volatile cyg_uint8 *volatile tty_status = SERIAL2_SR; | |
| 383 | |
| 384 while( (*tty_status & SIO2_LSTAT_TRDY) != 0 ) continue; | |
| 385 } | |
| 386 | |
| 387 void hal_diag_read_char_serial2(char *c) | |
| 388 { | |
| 389 register volatile cyg_uint8 *volatile tty_status = SERIAL2_SR; | |
| 390 register volatile cyg_uint8 *volatile tty_rx = SERIAL2_RXR; | |
| 391 | |
| 392 while( (*tty_status & SIO2_LSTAT_RRDY) == 0 ) continue; | |
| 393 | |
| 394 *c = *tty_rx; | |
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395 |
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396 #if !defined(CYGSEM_HAL_USE_ROM_MONITOR_CygMon) |
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397 // We must ack the interrupt caused by that read to avoid |
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398 // confusing the stubs. |
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399 HAL_INTERRUPT_ACKNOWLEDGE( CYGNUM_HAL_INTERRUPT_SERIAL_2_RX ); |
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400 #endif |
| 0 | 401 } |
| 402 | |
| 403 #if defined(CYG_KERNEL_DIAG_SERIAL2) | |
| 404 | |
| 405 #define hal_diag_init_serial hal_diag_init_serial2 | |
| 406 #define hal_diag_write_char_serial hal_diag_write_char_serial2 | |
| 407 #define hal_diag_drain_serial hal_diag_drain_serial2 | |
| 408 #define hal_diag_read_char_serial hal_diag_read_char_serial2 | |
| 409 | |
| 410 #endif | |
| 411 | |
| 412 #endif | |
| 413 | |
| 414 /*---------------------------------------------------------------------------*/ | |
| 415 | |
| 416 void hal_diag_init(void) | |
| 417 { | |
| 418 hal_diag_init_serial(); | |
| 419 } | |
| 420 | |
| 421 void hal_diag_write_char(char c) | |
| 422 { | |
| 423 #ifdef CYG_KERNEL_DIAG_GDB | |
| 424 | |
| 425 static char line[100]; | |
| 426 static int pos = 0; | |
| 427 | |
| 428 // No need to send CRs | |
| 429 if( c == '\r' ) return; | |
| 430 | |
| 431 line[pos++] = c; | |
| 432 | |
| 433 if( c == '\n' || pos == sizeof(line) ) | |
| 434 { | |
| 435 // Disable interrupts. This prevents GDB trying to interrupt us | |
| 436 // while we are in the middle of sending a packet. The serial | |
| 437 // receive interrupt will be seen when we re-enable interrupts | |
| 438 // later. | |
| 2 | 439 |
| 440 CYG_INTERRUPT_STATE oldstate; | |
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441 CYG_BYTE wdcr; |
| 2 | 442 HAL_DISABLE_INTERRUPTS(oldstate); |
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443 |
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444 // Beacuse of problems with NT on the testfarm, we also have |
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445 // to disable the watchdog here. This only matters in the |
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446 // watchdog tests. And yes, this sends my irony meter off the |
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447 // scale too. |
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448 |
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449 HAL_READ_UINT8( 0x34004002, wdcr ); |
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450 HAL_WRITE_UINT8( 0x34004002, wdcr&0x3F ); |
| 0 | 451 |
| 452 while(1) | |
| 453 { | |
| 454 static char hex[] = "0123456789ABCDEF"; | |
| 455 cyg_uint8 csum = 0; | |
| 456 int i; | |
| 457 | |
| 458 hal_diag_write_char_serial('$'); | |
| 459 hal_diag_write_char_serial('O'); | |
| 460 csum += 'O'; | |
| 461 for( i = 0; i < pos; i++ ) | |
| 462 { | |
| 463 char ch = line[i]; | |
| 464 char h = hex[(ch>>4)&0xF]; | |
| 465 char l = hex[ch&0xF]; | |
| 466 hal_diag_write_char_serial(h); | |
| 467 hal_diag_write_char_serial(l); | |
| 468 csum += h; | |
| 469 csum += l; | |
| 470 } | |
| 471 hal_diag_write_char_serial('#'); | |
| 472 hal_diag_write_char_serial(hex[(csum>>4)&0xF]); | |
| 473 hal_diag_write_char_serial(hex[csum&0xF]); | |
| 474 | |
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475 #if !defined(CYGSEM_HAL_USE_ROM_MONITOR_CygMon) |
| 0 | 476 { |
| 477 char c1; | |
| 478 | |
| 479 hal_diag_read_char_serial( &c1 ); | |
| 480 | |
| 481 if( c1 == '+' ) break; | |
| 482 | |
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483 if( cyg_hal_is_break( &c1, 1 ) ) |
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484 cyg_hal_user_break( NULL ); |
| 0 | 485 |
| 486 } | |
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487 #else |
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488 // When using Cygmon, the ack character is absorbed by cygmon's |
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489 // serial interrupt handler that is looking for Ctrl-Cs. |
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490 break; |
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491 #endif |
| 0 | 492 } |
| 493 | |
| 494 pos = 0; | |
| 495 | |
| 496 // Wait for tx buffer to drain | |
| 497 hal_diag_drain_serial(); | |
| 498 | |
| 499 // And re-enable interrupts | |
| 2 | 500 HAL_RESTORE_INTERRUPTS(oldstate); |
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501 HAL_WRITE_UINT8( 0x34004002, wdcr ); |
| 0 | 502 |
| 503 } | |
| 504 | |
| 505 #else | |
| 506 hal_diag_write_char_serial(c); | |
| 507 #endif | |
| 508 } | |
| 509 | |
| 510 | |
| 511 | |
| 512 | |
| 513 void hal_diag_read_char(char *c) | |
| 514 { | |
| 515 hal_diag_read_char_serial(c); | |
| 516 } | |
| 517 | |
| 518 | |
| 519 /*---------------------------------------------------------------------------*/ | |
| 520 /* End of hal_diag.c */ |
