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* Added execute permissions to files missed in conversion from CVS
author alexs
date Mon, 12 Oct 2009 02:26:09 +0100
parents d2c90368aeef
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
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1 /*=============================================================================
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2 //
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3 // vectors.S
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4 //
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5 // SPARClite vectors and bootup code
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6 //
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7 //=============================================================================
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8 //####ECOSGPLCOPYRIGHTBEGIN####
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9 // -------------------------------------------
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10 // This file is part of eCos, the Embedded Configurable Operating System.
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11 // Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
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12 //
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13 // eCos is free software; you can redistribute it and/or modify it under
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14 // the terms of the GNU General Public License as published by the Free
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15 // Software Foundation; either version 2 or (at your option) any later version.
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16 //
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17 // eCos is distributed in the hope that it will be useful, but WITHOUT ANY
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18 // WARRANTY; without even the implied warranty of MERCHANTABILITY or
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19 // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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20 // for more details.
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21 //
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22 // You should have received a copy of the GNU General Public License along
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23 // with eCos; if not, write to the Free Software Foundation, Inc.,
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24 // 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
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25 //
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26 // As a special exception, if other files instantiate templates or use macros
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27 // or inline functions from this file, or you compile this file and link it
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28 // with other works to produce a work based on this file, this file does not
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29 // by itself cause the resulting work to be covered by the GNU General Public
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30 // License. However the source code for this file must still be made available
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31 // in accordance with section (3) of the GNU General Public License.
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32 //
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33 // This exception does not invalidate any other reasons why a work based on
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34 // this file might be covered by the GNU General Public License.
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35 //
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36 // Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
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37 // at http://sources.redhat.com/ecos/ecos-license/
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38 // -------------------------------------------
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39 //####ECOSGPLCOPYRIGHTEND####
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40 //=============================================================================
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41 //#####DESCRIPTIONBEGIN####
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42 //
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43 // Author(s): hmt
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44 // Contributors:hmt
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45 // Date: 1998-12-15
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46 // Purpose: SPARClite vector code
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47 // Description: This file contains the code which hangs off SPARClite vectors
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48 // including reset; it handles register under/overflow as well
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49 // as bootup, anything else is deferred to the default interrupt
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50 // or exception vsrs respectively. See vec_[ix]vsr.S ...
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51 //
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52 //####DESCRIPTIONEND####
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53 //
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54 //===========================================================================*/
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55
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56 !-----------------------------------------------------------------------------
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57
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58 // .file "vectors.S"
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59
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60 !-----------------------------------------------------------------------------
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61
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62 #include <pkgconf/system.h>
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63 #include <pkgconf/hal.h>
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64
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65 #include <pkgconf/hal_sparclite.h>
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66 #include CYGBLD_HAL_PLATFORM_H // Platform config file
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67
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68 #ifdef CYGPKG_KERNEL
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69 # include <pkgconf/kernel.h>
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70 #else
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71 # undef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK
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72 # undef CYGFUN_HAL_COMMON_KERNEL_SUPPORT
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73 #endif
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74
72
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75 #if defined( CYGPKG_HAL_SPARCLITE_SIM ) || \
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76 defined( CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK )
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77 #define BOOTUPSTACK_IS_INTERRUPTSTACK
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78 #endif
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79
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80 //#define CYGHWR_HAL_SPARCLITE_MULTIPLE_VECTOR_TRAPPING
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81
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82 #ifndef CYGHWR_HAL_SPARCLITE_HAS_ASR17
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83 #ifndef CYGHWR_HAL_SPARCLITE_MULTIPLE_VECTOR_TRAPPING
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84 #error Single Vector Trapping (SVT) demands ASR17
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85 #endif
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86 #endif
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87
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88 #ifdef CYG_HAL_STARTUP_ROM
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89 # ifndef CYGHWR_HAL_SPARCLITE_MULTIPLE_VECTOR_TRAPPING
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90
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91 ! ROM startup and Single Vector Trapping demands a copy to RAM.
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92 ! Otherwise it may be configured in, but it is not required.
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93
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94 # ifndef CYGIMP_HAL_SPARCLITE_COPY_VECTORS_TO_RAM
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95 # define CYGIMP_HAL_SPARCLITE_COPY_VECTORS_TO_RAM
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96 # endif
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97
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98 # endif
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99 #endif
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100
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101 !------------------------------------------------------------------------
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102
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103 #include <cyg/hal/vectors.h>
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104
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105 #define DELAYS_AFTER_WRPSR_SAME_WINDOW
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106 #define DELAYS_AFTER_WRWIM
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107
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108 !------------------------------------------------------------------------
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109
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110 #ifdef CYGHWR_HAL_SPARCLITE_MULTIPLE_VECTOR_TRAPPING
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111
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112 .macro VECTOR_EXCEPTION
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113 .p2align 4
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114 rd %tbr, %l3
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115 rd %psr, %l0
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116 ba __entry_exception
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117 and %l3, TT_MASK, %l4
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118 .endm
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119
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120 .macro VECTOR_INTERRUPT level
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121 .p2align 4
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122 rd %psr, %l0
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123 mov \level << 2, %l5
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124 ba __entry_interrupt
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125 mov \level << 4, %l4
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126 .endm
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127
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128 .macro VECTOR_CODE_WIM name
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129 .p2align 4
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130 ba __entry_\name
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131 rd %wim, %l0
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132 .endm
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133
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134 #endif // CYGHWR_HAL_SPARCLITE_MULTIPLE_VECTOR_TRAPPING
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135
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136 !------------------------------------------------------------------------
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137 ! The start of the code; this is the entry point:
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138
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139 .section ".vectors","ax"
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140
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141 .global rom_vectors
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142 rom_vectors:
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143 .global reset_vector
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144 reset_vector:
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145 ! this code goes to the real reset handler, it will be
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146 ! overwritten by the start of vectoring handler...
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147 b genuine_reset
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148 nop
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149 ! usually drop through to:
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150 #ifdef CYGHWR_HAL_SPARCLITE_MULTIPLE_VECTOR_TRAPPING
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151 ba __entry_exception ! reset becomes an exception
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152 and %l3, TT_MASK, %l4 ! once we are running
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153
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154 VECTOR_EXCEPTION ! 1
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155 VECTOR_EXCEPTION ! 2
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156 VECTOR_EXCEPTION ! 3
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157 VECTOR_EXCEPTION ! 4
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158
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159 VECTOR_CODE_WIM wover ! 5 window overflow
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160 VECTOR_CODE_WIM wunder ! 6 window underflow
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161 VECTOR_EXCEPTION ! 7
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162 VECTOR_EXCEPTION ! 8
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163 VECTOR_EXCEPTION ! 9
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164
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165 VECTOR_EXCEPTION ! 10
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166 VECTOR_EXCEPTION ! 11
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167 VECTOR_EXCEPTION ! 12
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168 VECTOR_EXCEPTION ! 13
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169 VECTOR_EXCEPTION ! 14
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170
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171 VECTOR_EXCEPTION ! 15
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172 VECTOR_EXCEPTION ! 16
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173 VECTOR_INTERRUPT 1 ! 17 interrupt_level_1
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174 VECTOR_INTERRUPT 2 ! 18 interrupt_level_2
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175 VECTOR_INTERRUPT 3 ! 19 interrupt_level_3
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176
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177 VECTOR_INTERRUPT 4 ! 20 interrupt_level_4
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178 VECTOR_INTERRUPT 5 ! 21 interrupt_level_5
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179 VECTOR_INTERRUPT 6 ! 22 interrupt_level_6
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180 VECTOR_INTERRUPT 7 ! 23 interrupt_level_7
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181 VECTOR_INTERRUPT 8 ! 24 interrupt_level_8
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182
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183 VECTOR_INTERRUPT 9 ! 25 interrupt_level_9
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184 VECTOR_INTERRUPT 10 ! 26 interrupt_level_10
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185 VECTOR_INTERRUPT 11 ! 27 interrupt_level_11
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186 VECTOR_INTERRUPT 12 ! 28 interrupt_level_12
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187 VECTOR_INTERRUPT 13 ! 29 interrupt_level_13
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188
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189 VECTOR_INTERRUPT 14 ! 30 interrupt_level_14
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190 VECTOR_INTERRUPT 15 ! 31 interrupt_level_15
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191 VECTOR_EXCEPTION ! 32
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192 VECTOR_EXCEPTION ! 33
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193 VECTOR_EXCEPTION ! 34
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194
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195 VECTOR_EXCEPTION ! 35
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196 VECTOR_EXCEPTION ! 36
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197 VECTOR_EXCEPTION ! 37
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198 VECTOR_EXCEPTION ! 38
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199 VECTOR_EXCEPTION ! 39
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200
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201 .rept 216 ! 40-255 is 216 of them
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202 VECTOR_EXCEPTION ! whichever
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203 .endr
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204 #endif // CYGHWR_HAL_SPARCLITE_MULTIPLE_VECTOR_TRAPPING
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205
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206 #ifndef CYGHWR_HAL_SPARCLITE_MULTIPLE_VECTOR_TRAPPING
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207 real_vector:
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208 ! here,locals have been set up as follows:
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209 ! %l0 = psr
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210 ! %l1 = pc
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211 ! %l2 = npc
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212 ! %l3 = tbr
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213 and %l3, TT_IS_INTR_MASK, %l4
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214 cmp %l4, TT_IS_INTR_VALUE
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215 bne not_an_interrupt ! delay slot does not matter
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216 ! here be the pre-vector interrupt handler
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217 interrupt:
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218 and %l3, 0x0f0, %l4 ! get an interrupt number out
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219 srl %l4, 2, %l5 ! to a word address offset
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220 #endif // !CYGHWR_HAL_SPARCLITE_MULTIPLE_VECTOR_TRAPPING
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221 __entry_interrupt:
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222 sethi %hi(hal_vsr_table), %l6
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223 or %l6, %lo(hal_vsr_table), %l6
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224 ld [ %l6 + %l5 ], %l6 ! get vector in %l6
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225 jmp %l6 ! and go there
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226 srl %l4, 4, %l3 ! vector number into %l3: so that
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227 ! interrupts and exceptions/traps
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228 ! have the same API to VSRs
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229
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230 #ifndef CYGHWR_HAL_SPARCLITE_MULTIPLE_VECTOR_TRAPPING
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231 not_an_interrupt:
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232 and %l3, TT_MASK, %l4
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233 cmp %l4, (TRAP_WUNDER << TT_SHL)
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234
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235 bne,a not_window_underflow
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236 cmp %l4, (TRAP_WOVER << TT_SHL) ! (if taken)
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237
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238 ! here be the window underflow handler:
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239 window_underflow:
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240 ! CWP is trap handler
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241 ! CWP + 1 is trapped RESTORE instruction
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242 ! CWP + 2 is invalid context which must be restored
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243 ! CWP + 3 is next invalid context
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244
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245 wr %l0, %psr ! restore the condition flags
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246 ! (CWP is unchanged)
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247 ! the following instructions delay enough; no need for NOPs
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248 rd %wim, %l0 ! get the wim
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249 #endif // !CYGHWR_HAL_SPARCLITE_MULTIPLE_VECTOR_TRAPPING
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250 __entry_wunder:
2
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251 sll %l0, 1, %l3 ! Rotate wim left
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252 srl %l0, __WINSIZE-1, %l0
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253 wr %l0, %l3, %wim ! Install the new wim
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254
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255 #ifdef DELAYS_AFTER_WRWIM
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256 nop ! are these delays needed?
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257 nop ! (following restore uses wim)
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258 nop
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259 #endif
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260 restore ! Users window
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261 restore ! Her callers window (now valid)
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262
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263 ldd [%sp + 0 * 4], %l0 ! restore L & I registers
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264 ldd [%sp + 2 * 4], %l2
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265 ldd [%sp + 4 * 4], %l4
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266 ldd [%sp + 6 * 4], %l6
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267
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268 ldd [%sp + 8 * 4], %i0
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269 ldd [%sp + 10 * 4], %i2
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270 ldd [%sp + 12 * 4], %i4
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271 ldd [%sp + 14 * 4], %i6
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272
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273 save ! Back to trap window
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274 save
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275
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276 jmp %l1
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277 rett %l2
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278
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279 #ifndef CYGHWR_HAL_SPARCLITE_MULTIPLE_VECTOR_TRAPPING
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280 not_window_underflow:
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281 bne,a not_window_overflow
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282 srl %l4, 4, %l4 ! (if taken)
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283
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284 ! here be the window overflow handler:
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285 window_overflow:
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286 ! CWP + 1 is caller whose SAVE bounced
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287 ! CWP is trap handler = invalid window
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288 ! CWP - 1 is next invalid window which needs to be saved
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289
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290 wr %l0, %psr ! restore the condition flags
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291 ! (CWP is unchanged)
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292 ! the following instructions delay enough; no need for NOPs
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293 rd %wim, %l0
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294 #endif // !CYGHWR_HAL_SPARCLITE_MULTIPLE_VECTOR_TRAPPING
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295 __entry_wover:
2
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296 mov %g1, %l3 ! Save g1, we use it to hold the wim
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297 srl %l0, 1, %g1 ! Rotate wim right
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298 sll %l0, __WINSIZE-1, %l0
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299 or %l0, %g1, %g1
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300
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301 save ! Slip into next window
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302 mov %g1, %wim ! Install the new wim
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303 ! (invalidates current window!)
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304
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305 std %l0, [%sp + 0 * 4] ! save L & I registers
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306 std %l2, [%sp + 2 * 4]
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307 std %l4, [%sp + 4 * 4]
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308 std %l6, [%sp + 6 * 4]
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309
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310 std %i0, [%sp + 8 * 4]
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311 std %i2, [%sp + 10 * 4]
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312 std %i4, [%sp + 12 * 4]
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313 std %i6, [%sp + 14 * 4]
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314
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315 restore ! Go back to trap window.
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316 mov %l3, %g1 ! Restore %g1
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317
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318 jmpl %l1, %g0
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319 rett %l2
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320
46
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321 #ifdef CYGHWR_HAL_SPARCLITE_MULTIPLE_VECTOR_TRAPPING
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322 // ADDITIONAL code to provide an entry point:
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323 __entry_exception:
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324 srl %l4, 4, %l4
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325 #endif // CYGHWR_HAL_SPARCLITE_MULTIPLE_VECTOR_TRAPPING
2
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326 not_window_overflow:
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327 ! from here on in, %l4 is the trap number in clear
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328 cmp %l4, 128
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329 bge 1f
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330 mov 0, %l5 ! offset 0 for user traps
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331
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332 cmp %l4, 36 ! coprocessor special case
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333 beq 1f
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334 mov 4, %l5 ! ...treated as FP, code 4
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335
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336 cmp %l4, 10
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337 bge 1f
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338 mov 10, %l5 ! offset 10 for "others"
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339
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340 ! if we are here, the trap number is 1-9 inclusive
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341 ! so put it in %l5 and drop through...
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342 mov %l4, %l5
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343 1:
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344 or %l5, 16, %l5 ! offset into table is 16... for traps.
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345 sll %l5, 2, %l5 ! to a word address offset
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346 sethi %hi(hal_vsr_table), %l6
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347 or %l6, %lo(hal_vsr_table), %l6
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348 ld [ %l6 + %l5 ], %l6 ! get vector in %l6
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349 jmp %l6 ! and go there
46
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350 srl %l5, 2, %l3 ! vector number into %l3: so that
2
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351 ! interrupts and exceptions/traps
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352 ! have the same API to VSRs
46
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diff changeset
353 ! NB that~s eCos vector number not TRAP number above.
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354
2
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355 ! and that is the end of the pre-vector trap handler
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356
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357 .global rom_vectors_end
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358 rom_vectors_end:
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359
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360 ! these instructions are copied into the reset vector
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361 ! after startup to _not_ branch to the genuine_reset code below
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362 real_vector_instructions:
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363 rd %tbr, %l3
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364 rd %psr, %l0
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365
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366
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367
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368 ! genuine reset code called from time zero:
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369 genuine_reset: ! set psr, mask interrupts & traps
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370 wr %g0, 0xfc0 + __WIN_INIT, %psr
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371 nop ! mode = prevMode = S, CWP=7
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372 nop
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373 nop
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374 wr %g0, 0, %wim ! No invalid windows (yet)
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375 nop
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376 nop
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377 nop
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378
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379 sethi %hi(reset_vector), %g1
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380 andn %g1, 0xfff, %g1 ! should not be needed
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381 wr %g1, %tbr ! Traps are at reset_vector
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382 nop
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383 nop
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384 nop
46
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385 #ifdef CYGHWR_HAL_SPARCLITE_HAS_ASR17
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386 #ifdef CYGHWR_HAL_SPARCLITE_MULTIPLE_VECTOR_TRAPPING
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diff changeset
387 wr %g0, 0, %asr17 ! Multiple vector trapping
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388 #else
2
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389 wr %g0, 1, %asr17 ! Single vector trapping
46
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390 #endif // !CYGHWR_HAL_SPARCLITE_MULTIPLE_VECTOR_TRAPPING
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391 #endif // CYGHWR_HAL_SPARCLITE_HAS_ASR17
2
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392 nop
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393 nop
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394 nop
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395
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396 // INCLUDE PLATFORM BOOT
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397
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398 // This should set up RAM and caches, and calm down any external interrupt
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399 // sources. Also copy two instructions from real_vector_instructions
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400 // into reset_vector, then invalidate the instruction cache.
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401
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402 #include <cyg/hal/halboot.si>
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403
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diff changeset
404 // halboot.si returns with %sp all set, in sleb versions.
8
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405 // (though we override if there is an interrupt stack)
2
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406
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diff changeset
407 led 0x80
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diff changeset
408
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409 ! now set up a stack and initial frame linkage
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410 ! so as to be able to make C function calls:
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diff changeset
411 ! current window is 7, the highest, so we store a
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diff changeset
412 ! saved frame thingy that refers to itself in the stack,
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413 ! then another which is valid and drop into main from there.
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414
8
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415 #ifdef BOOTUPSTACK_IS_INTERRUPTSTACK
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416 sethi %hi(cyg_interrupt_stack), %i6
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417 or %i6, %lo(cyg_interrupt_stack), %i6
2
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418 #endif
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419 andn %i6, 7, %i6 ! round fp down to double alignment
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420 mov 0, %i7 ! null return address
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421 sethi %hi(0xb51ac000), %i0 ! "BStac" pattern
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diff changeset
422 or %i0, 24, %i0
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423 or %i0, 1, %i1
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diff changeset
424 or %i0, 2, %i2
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diff changeset
425 or %i0, 3, %i3
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426 or %i0, 4, %i4
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427 or %i0, 5, %i5
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428
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429 sethi %hi(0xb51ac000), %l0 ! "BStac" pattern
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430 or %l0, 16, %l0
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431 or %l0, 1, %l1
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432 or %l0, 2, %l2
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433 or %l0, 3, %l3
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diff changeset
434 or %l0, 4, %l4
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435 or %l0, 5, %l5
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diff changeset
436 or %l0, 6, %l6
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437 or %l0, 7, %l7
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diff changeset
438
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diff changeset
439 sub %fp, 16 * 4, %sp ! Stack pointer
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440
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diff changeset
441 led 0x90
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diff changeset
442
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443 std %l0, [%sp + 0 * 4] ! save L & I registers
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444 std %l2, [%sp + 2 * 4] ! into new stack frame
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445 std %l4, [%sp + 4 * 4]
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446 std %l6, [%sp + 6 * 4]
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447
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diff changeset
448 led 0x91
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449
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450 std %i0, [%sp + 8 * 4]
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451 std %i2, [%sp + 10 * 4]
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452 std %i4, [%sp + 12 * 4]
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453 std %i6, [%sp + 14 * 4]
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diff changeset
454
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parents:
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455 led 0x92
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456
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457 sethi %hi(0xb0010000), %o0 ! "Boot" pattern
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458 or %o0, 8, %o0
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459 or %o0, 1, %o1
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460 or %o0, 2, %o2
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461 or %o0, 3, %o3
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462 or %o0, 4, %o4
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463 or %o0, 5, %o5
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diff changeset
464
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parents:
diff changeset
465 led 0x98
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466
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467 wr %g0, __WIM_INIT, %wim ! Window 7 (current) is invalid
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468 nop
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469 nop
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470 nop
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parents:
diff changeset
471
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parents:
diff changeset
472 led 0x99
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parents:
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473
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diff changeset
474 sethi %hi(0xb0010000), %g1 ! "Boot" pattern
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parents:
diff changeset
475 or %g1, 2, %g2
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diff changeset
476 or %g1, 3, %g3
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parents:
diff changeset
477 or %g1, 4, %g4
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diff changeset
478 or %g1, 5, %g5
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diff changeset
479 or %g1, 6, %g6
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diff changeset
480 or %g1, 7, %g7
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481 or %g1, 1, %g1
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parents:
diff changeset
482
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parents:
diff changeset
483 led 0xa0
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diff changeset
484
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diff changeset
485 wr %g0, 0xfe0 + __WIN_INIT, %psr
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486 nop ! Enable traps:
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487 nop ! set psr, _do_ mask interrupts
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488 nop ! mode = prevMode = S, CWP=7
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489
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490 led 0xb0
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491
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492 ! now we can start calling out and running C code!
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493 .extern cyg_hal_start
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494 call cyg_hal_start ! puts return address in %o7
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495 or %g1, 1, %g1
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496
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497 loop_forever:
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498 ta 1
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499 b loop_forever ! if it returns
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500 nop
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501
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502
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503 !---------------------------------------------------------------------------
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504 ! hal_vsr_table...
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505
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506 .section ".data"
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507 .balign 4
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508 .global hal_vsr_table
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509 hal_vsr_table:
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510 .rept 16
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511 .word hal_default_interrupt_vsr
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512 .endr
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513 .rept 11
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514 .word hal_default_exception_vsr
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515 .endr
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516
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517 !---------------------------------------------------------------------------
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518 ! Bootup stack (only needed explicitly in sim)
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519
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520 #ifdef BOOTUPSTACK_IS_INTERRUPTSTACK
2
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521 .section ".bss"
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522
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523 #ifndef CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE
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524 #define CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE 4096
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525 #endif
2
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526 .balign 16
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527 .global cyg_interrupt_stack_base
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528 cyg_interrupt_stack_base:
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529 .rept CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE
2
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530 .byte 0
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531 .endr
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532 .balign 16
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533 .global cyg_interrupt_stack
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534 cyg_interrupt_stack:
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535 .long 0,0,0,0,0,0,0,0 ! here be secret state stored
2
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536 #endif
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537
46
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538 !------------------------------------------------------------------------
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539 ! Define a section that reserves space at the start of RAM for the
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540 ! vectors to be copied into, for ROM start only.
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541
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542 .section ".ram_vectors","awx",@nobits
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543 #ifdef CYGIMP_HAL_SPARCLITE_COPY_VECTORS_TO_RAM
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544 ! need a space at base of RAM for copied vector/trampoline code
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545 .align 0x1000
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546 .space 8 ! for fencepost errors
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547 .space (rom_vectors_end - rom_vectors)
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548 #endif // CYGIMP_HAL_SPARCLITE_COPY_VECTORS_TO_RAM
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549
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550 !------------------------------------------------------------------------
2
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551 ! end of vectors.S