Mercurial > flash_v2
changeset 46:797268ecc331 ecos-sw-1999-10-19
Merge from eCos master repository on 1999-10-19-18:55:31-BST
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--- a/packages/ChangeLog +++ b/packages/ChangeLog @@ -1,3 +1,16 @@ +1999-10-19 Jesper Skov <jskov@cygnus.co.uk> + + * targets: Added pid9 target. + +1999-10-14 Bart Veer <bartv@cygnus.co.uk> + + * pkgconf.tcl: + Some occurrences of $ in constant strings were not + backslash-quoted. With older versions of Tcl this did not cause + problems, but Tcl 8.2.1 appears to have been fixed and now + attempts variable substitution. Appropriate backslashes have been + added. + 1999-10-06 Jesper Skov <jskov@cygnus.co.uk> * targets: Added AEB rev C target. @@ -70,6 +83,11 @@ 1999-05-26 Jesper Skov <jskov@cygnus.c * NEWS: Added Kernel/Debugging entry. +1999-05-20 Gary Thomas <gthomas@cygnus.co.uk> + + * packages: + * targets: Add Cogent CMA230 (ARM 7TDMI) + 1999-05-18 Gary Thomas <gthomas@cygnus.co.uk> * packages: Remove errant CL7111 package.
--- a/packages/hal/arm/aeb/current/ChangeLog +++ b/packages/hal/arm/aeb/current/ChangeLog @@ -1,3 +1,12 @@ +1999-10-12 Jesper Skov <jskov@cygnus.co.uk> + + * include/pkgconf/hal_arm_aeb.h: Add CT config of revision. + aebC instead of aebc. + +1999-10-08 Jesper Skov <jskov@cygnus.co.uk> + + * include/hal_platform_setup.h: Disable cache for now. + 1999-10-07 Jesper Skov <jskov@cygnus.co.uk> * include/pkgconf/hal_arm_aeb.h:
--- a/packages/hal/arm/aeb/current/include/hal_platform_setup.h +++ b/packages/hal/arm/aeb/current/include/hal_platform_setup.h @@ -55,9 +55,16 @@ #ifdef CYGHWR_HAL_ARM_AEB_REVISION_C // AEB rev C has 256kB of memory. Cache is working (set cachable) +#if 0 #define AEB_SRAM .long 0xFFFFA008,0x00008000,0x00048000,0x00007c04 #define AEB_BAD .long 0xFFFFA00C,0x00048000,0x01000000,0x00000000 #else +// FIXME: There is a cache problem of some sort. Either eCos or the +// chip. Leave cache disabled till I find the time to fix it. Jesper +#define AEB_SRAM .long 0xFFFFA008,0x00008000,0x00048000,0x00007804 +#define AEB_BAD .long 0xFFFFA00C,0x00048000,0x01000000,0x00000000 +#endif +#else // AEB rev B has 128kB of memory. Cache is broken (clear cachable) #define AEB_SRAM .long 0xFFFFA008,0x00008000,0x00028000,0x00007804 #define AEB_BAD .long 0xFFFFA00C,0x00028000,0x01000000,0x00000000
--- a/packages/hal/arm/aeb/current/include/pkgconf/hal_arm_aeb.h +++ b/packages/hal/arm/aeb/current/include/pkgconf/hal_arm_aeb.h @@ -49,12 +49,32 @@ display "ARM AEB-1 evaluation board" type radio parent CYGPKG_HAL_ARM - platform aeb description " The aeb HAL package provides the support needed to run eCos on a ARM AEB-1 eval board." } + cdl_option CYGHWR_HAL_ARM_AEB_REVISION_B { + display "AEB board revision B" + parent CYGPKG_HAL_ARM_AEB + platform aeb + type radio + description " + The AEB-1 eval board revision B has 128kB of memory and a flawed + CPU which means caches must be disabled." + } + + cdl_option CYGHWR_HAL_ARM_AEB_REVISION_C { + display "AEB board revision C" + parent CYGPKG_HAL_ARM_AEB + platform aebC + type radio + description " + The AEB-1 eval board revision C has 256kB of memory and can + run with caches enabled." + } + + cdl_option CYGHWR_HAL_ARM_AEB_STARTUP { display "Startup type" parent CYGPKG_HAL_ARM_AEB
--- a/packages/hal/arm/arch/current/ChangeLog +++ b/packages/hal/arm/arch/current/ChangeLog @@ -1,3 +1,16 @@ +1999-10-14 Jesper Skov <jskov@cygnus.co.uk> + From James Ingham <jingham@cygnus.com>: + * src/PKGconf.mak: Make sed invocation Solaris safe. + +1999-10-11 Jesper Skov <jskov@cygnus.co.uk> + + * src/vectors.S (reset_vector): Always execute PLATFORM_SETUP1. + +1999-10-08 Jonathan Larmour <jlarmour@cygnus.co.uk> + + * src/arm.ld (SECTION_bss): Make *(.bss*) rather than just .bss, to + cater for nickc's BSS gc improvements. + 1999-09-23 Gary Thomas <gthomas@cygnus.co.uk> * src/vectors.S (call_exception_handler): Change on 09-19 messed up
--- a/packages/hal/arm/arch/current/include/pkgconf/hal_arm.h +++ b/packages/hal/arm/arch/current/include/pkgconf/hal_arm.h @@ -73,6 +73,7 @@ }}CFG_DATA */ #undef CYGHWR_HAL_ARM_DUMP_EXCEPTIONS + /* -------------------------------------------------------------------*/ #endif /* CYGONCE_PKGCONF_HAL_ARM_H */ /* EOF hal_arm.h */
--- a/packages/hal/arm/arch/current/src/PKGconf.mak +++ b/packages/hal/arm/arch/current/src/PKGconf.mak @@ -46,7 +46,7 @@ include $(COMPONENT_REPOSITORY)/pkgconf/ arm.inc: hal_mk_defs.c ../include/hal_arch.h $(CC) ${CFLAGS} $(INCLUDE_PATH) -S $< - grep -w 'equ' hal_mk_defs.s | sed -e's/#//' >arm.inc + grep -w 'equ' hal_mk_defs.s | sed -e 's/#//' >arm.inc $(RM) hal_mk_defs.s vectors.stamp: $(PACKAGE)_vectors.o
--- a/packages/hal/arm/arch/current/src/arm.ld +++ b/packages/hal/arm/arch/current/src/arm.ld @@ -108,7 +108,7 @@ GROUP(libtarget.a libgcc.a) #define SECTION_bss(_region_, _vma_, _lma_) \ .bss _vma_ : _lma_ \ { __bss_start = ABSOLUTE (.); \ - *(.scommon) *(.dynbss) *(.bss) *(COMMON) \ + *(.scommon) *(.dynbss) *(.bss*) *(COMMON) \ __bss_end = ABSOLUTE (.); } \ > _region_
--- a/packages/hal/arm/arch/current/src/arm_stub.c +++ b/packages/hal/arm/arch/current/src/arm_stub.c @@ -402,4 +402,5 @@ void __skipinst (void) } + #endif // CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
--- a/packages/hal/arm/arch/current/src/vectors.S +++ b/packages/hal/arm/arch/current/src/vectors.S @@ -116,11 +116,18 @@ PTR(start) // This is copied to 0x28 for // location 0x40 is used for storing DRAM size if known // for some platforms. +// Other vectors + .balign 16 // Should be at 0x50 + .balign 32 + .text // Startup code which will get the machine into supervisor mode .global reset_vector .type reset_vector,function reset_vector: + PLATFORM_SETUP1 // Early stage platform initialization + // which can set DRAM size at 0x40 + // see <cyg/hal/hal_platform_setup.h> #if defined(CYG_HAL_STARTUP_RAM) && \ !defined(CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS) @@ -130,16 +137,14 @@ reset_vector: beq start #endif - PLATFORM_SETUP1 // Early stage platform initialization - // which can set DRAM size at 0x40 - // see <cyg/hal/hal_platform_setup.h> // We cannot access any LED registers until after PLATFORM_SETUP1 LED 7 mov r0,#0 // move vectors // We cannot perform a store until after PLATFORM_SETUP1 str r0, [r0,#0x40] // DRAM size to zero => unknown - ldr r1,.__exception_handlers + + ldr r1,=__exception_handlers #ifndef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS // Wait with this if stubs are included (see further down). ldr r2,[r1,#0x04] // undefined instruction @@ -149,6 +154,8 @@ reset_vector: #endif ldr r2,[r1,#0x08] // software interrupt str r2,[r0,#0x08] + + #if defined(CYG_HAL_STARTUP_RAM) // Ugly hack to get into supervisor mode ldr r2,[r1,#0x40] @@ -295,7 +302,7 @@ init_done: // // Exception handlers -// Assmumption: get here from a Supervisor context [mode] +// Assumption: get here from a Supervisor context [mode] // .code 32 undefined_instruction:
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/cma230/current/ChangeLog @@ -0,0 +1,59 @@ +1999-10-14 Jesper Skov <jskov@cygnus.co.uk> + + * misc/STUBS_config: Updated. + +1999-08-16 John Dallaway <jld@cygnus.co.uk> + + * include/pkgconf/hal_arm_cma230.h: + + Proper case various display strings. + +1999-06-09 John Dallaway <jld@cygnus.co.uk> + + * include/pkgconf/hal_arm_cma320.h: Remove the platform attribute + from cdl_package CYGPKG_HAL_ARM_CMA230 since the platform + is now specified by cdl_option CYGHWR_HAL_ARM_CMA230_*. + +1999-06-07 Gary Thomas <gthomas@cygnus.co.uk> + + * images/: + * images/gdb_module.rom: New files - prebuilt ROM image. + + * misc/STUBS_config: Was using wrong platform. + +1999-06-04 Gary Thomas <gthomas@cygnus.co.uk> + + * src/cma230_misc.c: Fix problems with interrupts. First the + interrupt source register (ISR) contains all pending interrupts + and thus needs to be manually masked against those that are + enabled. Second, the interrupt mask register does not read + back properly, so a memory shadow is necessary. + + +1999-05-20 Gary Thomas <gthomas@cygnus.co.uk> + + * include/pkgconf/hal_arm_cl7211.h: Move RTC setup here. + +//=========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//===========================================================================
new file mode 100644 index 0000000000000000000000000000000000000000..126508e4a77503e02e90638998955b3b9709f364 GIT binary patch literal 14260 zc$~dk4|G+<nV);#d-?NtBsU>Q2x+;2pr}D_AYx2o`y^<oq5Ak|Y310kMr*fLvl^{? z4n2J#5iJcgAS#QoxmLDiUAs%w)AjUpx1lIUDZ3~9QPHN|_wLQz2f?+mOO>{fx4+-q zx#SUIrJl3<&Y3fFXTF*F=KH?+{>;oPAL;YT$0dPZP+lxV(Hcz@9Yw0wMbQgLY(Ekb zMHW(<;J58|m-TsJa|=?^t43apya0It@;LIj$kFY$glz%rTvb<&yc~Hw@_OWz$SaXI zB5y<<Lmoq3gS-a0f!siDA-9l^F6i?{n~+xYc@eQP9T6fLwwj!9e6bT2&wF99Q`Y|} zo2_{9aG!Sw^NW#-)4NeVsLDH0{*@|kNBOWSi;=IUyYSsT1!*?vV!OInmex6k=on&o z6yts;Do%X2K%96qB2EkoapH6~J3MLkkA9Ot-*D;%M_WDbxDYp{H8Jn_<bFFXL~(ki z=y#`xq?~8+ZaZBL*vaDNbV!Je1tHFLGvLIINdtCz>A>fmZ1JXJGez&QMzP5g#wO5W zlNYx(dG+y4UR`RFw^VdH*6vN79=F}E3o(4)keWO35p$!?2J9L&M{&*^am-O~<&2N| z5XN7H@!Job|JoW4jjgRl|M+VQWA25R`_#enpS%Cy*xb9dk3V+=b5G;C51v0=mmEBQ zx)xykEaYY}=AA6;^sn;8364>h>h-LFC%s_&QZ;@I_}8bN^cuyJUc4XekkxGQlgEli zcBhXFoIicehX!2#<Q_X+2)qUh#R(C&(_xf*49ruqCDUahU%NF^Xxi!Gl%38SvC|(H z_o5LWPv)e9{4NE@E<n0ah-3+Je2*GJgm3ZFiwmKH48LwJ(o&>0gIdb3zpd%+d(Hc6 zFPnc^ZG$PUzwa*7ywa?_>Z+>%An9^+-tqA6rOu0>`3K;E*fryLP#?4Uyka37Ar5B< z!?vL-L{ZRgnv|)no@^5dR}*6Y51<DKC#;k!to0tt&l+QMWij4bEAB+Z3Rf7QCHj6r z#J2+O?<_O!WG&q(M4K+`Ev&mHfE5^T*NkspDXwt>91V;oEZZ#uA308$)$CP@NnUll z*?BFSJ;Axcm;*ZNga-Wn0DWbszHR8MftN<&h{AuBTOdS5HQ?qV*D$VOz2wCbU7kSF zsaLHouL}D>11$DK#caUlAukYJPDu0|BQBcNpV3Y9HDB_;w&9qu&C@3>bFl|2gc_4; zX_GYC<_W7aB`|J*xy{qWFEX0d;l%KrkG?wQL0-Xi{1etAbjn_r7dkVJEyoD~ZnlEk z3AnI7ZkqTC^N1G`%cb6)2l%VNpF!~XQj`~>%z1U|kk<ej8^lo@@?tI9yvx~U5vRjm z4ayP7W1dK)fzL+WNV#ki=HX1pN~Sb(Z$=YIhwZ1b*&Uj~Yy5gi_mMY!c@u4R`i^9u zR}I)Q%1pv`Bk?yfkrq2mo0Tu^4E6!qw3ZE^{e!7Iv}Y3`@M@*|K6p7BeIsa}qaV$L zkQZAK@Zo4ipu7rn_!j7KDR|@ocH|$%WS6{e6@8NLVaU#!e#o)e>k(gJB|RN7qnV2w zVRnP}HuUGR^a3H?s*m@9HrU%1;UB@emb;UHC;1p+AFI<LFQ<!UM}rJxfd~1x8-(q- zQiyFxy-0$*whj$Vhr9|CJhC3eSSwr*zhX7;S`B=rTQ@@=^?0*q4Q4cR&yX;ZXW+;u zwijC=CuE-6ULa-dF)w5irzYUELE?)2IlLY7lMer$&F*i@*$bq_9i)TN?X?=**BxGq z;5w7u8t!xMWsJ@BN3rImpaprxy}|YGqI{a$WEuNa${S^db37&69#i!F1;%;IWBqnT zlO9Ev-AYf4{CeK;m*m{GOa2gt7m1U#Me<As4wN6wCU0&^HwbY_FY)nZ(hDc4N0+;G zz~SM9Uk^DRB5wvy`}=5)0PU^E<(e*$^csUX4465jKlV`82sv|%G1!@at<T|qO!EKH z9R5G(%~AZ{Gy(s&2Qq*@nz46?@WI$V-*$MEcdjdpb-^~KgLQGfUs9HTbT;3l{EBXm zvO_soNm`j5ULuEYLh&s=j&I-pGkkl3ZHiX`?&EnC*bh5QUDD@ilE=Q@-=<)QC+2rG z>?P6ips#P^)F)zC$}Hv&%}=ID3$9%=*E@1wNW2b7{GmUiA>ef<`G-9{lFdGor|`_B zg`VOZz#+a2KCq~;e4PwB_j|h1OZnDjhhyejozLw}?@mv_*a^sqX58R()M9_{-JOQ) zg}}opnz#k)L2lWhkhzsON3;Dgr)K_Z8ID_Q#vI*xEu#}}&XZc^ybT@&xaHc*z=lrr zP5d90{0i(TZ6IZ9t4F^g1Yh7y$kXA7?}K~=_L_8nBt`E=`O8Shz_06(FK(ectfXy< zHcI(_)T1s9#u3UE-oP=SCpZ^yEo3=>A?~}tznw_igMIm*^N#OCEHJ`7DP;(IS<0tx zLv{E`pMk!qBfsA5d;E4?4A&RI51A&4x{F28;8aocN}2y1q?3jyGNzqf$JAeXHcV2D z!~Wype^z>K|A|u91?TqfE*dx1R6h@o8?zm7M-=|w01y5KX@!*aSEZf`nXh`?rF~v} zKIkm<@<Hh3SAGA<I+)P`ccD(-q07nW;>2uKZU~7JCd!4-XP~8fprzSaGRv0(=r@<V zi6~o`XXNnEmVV7J>+3Ma0r))y;yTB$7CZUq1NrM<9>Si}l3h+QV=KmXz<CM$Bl<<O z4<U0;M(Qo>eZ+}Bog|W}xgzeENSrT>wcUrk&3T0Q68({AKI-$~bHq&h5wv%5Ot~+y z2I#Qie84_n*e+qp0aE~&?P2Od_*iWZtuJqTXe;&Fbjax5Z1$~`23kOdxK`+>ikYC# zk`mJ3phv%&^)G26s#(7n(yVtS9Any_%YI$XfHlcGl4y1YxGu~c0e&f^C*}a(0dt15 zw*%%RFALt(C_PTtqXv9M1zYhUuw{TfV$8t2%cQ+ODrR^^z)=_phk9uM-$&4obl8ru zj+o6(Ol&>29=;uM8<1^>JdUMV>vhycj%2gZ0c*w?y<Uhpq~6Y1^FtG?c|F!_jf4B< z1aJ=kuIF;!)>mFF#3|&XNTk;waH3yG|FI%zy9vw>U$tTob}I#XY*F+euLl)91{FQ7 z#`q~QBcdgfI&hBOG39JrzBB<YtAGprr~<JnT`t5kkP~+Zaz4~H$r}Xi3Jl0?{94E@ zbe2K6U3o^f@+~{v1bl`-f7+!EopQ9&9kgaVSYUOoNB(HJ)wz{x(h?6koCA9Br$<W9 z#;a}uye?Pra}0ftDcN}&>tCkUKLhJKrq+KfM;@js*%<-sbqW?LGWs^wG6MKQ=?mEI z4?pnR=4zs1$vAwB3GkT&e5%L6<xK#m5$^=;T9<PYxSv$Gp8`I!6h40qd`>FdPv+p> zs&F3#>@)@YWx@)=4h)?XJ}l#bFUojel?(BSj#5@phd3kp3ig`(hQ12HSI62f;hqcT z3tM|K!JOZeGJhy+TAiV=^>RMyBU-%6`4)Hx{k4(faE#w(vkj*dkHPo!r$f{^GTx{d zRr^UdTT`PLH;jFCiZTqjMJ!Vh;Kn^PIBswJM4U^%A45mII1cXF3E+On^A_MVD%WMZ zPbq#<?%T)p@13Ck<LI9l2e)+sxJ}~RJ^k<maGms*5btv@hZp+$xq$IM{p2dhKjcBw zf-cad+L~r(1^P9K6;nt<()F5|&CU+4p~}}spHlh=eIjgMg!Zj!jffSZ1=<YnW$*!h zm)ocN`FD|rHPSmle>J+j%C}X-F+9#+Axv1C6bay|D+@6O>bxz8$y=rWcf=!}_X1DY zxr*m8{}PP3q}KOc-w!i(r>(TzXC-ba_Y3&0sr7wu&ZT26wl72dEa10P`1?8rS~L|m zJ0+iNcGjqMLH|T!Rlc0Ys>b$3sf_vkx+dTEsxW}}G~J({<zke_%grYz;L~)#ZyN_! zHUV6*!m|u`UJE?01O4YKJSR<H4?+`+5yVs+s}lbIoYCxwa^U(oO`L!&9k#JKPhkU_ zNWI3G9f(10s0XO4nlHEAZ(waa<C;3k`E7UPpU2Kv%Hk?k2JBJI_XQ>aj%O*fF#%i< z7y16{a{8vv{5O2kYW7E;Eq}_&zF$*ogbxZ7?dQR}rww&Z)N|3<am9FlIgNRr1P(mE zfNngI+ujIzt(NrIqkOVG5|_FCxqg|9mz7^O2)}F(;yye525=K<J-I%6z4Xcbvn;ts zF)m}PxpJ+YUN!2fS++Vno`-S1+!*L2Vx<uz8|i_1&>#5=%Ad9{{<d72!6%Y2l25ye zUxRj~(39A|``ZB5X85on^wrI^sff8gmGtBK9pssX`4TDO@;#|j8SgEIOe~gi)FbOO zv+MhinWy#Ijvpef{(BMMjJ94cT-%X>gm@7vnG#mF$FYcKfOGCTf*3t%W4(w4)}{P) zi~jF<j5E0gopFI!<4#d$X~Np<t!@K<l6_tbHa%2He*ip61HQl0>41#qTeDL1vEY~f zSf0U%gmVfqUSvL;VV^8y9&z6eU*<P@F^pHB;_DZY{^b*U!s~!9WB2OD*{M*~;~9B& zw0KrZOI+({;yxJ@F+R_eXFRt17-a}CxA4c7es*qr9aCqEJXb8Q4fwwo`G7~?x(W2Z zQm%2pTTVX%WxZtpI^-s|7UdA?X-hAo-L;ZVCG1wEvezbT@WN4lFJO#lrLv!uIrh3% z+3RY+UaDYg0BgctSJNjoQ|=DPNs@9Df5hXNDq}zTsclkr4|x$ISAXn*{`lQE{jtZJ zCUxwCj*0bM!g*R=_IRcz;xA_m>K5gzG6r9YHIqM48JCFtqyfg3{w8@r{gMD5<ynH# zFYp0RwB_to0lJW`Z9JPm>{$RAC0s)7=|Hap=g?>Nh_*GucIvbV+e_A;)6V)=Lucy> z)(uQhm;2q8bLJ!zo}@p|d{(Pi-9KMbXDqvByefjdZ*HMpaRd9rajVbt>6Cpmzt42e zamHo>Ze61gKQqSkD)%;VI0`<m!+u@|eY!5tMLh55-{R@Dy&1hWnc>+<6#V!j;woWm z@oFq4{~nTeh8Di-@Li|w9P9DjX!&=J0`pZuMj=CPEAK9iPLKDAF+VnZMx?qt>S@{% z()ZzUG;V>OZ87}2LXCKt&<DUv)UKE3!%<)7E4+G<I)GCzaO(h0y}+#lIQ0Uz4&c-a z+&a8gd^h5owA`Ncb+kEd?tnhIyt6=S%kq7Q8sJo;bo5-*&sFt-?v{Pg#{RUI{hts; zw3V%&6h%A(u`5Lp&p{S{V$3d7jytO%9|OH#rsS&M_;6b`5zgc5sDBES{$czynRJC- ztp^=U=%X-n?MivRwQuNJ-A?!XAq!vSCFw(NVwq=BV&4$Q{kCk|H&l%B232lg43Y5b zW@Ak1xFF`I99Ke5-v3AH0z3VwIOq1qx?lAtKKH6J#|iqGO22+Z^_Bf3ZT5M&I)L=z z+Cn_XdbjU!=#t@GGeL8tohoNP>KySA{ZfEs8dUlCeum-!&(?iDb<6Y7gp!4&%5M60 zYlVz`84pokQjY!mfXxzy?eCw_o!#nO+us}1e=i{|F-1|bam>!s2hwTV<+-c$SJNSN z|Mj{&XXW{8ONw?kw_kZqKf?a<LtxKWrar7rp5L)dJp{Y0)2FaHP@cjwnJDeA)<32P zHR~W~^B+Tq(^dU)d8R1u{xC){#wfxVVQUNG!Of5j<R<cQ-v;^;_GC7@QJ!Z7?fvBM z8tSo)f63gzdP1o4eG<}I><9@%#%;Q#?skH)i~~ctb$<-jfPPs+bF@0ppuQ99k!Lhm zPxnx6GSH80@KZKw5`WaAj`ROX;V%6-IoIAH&0Ow`=HN;m*CqPAx_ID2*=`MG5j>8S z^kiaHuph>Q@Ke8+iBZ4zcRTr@%X`qH<bN0V{|e;I6l1!nTHXWrJg!uCTUu>TMx!1! zI?#WauZMH`2e`D3^GAhm+oOy9`vJG!?22IC!nitD4(>dpErYM}D&$k@*LbJ5g!^B@ zG)WlJ7k#H60Ss~HKH1qgrpx6%LEmaci;%o~TbTyzRkV-ck+LE6p5+quKgD<^N5{&2 zW%_$61{!dGJw{#3b5Fn<3(r1_KmD6*CRb)66YL8^(POc?=QhK>PC3i|@LX2)ee;9t ziSar|$g@t{-Oo1Y$m$yiztRmucijY;d8Jwu9YGpII)*fYbP6dvM-&-ICQ=>JVx(52 zE~MQ^N0Cx&zntsVohFRM@?^$+m-%&{R%QChHrg5(bDOF3_ffu*@CvT(OnH{WZwudf zvxK8*kX_z`n0DyWpss2;@3*EPR2wdwCHz=V-H{aP%jv(D5Pqg=*YvS=T^nns&sjKM z$bDC+ubASmW0n)ZvL3jU@-8N(U^N}Fx#q);gVTu<bqM`>A=k+_OW;G!UJGn#v4}Xg zlON!XA*Q;YzB;1s4cQuf*5X)1^7$6Dw^$Kp?|jOkf2V<XW_Zbk@Nbb;Befuv#eJIB zA&1{RyfV)BBA8#j4<PTGG1gAh>$>6UwOwu~Zu2$AaC_W;Phti4;{lHSejF8A5OHQ- zJvRSylo!ldKUWmJjg-6?a?;lA6gNbi;^+##PpT-M|FWxHvDcklkA6r^7r_?JUGM1d z<37*z6<~b@cKX5(eEY12r}FHkA`(SRg7kdWrwe`hY#ie@Mx3V?*y;8rJN?OpC^wLP zK0a3g=HZJ(5#siu?MOD#E~MQ^2araPthr~WGNekRYNVRE#6K@ZSqisZ2yuptwY8>Z z%kSG$RWjd@qAZb)e?V+v7fGG&gslxJ(bkzNS8cz`Y0I-(Q}WEI4YJnOq!%lg<7f51 z{VbR~e=gp;B3Jh-ZTt9U3VABcdyNt55!idZuG0ybkrdxnXfj6YcG#xnO{LzC2K-?B zTD&CURD<68F?Rv{>*9iyypJsjwb+^l+E1ljLeBeNJu=meG}tAx8`!?VC?a1#Z+xfo zT5e78OouQ$YYX`GS@Nr8LyG(g>K36cucal$`&;6rw@-EWzJT~027Y?sRQDk9RJc7& z+{`iDbl{e4wB0Q9dngr2<@3xT5^-*6B<-fSTH8aVv_(a*Mbeh=zF_SJ!@+vPE!R1z zY<4(X_p*%diSK7Zo3XxRX@S@bvUaD4Q$Vv|Zw5LvIqJ)wNNkh7>_4h=>O6H1#+Y&e z)+gU#h)(&=fxKdT73LYJjK{Wm<uXR<k$2%$jVZTb0c}-Mo^2d}-Po1mJIUD02>khF zeypeb`Iz$cgBW3a-#>S+D{|I#J=Voo6@DvZig(M<UGz1o$Lvx7`x(H74e$fsi$}9( z#i=3X|E`9waC~1k)^q^t9rThS>1IvnQ}Y1*c=u}X?)XBi+1TqXfi66L;d&=HFZ`B# z*L48?uMd+SoNMIFbBF5V$47@e6MTp75{+XFIj;Eg@Y*@>htGm9NBw&eKg<mr3()^P z)ju1&70I!s?=1}8gB+H8DlwbAcK8bI^p}in@|;eq-JIb&mJ+_-Fb6%|3Z+V{X0OD& z*`x2HRc+2RT0MRlurfD0<a>j9)}v0JB<)oQK7E9~1IJoH-@=;0Hw97utrPV7Ezk@w zurELsSeFkO{U7XwP>#(p)SI`!4~W9<Q(rK4dS0ES{up^KeD0mPyepFD4oAFU$h>Bq z^a4NC*p+*pqG)4n@(j@PQd9XdV(g5A_xEx<!1eYhf0Osa)O9xWM$!&hNqfr0R<l#z zf*6keb+T!Qc4L(BKVrbJSe3Rwn|iC6_c(e~y%*t~@bBeW+MAiMwJ*bO*6&9h?|Vcd z;hdyyu%7V37!UUEsd?f{Qs-&bV(8M>GX>D4sMo^wz6^C)t30EAJ@YKr9bYWpePP|t z1ZUHJER&Gy)cS3I&+@FxIw)yWLSDVivxv>$??L#XEvX{R4cq$kWcVymv7G)w)U*~k zx6ps>w>v2h!jFHV!8pGK-m#oml5`B>@)~23$9wO$_}(yXIPYOSyFz{5ckoSn@fh-6 zd_N>(cH8}1<Tcg|FRVS1`L0}7m%R5xJo(lGfcqxuj#0MaZ+LU)BMQ6ZFliKjpJ%J? zrC6thdeH;@(F1;gc7^i3Uu?{)-H__Ex>AI-TACcoWSfjlcFY0X3T3lj;k{NZ{KonJ zzv&gsx!n>)ORbMT#)}j5Z9C8L{x9d3JQa@&)yR8EzRPKOZeG9rylC0vMH!2crzq#b zai21VErf2lfU?l`kaIilw&Z>0Veg&ON>-qw3D5RhRC_p~=Hi}A!iTi!N3KfOFYAlM z)SkRTzJWFTcdc5V_g@%~_3t7tU)JYEdk~jc*E!S0O)h+qJz?v$4Cgp=Rt(u>-I=pu zz~zaRC3$gsj}TvU^OCJbp4}=6s2h_@WIwItdIw7LEz0`8ou<Dt)&@Uezp!5Obm<$v z=KbU}_1W*e;H?w)xF*`=*-8}s@@)Ssrb><X4B%O>+1H;Lui^~7ZgREwb)_@o(A$Ye zyj69+pK=*&Y%Of<6Q_M0g1s<22V*^c+NU@DsRy8EdXTmuZAY?^UO*z;CIv@5y^(&1 z^@hav0=~mjdZ<`H5Ai)TbV3<)LIHFfc@s0A@aCG}Grp_wU50NH-{tt0_W<}V$G3^^ zGJIF#+u;4SK!2mzaZhK@J)agIer6rSo7uQ<-UILNIAilCu-);!UatMP1G0Ghf(|EW z4`PsaBDVXr!lV<8C4C(#5{^8}5T(?`(2=m|@IN#aV+Z<?Hg7V|%9Wn{EYFZ?`@9(M zi;YM8x6ahHMyJPf;gBtT@@Ol3uSUK*FpJY7UYzcace&w_i_;e9Lc3H4Ivwco-wp4< z8gE4YbNav54)4Y`o4%{dx0BHQ&+JV0dA;!6@~lId*^7>5<o#dbXokFeF6-}w-Kwv= zCyGCm%C?1_NP>ApzQKGaoBb)@8UFxq7wK<i_`bT>%17Iq8NO?+6EnOYWqtqjP0-_F z_zIUoK3?a3kv`Q%&yw$dxE9^%xAwZ&&*>1>#C<TpyDKdC2y)63eb1Tl?2&z8yWlHM z7otJa;ggDGwOXlN8=7y|g7yu%=GS!?c5SES*AZS5aWiDDuX+mQr%-+x<ti<auF~S> z>?+iw{1nPhqfESK&);2ARce>e&M{u*{|>^bdERA0ot-5A^%(KGP~pWn08@LuI0fq< zUI9*S4o<h`;N+sr`^{Xu-r*hKtWpPaYHw?$fJ+*8BCkUJw!pVY8UfB)4$iEzYUeMg zyJF#$^;fO^t6N)dyPbcGxUpG?Ypq(5K)TjifHYq$LU~2oefNCz?)&aFKX+IAZTH-B zUt4=sRh2o<y#Kaa+wZ=o!JN}tW45ksUyITM&>LcoRlmByWIlg2$2CoP4kyfYsJm5& zbpRTh|C&Wji?6+oaE*)Bwwkx!eb3j|www31-}BYGzQR$^uL15P`ZV5k-<@~DuWY>G z?sjwS84&9M-`za#-z&3W^FAW|1;c&hZ^<<1&uM3mnZ@tJ;LV)!M06Ve+XY+uzZD4I AH~;_u
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/cma230/current/include/hal_cache.h @@ -0,0 +1,169 @@ +#ifndef CYGONCE_HAL_CACHE_H +#define CYGONCE_HAL_CACHE_H + +//============================================================================= +// +// hal_cache.h +// +// HAL cache control API +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): nickg, gthomas +// Contributors: nickg, gthomas +// Date: 1998-09-28 +// Purpose: Cache control API +// Description: The macros defined here provide the HAL APIs for handling +// cache control operations. +// Usage: +// #include <cyg/hal/hal_cache.h> +// ... +// +// +//####DESCRIPTIONEND#### +// +//============================================================================= + +#include <cyg/infra/cyg_type.h> + +//----------------------------------------------------------------------------- +// Cache dimensions + +// Data cache +#define HAL_DCACHE_SIZE 0 // Size of data cache in bytes +#define HAL_DCACHE_LINE_SIZE 0 // Size of a data cache line +#define HAL_DCACHE_WAYS 0 // Associativity of the cache + +// Instruction cache +#define HAL_ICACHE_SIZE 0 // Size of cache in bytes +#define HAL_ICACHE_LINE_SIZE 0 // Size of a cache line +#define HAL_ICACHE_WAYS 0 // Associativity of the cache + +#define HAL_DCACHE_SETS (HAL_DCACHE_SIZE/(HAL_DCACHE_LINE_SIZE*HAL_DCACHE_WAYS)) +#define HAL_ICACHE_SETS (HAL_ICACHE_SIZE/(HAL_ICACHE_LINE_SIZE*HAL_ICACHE_WAYS)) + +//----------------------------------------------------------------------------- +// Global control of data cache + +// Enable the data cache +#define HAL_DCACHE_ENABLE() + +// Disable the data cache +#define HAL_DCACHE_DISABLE() + +// Invalidate the entire cache +#define HAL_DCACHE_INVALIDATE_ALL() + +// Synchronize the contents of the cache with memory. +#define HAL_DCACHE_SYNC() + +// Purge contents of data cache +#define HAL_DCACHE_PURGE_ALL() + +// Set the data cache refill burst size +//#define HAL_DCACHE_BURST_SIZE(_size_) + +// Set the data cache write mode +//#define HAL_DCACHE_WRITE_MODE( _mode_ ) + +//#define HAL_DCACHE_WRITETHRU_MODE 0 +//#define HAL_DCACHE_WRITEBACK_MODE 1 + +// Load the contents of the given address range into the data cache +// and then lock the cache so that it stays there. +//#define HAL_DCACHE_LOCK(_base_, _size_) + +// Undo a previous lock operation +//#define HAL_DCACHE_UNLOCK(_base_, _size_) + +// Unlock entire cache +//#define HAL_DCACHE_UNLOCK_ALL() + +//----------------------------------------------------------------------------- +// Data cache line control + +// Allocate cache lines for the given address range without reading its +// contents from memory. +//#define HAL_DCACHE_ALLOCATE( _base_ , _size_ ) + +// Write dirty cache lines to memory and invalidate the cache entries +// for the given address range. +//#define HAL_DCACHE_FLUSH( _base_ , _size_ ) + +// Invalidate cache lines in the given range without writing to memory. +//#define HAL_DCACHE_INVALIDATE( _base_ , _size_ ) + +// Write dirty cache lines to memory for the given address range. +//#define HAL_DCACHE_STORE( _base_ , _size_ ) + +// Preread the given range into the cache with the intention of reading +// from it later. +//#define HAL_DCACHE_READ_HINT( _base_ , _size_ ) + +// Preread the given range into the cache with the intention of writing +// to it later. +//#define HAL_DCACHE_WRITE_HINT( _base_ , _size_ ) + +// Allocate and zero the cache lines associated with the given range. +//#define HAL_DCACHE_ZERO( _base_ , _size_ ) + +//----------------------------------------------------------------------------- +// Global control of Instruction cache + +// Enable the instruction cache +#define HAL_ICACHE_ENABLE() + +// Disable the instruction cache +#define HAL_ICACHE_DISABLE() + +// Invalidate the entire cache +#define HAL_ICACHE_INVALIDATE_ALL() + +// Synchronize the contents of the cache with memory. +#define HAL_ICACHE_SYNC() + +// Set the instruction cache refill burst size +//#define HAL_ICACHE_BURST_SIZE(_size_) + +// Load the contents of the given address range into the instruction cache +// and then lock the cache so that it stays there. +//#define HAL_ICACHE_LOCK(_base_, _size_) + +// Undo a previous lock operation +//#define HAL_ICACHE_UNLOCK(_base_, _size_) + +// Unlock entire cache +//#define HAL_ICACHE_UNLOCK_ALL() + +//----------------------------------------------------------------------------- +// Instruction cache line control + +// Invalidate cache lines in the given range without writing to memory. +//#define HAL_ICACHE_INVALIDATE( _base_ , _size_ ) + +//----------------------------------------------------------------------------- +#endif // ifndef CYGONCE_HAL_CACHE_H +// End of hal_cache.h
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/cma230/current/include/hal_cma230.h @@ -0,0 +1,95 @@ +#ifndef CYGONCE_HAL_CL7211_H +#define CYGONCE_HAL_CL7211_H + +/*============================================================================= +// +// hal_cl7211.h +// +// HAL Support for Kernel Diagnostic Routines +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 1999-04-19 +// Purpose: Cogent CMA230 hardware description +// Description: +// Usage: #include <cyg/hal/hal_cma230.h> +// +//####DESCRIPTIONEND#### +// +//===========================================================================*/ + +// Note: these defintions match the documentation, thus no attempt is made +// to sanitize (mangle) the names. Also, care should be taken to keep this +// clean for use in assembly code (no "C" constructs). + +#define CMA230_ISR 0x0F600000 // Interrupt source register - Read only +#define CMA230_CLR 0x0F600008 // Clear interrupt source - Write only +#define CMA230_IMRr 0x0F600010 // Interrupt mask register - Read only +#define CMA230_IMRw 0x0F600018 // Interrupt mask register - Write only +#define CMA230_ACK1 0x0F600020 // Interrupt acknowledge slot 1 - Read only +#define CMA230_ACK2 0x0F600028 // Interrupt acknowledge slot 2 - Read only +#define CMA230_ACK3 0x0F600030 // Interrupt acknowledge slot 3 - Read only + +#define CMA230_TC_COUNT 0x0F700020 // Timer value - 16 bits - Read only +#define CMA230_TC_PRELOAD 0x0F700028 // Timer preload - 16 bits - Write only +#define CMA230_TC_CLEAR 0x0F700030 // Timer clear - Write only +#define CMA230_TC_ENABLE 0x0F700038 // Timer enable/start - Write only + +// Motherboard definitions + +#define CMA101_DUARTB 0x0E900000 // Base address +#define CMA101_DUARTB_RHR 0x0E900000 // Receive holding register +#define CMA101_DUARTB_THR 0x0E900000 // Transmit holding register +#define CMA101_DUARTB_LBR 0x0E900000 // Low byte of baud rate +#define CMA101_DUARTB_IER 0x0E900008 // Interrupt enable +#define CMA101_DUARTB_HBR 0x0E900008 // High byte of baud rate +#define CMA101_DUARTB_ISR 0x0E900010 // Interrupt status +#define CMA101_DUARTB_FCTL 0x0E900010 // FIFO control +#define CMA101_DUARTB_LCTL 0x0E900018 // Line control +#define CMA101_DUARTB_MCTL 0x0E900020 // Modem control +#define CMA101_DUARTB_LSR 0x0E900028 // Line status +#define CMA101_DUARTB_MSR 0x0E900030 // Modem status +#define CMA101_DUARTB_SCR 0x0E900038 // Scratch + +#define CMA101_DUARTA 0x0E900040 // Base address +#define CMA101_DUARTA_RHR 0x0E900040 // Receive holding register +#define CMA101_DUARTA_THR 0x0E900040 // Transmit holding register +#define CMA101_DUARTA_LBR 0x0E900040 // Low byte of baud rate +#define CMA101_DUARTA_IER 0x0E900048 // Interrupt enable +#define CMA101_DUARTA_HBR 0x0E900048 // High byte of baud rate +#define CMA101_DUARTA_ISR 0x0E900050 // Interrupt status +#define CMA101_DUARTA_FCTL 0x0E900050 // FIFO control +#define CMA101_DUARTA_LCTL 0x0E900058 // Line control +#define CMA101_DUARTA_MCTL 0x0E900060 // Modem control +#define CMA101_DUARTA_LSR 0x0E900068 // Line status +#define CMA101_DUARTA_MSR 0x0E900070 // Modem status +#define CMA101_DUARTA_SCR 0x0E900078 // Scratch + +/*---------------------------------------------------------------------------*/ +/* end of hal_cma230.h */ +#endif /* CYGONCE_HAL_CMA230_H */
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/cma230/current/include/hal_diag.h @@ -0,0 +1,67 @@ +#ifndef CYGONCE_HAL_DIAG_H +#define CYGONCE_HAL_DIAG_H + +/*============================================================================= +// +// hal_diag.h +// +// HAL Support for Kernel Diagnostic Routines +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): nickg, gthomas +// Contributors: nickg, gthomas +// Date: 1998-09-11 +// Purpose: HAL Support for Kernel Diagnostic Routines +// Description: Diagnostic routines for use during kernel development. +// Usage: #include <cyg/hal/hal_diag.h> +// +//####DESCRIPTIONEND#### +// +//===========================================================================*/ + +#include <pkgconf/hal.h> + +#include <cyg/infra/cyg_type.h> + +/*---------------------------------------------------------------------------*/ +/* functions implemented in hal_diag.c */ + +externC void hal_diag_init(void); +externC void hal_diag_write_char(char c); +externC void hal_diag_read_char(char *c); + +/*---------------------------------------------------------------------------*/ + +#define HAL_DIAG_INIT() hal_diag_init() + +#define HAL_DIAG_WRITE_CHAR(_c_) hal_diag_write_char(_c_) + +#define HAL_DIAG_READ_CHAR(_c_) hal_diag_read_char(&_c_) + +/*---------------------------------------------------------------------------*/ +/* end of hal_diag.h */ +#endif /* CYGONCE_HAL_DIAG_H */
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/cma230/current/include/hal_platform_ints.h @@ -0,0 +1,65 @@ +#ifndef CYGONCE_HAL_PLATFORM_INTS_H +#define CYGONCE_HAL_PLATFORM_INTS_H +//========================================================================== +// +// hal_platform_ints.h +// +// HAL Interrupt and clock support +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 1999-04-21 +// Purpose: Define Interrupt support +// Description: The interrupt details for the CMA230 are defined here. +// Usage: +// #include <cyg/hal/hal_platform_ints.h> +// ... +// +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#define CYGNUM_HAL_INTERRUPT_unused 0 +#define CYGNUM_HAL_INTERRUPT_ABORT 1 +#define CYGNUM_HAL_INTERRUPT_SERIAL_B 2 +#define CYGNUM_HAL_INTERRUPT_SERIAL_A 3 +#define CYGNUM_HAL_INTERRUPT_TIMER 4 +#define CYGNUM_HAL_INTERRUPT_ETHER_PP 5 // Ethernet or Parallel port +#define CYGNUM_HAL_INTERRUPT_SLOT1 6 +#define CYGNUM_HAL_INTERRUPT_SLOT2 7 +#define CYGNUM_HAL_INTERRUPT_SLOT3 8 + +#define CYGNUM_HAL_ISR_MIN 0 +#define CYGNUM_HAL_ISR_MAX 8 +#define CYGNUM_HAL_ISR_COUNT (CYGNUM_HAL_ISR_MAX+1) + +// The vector used by the Real time clock +#define CYGNUM_HAL_INTERRUPT_RTC CYGNUM_HAL_INTERRUPT_TIMER + +#endif // CYGONCE_HAL_PLATFORM_INTS_H
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/cma230/current/include/hal_platform_setup.h @@ -0,0 +1,53 @@ +#ifndef CYGONCE_HAL_PLATFORM_SETUP_H +#define CYGONCE_HAL_PLATFORM_SETUP_H + +/*============================================================================= +// +// hal_platform_setup.h +// +// Platform specific support for HAL (assembly code) +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 1999-04-21 +// Purpose: Cogent CMA230 platform specific support routines +// Description: +// Usage: #include <cyg/hal/hal_platform_setup.h> +// +//####DESCRIPTIONEND#### +// +//===========================================================================*/ + +#include <cyg/hal/hal_cma230.h> // Platform specific hardware definitions + +#define PLATFORM_SETUP1 // Nothing special needed + + +/*---------------------------------------------------------------------------*/ +/* end of hal_platform_setup.h */ +#endif /* CYGONCE_HAL_PLATFORM_SETUP_H */
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/cma230/current/include/pkgconf/hal_arm_cma230.h @@ -0,0 +1,147 @@ +#ifndef CYGONCE_PKGCONF_HAL_ARM_CMA230_H +#define CYGONCE_PKGCONF_HAL_ARM_CMA230_H +// ==================================================================== +// +// pkgconf/hal_arm_cma230.h +// +// HAL configuration file +// +// ==================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +// ==================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 1999-04-21 +// Purpose: To allow the user to edit HAL configuration options. +// Description: +// +//####DESCRIPTIONEND#### +// +// ==================================================================== + + +/* --------------------------------------------------------------------- + {{CFG_DATA + + cdl_package CYGPKG_HAL_ARM_CMA230 { + display "Cogent Computer Systems CMA230 board" + type radio + parent CYGPKG_HAL_ARM + description " + The cma230 HAL package provides the support needed to run + eCos on a Cogent Computer Systems CMA230 board." + } + + cdl_option CYGHWR_HAL_ARM_CMA230_STARTUP { + display "Startup type" + parent CYGPKG_HAL_ARM_CMA230 + #type count + type enum + legal_values ram rom stubs + startup + description " + When targetting the CMA230 board it is possible to build + the system for either RAM bootstrap or ROM bootstrap(s). Select + 'ram' when building programs to load into RAM using onboard + debug software such as Angel or eCos GDB stubs. Select 'rom' + when building a stand-alone application which will be put + into ROM. Selection of 'stubs' is for the special case of + building the eCos GDB stubs themselves." + } + + }}CFG_DATA */ + +#define CYGHWR_HAL_ARM_CMA230_STARTUP ram + +/* --------------------------------------------------------------------- + {{CFG_DATA + cdl_option CYGHWR_HAL_ARM_CMA230_DIAG_PORT { + display "Diagnostic serial port" + parent CYGPKG_HAL_ARM_CMA230 + type enum + legal_values 0 1 + description " + The CMA230 board has two separate serial ports. This option + chooses which of these ports will be used." + } + + }}CFG_DATA */ +#define CYGHWR_HAL_ARM_CMA230_DIAG_PORT 0 + +/* --------------------------------------------------------------------- + {{CFG_DATA + cdl_option CYGHWR_HAL_ARM_CMA230_DIAG_BAUD { + display "Diagnostic serial port baud rate" + parent CYGPKG_HAL_ARM_CMA230 + type enum + legal_values 9600 19200 38400 115200 + description " + This option selects the baud rate used for the diagnostic port. + Note: this should match the value chosen for the GDB port if the + diagnostic and GDB port are the same." + } + + }}CFG_DATA */ +#define CYGHWR_HAL_ARM_CMA230_DIAG_BAUD 38400 + +/* --------------------------------------------------------------------- + {{CFG_DATA + cdl_option CYGHWR_HAL_ARM_CMA230_GDB_PORT { + display "GDB serial port" + parent CYGPKG_HAL_ARM_CMA230 + type enum + legal_values 0 1 + description " + The CMA230 board has two separate serial ports. This option + chooses which of these ports will be used to connect to a host + running GDB." + } + + }}CFG_DATA */ +#define CYGHWR_HAL_ARM_CMA230_GDB_PORT 0 + +/* --------------------------------------------------------------------- + {{CFG_DATA + cdl_option CYGHWR_HAL_ARM_CMA230_GDB_BAUD { + display "GDB serial port baud rate" + parent CYGPKG_HAL_ARM_CMA230 + type enum + legal_values 9600 19200 38400 115200 + description " + This option controls the baud rate used for the GDB connection." + } + + }}CFG_DATA */ +#define CYGHWR_HAL_ARM_CMA230_GDB_BAUD 38400 + +// Real-time clock/counter specifics + +#define CYGNUM_HAL_RTC_NUMERATOR 1000000000 +#define CYGNUM_HAL_RTC_DENOMINATOR 100 +#define CYGNUM_HAL_RTC_PERIOD 5000 // 2us clock + +/* -------------------------------------------------------------------*/ +#endif /* CYGONCE_PKGCONF_HAL_ARM_CMA230_H */ +/* EOF hal_arm_cma230.h */
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/cma230/current/include/pkgconf/mlt_arm_cma230_ram.ldi @@ -0,0 +1,51 @@ +//=========================================================================== +// +// MLT linker script export +// +//=========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//=========================================================================== + +// eCos memory layout - Mon May 17 08:04:39 1999 + +// This is a generated file - do not edit + +MEMORY +{ + ram : ORIGIN = 0x8000, LENGTH = 0x1b8000 +} + +SECTIONS +{ + SECTIONS_BEGIN + SECTION_rom_vectors (ram, 0x8000, LMA_EQ_VMA) + SECTION_text (ram, ALIGN (0x1), LMA_EQ_VMA) + SECTION_fini (ram, ALIGN (0x1), LMA_EQ_VMA) + SECTION_rodata (ram, ALIGN (0x1), LMA_EQ_VMA) + SECTION_rodata1 (ram, ALIGN (0x1), LMA_EQ_VMA) + SECTION_fixup (ram, ALIGN (0x1), LMA_EQ_VMA) + SECTION_gcc_except_table (ram, ALIGN (0x1), LMA_EQ_VMA) + SECTION_data (ram, ALIGN (0x1), LMA_EQ_VMA) + SECTION_bss (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTIONS_END +}
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/cma230/current/include/pkgconf/mlt_arm_cma230_ram.mlt @@ -0,0 +1,11 @@ +version 0 +region ram 8000 1b8000 0 ! +section rom_vectors 0 1 0 1 1 1 1 1 8000 8000 text text ! +section text 0 1 0 1 0 1 0 1 fini fini ! +section fini 0 1 0 1 0 1 0 1 rodata rodata ! +section rodata 0 1 0 1 0 1 0 1 rodata1 rodata1 ! +section rodata1 0 1 0 1 0 1 0 1 fixup fixup ! +section fixup 0 1 0 1 0 1 0 1 gcc_except_table gcc_except_table ! +section gcc_except_table 0 1 0 1 0 1 0 1 data data ! +section data 0 1 0 1 0 1 0 1 bss bss ! +section bss 0 4 0 1 0 0 0 0 !
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/cma230/current/include/pkgconf/mlt_arm_cma230_rom.ldi @@ -0,0 +1,53 @@ +//=========================================================================== +// +// MLT linker script export +// +//=========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//=========================================================================== + + +// eCos memory layout - Thu May 20 11:04:13 1999 + +// This is a generated file - do not edit + +MEMORY +{ + ram : ORIGIN = 0x400, LENGTH = 0x200000 + rom : ORIGIN = 0xe000000, LENGTH = 0x40000 +} + +SECTIONS +{ + SECTIONS_BEGIN + SECTION_rom_vectors (rom, 0xe000000, LMA_EQ_VMA) + SECTION_text (rom, ALIGN (0x1), LMA_EQ_VMA) + SECTION_fini (rom, ALIGN (0x1), LMA_EQ_VMA) + SECTION_rodata (rom, ALIGN (0x1), LMA_EQ_VMA) + SECTION_rodata1 (rom, ALIGN (0x1), LMA_EQ_VMA) + SECTION_fixup (rom, ALIGN (0x1), LMA_EQ_VMA) + SECTION_gcc_except_table (rom, ALIGN (0x1), LMA_EQ_VMA) + SECTION_data (ram, 0x400, FOLLOWING (.gcc_except_table)) + SECTION_bss (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTIONS_END +}
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/cma230/current/include/pkgconf/mlt_arm_cma230_rom.mlt @@ -0,0 +1,12 @@ +version 0 +region ram 400 200000 0 ! +region rom e000000 40000 1 ! +section data 0 1 1 1 1 1 0 0 400 bss ! +section bss 0 4 0 1 0 0 0 0 ! +section rom_vectors 0 1 0 1 1 1 1 1 e000000 e000000 text text ! +section text 0 1 0 1 0 1 0 1 fini fini ! +section fini 0 1 0 1 0 1 0 1 rodata rodata ! +section rodata 0 1 0 1 0 1 0 1 rodata1 rodata1 ! +section rodata1 0 1 0 1 0 1 0 1 fixup fixup ! +section fixup 0 1 0 1 0 1 0 1 gcc_except_table gcc_except_table ! +section gcc_except_table 0 1 0 1 0 0 0 1 data !
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/cma230/current/include/pkgconf/mlt_arm_cma230_stubs.ldi @@ -0,0 +1,52 @@ +//=========================================================================== +// +// MLT linker script export +// +//=========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//=========================================================================== + +// eCos memory layout - Thu May 20 11:01:10 1999 + +// This is a generated file - do not edit + +MEMORY +{ + ram : ORIGIN = 0x1000, LENGTH = 0x7000 + rom : ORIGIN = 0xe000000, LENGTH = 0x40000 +} + +SECTIONS +{ + SECTIONS_BEGIN + SECTION_rom_vectors (rom, 0xe000000, LMA_EQ_VMA) + SECTION_text (rom, ALIGN (0x1), LMA_EQ_VMA) + SECTION_fini (rom, ALIGN (0x1), LMA_EQ_VMA) + SECTION_rodata (rom, ALIGN (0x1), LMA_EQ_VMA) + SECTION_rodata1 (rom, ALIGN (0x1), LMA_EQ_VMA) + SECTION_fixup (rom, ALIGN (0x1), LMA_EQ_VMA) + SECTION_gcc_except_table (rom, ALIGN (0x1), LMA_EQ_VMA) + SECTION_data (ram, 0x1000, FOLLOWING (.gcc_except_table)) + SECTION_bss (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTIONS_END +}
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/cma230/current/include/pkgconf/mlt_arm_cma230_stubs.mlt @@ -0,0 +1,12 @@ +version 0 +region ram 1000 7000 0 ! +region rom e000000 40000 1 ! +section data 0 1 1 1 1 1 0 0 1000 bss ! +section bss 0 4 0 1 0 0 0 0 ! +section rom_vectors 0 1 0 1 1 1 1 1 e000000 e000000 text text ! +section text 0 1 0 1 0 1 0 1 fini fini ! +section fini 0 1 0 1 0 1 0 1 rodata rodata ! +section rodata 0 1 0 1 0 1 0 1 rodata1 rodata1 ! +section rodata1 0 1 0 1 0 1 0 1 fixup fixup ! +section fixup 0 1 0 1 0 1 0 1 gcc_except_table gcc_except_table ! +section gcc_except_table 0 1 0 1 0 0 0 1 data !
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/cma230/current/include/plf_stub.h @@ -0,0 +1,82 @@ +#ifndef CYGONCE_HAL_PLF_STUB_H +#define CYGONCE_HAL_PLF_STUB_H + +//============================================================================= +// +// plf_stub.h +// +// Platform header for GDB stub support. +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998, 1999 Cygnus Solutions. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jskov +// Contributors:jskov, gthomas +// Date: 1999-04-21 +// Purpose: Platform HAL stub support for Cogent CMA230 boards. +// Usage: #include <cyg/hal/plf_stub.h> +// +//####DESCRIPTIONEND#### +// +//============================================================================= + +#include <pkgconf/hal.h> +#include <pkgconf/hal_arm_cma230.h> + +#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + +#include <cyg/infra/cyg_type.h> // CYG_UNUSED_PARAM + +#include <cyg/hal/arm_stub.h> // architecture stub support + +//---------------------------------------------------------------------------- +// Define serial stuff. + +extern void hal_cma230_init_serial(void); +extern int hal_cma230_get_char(void); +extern void hal_cma230_put_char(int c); +extern int hal_cma230_interruptible(int); + +#define HAL_STUB_PLATFORM_INIT_SERIAL() hal_cma230_init_serial() +#define HAL_STUB_PLATFORM_GET_CHAR() hal_cma230_get_char() +#define HAL_STUB_PLATFORM_PUT_CHAR(c) hal_cma230_put_char((c)) +#define HAL_STUB_PLATFORM_SET_BAUD_RATE(baud) CYG_UNUSED_PARAM(int, (baud)) +#define HAL_STUB_PLATFORM_INTERRUPTIBLE (&hal_cma230_interruptible) +#define HAL_STUB_PLATFORM_INIT_BREAK_IRQ() CYG_EMPTY_STATEMENT + +//---------------------------------------------------------------------------- +// Stub initializer. +#define HAL_STUB_PLATFORM_STUBS_INIT() CYG_EMPTY_STATEMENT + +//---------------------------------------------------------------------------- +// Reset. +#define HAL_STUB_PLATFORM_RESET() CYG_EMPTY_STATEMENT + +#endif // ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + +//----------------------------------------------------------------------------- +#endif // CYGONCE_HAL_PLF_STUB_H +// End of plf_stub.h
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/cma230/current/misc/PKGconf.mak @@ -0,0 +1,52 @@ +#=============================================================================== +# +# makefile +# +# hal/arm/cma230/misc +# +#=============================================================================== +#####COPYRIGHTBEGIN#### +# +# ------------------------------------------- +# The contents of this file are subject to the Cygnus eCos Public License +# Version 1.0 (the "License"); you may not use this file except in +# compliance with the License. You may obtain a copy of the License at +# http://sourceware.cygnus.com/ecos +# +# Software distributed under the License is distributed on an "AS IS" +# basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +# License for the specific language governing rights and limitations under +# the License. +# +# The Original Code is eCos - Embedded Cygnus Operating System, released +# September 30, 1998. +# +# The Initial Developer of the Original Code is Cygnus. Portions created +# by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +# ------------------------------------------- +# +#####COPYRIGHTEND#### +#=============================================================================== + +PACKAGE := hal_arm_cma230 +include ../../../../../pkgconf/pkgconf.mak +include ../../../../../pkgconf/system.mak + +ifdef CYG_HAL_STARTUP_STUBS +PROGS := gdb_module +OTHER_PROGS := gdb_module.img +endif +WHEREAMI := misc + +include $(COMPONENT_REPOSITORY)/pkgconf/makrules.prv + +ifdef CYG_HAL_STARTUP_STUBS +gdb_module.img: gdb_module.stamp + $(OBJCOPY) --strip-all gdb_module$(EXEEXT) gdb_module.img.XX + $(OBJCOPY) --change-addresses=0x10038000 gdb_module.img.XX gdb_module.img + $(OBJCOPY) -O binary gdb_module.img gdb_module.bin + $(RM) -f gdb_module.img.XX +endif + + +
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/cma230/current/misc/STUBS_config @@ -0,0 +1,28 @@ +#! /bin/sh + +tcl $1/pkgconf.tcl \ + --target=arm --platform=cma230 --startup=stubs \ + --disable CYGPKG_KERNEL --disable CYGPKG_UITRON \ + --disable CYGPKG_LIBC --disable CYGPKG_LIBM \ + --disable CYGPKG_ERROR --disable CYGPKG_IO \ + --disable CYGPKG_IO_SERIAL --disable CYGPKG_DEVICES_WALLCLOCK \ + --disable CYGPKG_DEVICES_WATCHDOG + +patch <<END_OF_PATCH -p0 +--- pkgconf/hal.h~ Wed Mar 10 13:08:58 1999 ++++ pkgconf/hal.h Thu Mar 11 15:53:16 1999 +@@ -382,10 +382,10 @@ + + }}CFG_DATA */ + +-#undef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS ++#define CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + #undef CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT +-#define CYGDBG_HAL_DEBUG_GDB_CTRLC_SUPPORT +-#define CYGDBG_HAL_DEBUG_GDB_THREAD_SUPPORT ++#undef CYGDBG_HAL_DEBUG_GDB_CTRLC_SUPPORT ++#undef CYGDBG_HAL_DEBUG_GDB_THREAD_SUPPORT + + /* + * NOTE: +END_OF_PATCH
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/cma230/current/misc/gdb_module.c @@ -0,0 +1,64 @@ +//========================================================================== +// +// gdb_module.c +// +// Cirrus CL7211 eval board GDB stubs (module wrapper) +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 1999-05-11 +// Description: Cirrus CL7211 FLASH module for eCos GDB stubs +//####DESCRIPTIONEND#### + +// +// This is the module 'wrapper' for the GDB stubs +// + +#include <pkgconf/hal.h> +#include <cyg/infra/cyg_type.h> +#include <cyg/hal/hal_stub.h> + +#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + +void cyg_start (void) +{ + for(;;) breakpoint(); +} +#else + +#include <cyg/infra/testcase.h> + +void cyg_start (void) +{ + CYG_TEST_INIT(); + CYG_TEST_PASS_FINISH("N/A: Stand-alone GDB stubs only"); +} +#endif + + +
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/cma230/current/src/PKGconf.mak @@ -0,0 +1,41 @@ +#============================================================================== +# +# makefile +# +# hal/arm/cl7211/src +# +#============================================================================== +#####COPYRIGHTBEGIN#### +# +# ------------------------------------------- +# The contents of this file are subject to the Cygnus eCos Public License +# Version 1.0 (the "License"); you may not use this file except in +# compliance with the License. You may obtain a copy of the License at +# http://sourceware.cygnus.com/ecos +# +# Software distributed under the License is distributed on an "AS IS" +# basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +# License for the specific language governing rights and limitations under +# the License. +# +# The Original Code is eCos - Embedded Cygnus Operating System, released +# September 30, 1998. +# +# The Initial Developer of the Original Code is Cygnus. Portions created +# by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +# ------------------------------------------- +# +#####COPYRIGHTEND#### +#============================================================================== + +PACKAGE := hal_arm_cma230 +include ../../../../../pkgconf/pkgconf.mak + +LIBRARY := libtarget.a +COMPILE := hal_diag.c plf_stub.c cma230_misc.c +OTHER_OBJS := +OTHER_TARGETS := +OTHER_CLEAN := +OTHER_DEPS := + +include $(COMPONENT_REPOSITORY)/pkgconf/makrules.src
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/cma230/current/src/cma230_misc.c @@ -0,0 +1,198 @@ +//========================================================================== +// +// cma230_misc.c +// +// HAL misc board support code for ARM CMA230-1 +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 1999-02-20 +// Purpose: HAL board support +// Description: Implementations of HAL board interfaces +// +//####DESCRIPTIONEND#### +// +//========================================================================*/ + +#include <pkgconf/hal.h> + +#include <cyg/infra/cyg_type.h> // base types +#include <cyg/infra/cyg_trac.h> // tracing macros +#include <cyg/infra/cyg_ass.h> // assertion macros + +#include <cyg/hal/hal_io.h> // IO macros +#include <cyg/hal/hal_arch.h> // Register state info +#include <cyg/hal/hal_diag.h> +#include <cyg/hal/hal_intr.h> // Interrupt names +#include <cyg/hal/hal_cache.h> +#include <cyg/hal/hal_cma230.h> // Hardware definitions + +static cyg_uint32 _period; + +// Use Timer/Counter #2 for system clock + +void hal_clock_initialize(cyg_uint32 period) +{ + // Initialize counter + *(volatile cyg_uint16 *)CMA230_TC_ENABLE = 0; // Disable timer + *(volatile cyg_uint16 *)CMA230_TC_CLEAR = 0; // Resets counter + *(volatile cyg_uint16 *)CMA230_TC_PRELOAD = period; + *(volatile cyg_uint16 *)CMA230_TC_ENABLE = 1; // Starts timer + _period = period; +} + +// This routine is called during a clock interrupt. + +void hal_clock_reset(cyg_uint32 vector, cyg_uint32 period) +{ + if (period != _period) { + *(volatile cyg_uint16 *)CMA230_TC_PRELOAD = period; + _period = period; + } +} + +// Read the current value of the clock, returning the number of hardware "ticks" +// that have occurred (i.e. how far away the current value is from the start) + +void hal_clock_read(cyg_uint32 *pvalue) +{ + volatile cyg_int16 *tcct = (volatile cyg_int16 *)CMA230_TC_COUNT; + static cyg_int32 clock_val; + clock_val = *tcct; // Register has only 16 bits + *pvalue = (cyg_uint32)(_period - clock_val); // 'clock_val' counts down and wraps +} + +// +// Early stage hardware initialization +// Some initialization has already been done before we get here. For now +// just set up the interrupt environment. + +// Note: The hardware interrupt mask (read) doesn't seem to give reliable results. +static cyg_uint8 _imrr; +#undef CMA230_IMRr +#define CMA230_IMRr (&_imrr) + +void hal_hardware_init(void) +{ +#if 0 + // Clear and initialize instruction cache + HAL_ICACHE_INVALIDATE_ALL(); + HAL_ICACHE_ENABLE(); +#endif + // Any hardware/platform initialization that needs to be done. + // Reset all interrupt masks (disable all interrupt sources) + *(volatile cyg_uint8 *)CMA230_IMRw = 0; + *(volatile cyg_uint8 *)CMA230_CLR = 0xFF; // Clear all current interrupts +} + +// +// This routine is called to respond to a hardware interrupt (IRQ). It +// should interrogate the hardware and return the IRQ vector number. + +// TEMP +int tot_ints; +cyg_uint32 int_PC[2048]; +// TEMP + +#if 0 +int hal_IRQ_handler(void) +#else +int hal_IRQ_handler(HAL_SavedRegisters *regs) +#endif +{ + volatile cyg_uint8 isr = *(volatile cyg_uint8 *)CMA230_ISR; + volatile cyg_uint8 *imrr = (volatile cyg_uint8 *)CMA230_IMRr; + int vector; + isr &= *imrr; // The Interrupt Source Register shows _all_ current + // interrupt sources, not just the enabled ones +// TEMP + int_PC[tot_ints++] = 0xFFFFFFFF; + int_PC[tot_ints++] = isr; + int_PC[tot_ints++] = regs->cpsr; + int_PC[tot_ints++] = regs->pc; + if (tot_ints == 2048) tot_ints = 0; +// TEMP + for (vector = 0; vector < 8; vector++) { + if (isr & (1<<vector)) { + return (vector+1); + } + } + return CYGNUM_HAL_INTERRUPT_unused; // This shouldn't happen! +} + +// +// Interrupt control +// + +// Disable (mask) an interrupt +void hal_interrupt_mask(int vector) +{ + volatile cyg_uint8 *imrr = (volatile cyg_uint8 *)CMA230_IMRr; + volatile cyg_uint8 *imrw = (volatile cyg_uint8 *)CMA230_IMRw; + cyg_uint8 new_mask = *imrr & ~(1<<(vector-1)); + *imrw = new_mask; +// TEMP + *imrr = new_mask; +// TEMP +// diag_printf("Mask interrupt #%d - mask: %x\n", vector, *imrr); +} + +// Enable (unmask) an interrupt +void hal_interrupt_unmask(int vector) +{ + volatile cyg_uint8 *imrr = (volatile cyg_uint8 *)CMA230_IMRr; + volatile cyg_uint8 *imrw = (volatile cyg_uint8 *)CMA230_IMRw; + cyg_uint8 new_mask = *imrr | (1<<(vector-1)); + *imrw = new_mask; +// TEMP + *imrr = new_mask; +// TEMP +// diag_printf("Unmask interrupt #%d - mask: %x\n", vector, *imrr); +} + +void hal_interrupt_acknowledge(int vector) +{ + // These two vectors are "sticky" and must be reset + if ((vector == CYGNUM_HAL_INTERRUPT_TIMER) || + (vector == CYGNUM_HAL_INTERRUPT_ABORT)) { + *(volatile cyg_uint8 *)CMA230_CLR = (1<<(vector-1)); + } +} + +void hal_interrupt_configure(int vector, int level, int up) +{ + // No interrupts are configurable on this hardware +} + +void hal_interrupt_set_level(int vector, int level) +{ + // No interrupts are configurable on this hardware +} + +/*------------------------------------------------------------------------*/ +// EOF hal_misc.c
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/cma230/current/src/hal_diag.c @@ -0,0 +1,347 @@ +/*============================================================================= +// +// hal_diag.c +// +// HAL diagnostic output code +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): nickg, gthomas +// Contributors: nickg, gthomas +// Date: 1998-03-02 +// Purpose: HAL diagnostic output +// Description: Implementations of HAL diagnostic output support. +// +//####DESCRIPTIONEND#### +// +//===========================================================================*/ + +#include <pkgconf/hal.h> +#include <pkgconf/hal_arm_cma230.h> // board specifics + +#include <cyg/infra/cyg_type.h> // base types +#include <cyg/infra/cyg_trac.h> // tracing macros +#include <cyg/infra/cyg_ass.h> // assertion macros + +#include <cyg/hal/hal_arch.h> // basic machine info +#include <cyg/hal/hal_intr.h> // interrupt macros +#include <cyg/hal/hal_io.h> // IO macros +#include <cyg/hal/hal_diag.h> +#include <cyg/hal/hal_cma230.h> // Hardware definitions +#ifdef CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT +#include <cyg/hal/drv_api.h> +#endif + +// Assumption: all diagnostic output must be GDB packetized unless this is a ROM (i.e. +// totally stand-alone) system. + +#ifdef CYG_HAL_STARTUP_ROM +#define HAL_DIAG_USES_HARDWARE +#endif + +/*---------------------------------------------------------------------------*/ +#if CYGHWR_HAL_ARM_CMA230_DIAG_PORT==0 +// This is the base address of the A-channel +#define CYG_DEVICE_SERIAL_RS232_16550_BASE CMA101_DUARTA +#define CYG_DEVICE_SERIAL_INT CYGNUM_HAL_INTERRUPT_SERIAL_A +#else +// This is the base address of the B-channel +#define CYG_DEVICE_SERIAL_RS232_16550_BASE CMA101_DUARTB +#define CYG_DEVICE_SERIAL_INT CYGNUM_HAL_INTERRUPT_SERIAL_B +#endif + +// Based on 3.6864 MHz xtal +#if CYGHWR_HAL_ARM_CMA230_DIAG_BAUD==9600 +#define CYG_DEVICE_SERIAL_RS232_BAUD_MSB 0x00 +#define CYG_DEVICE_SERIAL_RS232_BAUD_LSB 0x18 +#endif +#if CYGHWR_HAL_ARM_CMA230_DIAG_BAUD==19200 +#define CYG_DEVICE_SERIAL_RS232_BAUD_MSB 0x00 +#define CYG_DEVICE_SERIAL_RS232_BAUD_LSB 0x0C +#endif +#if CYGHWR_HAL_ARM_CMA230_DIAG_BAUD==38400 +#define CYG_DEVICE_SERIAL_RS232_BAUD_MSB 0x00 +#define CYG_DEVICE_SERIAL_RS232_BAUD_LSB 0x06 +#endif +#if CYGHWR_HAL_ARM_CMA230_DIAG_BAUD==115200 +#define CYG_DEVICE_SERIAL_RS232_BAUD_MSB 0x00 +#define CYG_DEVICE_SERIAL_RS232_BAUD_LSB 0x02 +#endif + +#ifndef CYG_DEVICE_SERIAL_RS232_BAUD_MSB +#error Missing/incorrect serial baud rate defined - CDL error? +#endif + +// Define the serial registers. +#define CYG_DEVICE_SERIAL_RS232_16550_RBR \ + ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x00) + // receiver buffer register, read, dlab = 0 +#define CYG_DEVICE_SERIAL_RS232_16550_THR \ + ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x00) + // transmitter holding register, write, dlab = 0 +#define CYG_DEVICE_SERIAL_RS232_16550_DLL \ + ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x00) + // divisor latch (LS), read/write, dlab = 1 +#define CYG_DEVICE_SERIAL_RS232_16550_IER \ + ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x08) + // interrupt enable register, read/write, dlab = 0 +#define CYG_DEVICE_SERIAL_RS232_16550_DLM \ + ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x08) + // divisor latch (MS), read/write, dlab = 1 +#define CYG_DEVICE_SERIAL_RS232_16550_IIR \ + ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x10) + // interrupt identification register, read, dlab = 0 +#define CYG_DEVICE_SERIAL_RS232_16550_FCR \ + ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x10) + // fifo control register, write, dlab = 0 +#define CYG_DEVICE_SERIAL_RS232_16550_LCR \ + ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x18) + // line control register, read/write +#define CYG_DEVICE_SERIAL_RS232_16550_MCR \ + ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x20) + // modem control register, read/write +#define CYG_DEVICE_SERIAL_RS232_16550_LSR \ + ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x28) + // line status register, read +#define CYG_DEVICE_SERIAL_RS232_16550_MSR \ + ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x30) + // modem status register, read + +// The line status register bits. +#define SIO_LSR_DR 0x01 // data ready +#define SIO_LSR_OE 0x02 // overrun error +#define SIO_LSR_PE 0x04 // parity error +#define SIO_LSR_FE 0x08 // framing error +#define SIO_LSR_BI 0x10 // break interrupt +#define SIO_LSR_THRE 0x20 // transmitter holding register empty +#define SIO_LSR_TEMT 0x40 // transmitter register empty +#define SIO_LSR_ERR 0x80 // any error condition + +// The modem status register bits. +#define SIO_MSR_DCTS 0x01 // delta clear to send +#define SIO_MSR_DDSR 0x02 // delta data set ready +#define SIO_MSR_TERI 0x04 // trailing edge ring indicator +#define SIO_MSR_DDCD 0x08 // delta data carrier detect +#define SIO_MSR_CTS 0x10 // clear to send +#define SIO_MSR_DSR 0x20 // data set ready +#define SIO_MSR_RI 0x40 // ring indicator +#define SIO_MSR_DCD 0x80 // data carrier detect + +// The line control register bits. +#define SIO_LCR_WLS0 0x01 // word length select bit 0 +#define SIO_LCR_WLS1 0x02 // word length select bit 1 +#define SIO_LCR_STB 0x04 // number of stop bits +#define SIO_LCR_PEN 0x08 // parity enable +#define SIO_LCR_EPS 0x10 // even parity select +#define SIO_LCR_SP 0x20 // stick parity +#define SIO_LCR_SB 0x40 // set break +#define SIO_LCR_DLAB 0x80 // divisor latch access bit + + +#ifdef HAL_DIAG_USES_HARDWARE + +void hal_diag_init(void) +{ + static int init = 0; + char *msg = "\n\rARM eCos\n\r"; + cyg_uint8 lcr; + + if (init++) return; + // 8-1-no parity. + HAL_WRITE_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_LCR, + SIO_LCR_WLS0 | SIO_LCR_WLS1); + + HAL_READ_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_LCR, lcr); + lcr |= SIO_LCR_DLAB; + HAL_WRITE_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_LCR, lcr); + HAL_WRITE_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_DLL, + CYG_DEVICE_SERIAL_RS232_BAUD_LSB); + HAL_WRITE_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_DLM, + CYG_DEVICE_SERIAL_RS232_BAUD_MSB); + lcr &= ~SIO_LCR_DLAB; + HAL_WRITE_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_LCR, lcr); + HAL_WRITE_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_FCR, 0x07); // Enable & clear FIFO + while (*msg) hal_diag_write_char(*msg++); +} + +#if defined(CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS) +#define DIAG_BUFSIZE 32 +#else +#define DIAG_BUFSIZE 2048 +#endif +static char diag_buffer[DIAG_BUFSIZE]; +static int diag_bp = 0; + +void hal_diag_write_char(char c) +{ + cyg_uint8 lsr; + + hal_diag_init(); + do { + HAL_READ_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_LSR, lsr); + } while ((lsr & SIO_LSR_THRE) == 0); + + HAL_WRITE_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_THR, c); + diag_buffer[diag_bp++] = c; + if (diag_bp == DIAG_BUFSIZE) { + while (1) ; + diag_bp = 0; + } +} + +void hal_diag_read_char(char *c) +{ + cyg_uint8 lsr; + + do { + HAL_READ_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_LSR, lsr); + } while ((lsr & SIO_LSR_DR) == 0); + + HAL_READ_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_RBR, *c); +} + +#else // HAL_DIAG relies on GDB + +// Initialize diag port - assume GDB channel is already set up +void hal_diag_init(void) +{ +} + +// Actually send character down the wire +static void +hal_diag_write_char_serial(char c) +{ + cyg_uint8 lsr; + + hal_diag_init(); + do { + HAL_READ_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_LSR, lsr); + } while ((lsr & SIO_LSR_THRE) == 0); + + HAL_WRITE_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_THR, c); + HAL_IO_BARRIER (); +} + +static bool +hal_diag_read_serial(char *c) +{ + long timeout = 1000000000; // A long time... + cyg_uint8 lsr; + + do { + HAL_READ_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_LSR, lsr); + if (--timeout == 0) return false; + } while ((lsr & SIO_LSR_DR) == 0); + HAL_IO_BARRIER (); // Prevent RBR preload. + + HAL_READ_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_RBR, *c); + HAL_IO_BARRIER (); + return true; +} + +void +hal_diag_read_char(char *c) +{ + while (!hal_diag_read_serial(c)) ; +} + +void +hal_diag_write_char(char c) +{ + static char line[100]; + static int pos = 0; + + // No need to send CRs + if( c == '\r' ) return; + + line[pos++] = c; + + if( c == '\n' || pos == sizeof(line) ) + { + CYG_INTERRUPT_STATE old; + + // Disable interrupts. This prevents GDB trying to interrupt us + // while we are in the middle of sending a packet. The serial + // receive interrupt will be seen when we re-enable interrupts + // later. + + HAL_DISABLE_INTERRUPTS(old); + + while(1) + { + static char hex[] = "0123456789ABCDEF"; + cyg_uint8 csum = 0; + int i; + char c1; + + hal_diag_write_char_serial('$'); + hal_diag_write_char_serial('O'); + csum += 'O'; + for( i = 0; i < pos; i++ ) + { + char ch = line[i]; + char h = hex[(ch>>4)&0xF]; + char l = hex[ch&0xF]; + hal_diag_write_char_serial(h); + hal_diag_write_char_serial(l); + csum += h; + csum += l; + } + hal_diag_write_char_serial('#'); + hal_diag_write_char_serial(hex[(csum>>4)&0xF]); + hal_diag_write_char_serial(hex[csum&0xF]); + + // Wait for the ACK character '+' from GDB here and handle + // receiving a ^C instead. This is the reason for this clause + // being a loop. + if (!hal_diag_read_serial(&c1)) + continue; // No response - try sending packet again + + if( c1 == '+' ) + break; // a good acknowledge + +#ifdef CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT + cyg_drv_interrupt_acknowledge(CYG_DEVICE_SERIAL_INT); + if( c1 == 3 ) { + // Ctrl-C: breakpoint. + cyg_hal_gdb_interrupt (__builtin_return_address(0)); + break; + } +#endif + // otherwise, loop round again + } + + pos = 0; + + // And re-enable interrupts + HAL_RESTORE_INTERRUPTS(old); + + } +} +#endif + +/*---------------------------------------------------------------------------*/ +/* End of hal_diag.c */
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/cma230/current/src/plf_stub.c @@ -0,0 +1,276 @@ +//============================================================================= +// +// plf_stub.c +// +// Platform specific code for GDB stub support. +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998, 1999 Cygnus Solutions. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas (based on the old ARM/CMA230 hal_stub.c) +// Contributors:gthomas, jskov +// Date: 1999-02-15 +// Purpose: Platform specific code for GDB stub support. +// +//####DESCRIPTIONEND#### +// +//============================================================================= + +#include <pkgconf/hal.h> + +#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + +#include <cyg/hal/hal_stub.h> + +#include <cyg/hal/hal_io.h> // HAL IO macros +#ifdef CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT +#include <cyg/hal/hal_intr.h> // HAL interrupt macros +#include <cyg/hal/drv_api.h> // HAL ISR support +#endif + +#include <cyg/hal/hal_cma230.h> + +//----------------------------------------------------------------------------- +// Serial definitions. +#if CYGHWR_HAL_ARM_CMA230_GDB_PORT==0 +// This is the base address of the A-channel +#define CYG_DEVICE_SERIAL_RS232_16550_BASE CMA101_DUARTA +#define CYG_DEVICE_SERIAL_INT CYGNUM_HAL_INTERRUPT_SERIAL_A +#else +// This is the base address of the B-channel +#define CYG_DEVICE_SERIAL_RS232_16550_BASE CMA101_DUARTB +#define CYG_DEVICE_SERIAL_INT CYGNUM_HAL_INTERRUPT_SERIAL_B +#endif + +// Based on 3.6864 MHz xtal +#if CYGHWR_HAL_ARM_CMA230_DIAG_BAUD==9600 +#define CYG_DEVICE_SERIAL_RS232_BAUD_MSB 0x00 +#define CYG_DEVICE_SERIAL_RS232_BAUD_LSB 0x18 +#endif +#if CYGHWR_HAL_ARM_CMA230_DIAG_BAUD==19200 +#define CYG_DEVICE_SERIAL_RS232_BAUD_MSB 0x00 +#define CYG_DEVICE_SERIAL_RS232_BAUD_LSB 0x0C +#endif +#if CYGHWR_HAL_ARM_CMA230_DIAG_BAUD==38400 +#define CYG_DEVICE_SERIAL_RS232_BAUD_MSB 0x00 +#define CYG_DEVICE_SERIAL_RS232_BAUD_LSB 0x06 +#endif +#if CYGHWR_HAL_ARM_CMA230_DIAG_BAUD==115200 +#define CYG_DEVICE_SERIAL_RS232_BAUD_MSB 0x00 +#define CYG_DEVICE_SERIAL_RS232_BAUD_LSB 0x02 +#endif + +#ifndef CYG_DEVICE_SERIAL_RS232_BAUD_MSB +#error Missing/incorrect serial baud rate defined - CDL error? +#endif + +// Define the serial registers. +#define CYG_DEVICE_SERIAL_RS232_16550_RBR \ + ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x00) + // receiver buffer register, read, dlab = 0 +#define CYG_DEVICE_SERIAL_RS232_16550_THR \ + ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x00) + // transmitter holding register, write, dlab = 0 +#define CYG_DEVICE_SERIAL_RS232_16550_DLL \ + ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x00) + // divisor latch (LS), read/write, dlab = 1 +#define CYG_DEVICE_SERIAL_RS232_16550_IER \ + ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x08) + // interrupt enable register, read/write, dlab = 0 +#define CYG_DEVICE_SERIAL_RS232_16550_DLM \ + ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x08) + // divisor latch (MS), read/write, dlab = 1 +#define CYG_DEVICE_SERIAL_RS232_16550_IIR \ + ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x10) + // interrupt identification register, read, dlab = 0 +#define CYG_DEVICE_SERIAL_RS232_16550_FCR \ + ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x10) + // fifo control register, write, dlab = 0 +#define CYG_DEVICE_SERIAL_RS232_16550_LCR \ + ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x18) + // line control register, read/write +#define CYG_DEVICE_SERIAL_RS232_16550_MCR \ + ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x20) + // modem control register, read/write +#define CYG_DEVICE_SERIAL_RS232_16550_LSR \ + ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x28) + // line status register, read +#define CYG_DEVICE_SERIAL_RS232_16550_MSR \ + ((volatile cyg_uint8 *) CYG_DEVICE_SERIAL_RS232_16550_BASE + 0x30) + // modem status register, read + +// The interrupt enable register bits. +#define SIO_IER_ERDAI 0x01 // enable received data available irq +#define SIO_IER_ETHREI 0x02 // enable THR empty interrupt +#define SIO_IER_ELSI 0x04 // enable receiver line status irq +#define SIO_IER_EMSI 0x08 // enable modem status interrupt + +// The interrupt identification register bits. +#define SIO_IIR_IP 0x01 // 0 if interrupt pending +#define SIO_IIR_ID_MASK 0x0e // mask for interrupt ID bits + +// The line status register bits. +#define SIO_LSR_DR 0x01 // data ready +#define SIO_LSR_OE 0x02 // overrun error +#define SIO_LSR_PE 0x04 // parity error +#define SIO_LSR_FE 0x08 // framing error +#define SIO_LSR_BI 0x10 // break interrupt +#define SIO_LSR_THRE 0x20 // transmitter holding register empty +#define SIO_LSR_TEMT 0x40 // transmitter register empty +#define SIO_LSR_ERR 0x80 // any error condition + +// The modem status register bits. +#define SIO_MSR_DCTS 0x01 // delta clear to send +#define SIO_MSR_DDSR 0x02 // delta data set ready +#define SIO_MSR_TERI 0x04 // trailing edge ring indicator +#define SIO_MSR_DDCD 0x08 // delta data carrier detect +#define SIO_MSR_CTS 0x10 // clear to send +#define SIO_MSR_DSR 0x20 // data set ready +#define SIO_MSR_RI 0x40 // ring indicator +#define SIO_MSR_DCD 0x80 // data carrier detect + +// The line control register bits. +#define SIO_LCR_WLS0 0x01 // word length select bit 0 +#define SIO_LCR_WLS1 0x02 // word length select bit 1 +#define SIO_LCR_STB 0x04 // number of stop bits +#define SIO_LCR_PEN 0x08 // parity enable +#define SIO_LCR_EPS 0x10 // even parity select +#define SIO_LCR_SP 0x20 // stick parity +#define SIO_LCR_SB 0x40 // set break +#define SIO_LCR_DLAB 0x80 // divisor latch access bit + +// Interrupt Enable Register +#define SIO_IER_RCV 0x01 +#define SIO_IER_XMT 0x02 +#define SIO_IER_LS 0x04 +#define SIO_IER_MS 0x08 + +// Modem Control Register +#define SIO_MCR_DTR 0x01 +#define SIO_MCR_RTS 0x02 +#define SIO_MCR_INT 0x08 // Enable interrupts + +#ifdef CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT +static cyg_interrupt gdb_interrupt; +static cyg_handle_t gdb_interrupt_handle; +#endif + +//----------------------------------------------------------------------------- +#ifdef CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT +// This ISR is called only for serial receive interrupts. +int +cyg_hal_gdb_isr(cyg_vector_t vector, cyg_addrword_t data, HAL_SavedRegisters *regs) +{ + cyg_uint8 c; + + c = hal_cma230_get_char(); // Fetch the character + if( 3 == c ) { // ^C + // Ctrl-C: set a breakpoint at PC so GDB will display the + // correct program context when stopping rather than the + // interrupt handler. + cyg_hal_gdb_interrupt (regs->pc); + cyg_drv_interrupt_acknowledge(CYG_DEVICE_SERIAL_INT); + } + return 0; // No need to run DSR +} + +int +hal_cma230_interruptible(int state) +{ + if (state) { + cyg_drv_interrupt_unmask(CYG_DEVICE_SERIAL_INT); + } else { + cyg_drv_interrupt_mask(CYG_DEVICE_SERIAL_INT); + } + + return 0; +} +#endif + +// Initialize the current serial port. +void hal_cma230_init_serial(void) +{ + cyg_uint8 lcr; + + // 8-1-no parity. + HAL_WRITE_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_LCR, + SIO_LCR_WLS0 | SIO_LCR_WLS1); + + HAL_READ_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_LCR, lcr); + lcr |= SIO_LCR_DLAB; + HAL_WRITE_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_LCR, lcr); + HAL_WRITE_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_DLL, + CYG_DEVICE_SERIAL_RS232_BAUD_LSB); + HAL_WRITE_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_DLM, + CYG_DEVICE_SERIAL_RS232_BAUD_MSB); + lcr &= ~SIO_LCR_DLAB; + HAL_WRITE_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_LCR, lcr); + HAL_WRITE_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_FCR, 0x07); // Enable & clear FIFO + +#ifdef CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT + cyg_drv_interrupt_create(CYG_DEVICE_SERIAL_INT, + 99, // Priority - what goes here? + 0, // Data item passed to interrupt handler + cyg_hal_gdb_isr, + 0, + &gdb_interrupt_handle, + &gdb_interrupt); + cyg_drv_interrupt_attach(gdb_interrupt_handle); + cyg_drv_interrupt_unmask(CYG_DEVICE_SERIAL_INT); + HAL_WRITE_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_IER, SIO_IER_RCV); + HAL_WRITE_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_MCR, SIO_MCR_INT|SIO_MCR_DTR|SIO_MCR_RTS); +#endif +} + +// Write C to the current serial port. +void hal_cma230_put_char(int c) +{ + cyg_uint8 lsr; + + do { + HAL_READ_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_LSR, lsr); + } while ((lsr & SIO_LSR_THRE) == 0); + + HAL_WRITE_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_THR, c); +} + +// Read one character from the current serial port. +int hal_cma230_get_char(void) +{ + char c; + cyg_uint8 lsr; + + do { + HAL_READ_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_LSR, lsr); + } while ((lsr & SIO_LSR_DR) == 0); + + HAL_READ_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_RBR, c); + return c; +} + +#endif // ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS +//----------------------------------------------------------------------------- +// End of plf_stub.c
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/cma230/current/tests/PKGconf.mak @@ -0,0 +1,39 @@ +#=============================================================================== +# +# makefile +# +# kernel/tests +# +#=============================================================================== +#####COPYRIGHTBEGIN#### +# +# ------------------------------------------- +# The contents of this file are subject to the Cygnus eCos Public License +# Version 1.0 (the "License"); you may not use this file except in +# compliance with the License. You may obtain a copy of the License at +# http://sourceware.cygnus.com/ecos +# +# Software distributed under the License is distributed on an "AS IS" +# basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +# License for the specific language governing rights and limitations under +# the License. +# +# The Original Code is eCos - Embedded Cygnus Operating System, released +# September 30, 1998. +# +# The Initial Developer of the Original Code is Cygnus. Portions created +# by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +# ------------------------------------------- +# +#####COPYRIGHTEND#### +#=============================================================================== + +PACKAGE := hal_arm_cma230 +include ../../../../../pkgconf/pkgconf.mak + +TESTS := + +include $(COMPONENT_REPOSITORY)/pkgconf/makrules.tst + + +
--- a/packages/hal/arm/pid/current/ChangeLog +++ b/packages/hal/arm/pid/current/ChangeLog @@ -1,3 +1,12 @@ +1999-10-19 Jesper Skov <jskov@cygnus.co.uk> + + * include/pkgconf/hal_arm_pid.h: Added ARM9 options. + +1999-10-15 Gary Thomas <gthomas@cygnus.co.uk> + + * src/hal_diag.c: Force diag channel to be "raw" if it is + not the same as the GDB port (RAM based applications only). + 1999-08-16 John Dallaway <jld@cygnus.co.uk> * include/pkgconf/hal_arm_pid.h:
--- a/packages/hal/arm/pid/current/include/pkgconf/hal_arm_pid.h +++ b/packages/hal/arm/pid/current/include/pkgconf/hal_arm_pid.h @@ -48,13 +48,31 @@ {{CFG_DATA cdl_package CYGPKG_HAL_ARM_PID { - display "ARM PID7 evaluation board" + display "ARM PID evaluation board" type radio parent CYGPKG_HAL_ARM - platform pid description " The pid HAL package provides the support needed to run - eCos on a ARM PID7 eval board." + eCos on an ARM PID eval board." + } + + cdl_option CYGHWR_HAL_ARM_PID_ARM7 { + display "ARM PID evaluation board with ARM7 CPU" + parent CYGPKG_HAL_ARM_PID + platform pid + type radio + description " + The PID board comes with an ARM7 CPU as standard." + } + + cdl_option CYGHWR_HAL_ARM_PID_ARM9 { + display "ARM PID evaluation board with ARM9 CPU" + parent CYGPKG_HAL_ARM_PID + platform pid9 + type radio + description " + The PID board can be upgraded to use an ARM9 CPU. This + option enables extra ARM9 compiler optimizations." } cdl_option CYGHWR_HAL_ARM_PID_STARTUP {
--- a/packages/hal/arm/pid/current/src/hal_diag.c +++ b/packages/hal/arm/pid/current/src/hal_diag.c @@ -61,6 +61,12 @@ #define HAL_DIAG_USES_HARDWARE #endif +#ifndef HAL_DIAG_USES_HARDWARE +#if (CYGHWR_HAL_ARM_PID_DIAG_PORT != CYGHWR_HAL_ARM_PID_GDB_PORT) +#define HAL_DIAG_USES_HARDWARE +#endif +#endif + /*---------------------------------------------------------------------------*/ /* From serial_16550.h */ #if CYGHWR_HAL_ARM_PID_DIAG_PORT==0
--- a/packages/hal/common/current/ChangeLog +++ b/packages/hal/common/current/ChangeLog @@ -1,3 +1,9 @@ +1999-10-10 Gary Thomas <gthomas@cygnus.co.uk> + + * src/thread-packets.c (stub_pkt_currthread): Fix typo in comment. + + * src/generic-stub.c: Reorg to expose register get/set functions. + 1999-09-21 Gary Thomas <gthomas@cygnus.co.uk> * src/thread-packets.c: Fix some typos in comments.
--- a/packages/hal/common/current/src/generic-stub.c +++ b/packages/hal/common/current/src/generic-stub.c @@ -818,6 +818,106 @@ void int (*_get_trace_register_hook) (regnames_t, target_register_t *); +void +stub_format_registers(char *ptr) +{ + int regnum; + + for (regnum = 0; regnum < NUMREGS_GDB; regnum++) { + /* We need to compensate for the value offset within the + register. */ + char dummyDat[32]; + target_register_t addr; + char *vptr; + int reg_valid = 1; + +#ifdef TARGET_HAS_LARGE_REGISTERS + if (sizeof (target_register_t) < REGSIZE (regnum)) { + get_register_as_bytes (regnum, dummyDat); + vptr = dummyDat; + } else +#endif + { + if (_get_trace_register_hook) + reg_valid = _get_trace_register_hook (regnum, &addr); + else + addr = get_register (regnum); + + vptr = ((char *) &addr); + if (sizeof (addr) > REGSIZE(regnum)) { + /* May need to cope with endian-ness */ + +#if !defined(__LITTLE_ENDIAN__) && !defined(_LITTLE_ENDIAN) + vptr += sizeof (addr) - REGSIZE (regnum); +#endif + } else if (sizeof (addr) < REGSIZE (regnum)) { + int off = REGSIZE (regnum) - sizeof (addr); + int x; + + for (x = 0; x < off; x++) + dummyDat[x] = 0; + memcpy (dummyDat + off, &addr, sizeof (addr)); + vptr = dummyDat; + } + } + if (reg_valid) { /* we have a valid reg value */ + ptr = __mem2hex (vptr, ptr, REGSIZE (regnum), 0); + } else { + /* Trace component returned a failure code. + This means that the register value is not available. + We'll fill it with 'x's, and GDB will understand. */ + memset (ptr, 'x', 2 * REGSIZE (regnum)); + ptr += 2 * REGSIZE (regnum); + } + } +} + +void +stub_update_registers(char *in_ptr, char *out_ptr) +{ + char *ptr = &in_ptr[1]; + int x; + int sr = 0, er = NUMREGS_GDB; + + if (*in_ptr == 'P') { + target_register_t regno; + + if (__hexToInt (&ptr, ®no) && (*ptr++ == '=')) { + + sr = regno; + er = regno + 1; + } else { + strcpy (out_ptr, "P01"); + return; + } + } + + for (x = sr; x < er; x++) { + target_register_t value = 0; + char *vptr; + +#ifdef TARGET_HAS_LARGE_REGISTERS + if (sizeof (target_register_t) < REGSIZE (x)) { + char dummyDat [32]; + + __hex2mem (ptr, dummyDat, REGSIZE (x), 0); + put_register_as_bytes (x, dummyDat); + } else +#endif + { + vptr = ((char *) &value); +#if !defined(__LITTLE_ENDIAN__) && !defined(_LITTLE_ENDIAN) + vptr += sizeof (value) - REGSIZE (x); +#endif + __hex2mem (ptr, vptr, REGSIZE (x), 0); + put_register (x, value); + } + ptr += REGSIZE (x) * 2; + } + + strcpy (out_ptr, "OK"); +} + int __process_packet (char *packet) { @@ -858,64 +958,7 @@ int case 'g': /* return the value of the CPU registers */ { char *ptr = remcomOutBuffer; - int regnum; - - for (regnum = 0; regnum < NUMREGS_GDB; regnum++) - { - /* We need to compensate for the value offset within the - register. */ - char dummyDat[32]; - target_register_t addr; - char *vptr; - int reg_valid = 1; - -#ifdef TARGET_HAS_LARGE_REGISTERS - if (sizeof (target_register_t) < REGSIZE (regnum)) - { - get_register_as_bytes (regnum, dummyDat); - vptr = dummyDat; - } - else -#endif - { - if (_get_trace_register_hook) - reg_valid = _get_trace_register_hook (regnum, &addr); - else - addr = get_register (regnum); - - vptr = ((char *) &addr); - if (sizeof (addr) > REGSIZE(regnum)) - { - /* May need to cope with endian-ness */ - -#if !defined(__LITTLE_ENDIAN__) && !defined(_LITTLE_ENDIAN) - vptr += sizeof (addr) - REGSIZE (regnum); -#endif - } - else if (sizeof (addr) < REGSIZE (regnum)) - { - int off = REGSIZE (regnum) - sizeof (addr); - int x; - - for (x = 0; x < off; x++) - dummyDat[x] = 0; - memcpy (dummyDat + off, &addr, sizeof (addr)); - vptr = dummyDat; - } - } - if (reg_valid) /* we have a valid reg value */ - { - ptr = __mem2hex (vptr, ptr, REGSIZE (regnum), 0); - } - else - { - /* Trace component returned a failure code. - This means that the register value is not available. - We'll fill it with 'x's, and GDB will understand. */ - memset (ptr, 'x', 2 * REGSIZE (regnum)); - ptr += 2 * REGSIZE (regnum); - } - } + stub_format_registers(ptr); break; } @@ -967,54 +1010,9 @@ int case 'P': case 'G': /* set the value of the CPU registers - return OK */ { - int x; - int sr = 0, er = NUMREGS_GDB; - char *ptr = &packet[1]; - - if (packet[0] == 'P') - { - target_register_t regno; - - if (__hexToInt (&ptr, ®no) - && (*ptr++ == '=')) - { - sr = regno; - er = regno + 1; - } - else - { - strcpy (remcomOutBuffer, "P01"); - break; - } - } - - for (x = sr; x < er; x++) - { - target_register_t value = 0; - char *vptr; - -#ifdef TARGET_HAS_LARGE_REGISTERS - if (sizeof (target_register_t) < REGSIZE (x)) - { - char dummyDat [32]; - - __hex2mem (ptr, dummyDat, REGSIZE (x), 0); - put_register_as_bytes (x, dummyDat); - } - else -#endif - { - vptr = ((char *) &value); -#if !defined(__LITTLE_ENDIAN__) && !defined(_LITTLE_ENDIAN) - vptr += sizeof (value) - REGSIZE (x); -#endif - __hex2mem (ptr, vptr, REGSIZE (x), 0); - put_register (x, value); - } - ptr += REGSIZE (x) * 2; - } - - strcpy (remcomOutBuffer, "OK"); + char *in_ptr = &packet[0]; + char *out_ptr = remcomOutBuffer; + stub_update_registers(in_ptr, out_ptr); break; }
--- a/packages/hal/common/current/src/thread-packets.c +++ b/packages/hal/common/current/src/thread-packets.c @@ -447,7 +447,7 @@ void stub_pkt_currthread( if (dbg_currthread(&thread)) { *outbuf++ = 'Q' ; - *outbuf++ = 'C' ; /* FIXME: Is this a reasanable code */ + *outbuf++ = 'C' ; /* FIXME: Is this a reasonable code */ outbuf = pack_int(outbuf, threadref_to_int(&thread)) ; /* Short form */ } else outbuf = stub_pack_nak(outbuf) ;
--- a/packages/hal/powerpc/arch/current/src/hal_misc.c +++ b/packages/hal/powerpc/arch/current/src/hal_misc.c @@ -484,6 +484,7 @@ externC void hal_MMU_init (void) # endif #endif + // Do not enable caches for the FADS port pro tem; the memory mapping is // not set up.
--- a/packages/hal/sparclite/arch/current/ChangeLog +++ b/packages/hal/sparclite/arch/current/ChangeLog @@ -1,3 +1,39 @@ +1999-10-15 Hugo Tyson <hmt@cygnus.co.uk> + + * src/vectors.S (not_window_overflow): Actually the dispatcher + into exception VSRs. Bugfix: wrong number was placed in %l3 for + call to xvsr, so for *some* types of trap, including user traps + other than those handled directly in-HAL, a vector way off the end + of the array would be used. Apparently those other types of trap + never happen, but just in case... + +1999-10-13 Hugo Tyson <hmt@cygnus.co.uk> + + * src/vectors.S: Optionally implement Multiple (rather than + Single) Vector Trapping. The config options to control this are + in the platform HAL because some SPARCs do not support SVT, where + it is optional the platform says so. This demands a variable + sized region be reserved for trampoline code or the vectors in + RAM, which is done via section .ram_vectors, defined herein. + + * src/sparclite.ld: Define SECTION_ram_vectors(...) to deal with + the new .ram_vectors section. This is to provide a variable sized + area at the start of RAM to hold either trampoline code when SVT + is selected, or a fill 4k + handlers of vectors when MVT is + selected. Previously this was bodged by pretending RAM starts at + 0x4000200 in ROM startup builds. + (comment from the example .ldi files...) + The ram_vectors section is to allow some free space to copy + vectors into from the ROM. This is required to be variable size + to accomodate SVT or MVT; 80 bytes vs 4kB. Copying is not + necessary with MVT, but it is optional because it may offer + performance gains. Copying is required for SVT because the + (aligned) start of ROM contains initialization instructions. RAM + copy is used rather than leave a big gap in the ROM to get an + aligned address for the trampoline code. For RAM startup, + ram_vectors will usually be of size zero, unless MVT and copying + are enabled for memory estimation reasons. + 1999-09-29 Hugo Tyson <hmt@cygnus.co.uk> [src/vectors.S: needed no change!]
--- a/packages/hal/sparclite/arch/current/src/sparclite.ld +++ b/packages/hal/sparclite/arch/current/src/sparclite.ld @@ -77,6 +77,13 @@ GROUP(libtarget.a libgcc.a) { FORCE_OUTPUT; *(.gcc_except_table) } \ > _region_ +#define SECTION_ram_vectors(_region_, _vma_, _lma_) \ + .ram_vectors _vma_ : _lma_ \ + { __ram_vectors_start = ABSOLUTE(.); \ + KEEP (*(.ram_vectors)) \ + __ram_vectors_end = ABSOLUTE(.); } \ + > _region_ + #define SECTION_data(_region_, _vma_, _lma_) \ .data _vma_ : _lma_ \ { __ram_data_start = ABSOLUTE (.); \
--- a/packages/hal/sparclite/arch/current/src/vectors.S +++ b/packages/hal/sparclite/arch/current/src/vectors.S @@ -51,6 +51,9 @@ #include <pkgconf/system.h> #include <pkgconf/hal.h> +#include <pkgconf/hal_sparclite.h> +#include CYGBLD_HAL_PLATFORM_H // Platform config file + #ifdef CYGPKG_KERNEL # include <pkgconf/kernel.h> #else @@ -63,6 +66,27 @@ #define BOOTUPSTACK_IS_INTERRUPTSTACK #endif +//#define CYGHWR_HAL_SPARCLITE_MULTIPLE_VECTOR_TRAPPING + +#ifndef CYGHWR_HAL_SPARCLITE_HAS_ASR17 +#ifndef CYGHWR_HAL_SPARCLITE_MULTIPLE_VECTOR_TRAPPING +#error Single Vector Trapping (SVT) demands ASR17 +#endif +#endif + +#ifdef CYG_HAL_STARTUP_ROM +# ifndef CYGHWR_HAL_SPARCLITE_MULTIPLE_VECTOR_TRAPPING + +! ROM startup and Single Vector Trapping demands a copy to RAM. +! Otherwise it may be configured in, but it is not required. + +# ifndef CYGIMP_HAL_SPARCLITE_COPY_VECTORS_TO_RAM +# define CYGIMP_HAL_SPARCLITE_COPY_VECTORS_TO_RAM +# endif + +# endif +#endif + !------------------------------------------------------------------------ #include <cyg/hal/vectors.h> @@ -71,6 +95,34 @@ #define DELAYS_AFTER_WRWIM !------------------------------------------------------------------------ + +#ifdef CYGHWR_HAL_SPARCLITE_MULTIPLE_VECTOR_TRAPPING + + .macro VECTOR_EXCEPTION + .p2align 4 + rd %tbr, %l3 + rd %psr, %l0 + ba __entry_exception + and %l3, TT_MASK, %l4 + .endm + + .macro VECTOR_INTERRUPT level + .p2align 4 + rd %psr, %l0 + mov \level << 2, %l5 + ba __entry_interrupt + mov \level << 4, %l4 + .endm + + .macro VECTOR_CODE_WIM name + .p2align 4 + ba __entry_\name + rd %wim, %l0 + .endm + +#endif // CYGHWR_HAL_SPARCLITE_MULTIPLE_VECTOR_TRAPPING + +!------------------------------------------------------------------------ ! The start of the code; this is the entry point: .section ".vectors","ax" @@ -84,6 +136,63 @@ reset_vector: b genuine_reset nop ! usually drop through to: +#ifdef CYGHWR_HAL_SPARCLITE_MULTIPLE_VECTOR_TRAPPING + ba __entry_exception ! reset becomes an exception + and %l3, TT_MASK, %l4 ! once we are running + + VECTOR_EXCEPTION ! 1 + VECTOR_EXCEPTION ! 2 + VECTOR_EXCEPTION ! 3 + VECTOR_EXCEPTION ! 4 + + VECTOR_CODE_WIM wover ! 5 window overflow + VECTOR_CODE_WIM wunder ! 6 window underflow + VECTOR_EXCEPTION ! 7 + VECTOR_EXCEPTION ! 8 + VECTOR_EXCEPTION ! 9 + + VECTOR_EXCEPTION ! 10 + VECTOR_EXCEPTION ! 11 + VECTOR_EXCEPTION ! 12 + VECTOR_EXCEPTION ! 13 + VECTOR_EXCEPTION ! 14 + + VECTOR_EXCEPTION ! 15 + VECTOR_EXCEPTION ! 16 + VECTOR_INTERRUPT 1 ! 17 interrupt_level_1 + VECTOR_INTERRUPT 2 ! 18 interrupt_level_2 + VECTOR_INTERRUPT 3 ! 19 interrupt_level_3 + + VECTOR_INTERRUPT 4 ! 20 interrupt_level_4 + VECTOR_INTERRUPT 5 ! 21 interrupt_level_5 + VECTOR_INTERRUPT 6 ! 22 interrupt_level_6 + VECTOR_INTERRUPT 7 ! 23 interrupt_level_7 + VECTOR_INTERRUPT 8 ! 24 interrupt_level_8 + + VECTOR_INTERRUPT 9 ! 25 interrupt_level_9 + VECTOR_INTERRUPT 10 ! 26 interrupt_level_10 + VECTOR_INTERRUPT 11 ! 27 interrupt_level_11 + VECTOR_INTERRUPT 12 ! 28 interrupt_level_12 + VECTOR_INTERRUPT 13 ! 29 interrupt_level_13 + + VECTOR_INTERRUPT 14 ! 30 interrupt_level_14 + VECTOR_INTERRUPT 15 ! 31 interrupt_level_15 + VECTOR_EXCEPTION ! 32 + VECTOR_EXCEPTION ! 33 + VECTOR_EXCEPTION ! 34 + + VECTOR_EXCEPTION ! 35 + VECTOR_EXCEPTION ! 36 + VECTOR_EXCEPTION ! 37 + VECTOR_EXCEPTION ! 38 + VECTOR_EXCEPTION ! 39 + + .rept 216 ! 40-255 is 216 of them + VECTOR_EXCEPTION ! whichever + .endr +#endif // CYGHWR_HAL_SPARCLITE_MULTIPLE_VECTOR_TRAPPING + +#ifndef CYGHWR_HAL_SPARCLITE_MULTIPLE_VECTOR_TRAPPING real_vector: ! here,locals have been set up as follows: ! %l0 = psr @@ -97,6 +206,8 @@ real_vector: interrupt: and %l3, 0x0f0, %l4 ! get an interrupt number out srl %l4, 2, %l5 ! to a word address offset +#endif // !CYGHWR_HAL_SPARCLITE_MULTIPLE_VECTOR_TRAPPING +__entry_interrupt: sethi %hi(hal_vsr_table), %l6 or %l6, %lo(hal_vsr_table), %l6 ld [ %l6 + %l5 ], %l6 ! get vector in %l6 @@ -105,6 +216,7 @@ interrupt: ! interrupts and exceptions/traps ! have the same API to VSRs +#ifndef CYGHWR_HAL_SPARCLITE_MULTIPLE_VECTOR_TRAPPING not_an_interrupt: and %l3, TT_MASK, %l4 cmp %l4, (TRAP_WUNDER << TT_SHL) @@ -123,6 +235,8 @@ window_underflow: ! (CWP is unchanged) ! the following instructions delay enough; no need for NOPs rd %wim, %l0 ! get the wim +#endif // !CYGHWR_HAL_SPARCLITE_MULTIPLE_VECTOR_TRAPPING +__entry_wunder: sll %l0, 1, %l3 ! Rotate wim left srl %l0, __WINSIZE-1, %l0 wr %l0, %l3, %wim ! Install the new wim @@ -151,6 +265,7 @@ window_underflow: jmp %l1 rett %l2 +#ifndef CYGHWR_HAL_SPARCLITE_MULTIPLE_VECTOR_TRAPPING not_window_underflow: bne,a not_window_overflow srl %l4, 4, %l4 ! (if taken) @@ -165,6 +280,8 @@ window_overflow: ! (CWP is unchanged) ! the following instructions delay enough; no need for NOPs rd %wim, %l0 +#endif // !CYGHWR_HAL_SPARCLITE_MULTIPLE_VECTOR_TRAPPING +__entry_wover: mov %g1, %l3 ! Save g1, we use it to hold the wim srl %l0, 1, %g1 ! Rotate wim right sll %l0, __WINSIZE-1, %l0 @@ -190,6 +307,11 @@ window_overflow: jmpl %l1, %g0 rett %l2 +#ifdef CYGHWR_HAL_SPARCLITE_MULTIPLE_VECTOR_TRAPPING + // ADDITIONAL code to provide an entry point: +__entry_exception: + srl %l4, 4, %l4 +#endif // CYGHWR_HAL_SPARCLITE_MULTIPLE_VECTOR_TRAPPING not_window_overflow: ! from here on in, %l4 is the trap number in clear cmp %l4, 128 @@ -214,9 +336,11 @@ 1: or %l6, %lo(hal_vsr_table), %l6 ld [ %l6 + %l5 ], %l6 ! get vector in %l6 jmp %l6 ! and go there - or %l4, 16, %l3 ! vector number into %l3: so that + srl %l5, 2, %l3 ! vector number into %l3: so that ! interrupts and exceptions/traps ! have the same API to VSRs + ! NB that~s eCos vector number not TRAP number above. + ! and that is the end of the pre-vector trap handler .global rom_vectors_end @@ -247,7 +371,13 @@ genuine_reset: ! set psr, mask interr nop nop nop +#ifdef CYGHWR_HAL_SPARCLITE_HAS_ASR17 +#ifdef CYGHWR_HAL_SPARCLITE_MULTIPLE_VECTOR_TRAPPING + wr %g0, 0, %asr17 ! Multiple vector trapping +#else wr %g0, 1, %asr17 ! Single vector trapping +#endif // !CYGHWR_HAL_SPARCLITE_MULTIPLE_VECTOR_TRAPPING +#endif // CYGHWR_HAL_SPARCLITE_HAS_ASR17 nop nop nop @@ -394,4 +524,17 @@ cyg_interrupt_stack: .long 0,0,0,0,0,0,0,0 ! here be secret state stored #endif +!------------------------------------------------------------------------ +! Define a section that reserves space at the start of RAM for the +! vectors to be copied into, for ROM start only. + + .section ".ram_vectors","awx",@nobits +#ifdef CYGIMP_HAL_SPARCLITE_COPY_VECTORS_TO_RAM + ! need a space at base of RAM for copied vector/trampoline code + .align 0x1000 + .space 8 ! for fencepost errors + .space (rom_vectors_end - rom_vectors) +#endif // CYGIMP_HAL_SPARCLITE_COPY_VECTORS_TO_RAM + +!------------------------------------------------------------------------ ! end of vectors.S
--- a/packages/hal/sparclite/sim/current/ChangeLog +++ b/packages/hal/sparclite/sim/current/ChangeLog @@ -1,3 +1,9 @@ +1999-10-13 Hugo Tyson <hmt@cygnus.co.uk> + + * include/pkgconf/hal_sparclite_sim.h: Add define of + CYGHWR_HAL_SPARCLITE_HAS_ASR17 for arch HAL to DTRT with SVT + (anticipating cores with no SVT at all, so no %asr17) + 1999-04-08 John Dallaway <jld@cygnus.co.uk> * include/pkgconf/*.ldi: Revised SECTION_* macro arguments to
--- a/packages/hal/sparclite/sim/current/include/pkgconf/hal_sparclite_sim.h +++ b/packages/hal/sparclite/sim/current/include/pkgconf/hal_sparclite_sim.h @@ -62,6 +62,11 @@ }}CFG_DATA */ + +/* -------------------------------------------------------------------*/ +// This is true for SPARClite: +#define CYGHWR_HAL_SPARCLITE_HAS_ASR17 + /* -------------------------------------------------------------------*/ #endif /* CYGONCE_PKGCONF_HAL_SPARCLITE_SIM_H */ /* EOF hal_sparclite_sim.h */
--- a/packages/hal/sparclite/sleb/current/ChangeLog +++ b/packages/hal/sparclite/sleb/current/ChangeLog @@ -1,3 +1,42 @@ +1999-10-14 John Dallaway <jld@cygnus.co.uk> + + * include/pkgconf/mlt_sparclite_sleb_ram.mlt, + include/pkgconf/mlt_sparclite_sleb_rom.mlt: + + Fix .mlt files to match the latest .ldi files. ROM startup + requires latest config tool which contains fix for PR 19799. + +1999-10-13 Hugo Tyson <hmt@cygnus.co.uk> + + * include/pkgconf/hal_sparclite_sleb.h: Add CDL and + [un]definitions for handling optional Multiple Vector Trapping and + optional copy of vectors into RAM - when it is optional. Also + define CYGHWR_HAL_SPARCLITE_HAS_ASR17 so that the arch HAL + self-configures correctly. + + * include/halboot.si: Copy trampoline code into section + .ram_vectors at __ram_vectors_start if so configured. + + * include/pkgconf/mlt_sparclite_sleb_ram.ldi: + * include/pkgconf/mlt_sparclite_sleb_ram.mlt: + * include/pkgconf/mlt_sparclite_sleb_rom.ldi: + * include/pkgconf/mlt_sparclite_sleb_rom.mlt: + Link in new variable size, sometimes 0 size, ram_vectors section; + this does away with the need to fib about the size of RAM, it was + previously defined to start at 0x4000200 to reserve a bit for + trampoline code. + (comment from the example .ldi files...) + The ram_vectors section is to allow some free space to copy + vectors into from the ROM. This is required to be variable size + to accomodate SVT or MVT; 80 bytes vs 4kB. Copying is not + necessary with MVT, but it is optional because it may offer + performance gains. Copying is required for SVT because the + (aligned) start of ROM contains initialization instructions. RAM + copy is used rather than leave a big gap in the ROM to get an + aligned address for the trampoline code. For RAM startup, + ram_vectors will usually be of size zero, unless MVT and copying + are enabled for memory estimation reasons. + 1999-06-14 Hugo Tyson <hmt@cygnus.co.uk> * tests/slebtime.cxx (entry2): Fix a dumb fencepost prob in some
--- a/packages/hal/sparclite/sleb/current/include/halboot.si +++ b/packages/hal/sparclite/sleb/current/include/halboot.si @@ -53,9 +53,12 @@ #ifdef CYG_HAL_STARTUP_RAM + ! Hit the entry point instructions in situ +#ifndef CYGIMP_HAL_SPARCLITE_COPY_VECTORS_TO_RAM + ! *unless* we are going to copy into a different RAM area anyway: ! copy the real instructions into the vector: rd %tbr, %g1 - andn %g1, 0xfff, %g1 ! clear non-address bits + andn %g1, 0xfff, %g1 ! clear non-address bits set real_vector_instructions, %l0 ld [ %l0 ], %l1 st %l1, [ %g1 ] ! into the vector @@ -74,6 +77,7 @@ nop nop nop ! should be enough +#endif // !CYGIMP_HAL_SPARCLITE_COPY_VECTORS_TO_RAM #endif // CYG_HAL_STARTUP_RAM @@ -359,16 +363,17 @@ // NOTE that here, the frame pointer is set up to the top of RAM minus a // little bit with the size of RAM at %fp (%i6) - -#ifdef CYG_HAL_STARTUP_ROM +#ifdef CYGIMP_HAL_SPARCLITE_COPY_VECTORS_TO_RAM led 0x58 - ! copy the trampoline code into the base of RAM + ! copy the trampoline code into the base of RAM (__ram_vectors_start) ! including the two ~rogue~ instructions... - .extern .data - sethi %hi(.data), %l0 ! get the start of RAM - andn %l0, 0xfff, %l0 + + .extern __ram_vectors_start + ! Using the true address here for the copy makes a badly-aligned + ! __ram_vectors less likely to hide as an obscure failure: + set __ram_vectors_start, %l0 ! get the start of RAM set rom_vectors, %l1 ! get the start of the trampoline set rom_vectors_end, %l2 ! ...and its end. 33: @@ -382,7 +387,7 @@ 33: led 0x59 - sethi %hi(.data), %g1 ! get the start of RAM + sethi %hi(__ram_vectors_start), %g1 ! get the start of RAM andn %g1, 0xfff, %g1 set real_vector_instructions, %l0 ld [ %l0 ], %l1 @@ -412,10 +417,10 @@ 33: led 0x5c ! and (re)set the tbr, finally. - sethi %hi(.data), %g1 + sethi %hi(__ram_vectors_start), %g1 andn %g1, 0xfff, %g1 wr %g1, %tbr ! Traps are at RAM start - nop + nop ! (__ram_vectors_start) nop nop @@ -425,7 +430,7 @@ 33: led 0x5f -#endif // CYG_HAL_STARTUP_ROM +#endif // CYGIMP_HAL_SPARCLITE_COPY_VECTORS_TO_RAM (was CYG_HAL_STARTUP_ROM) ! turn on caches - copied from the book #define set_size 64
--- a/packages/hal/sparclite/sleb/current/include/pkgconf/hal_sparclite_sleb.h +++ b/packages/hal/sparclite/sleb/current/include/pkgconf/hal_sparclite_sleb.h @@ -71,11 +71,49 @@ latter typically requires that the eCos application be blown into EPROMs or equivalent technology." } + + cdl_option CYGHWR_HAL_SPARCLITE_MULTIPLE_VECTOR_TRAPPING { + display "Multiple Vector Trapping (MVT)" + parent CYGPKG_HAL_SPARCLITE_SLEB + type boolean + description " + Use Multiple Vector Trapping (MVT) rather than Single Vector + Trapping (SVT); SVT is a feature of SPARClite CPUs which saves + code RAM at a cost of perhaps slower interrupt and trap dispatch + time, depending on cache behavior. This includes speed of + handling register window underflow and overflow, a feature of + deep function call stacks on SPARC. MVT requires 4kB of code + space for trap vectors; in contrast SVT uses fewer than 20 + instructions for trap decoding." + } + + cdl_option CYGIMP_HAL_SPARCLITE_COPY_VECTORS_TO_RAM { + display "Copy vectors to RAM" + parent CYGPKG_HAL_SPARCLITE_SLEB + type boolean + description " + Copy the vectors and trap code out of the executable image + to separate RAM. With ROM startup, performance might be gained + by copying the vectors into RAM; this includes the code for + handling register window under/overflow. Enable this with + RAM startup to simulate the code and data sizes of an eventual + ROM image. Note: if MVT is not selected with ROM start, the + trap code (including register window handling) is copied + to RAM regardless; that code is small." + } }}CFG_DATA */ #define CYGHWR_HAL_SPARCLITE_SLEB_STARTUP ram +// Use SVT by default on SLEBs... +#undef CYGHWR_HAL_SPARCLITE_MULTIPLE_VECTOR_TRAPPING +// ...so minimal trampoline code is copied anyway; if MVT do not copy: +#undef CYGIMP_HAL_SPARCLITE_COPY_VECTORS_TO_RAM + +// This is true for SPARClite: +#define CYGHWR_HAL_SPARCLITE_HAS_ASR17 + /* -------------------------------------------------------------------*/ // The following are NOT config options for now: support for the native // Fujitsu ROMs is not a requirement, just a handy thing to have:
--- a/packages/hal/sparclite/sleb/current/include/pkgconf/mlt_sparclite_sleb_ram.ldi +++ b/packages/hal/sparclite/sleb/current/include/pkgconf/mlt_sparclite_sleb_ram.ldi @@ -26,6 +26,17 @@ //####COPYRIGHTEND#### //=========================================================================== + +// The ram_vectors section is to allow some free space to copy vectors into +// from the ROM. This is required to be variable size to accomodate SVT or +// MVT; 80 bytes vs 4kB. Copying is not necessary with MVT, but it is +// optional because it may offer performance gains. Copying is required +// for SVT because the (aligned) start of ROM contains initialization +// instructions. RAM copy is used rather than leave a big gap in the ROM +// to get an aligned address for the trampoline code. For RAM startup, +// ram_vectors will usually be of size zero, unless MVT and copying are +// enabled for memory estimation reasons. + MEMORY { ram : ORIGIN = 0x04010000, LENGTH = 0x3f0000 @@ -34,7 +45,8 @@ MEMORY SECTIONS { SECTIONS_BEGIN - SECTION_rom_vectors (ram, 0x4010000, LMA_EQ_VMA) + SECTION_ram_vectors (ram, 0x4010000, LMA_EQ_VMA) + SECTION_rom_vectors (ram, ALIGN (0x8), LMA_EQ_VMA) SECTION_text (ram, ALIGN (0x4), LMA_EQ_VMA) SECTION_fini (ram, ALIGN (0x4), LMA_EQ_VMA) SECTION_rodata (ram, ALIGN (0x8), LMA_EQ_VMA)
--- a/packages/hal/sparclite/sleb/current/include/pkgconf/mlt_sparclite_sleb_ram.mlt +++ b/packages/hal/sparclite/sleb/current/include/pkgconf/mlt_sparclite_sleb_ram.mlt @@ -1,6 +1,7 @@ version 0 region ram 4010000 3f0000 0 ! -section rom_vectors 0 4 0 1 1 1 1 1 4010000 4010000 text text ! +section ram_vectors 0 1 0 1 1 1 1 1 4010000 4010000 rom_vectors rom_vectors ! +section rom_vectors 0 8 0 1 0 1 0 1 text text ! section text 0 4 0 1 0 1 0 1 fini fini ! section fini 0 4 0 1 0 1 0 1 rodata rodata ! section rodata 0 8 0 1 0 1 0 1 rodata1 rodata1 !
--- a/packages/hal/sparclite/sleb/current/include/pkgconf/mlt_sparclite_sleb_rom.ldi +++ b/packages/hal/sparclite/sleb/current/include/pkgconf/mlt_sparclite_sleb_rom.ldi @@ -26,14 +26,21 @@ //####COPYRIGHTEND#### //=========================================================================== -// Leave 512 bytes free at the start of RAM for trampoline code to be -// copied in from the vectors. -// There is no nice way of automating the choice of size for this. + +// The ram_vectors section is to allow some free space to copy vectors into +// from the ROM. This is required to be variable size to accomodate SVT or +// MVT; 80 bytes vs 4kB. Copying is not necessary with MVT, but it is +// optional because it may offer performance gains. Copying is required +// for SVT because the (aligned) start of ROM contains initialization +// instructions. RAM copy is used rather than leave a big gap in the ROM +// to get an aligned address for the trampoline code. For RAM startup, +// ram_vectors will usually be of size zero, unless MVT and copying are +// enabled for memory estimation reasons. MEMORY { rom : ORIGIN = 0x00000000, LENGTH = 0x020000 - ram : ORIGIN = 0x04000200, LENGTH = 0x3ffe00 + ram : ORIGIN = 0x04000000, LENGTH = 0x400000 } SECTIONS @@ -46,7 +53,8 @@ SECTIONS SECTION_rodata1 (rom, ALIGN (0x8), LMA_EQ_VMA) SECTION_fixup (rom, ALIGN (0x8), LMA_EQ_VMA) SECTION_gcc_except_table (rom, ALIGN (0x8), LMA_EQ_VMA) - SECTION_data (ram, 0x4000200, FOLLOWING (.gcc_except_table)) + SECTION_ram_vectors(ram, 0x04000000, LMA_EQ_VMA) + SECTION_data (ram, ALIGN (0x8), FOLLOWING (.gcc_except_table)) SECTION_bss (ram, ALIGN (0x8), LMA_EQ_VMA) SECTIONS_END }
--- a/packages/hal/sparclite/sleb/current/include/pkgconf/mlt_sparclite_sleb_rom.mlt +++ b/packages/hal/sparclite/sleb/current/include/pkgconf/mlt_sparclite_sleb_rom.mlt @@ -1,6 +1,6 @@ version 0 region rom 0 20000 1 ! -region ram 4000200 3ffe00 0 ! +region ram 4000000 400000 0 ! section rom_vectors 0 1 0 1 1 1 1 1 0 0 text text ! section text 0 4 0 1 0 1 0 1 fini fini ! section fini 0 4 0 1 0 1 0 1 rodata rodata ! @@ -8,5 +8,6 @@ section rodata 0 8 0 1 0 1 0 1 rodata1 r section rodata1 0 8 0 1 0 1 0 1 fixup fixup ! section fixup 0 8 0 1 0 1 0 1 gcc_except_table gcc_except_table ! section gcc_except_table 0 8 0 1 0 0 0 1 data ! -section data 0 1 1 1 1 1 0 0 4000200 bss ! +section ram_vectors 0 1 0 1 1 1 1 0 4000000 4000000 data ! +section data 0 8 1 1 0 1 0 0 bss ! section bss 0 8 0 1 0 0 0 0 !
--- a/packages/io/serial/current/ChangeLog +++ b/packages/io/serial/current/ChangeLog @@ -1,3 +1,7 @@ +1999-10-15 Jesper Skov <jskov@cygnus.co.uk> + + * tests/ser_test_protocol.inl: Removed AEB rev C change. Was bogus. + 1999-10-06 Jesper Skov <jskov@cygnus.co.uk> * tests/ser_test_protocol.inl: Run tests on AEB rev C as well. @@ -126,6 +130,7 @@ 1999-06-20 Gary Thomas <gthomas@cygnus obsolete CDL parenting structure). Add support for Motorola PowerPC QUICC/SMC. + * src/arm/cma230_serial.c: * src/arm/cl7211_serial.c: * src/arm/aeb_serial.c: * src/arm/pid_serial_with_ints.c: Use #include to get 'diag_printf()' @@ -136,6 +141,13 @@ 1999-06-17 Gary Thomas <gthomas@cygnus * src/arm/cl7211_serial.c (cl7211_serial_start_xmit): Fix race which cause xmitter to get stuck. +1999-06-04 Gary Thomas <gthomas@cygnus.co.uk> + + * tests/ser_test_protocol.inl: Disable testing at 115200 + for Cogent CMA230 (ARM). + + * src/arm/cma230_serial.c: Fix interrupt for port B. + 1999-05-27 Jesper Skov <jskov@cygnus.co.uk> * tests/ser_test_protocol.inl: Added ability to change options in @@ -149,6 +161,13 @@ 1999-05-27 Jonathan Larmour <jlarmour@ due to transmission being disabled. Fix for PR 20047 +1999-05-26 Gary Thomas <gthomas@cygnus.co.uk> + + * include/pkgconf/io_serial.h: + * tests/ser_test_protocol.inl: Add Cogent CMA230 setup. + + * src/arm/cma230_serial.c: Make names compatible with Cogent + PowerPC board. 1999-05-26 Gary Thomas <gthomas@cygnus.co.uk>
--- a/packages/io/serial/current/include/pkgconf/io_serial.h +++ b/packages/io/serial/current/include/pkgconf/io_serial.h @@ -481,6 +481,108 @@ #define CYGNUM_IO_SERIAL_ARM_CL7211_SERIAL2_BAUD 38400 #define CYGNUM_IO_SERIAL_ARM_CL7211_SERIAL2_BUFSIZE 128 +/* ---------------------------------------------------------------------------- + {{CFG_DATA + cdl_component CYGPKG_IO_SERIAL_ARM_CMA230 { + display "Cogent ARM/CMA230 serial device drivers" + type bool + requires CYGPKG_IO_SERIAL + parent CYGPKG_HAL_ARM_CMA230 + description " + This option enables the serial device drivers for the Cogent ARM/CMA230." + doc ref/ecos-ref/ecos-device-drivers.html + } + + cdl_component CYGPKG_IO_SERIAL_ARM_CMA230_SERIAL_A { + display "Cogent ARM/CMA230 serial port A driver" + type bool + requires CYGPKG_IO_SERIAL + parent CYGPKG_IO_SERIAL_ARM_CMA230 + description " + This option includes the serial device driver for the Cogent ARM/CMA230 port A." + doc ref/ecos-ref/ecos-device-drivers.html + } + + cdl_option CYGDAT_IO_SERIAL_ARM_CMA230_SERIAL_A_NAME { + display "Device name for Cogent ARM/CMA230 serial port A" + type string + requires CYGPKG_IO_SERIAL + parent CYGPKG_IO_SERIAL_ARM_CMA230_SERIAL_A + description " + This option specifies the device name for the Cogent ARM/CMA230 port A." + doc ref/ecos-ref/ecos-device-drivers.html + } + + cdl_option CYGNUM_IO_SERIAL_ARM_CMA230_SERIAL_A_BAUD { + display "Baud rate for the Cogent ARM/CMA230 serial port A driver" + type enum + legal_values 50 75 110 134_5 150 200 300 600 1200 1800 2400 3600 4800 7200 9600 14400 19200 38400 57600 115200 234000 + parent CYGPKG_IO_SERIAL_ARM_CMA230_SERIAL_A + description " + This option specifies the default baud rate (speed) for the Cogent ARM/CMA230 port A." + doc ref/ecos-ref/ecos-device-drivers.html + } + + cdl_option CYGNUM_IO_SERIAL_ARM_CMA230_SERIAL_A_BUFSIZE { + display "Buffer size for the Cogent ARM/CMA230 serial port A driver" + type count + legal_values 0 to 8192 + parent CYGPKG_IO_SERIAL_ARM_CMA230_SERIAL_A + description " + This option specifies the size of the internal buffers used for the Cogent ARM/CMA230 port A." + doc ref/ecos-ref/ecos-device-drivers.html + } + + cdl_component CYGPKG_IO_SERIAL_ARM_CMA230_SERIAL_B { + display "Cogent ARM/CMA230 serial port B driver" + type bool + requires CYGPKG_IO_SERIAL + parent CYGPKG_IO_SERIAL_ARM_CMA230 + description " + This option includes the serial device driver for the Cogent ARM/CMA230 port B." + doc ref/ecos-ref/ecos-device-drivers.html + } + + cdl_option CYGDAT_IO_SERIAL_ARM_CMA230_SERIAL_B_NAME { + display "Device name for Cogent ARM/CMA230 serial port B" + type string + requires CYGPKG_IO_SERIAL + parent CYGPKG_IO_SERIAL_ARM_CMA230_SERIAL_B + description " + This option specifies the device name for the Cogent ARM/CMA230 port B." + doc ref/ecos-ref/ecos-device-drivers.html + } + + cdl_option CYGNUM_IO_SERIAL_ARM_CMA230_SERIAL_B_BAUD { + display "Baud rate for the Cogent ARM/CMA230 serial port B driver" + type enum + legal_values 50 75 110 134_5 150 200 300 600 1200 1800 2400 3600 4800 7200 9600 14400 19200 38400 57600 115200 234000 + parent CYGPKG_IO_SERIAL_ARM_CMA230_SERIAL_B + description " + This option specifies the default baud rate (speed) for the Cogent ARM/CMA230 port B." + doc ref/ecos-ref/ecos-device-drivers.html + } + + cdl_option CYGNUM_IO_SERIAL_ARM_CMA230_SERIAL_B_BUFSIZE { + display "Buffer size for the Cogent ARM/CMA230 serial port B driver" + type count + legal_values 0 to 8192 + parent CYGPKG_IO_SERIAL_ARM_CMA230_SERIAL_B + description " + This option specifies the size of the internal buffers used for the Cogent ARM/CMA230 port B." + doc ref/ecos-ref/ecos-device-drivers.html + } + + }}CFG_DATA */ +#undef CYGPKG_IO_SERIAL_ARM_CMA230 +#undef CYGPKG_IO_SERIAL_ARM_CMA230_SERIAL_A +#define CYGDAT_IO_SERIAL_ARM_CMA230_SERIAL_A_NAME "/dev/ser1" +#define CYGNUM_IO_SERIAL_ARM_CMA230_SERIAL_A_BAUD 38400 +#define CYGNUM_IO_SERIAL_ARM_CMA230_SERIAL_A_BUFSIZE 128 +#undef CYGPKG_IO_SERIAL_ARM_CMA230_SERIAL_B +#define CYGDAT_IO_SERIAL_ARM_CMA230_SERIAL_B_NAME "/dev/ser2" +#define CYGNUM_IO_SERIAL_ARM_CMA230_SERIAL_B_BAUD 38400 +#define CYGNUM_IO_SERIAL_ARM_CMA230_SERIAL_B_BUFSIZE 128 /* ----------------------------------------------------------------------------
--- a/packages/io/serial/current/src/PKGconf.mak +++ b/packages/io/serial/current/src/PKGconf.mak @@ -43,6 +43,9 @@ endif ifdef CYG_HAL_ARM_EB7211 EXTRAS_COMPILE += arm/cl7211_serial.c endif +ifdef CYG_HAL_ARM_CMA230 +EXTRAS_COMPILE += arm/cma230_serial.c +endif ifdef CYG_HAL_MN10300_AM31 EXTRAS_COMPILE += mn10300/mn10300_serial.c endif
new file mode 100644 --- /dev/null +++ b/packages/io/serial/current/src/arm/cma230_serial.c @@ -0,0 +1,317 @@ +//========================================================================== +// +// io/serial/arm/cma230_serial.c +// +// Cogent CMA230 Serial I/O Interface Module (interrupt driven) +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 1999-02-04 +// Purpose: CMA230 Serial I/O module (interrupt driven version) +// Description: +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#include <pkgconf/system.h> +#include <pkgconf/io_serial.h> +#include <pkgconf/io.h> +#include <cyg/io/io.h> +#include <cyg/hal/hal_intr.h> +#include <cyg/io/devtab.h> +#include <cyg/io/serial.h> +#include <cyg/hal/hal_cma230.h> +#include <cyg/infra/diag.h> + +#ifdef CYGPKG_IO_SERIAL_ARM_CMA230 + +#include "cma230_serial.h" + +typedef struct cma230_serial_info { + CYG_ADDRWORD base; + CYG_WORD int_num; + cyg_interrupt serial_interrupt; + cyg_handle_t serial_interrupt_handle; +} cma230_serial_info; + +static bool cma230_serial_init(struct cyg_devtab_entry *tab); +static bool cma230_serial_putc(serial_channel *chan, unsigned char c); +static Cyg_ErrNo cma230_serial_lookup(struct cyg_devtab_entry **tab, + struct cyg_devtab_entry *sub_tab, + const char *name); +static unsigned char cma230_serial_getc(serial_channel *chan); +static bool cma230_serial_set_config(serial_channel *chan, cyg_serial_info_t *config); +static void cma230_serial_start_xmit(serial_channel *chan); +static void cma230_serial_stop_xmit(serial_channel *chan); + +static cyg_uint32 cma230_serial_ISR(cyg_vector_t vector, cyg_addrword_t data); +static void cma230_serial_DSR(cyg_vector_t vector, cyg_ucount32 count, cyg_addrword_t data); + +static SERIAL_FUNS(cma230_serial_funs, + cma230_serial_putc, + cma230_serial_getc, + cma230_serial_set_config, + cma230_serial_start_xmit, + cma230_serial_stop_xmit + ); + +#ifdef CYGPKG_IO_SERIAL_ARM_CMA230_SERIAL_A +static cma230_serial_info cma230_serial_info0 = {CMA101_DUARTA, + CYGNUM_HAL_INTERRUPT_SERIAL_A}; +#if CYGNUM_IO_SERIAL_ARM_CMA230_SERIAL_A_BUFSIZE > 0 +static unsigned char cma230_serial_out_buf0[CYGNUM_IO_SERIAL_ARM_CMA230_SERIAL_A_BUFSIZE]; +static unsigned char cma230_serial_in_buf0[CYGNUM_IO_SERIAL_ARM_CMA230_SERIAL_A_BUFSIZE]; + +static SERIAL_CHANNEL_USING_INTERRUPTS(cma230_serial_channel0, + cma230_serial_funs, + cma230_serial_info0, + CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_ARM_CMA230_SERIAL_A_BAUD), + CYG_SERIAL_STOP_DEFAULT, + CYG_SERIAL_PARITY_DEFAULT, + CYG_SERIAL_WORD_LENGTH_DEFAULT, + CYG_SERIAL_FLAGS_DEFAULT, + &cma230_serial_out_buf0[0], sizeof(cma230_serial_out_buf0), + &cma230_serial_in_buf0[0], sizeof(cma230_serial_in_buf0) + ); +#else +static SERIAL_CHANNEL(cma230_serial_channel0, + cma230_serial_funs, + cma230_serial_info0, + CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_ARM_CMA230_SERIAL_A_BAUD), + CYG_SERIAL_STOP_DEFAULT, + CYG_SERIAL_PARITY_DEFAULT, + CYG_SERIAL_WORD_LENGTH_DEFAULT, + CYG_SERIAL_FLAGS_DEFAULT + ); +#endif + +DEVTAB_ENTRY(cma230_serial_io0, + CYGDAT_IO_SERIAL_ARM_CMA230_SERIAL_A_NAME, + 0, // Does not depend on a lower level interface + &serial_devio, + cma230_serial_init, + cma230_serial_lookup, // Serial driver may need initializing + &cma230_serial_channel0 + ); +#endif // CYGPKG_IO_SERIAL_ARM_CMA230_SERIAL_A + +#ifdef CYGPKG_IO_SERIAL_ARM_CMA230_SERIAL_B +static cma230_serial_info cma230_serial_info1 = {CMA101_DUARTB, + CYGNUM_HAL_INTERRUPT_SERIAL_B}; +#if CYGNUM_IO_SERIAL_ARM_CMA230_SERIAL_B_BUFSIZE > 0 +static unsigned char cma230_serial_out_buf1[CYGNUM_IO_SERIAL_ARM_CMA230_SERIAL_B_BUFSIZE]; +static unsigned char cma230_serial_in_buf1[CYGNUM_IO_SERIAL_ARM_CMA230_SERIAL_B_BUFSIZE]; + +static SERIAL_CHANNEL_USING_INTERRUPTS(cma230_serial_channel1, + cma230_serial_funs, + cma230_serial_info1, + CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_ARM_CMA230_SERIAL_B_BAUD), + CYG_SERIAL_STOP_DEFAULT, + CYG_SERIAL_PARITY_DEFAULT, + CYG_SERIAL_WORD_LENGTH_DEFAULT, + CYG_SERIAL_FLAGS_DEFAULT, + &cma230_serial_out_buf1[0], sizeof(cma230_serial_out_buf1), + &cma230_serial_in_buf1[0], sizeof(cma230_serial_in_buf1) + ); +#else +static SERIAL_CHANNEL(cma230_serial_channel1, + cma230_serial_funs, + cma230_serial_info1, + CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_ARM_CMA230_SERIAL_B_BAUD), + CYG_SERIAL_STOP_DEFAULT, + CYG_SERIAL_PARITY_DEFAULT, + CYG_SERIAL_WORD_LENGTH_DEFAULT, + CYG_SERIAL_FLAGS_DEFAULT + ); +#endif + +DEVTAB_ENTRY(cma230_serial_io1, + CYGDAT_IO_SERIAL_ARM_CMA230_SERIAL_B_NAME, + 0, // Does not depend on a lower level interface + &serial_devio, + cma230_serial_init, + cma230_serial_lookup, // Serial driver may need initializing + &cma230_serial_channel1 + ); +#endif // CYGPKG_IO_SERIAL_ARM_CMA230_SERIAL_B + +// Internal function to actually configure the hardware to desired baud rate, etc. +static bool +cma230_serial_config_port(serial_channel *chan, cyg_serial_info_t *new_config, bool init) +{ + cma230_serial_info *cma230_chan = (cma230_serial_info *)chan->dev_priv; + volatile struct serial_port *port = (volatile struct serial_port *)cma230_chan->base; + unsigned short baud_divisor = select_baud[new_config->baud]; + unsigned char _lcr, _ier; + if (baud_divisor == 0) return false; // Invalid configuration + _ier = port->ier; + port->ier = 0; // Disable port interrupts while changing hardware + _lcr = select_word_length[new_config->word_length - CYGNUM_SERIAL_WORD_LENGTH_5] | + select_stop_bits[new_config->stop] | + select_parity[new_config->parity]; + port->lcr = _lcr; + port->lcr |= LCR_DL; + port->mdl = baud_divisor >> 8; + port->ldl = baud_divisor & 0xFF; + port->lcr &= ~LCR_DL; + if (init) { + port->fcr = 0x07; // Enable and clear FIFO + if (chan->out_cbuf.len != 0) { + port->ier = IER_RCV; + } else { + port->ier = 0; + } + port->mcr = MCR_INT|MCR_DTR|MCR_RTS; // Master interrupt enable + } else { + port->ier = _ier; + } + if (new_config != &chan->config) { + chan->config = *new_config; + } + return true; +} + +// Function to initialize the device. Called at bootstrap time. +static bool +cma230_serial_init(struct cyg_devtab_entry *tab) +{ + serial_channel *chan = (serial_channel *)tab->priv; + cma230_serial_info *cma230_chan = (cma230_serial_info *)chan->dev_priv; +#ifdef CYGDBG_IO_INIT + diag_printf("CMA230 SERIAL init - dev: %x.%d\n", cma230_chan->base, cma230_chan->int_num); +#endif + (chan->callbacks->serial_init)(chan); // Really only required for interrupt driven devices + if (chan->out_cbuf.len != 0) { + cyg_drv_interrupt_create(cma230_chan->int_num, + 99, // Priority - what goes here? + (cyg_addrword_t)chan, // Data item passed to interrupt handler + cma230_serial_ISR, + cma230_serial_DSR, + &cma230_chan->serial_interrupt_handle, + &cma230_chan->serial_interrupt); + cyg_drv_interrupt_attach(cma230_chan->serial_interrupt_handle); + cyg_drv_interrupt_unmask(cma230_chan->int_num); + } + cma230_serial_config_port(chan, &chan->config, true); + return true; +} + +// This routine is called when the device is "looked" up (i.e. attached) +static Cyg_ErrNo +cma230_serial_lookup(struct cyg_devtab_entry **tab, + struct cyg_devtab_entry *sub_tab, + const char *name) +{ + serial_channel *chan = (serial_channel *)(*tab)->priv; + (chan->callbacks->serial_init)(chan); // Really only required for interrupt driven devices + return ENOERR; +} + +// Send a character to the device output buffer. +// Return 'true' if character is sent to device +static bool +cma230_serial_putc(serial_channel *chan, unsigned char c) +{ + cma230_serial_info *cma230_chan = (cma230_serial_info *)chan->dev_priv; + volatile struct serial_port *port = (volatile struct serial_port *)cma230_chan->base; + if (port->lsr & LSR_THE) { +// Transmit buffer is empty + port->thr = c; + return true; + } else { +// No space + return false; + } +} + +// Fetch a character from the device input buffer, waiting if necessary +static unsigned char +cma230_serial_getc(serial_channel *chan) +{ + unsigned char c; + cma230_serial_info *cma230_chan = (cma230_serial_info *)chan->dev_priv; + volatile struct serial_port *port = (volatile struct serial_port *)cma230_chan->base; + while ((port->lsr & LSR_RSR) == 0) ; // Wait for char + c = port->rhr; + return c; +} + +// Set up the device characteristics; baud rate, etc. +static bool +cma230_serial_set_config(serial_channel *chan, cyg_serial_info_t *config) +{ + return cma230_serial_config_port(chan, config, false); +} + +// Enable the transmitter on the device +static void +cma230_serial_start_xmit(serial_channel *chan) +{ + cma230_serial_info *cma230_chan = (cma230_serial_info *)chan->dev_priv; + volatile struct serial_port *port = (volatile struct serial_port *)cma230_chan->base; + port->ier |= IER_XMT; // Enable xmit interrupt +} + +// Disable the transmitter on the device +static void +cma230_serial_stop_xmit(serial_channel *chan) +{ + cma230_serial_info *cma230_chan = (cma230_serial_info *)chan->dev_priv; + volatile struct serial_port *port = (volatile struct serial_port *)cma230_chan->base; + port->ier &= ~IER_XMT; // Disable xmit interrupt +} + +// Serial I/O - low level interrupt handler (ISR) +static cyg_uint32 +cma230_serial_ISR(cyg_vector_t vector, cyg_addrword_t data) +{ + serial_channel *chan = (serial_channel *)data; + cma230_serial_info *cma230_chan = (cma230_serial_info *)chan->dev_priv; + cyg_drv_interrupt_mask(cma230_chan->int_num); + cyg_drv_interrupt_acknowledge(cma230_chan->int_num); + return CYG_ISR_CALL_DSR; // Cause DSR to be run +} + +// Serial I/O - high level interrupt handler (DSR) +static void +cma230_serial_DSR(cyg_vector_t vector, cyg_ucount32 count, cyg_addrword_t data) +{ + serial_channel *chan = (serial_channel *)data; + cma230_serial_info *cma230_chan = (cma230_serial_info *)chan->dev_priv; + volatile struct serial_port *port = (volatile struct serial_port *)cma230_chan->base; + unsigned char isr; + isr = port->isr & 0x0E; + if (isr == ISR_Tx) { + (chan->callbacks->xmt_char)(chan); + } else if (isr == ISR_Rx) { + (chan->callbacks->rcv_char)(chan, port->rhr); + } + cyg_drv_interrupt_unmask(cma230_chan->int_num); +} +#endif
new file mode 100644 --- /dev/null +++ b/packages/io/serial/current/src/arm/cma230_serial.h @@ -0,0 +1,151 @@ +#ifndef CYGONCE_ARM_CMA230_SERIAL_H +#define CYGONCE_ARM_CMA230_SERIAL_H + +// ==================================================================== +// +// cma230_serial.h +// +// Device I/O - Description of Cogent CMA230 serial hardware +// +// ==================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +// ==================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 1999-05-20 +// Purpose: Internal interfaces for serial I/O drivers +// Description: +// +//####DESCRIPTIONEND#### +// +// ==================================================================== + +// Description of serial ports on Cogent CMA230 + +struct serial_port { + unsigned char _byte[32]; +}; + +#define reg(n) _byte[n*8] + +// Receive control registers +#define rhr reg(0) // Receive holding register +#define isr reg(2) // Interrupt status register +#define lsr reg(5) // Line status register +#define msr reg(6) // Modem status register +#define scr reg(7) // Scratch register + +// Transmit control registers +#define thr reg(0) // Transmit holding register +#define ier reg(1) // Interrupt enable register +#define fcr reg(2) // FIFO control register +#define lcr reg(3) // Line control register +#define mcr reg(4) // Modem control register +#define ldl reg(0) // LSB of baud rate +#define mdl reg(1) // MSB of baud rate + +// Interrupt Enable Register +#define IER_RCV 0x01 +#define IER_XMT 0x02 +#define IER_LS 0x04 +#define IER_MS 0x08 + +// Line Control Register +#define LCR_WL5 0x00 // Word length +#define LCR_WL6 0x01 +#define LCR_WL7 0x02 +#define LCR_WL8 0x03 +#define LCR_SB1 0x00 // Number of stop bits +#define LCR_SB1_5 0x04 // 1.5 -> only valid with 5 bit words +#define LCR_SB2 0x04 +#define LCR_PN 0x00 // Parity mode - none +#define LCR_PE 0x0C // Parity mode - even +#define LCR_PO 0x08 // Parity mode - odd +#define LCR_PM 0x28 // Forced "mark" parity +#define LCR_PS 0x38 // Forced "space" parity +#define LCR_DL 0x80 // Enable baud rate latch + +// Line Status Register +#define LSR_RSR 0x01 +#define LSR_THE 0x20 + +// Modem Control Register +#define MCR_DTR 0x01 +#define MCR_RTS 0x02 +#define MCR_INT 0x08 // Enable interrupts + +// Interrupt status register +#define ISR_Tx 0x02 +#define ISR_Rx 0x04 + +static unsigned char select_word_length[] = { + LCR_WL5, // 5 bits / word (char) + LCR_WL6, + LCR_WL7, + LCR_WL8 +}; + +static unsigned char select_stop_bits[] = { + 0, + LCR_SB1, // 1 stop bit + LCR_SB1_5, // 1.5 stop bit + LCR_SB2 // 2 stop bits +}; + +static unsigned char select_parity[] = { + LCR_PN, // No parity + LCR_PE, // Even parity + LCR_PO, // Odd parity + LCR_PM, // Mark parity + LCR_PS, // Space parity +}; + +// The Cogent board has a 3.6864 MHz crystal +static unsigned short select_baud[] = { + 0, // Unused + 4608, // 50 + 0, // 75 + 2094, // 110 + 0, // 134.5 + 1536, // 150 + 0, // 200 + 768, // 300 + 384, // 600 + 182, // 1200 + 0, // 1800 + 96, // 2400 + 0, // 3600 + 48, // 4800 + 32, // 7200 + 24, // 9600 + 16, // 14400 + 12, // 19200 + 6, // 38400 + 4, // 57600 + 2, // 115200 + 0, // 230400 +}; + +#endif // CYGONCE_ARM_CMA230_SERIAL_H
--- a/packages/io/serial/current/tests/ser_test_protocol.inl +++ b/packages/io/serial/current/tests/ser_test_protocol.inl @@ -94,7 +94,7 @@ # define TEST_TTY_DEV CYGDAT_IO_SERIAL_TTY_TTY0_DEV # endif #endif -#if defined(CYGPKG_HAL_ARM_AEB) || defined(CYGPKG_HAL_ARM_AEBC) \ +#if defined(CYGPKG_HAL_ARM_AEB) \ && defined(CYGPKG_IO_SERIAL_ARM_AEB) \ && defined(CYGPKG_IO_SERIAL_ARM_AEB_SERIAL1) # define TEST_CRASH_ID "armaeb" @@ -112,13 +112,22 @@ # define TEST_TTY_DEV CYGDAT_IO_SERIAL_TTY_TTY1_DEV # endif #endif +#if defined(CYGPKG_HAL_ARM_CMA230) \ + && defined(CYGPKG_IO_SERIAL_ARM_CMA230) \ + && defined(CYGPKG_IO_SERIAL_ARM_CMA230_SERIAL_A) +# define TEST_CRASH_ID "armcma" +# define TEST_SER_DEV CYGDAT_IO_SERIAL_ARM_CMA230_SERIAL_A_NAME +# if defined(CYGPKG_IO_SERIAL_TTY_TTY1) +# define TEST_TTY_DEV CYGDAT_IO_SERIAL_TTY_TTY1_DEV +# endif +#endif #if defined(CYGPKG_HAL_MIPS_TX39_JMR3904) \ && defined(CYGPKG_IO_SERIAL_TX39_JMR3904) \ && defined(CYGPKG_IO_SERIAL_TX39_JMR3904_SERIAL0) # define TEST_CRASH_ID "tx3jmr" # define TEST_SER_DEV CYGDAT_IO_SERIAL_TX39_JMR3904_SERIAL0_NAME -# if defined(CYGPKG_IO_SERIAL_TTY_TTY1) -# define TEST_TTY_DEV CYGDAT_IO_SERIAL_TTY_TTY1_DEV +# if defined(CYGPKG_IO_SERIAL_TTY_TTY0) +# define TEST_TTY_DEV CYGDAT_IO_SERIAL_TTY_TTY0_DEV # endif #endif #if defined(CYGPKG_HAL_MN10300_AM31_STDEVAL1) \ @@ -324,6 +333,7 @@ cyg_ser_cfg_t test_configs[] = { !defined(CYGPKG_HAL_ARM_PID) && \ !defined(CYGPKG_HAL_ARM_AEB) && \ !defined(CYGPKG_HAL_MN10300_STDEVAL1) && \ + !defined(CYGPKG_HAL_ARM_CMA230) && \ !defined(CYGPKG_HAL_ARM_CL7211) && \ !defined(CYGPKG_HAL_SPARCLITE_SLEB) { CYGNUM_SERIAL_BAUD_115200, CYGNUM_SERIAL_WORD_LENGTH_8,
--- a/packages/kernel/current/ChangeLog +++ b/packages/kernel/current/ChangeLog @@ -1,4 +1,12 @@ - +1999-10-08 Jesper Skov <jskov@cygnus.co.uk> + + * tests/kcache1.c: Fix array size. + + * src/sched/bitmap.cxx (add_thread): + * src/sched/mlqueue.cxx (add_thread): + Check for valid thread priority. + + 1999-10-05 Jesper Skov <jskov@cygnus.co.uk> * tests/kcache1.c: Reduced memory footprint.
--- a/packages/kernel/current/src/sched/bitmap.cxx +++ b/packages/kernel/current/src/sched/bitmap.cxx @@ -103,6 +103,10 @@ void Cyg_Scheduler_Implementation::add_t thread_table[thread->priority] == thread, "Duplicate thread priorities" ); + CYG_ASSERT((CYG_THREAD_MIN_PRIORITY >= pri) + && (CYG_THREAD_MAX_PRIORITY <= pri), + "Priority out of range!"); + CYG_ASSERT( (run_queue & (1<<thread->priority)) == 0, "Run queue bit already set" );
--- a/packages/kernel/current/src/sched/mlqueue.cxx +++ b/packages/kernel/current/src/sched/mlqueue.cxx @@ -136,6 +136,10 @@ Cyg_Scheduler_Implementation::add_thread cyg_priority pri = thread->priority; Cyg_ThreadQueue_Implementation *queue = &run_queue[pri]; + CYG_ASSERT((CYG_THREAD_MIN_PRIORITY >= pri) + && (CYG_THREAD_MAX_PRIORITY <= pri), + "Priority out of range!"); + // If the thread is on some other queue, remove it // here. if( thread->queue != NULL )
--- a/packages/kernel/current/tests/dhrystone.c +++ b/packages/kernel/current/tests/dhrystone.c @@ -59,6 +59,8 @@ dtime(void) // Number of loops to run. #if defined(CYGPKG_HAL_ARM_AEB) || defined(CYGPKG_HAL_ARM_PID) #define PASSES 100000 +#elif defined(CYGPKG_HAL_ARM_CMA230) +#define PASSES 100000 #else #define PASSES 400000 #endif
--- a/packages/kernel/current/tests/kcache1.c +++ b/packages/kernel/current/tests/kcache1.c @@ -88,7 +88,7 @@ static char stack[NTHREADS][STACKSIZE]; #define MAX_STRIDE 64 #endif -volatile char m[(HAL_DCACHE_SIZE/HAL_DCACHE_LINE_SIZE)*MAX_STRIDE+1]; +volatile char m[(HAL_DCACHE_SIZE/HAL_DCACHE_LINE_SIZE)*MAX_STRIDE]; // -------------------------------------------------------------------------
--- a/packages/language/c/libc/current/ChangeLog +++ b/packages/language/c/libc/current/ChangeLog @@ -1,3 +1,18 @@ +1999-10-19 Jonathan Larmour <jlarmour@cygnus.co.uk> + + * src/stdio/output/vfnprintf.cxx: We can now remove Berkeley + advertising clause + * src/stdlib/div.cxx: ditto + * src/stdlib/ldiv.cxx: ditto + * src/stdlib/strtol.cxx: ditto + * src/stdlib/strtoul.cxx: ditto + * src/string/strtok.cxx: ditto + +1999-10-08 Jonathan Larmour <jlarmour@cygnus.co.uk> + + * include/pkgconf/libc.h (CYGNUM_LIBC_MAIN_THREAD_PRIORITY): Change + default to 10 to keep test farm happy + 1999-10-05 Jonathan Larmour <jlarmour@cygnus.co.uk> * include/libc.h: Add CYGSEM_LIBC_MAIN_STACK_FROM_SYSTEM to allow
--- a/packages/language/c/libc/current/include/pkgconf/libc.h +++ b/packages/language/c/libc/current/include/pkgconf/libc.h @@ -1189,7 +1189,7 @@ #ifdef CYGSEM_LIBC_STARTUP_MAIN_THREAD # define CYGSEM_LIBC_MAIN_STACK_FROM_SYSTEM # define CYGNUM_LIBC_MAIN_DEFAULT_STACK_SIZE 8192 -# define CYGNUM_LIBC_MAIN_THREAD_PRIORITY 16 +# define CYGNUM_LIBC_MAIN_THREAD_PRIORITY 10 #endif #define CYGFUN_LIBC_ATEXIT
--- a/packages/language/c/libc/current/src/stdio/output/vfnprintf.cxx +++ b/packages/language/c/libc/current/src/stdio/output/vfnprintf.cxx @@ -57,11 +57,7 @@ * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by the University of - * California, Berkeley and its contributors. - * 4. Neither the name of the University nor the names of its contributors + * 3. Neither the name of the University nor the names of its contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. *
--- a/packages/language/c/libc/current/src/stdlib/strtol.cxx +++ b/packages/language/c/libc/current/src/stdlib/strtol.cxx @@ -55,11 +55,7 @@ * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by the University of - * California, Berkeley and its contributors. - * 4. Neither the name of the University nor the names of its contributors + * 3. Neither the name of the University nor the names of its contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. *
--- a/packages/language/c/libc/current/src/stdlib/strtoul.cxx +++ b/packages/language/c/libc/current/src/stdlib/strtoul.cxx @@ -55,11 +55,7 @@ * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by the University of - * California, Berkeley and its contributors. - * 4. Neither the name of the University nor the names of its contributors + * 3. Neither the name of the University nor the names of its contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. *
--- a/packages/language/c/libc/current/src/string/strtok.cxx +++ b/packages/language/c/libc/current/src/string/strtok.cxx @@ -54,11 +54,7 @@ * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by the University of - * California, Berkeley and its contributors. - * 4. Neither the name of the University nor the names of its contributors + * 3. Neither the name of the University nor the names of its contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. *
--- a/packages/packages +++ b/packages/packages @@ -152,6 +152,13 @@ package CYGPKG_HAL_ARM_CL7211 { } +package CYGPKG_HAL_ARM_CMA230 { + alias { "Cogent CMA230 (ARM7TDMI)" hal_arm_cma230 arm_cma230_hal } + directory hal/arm/cma230 + include_dir cyg/hal + hardware +} + package CYGPKG_HAL_I386 { alias { "i386 common HAL" hal_i386 i386_hal i386_arch_hal } directory hal/i386/arch
--- a/packages/pkgconf.tcl +++ b/packages/pkgconf.tcl @@ -5552,8 +5552,8 @@ proc pkgconf::produce_misc_files { } { puts $file " PACKAGE_RULES_FILE := \$(wildcard \$(BUILD_TREE)/pkgconf/\$(PACKAGE).mak) -ifneq ($(PACKAGE_RULES_FILE),) -include $(PACKAGE_RULES_FILE) +ifneq (\$(PACKAGE_RULES_FILE),) +include \$(PACKAGE_RULES_FILE) endif" puts $file "\ninclude \$(BUILD_TREE)/pkgconf/makevars" @@ -5713,13 +5713,13 @@ proc pkgconf::produce_makefile { } { include pkgconf/pkgconf.mak .PHONY: default build clean tests headers" - puts $makefile "\nbuild: $(PREFIX)/lib/extras.o" + puts $makefile "\nbuild: \$(PREFIX)/lib/extras.o" puts $makefile "\t@echo Build finished." - puts $makefile "\n$(PREFIX)/lib/extras.o: $(PREFIX)/lib/libextras.a" - puts $makefile "\t$(CC) $(ARCHFLAGS) $(LDARCHFLAGS) -nostdlib -Wl,-r -Wl,--whole-archive $(PREFIX)/lib/libextras.a -o $(PREFIX)/lib/extras.o" + puts $makefile "\n\$(PREFIX)/lib/extras.o: \$(PREFIX)/lib/libextras.a" + puts $makefile "\t\$(CC) \$(ARCHFLAGS) \$(LDARCHFLAGS) -nostdlib -Wl,-r -Wl,--whole-archive \$(PREFIX)/lib/libextras.a -o \$(PREFIX)/lib/extras.o" - puts $makefile "\n$(PREFIX)/lib/libextras.a: headers" + puts $makefile "\n\$(PREFIX)/lib/libextras.a: headers" foreach src_dir $pkgconf::src_dirs { puts $makefile "\t\$(MAKE) -C $src_dir" }
--- a/packages/targets +++ b/packages/targets @@ -232,6 +232,24 @@ target arm { LDLANGFLAGS "-Wl,--gc-sections -Wl,-static" } } + + platform pid9 { + alias { "ARM PID9 development board" } + startup { ram rom stubs } + packages { + CYGPKG_HAL_ARM_PID + } + base_platform pid + cflags { + ARCHFLAGS "-mcpu=arm9" + ERRFLAGS "-Wall -Wpointer-arith -Wstrict-prototypes -Winline -Wundef" + CXXERRFLAGS "-Woverloaded-virtual" + DBGFLAGS "-g -O2" + LANGFLAGS "-ffunction-sections -fdata-sections" + CXXLANGFLAGS "-fno-rtti -fno-exceptions -fvtable-gc -finit-priority" + LDLANGFLAGS "-Wl,--gc-sections -Wl,-static" + } + } platform aeb { alias { "ARM Eval Board (AEB)" } startup { ram rom stubs } @@ -300,6 +318,22 @@ target arm { LDLANGFLAGS "-Wl,--gc-sections -Wl,-static" } } + platform cma230 { + alias { "Cogent CMA230" } + startup { ram rom stubs } + packages { + CYGPKG_HAL_ARM_CMA230 + } + cflags { + ARCHFLAGS "-mcpu=arm7tdmi" + ERRFLAGS "-Wall -Wpointer-arith -Wstrict-prototypes -Winline -Wundef" + CXXERRFLAGS "-Woverloaded-virtual" + DBGFLAGS "-g -O2" + LANGFLAGS "-ffunction-sections -fdata-sections" + CXXLANGFLAGS "-fno-rtti -fno-exceptions -fvtable-gc -finit-priority" + LDLANGFLAGS "-Wl,--gc-sections -Wl,-static" + } + } } target sparclite {