Mercurial > flash_v2
comparison packages/devs/eth/powerpc/quicc/current/src/if_quicc.c @ 132:0ae0bc38e387 ecos-sw-2000-10-31
Merge from eCos master repository on 2000-10-31-00:30:36-GMT
| author | jlarmour |
|---|---|
| date | Tue, 31 Oct 2000 20:53:09 +0000 |
| parents | 6bd9d475ed4b |
| children | d397fc472bcf |
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| 131:8461114e4f19 | 132:0ae0bc38e387 |
|---|---|
| 52 // | 52 // |
| 53 //========================================================================== | 53 //========================================================================== |
| 54 | 54 |
| 55 // Ethernet device driver for MPC8xx QUICC | 55 // Ethernet device driver for MPC8xx QUICC |
| 56 | 56 |
| 57 #include <pkgconf/system.h> | |
| 58 #include <pkgconf/devs_eth_powerpc_quicc.h> | |
| 59 | |
| 60 #ifdef CYGPKG_NET | |
| 57 #include <pkgconf/net.h> | 61 #include <pkgconf/net.h> |
| 58 #include <pkgconf/devs_eth_powerpc_quicc.h> | 62 #endif |
| 59 | 63 |
| 60 #include <cyg/infra/cyg_type.h> | 64 #include <cyg/infra/cyg_type.h> |
| 65 #include <cyg/infra/diag.h> | |
| 66 | |
| 61 #include <cyg/hal/hal_arch.h> | 67 #include <cyg/hal/hal_arch.h> |
| 62 #include <cyg/infra/diag.h> | 68 #include <cyg/hal/hal_cache.h> |
| 69 #include <cyg/hal/hal_intr.h> | |
| 63 #include <cyg/hal/drv_api.h> | 70 #include <cyg/hal/drv_api.h> |
| 64 #include <cyg/hal/hal_cache.h> | |
| 65 | 71 |
| 66 #include <netdev.h> | 72 #include <netdev.h> |
| 67 #include <eth_drv.h> | 73 #include <eth_drv.h> |
| 68 | 74 |
| 69 #include "quicc_eth.h" | 75 #include "quicc_eth.h" |
| 92 NETDEVTAB_ENTRY(quicc_netdev, | 98 NETDEVTAB_ENTRY(quicc_netdev, |
| 93 "quicc_eth", | 99 "quicc_eth", |
| 94 quicc_eth_init, | 100 quicc_eth_init, |
| 95 &quicc_eth0_sc); | 101 &quicc_eth0_sc); |
| 96 | 102 |
| 103 extern int _mbx_fetch_VPD(int, void *, int); | |
| 104 | |
| 97 static cyg_interrupt quicc_eth_interrupt; | 105 static cyg_interrupt quicc_eth_interrupt; |
| 98 static cyg_handle_t quicc_eth_interrupt_handle; | 106 static cyg_handle_t quicc_eth_interrupt_handle; |
| 99 static void quicc_eth_int(struct eth_drv_sc *data); | 107 static void quicc_eth_int(struct eth_drv_sc *data); |
| 100 | |
| 101 extern int _mbx_fetch_VPD(int, void *, int); | |
| 102 | 108 |
| 103 // This ISR is called when the ethernet interrupt occurs | 109 // This ISR is called when the ethernet interrupt occurs |
| 104 static int | 110 static int |
| 105 quicc_eth_isr(cyg_vector_t vector, cyg_addrword_t data, HAL_SavedRegisters *regs) | 111 quicc_eth_isr(cyg_vector_t vector, cyg_addrword_t data, HAL_SavedRegisters *regs) |
| 106 { | 112 { |
| 162 qi->ctl = scc = &eppc->scc_regs[0]; // Use SCC1 | 168 qi->ctl = scc = &eppc->scc_regs[0]; // Use SCC1 |
| 163 | 169 |
| 164 // Shut down ethernet, in case it is already running | 170 // Shut down ethernet, in case it is already running |
| 165 scc->scc_gsmr_l &= ~(QUICC_SCC_GSML_ENR | QUICC_SCC_GSML_ENT); | 171 scc->scc_gsmr_l &= ~(QUICC_SCC_GSML_ENR | QUICC_SCC_GSML_ENT); |
| 166 | 172 |
| 167 bzero((void *)enet_pram, sizeof(*enet_pram)); | 173 memset((void *)enet_pram, 0, sizeof(*enet_pram)); |
| 168 | 174 |
| 169 TxBD = 0x2C00; // FIXME | 175 TxBD = 0x2C00; // FIXME |
| 170 RxBD = TxBD + CYGNUM_DEVS_ETH_POWERPC_QUICC_TxNUM * sizeof(struct cp_bufdesc); | 176 RxBD = TxBD + CYGNUM_DEVS_ETH_POWERPC_QUICC_TxNUM * sizeof(struct cp_bufdesc); |
| 171 | 177 |
| 172 txbd = (struct cp_bufdesc *)((char *)eppc + TxBD); | 178 txbd = (struct cp_bufdesc *)((char *)eppc + TxBD); |
| 393 txbd = qi->tbase; | 399 txbd = qi->tbase; |
| 394 } else { | 400 } else { |
| 395 txbd++; | 401 txbd++; |
| 396 } | 402 } |
| 397 if (txbd == txfirst) { | 403 if (txbd == txfirst) { |
| 404 #ifdef CYGPKG_NET | |
| 398 panic ("No free xmit buffers"); | 405 panic ("No free xmit buffers"); |
| 406 #else | |
| 407 printf("QUICC Ethernet: No free xmit buffers\n"); | |
| 408 #endif | |
| 399 } | 409 } |
| 400 } | 410 } |
| 401 // Remember the next buffer to try | 411 // Remember the next buffer to try |
| 402 if (txbd->ctrl & QUICC_BD_CTL_Wrap) { | 412 if (txbd->ctrl & QUICC_BD_CTL_Wrap) { |
| 403 qi->txbd = qi->tbase; | 413 qi->txbd = qi->tbase; |
| 408 qi->txkey[txindex] = key; | 418 qi->txkey[txindex] = key; |
| 409 // Set up buffer | 419 // Set up buffer |
| 410 txbd->length = total_len; | 420 txbd->length = total_len; |
| 411 bp = txbd->buffer; | 421 bp = txbd->buffer; |
| 412 for (i = 0; i < sg_len; i++) { | 422 for (i = 0; i < sg_len; i++) { |
| 413 bcopy((void *)sg_list[i].buf, (void *)bp, sg_list[i].len); | 423 memcpy((void *)bp, (void *)sg_list[i].buf, sg_list[i].len); |
| 414 bp += sg_list[i].len; | 424 bp += sg_list[i].len; |
| 415 } | 425 } |
| 416 // Note: the MBX860 does not seem to snoop/invalidate the data cache properly! | 426 // Note: the MBX860 does not seem to snoop/invalidate the data cache properly! |
| 417 HAL_DCACHE_IS_ENABLED(cache_state); | 427 HAL_DCACHE_IS_ENABLED(cache_state); |
| 418 if (cache_state) { | 428 if (cache_state) { |
| 469 if (cache_state) { | 479 if (cache_state) { |
| 470 HAL_DCACHE_INVALIDATE(qi->rxbd->buffer, qi->rxbd->length); // Make sure no stale data | 480 HAL_DCACHE_INVALIDATE(qi->rxbd->buffer, qi->rxbd->length); // Make sure no stale data |
| 471 } | 481 } |
| 472 for (i = 0; i < sg_len; i++) { | 482 for (i = 0; i < sg_len; i++) { |
| 473 if (sg_list[i].buf != 0) { | 483 if (sg_list[i].buf != 0) { |
| 474 bcopy(bp, (void *)sg_list[i].buf, sg_list[i].len); | 484 memcpy((void *)sg_list[i].buf, bp, sg_list[i].len); |
| 475 bp += sg_list[i].len; | 485 bp += sg_list[i].len; |
| 476 } | 486 } |
| 477 } | 487 } |
| 478 } | 488 } |
| 479 | 489 |
