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comparison packages/hal/sh/sh4/current/src/variant.S @ 134:d2f49caf9e38 ecos-sw-2000-11-03

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Merge from eCos master repository on 2000-11-03-09:00:49-GMT
author jlarmour
date Fri, 03 Nov 2000 21:17:40 +0000
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children 289bf90c6a9b
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133:98d71f4d8243 134:d2f49caf9e38
1 ##==========================================================================
2 ##
3 ## variant.S
4 ##
5 ## SH4 variant assembly code
6 ##
7 ##==========================================================================
8 #####COPYRIGHTBEGIN####
9 #
10 # -------------------------------------------
11 # The contents of this file are subject to the Red Hat eCos Public License
12 # Version 1.1 (the "License"); you may not use this file except in
13 # compliance with the License. You may obtain a copy of the License at
14 # http://www.redhat.com/
15 #
16 # Software distributed under the License is distributed on an "AS IS"
17 # basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the
18 # License for the specific language governing rights and limitations under
19 # the License.
20 #
21 # The Original Code is eCos - Embedded Configurable Operating System,
22 # released September 30, 1998.
23 #
24 # The Initial Developer of the Original Code is Red Hat.
25 # Portions created by Red Hat are
26 # Copyright (C) 1998, 1999, 2000 Red Hat, Inc.
27 # All Rights Reserved.
28 # -------------------------------------------
29 #
30 #####COPYRIGHTEND####
31 ##==========================================================================
32 #######DESCRIPTIONBEGIN####
33 ##
34 ## Author(s): jskov
35 ## Contributors: jskov
36 ## Date: 2000-10-31
37 ## Purpose: SH4 misc assembly code
38 ######DESCRIPTIONEND####
39 ##
40 ##==========================================================================
41
42 #include <pkgconf/hal.h>
43 #include <pkgconf/hal_sh.h>
44
45 #include <cyg/hal/sh_regs.h>
46 #include <cyg/hal/sh4_offsets.inc>
47
48 #---------------------------------------------------------------------------
49 # Cache operations
50 # These need to be written in assembly to ensure they do not rely on data
51 # in cachable space (i.e., code must use registers exclusively, not the stack).
52
53 # This macro must be used at the top of each cache function. It ensures
54 # that the code gets executed from a shadow region where caching is disabled
55 # (0xA0000000).
56 .macro GOTO_NONCACHED_SHADOW
57 mova 10f,r0
58 mov.l $MASK,r1
59 and r1,r0
60 mov.l $BASE,r1
61 or r1,r0
62 jmp @r0
63 nop
64 .align 2
65 10:
66 .endm
67
68 .globl _cyg_hal_dcache_enable
69 _cyg_hal_dcache_enable:
70 GOTO_NONCACHED_SHADOW
71 mov.l $nCYGARC_REG_CCR,r1
72 mov.l @r1,r0
73 mov #CYGARC_REG_CCR_OCE,r2
74 mov.l r2,@r1
75 nop
76 rts
77 nop
78
79 .globl _cyg_hal_dcache_disable
80 _cyg_hal_dcache_disable:
81 GOTO_NONCACHED_SHADOW
82 mov.l $nCYGARC_REG_CCR,r1
83 mov.l @r1,r0
84 mov #CYGARC_REG_CCR_OCE,r2
85 not r2,r2
86 and r2,r0
87 mov.l r0,@r1
88 nop
89 rts
90 nop
91
92 .globl _cyg_hal_dcache_invalidate_all
93 _cyg_hal_dcache_invalidate_all:
94 GOTO_NONCACHED_SHADOW
95 mov.l $nCYGARC_REG_CCR,r1
96 mov.l @r1,r0
97 mov #CYGARC_REG_CCR_OCI,r2
98 or r2,r0
99 mov.l r0,@r1
100 nop ! Nothing in the docs suggest we need
101 nop ! nops here, but without them, the
102 nop ! CPU crashes.
103 rts
104 nop
105
106 .globl _cyg_hal_dcache_sync
107 _cyg_hal_dcache_sync:
108 GOTO_NONCACHED_SHADOW
109 mov.l $CYGARC_REG_DCACHE_ADDRESS_FLUSH,r0
110 mov.l $CYGARC_REG_DCACHE_ADDRESS_BASE,r1
111 mov.l $CYGARC_REG_DCACHE_ADDRESS_TOP,r2
112 mov.l $CYGARC_REG_DCACHE_ADDRESS_STEP,r3
113 1: cmp/hi r1,r2
114 bf 2f
115 mov.l r0,@r1
116 bra 1b
117 add r3,r1 ! delay slot!
118 2: nop
119 rts
120 nop
121
122 .align 2
123 $CYGARC_REG_DCACHE_ADDRESS_FLUSH:
124 .long CYGARC_REG_DCACHE_ADDRESS_FLUSH
125 $CYGARC_REG_DCACHE_ADDRESS_BASE:
126 .long CYGARC_REG_DCACHE_ADDRESS_BASE
127 $CYGARC_REG_DCACHE_ADDRESS_TOP:
128 .long CYGARC_REG_DCACHE_ADDRESS_TOP
129 $CYGARC_REG_DCACHE_ADDRESS_STEP:
130 .long CYGARC_REG_DCACHE_ADDRESS_STEP
131
132
133 ! r4 = base
134 ! r5 = size
135 .globl _cyg_hal_dcache_sync_region
136 _cyg_hal_dcache_sync_region:
137 GOTO_NONCACHED_SHADOW
138 1: ocbp @r4 ! operand cache block purge
139 add #CYGARC_SH_MOD_DCAC_ADDRESS_STEP,r4
140 add #-CYGARC_SH_MOD_DCAC_ADDRESS_STEP,r5
141 cmp/pl r5
142 bt 1b
143 rts
144 nop
145
146 .globl _cyg_hal_dcache_write_mode
147 _cyg_hal_dcache_write_mode:
148 GOTO_NONCACHED_SHADOW
149 # Mode argument in r4.
150 # Read current state and mask out the two caching mode bits
151 mov.l $nCYGARC_REG_CCR,r1
152 mov.l @r1,r3
153 mov #CYGARC_REG_CCR_CB|CYGARC_REG_CCR_WT,r2
154 and r2,r4
155 not r2,r2
156 and r2,r3
157 # Or in the new settings and restore to CCR
158 or r4,r3
159 mov.l r3,@r1
160 nop
161 rts
162 nop
163
164
165 .globl _cyg_hal_icache_enable
166 _cyg_hal_icache_enable:
167 GOTO_NONCACHED_SHADOW
168 mov.l $nCYGARC_REG_CCR,r1
169 mov.l @r1,r0
170 mov.l $nCYGARC_REG_CCR_ICE,r2
171 mov.l r2,@r1
172 nop
173 rts
174 nop
175
176 .globl _cyg_hal_icache_disable
177 _cyg_hal_icache_disable:
178 GOTO_NONCACHED_SHADOW
179 mov.l $nCYGARC_REG_CCR,r1
180 mov.l @r1,r0
181 mov.l $nCYGARC_REG_CCR_ICE,r2
182 not r2,r2
183 and r2,r0
184 mov.l r0,@r1
185 nop
186 rts
187 nop
188
189 .globl _cyg_hal_icache_invalidate_all
190 _cyg_hal_icache_invalidate_all:
191 GOTO_NONCACHED_SHADOW
192 mov.l $nCYGARC_REG_CCR,r1
193 mov.l @r1,r0
194 mov.l $nCYGARC_REG_CCR_ICI,r2
195 or r2,r0
196 mov.l r0,@r1
197 nop ! Nothing in the docs suggest we need
198 nop ! nops here, but without them, the
199 nop ! CPU crashes.
200 rts
201 nop
202
203 .align 2
204 $MASK:
205 .long 0x1fffffff ! mask off top 3 bits
206 $BASE:
207 .long 0xa0000000 ! base of non-cachable memory
208 $nCYGARC_REG_CCR:
209 .long CYGARC_REG_CCR
210 $nCYGARC_REG_CCR_ICE:
211 .long CYGARC_REG_CCR_ICE
212 $nCYGARC_REG_CCR_ICI:
213 .long CYGARC_REG_CCR_ICI