Mercurial > flash_v2

annotate packages/hal/sh/sh4/current/src/variant.S @ 134:d2f49caf9e38 ecos-sw-2000-11-03

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Merge from eCos master repository on 2000-11-03-09:00:49-GMT
author jlarmour
date Fri, 03 Nov 2000 21:17:40 +0000
parents
children 289bf90c6a9b
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134
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1 ##==========================================================================
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2 ##
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3 ## variant.S
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4 ##
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5 ## SH4 variant assembly code
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6 ##
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7 ##==========================================================================
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8 #####COPYRIGHTBEGIN####
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9 #
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10 # -------------------------------------------
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11 # The contents of this file are subject to the Red Hat eCos Public License
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12 # Version 1.1 (the "License"); you may not use this file except in
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13 # compliance with the License. You may obtain a copy of the License at
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14 # http://www.redhat.com/
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15 #
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16 # Software distributed under the License is distributed on an "AS IS"
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17 # basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the
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18 # License for the specific language governing rights and limitations under
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19 # the License.
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20 #
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21 # The Original Code is eCos - Embedded Configurable Operating System,
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22 # released September 30, 1998.
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23 #
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24 # The Initial Developer of the Original Code is Red Hat.
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25 # Portions created by Red Hat are
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26 # Copyright (C) 1998, 1999, 2000 Red Hat, Inc.
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27 # All Rights Reserved.
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28 # -------------------------------------------
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29 #
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30 #####COPYRIGHTEND####
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31 ##==========================================================================
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32 #######DESCRIPTIONBEGIN####
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33 ##
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34 ## Author(s): jskov
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35 ## Contributors: jskov
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36 ## Date: 2000-10-31
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37 ## Purpose: SH4 misc assembly code
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38 ######DESCRIPTIONEND####
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39 ##
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40 ##==========================================================================
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41
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42 #include <pkgconf/hal.h>
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43 #include <pkgconf/hal_sh.h>
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44
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45 #include <cyg/hal/sh_regs.h>
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46 #include <cyg/hal/sh4_offsets.inc>
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47
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48 #---------------------------------------------------------------------------
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49 # Cache operations
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50 # These need to be written in assembly to ensure they do not rely on data
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51 # in cachable space (i.e., code must use registers exclusively, not the stack).
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52
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53 # This macro must be used at the top of each cache function. It ensures
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54 # that the code gets executed from a shadow region where caching is disabled
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55 # (0xA0000000).
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56 .macro GOTO_NONCACHED_SHADOW
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57 mova 10f,r0
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58 mov.l $MASK,r1
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59 and r1,r0
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60 mov.l $BASE,r1
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61 or r1,r0
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62 jmp @r0
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63 nop
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64 .align 2
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65 10:
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66 .endm
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67
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68 .globl _cyg_hal_dcache_enable
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69 _cyg_hal_dcache_enable:
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70 GOTO_NONCACHED_SHADOW
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71 mov.l $nCYGARC_REG_CCR,r1
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72 mov.l @r1,r0
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73 mov #CYGARC_REG_CCR_OCE,r2
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74 mov.l r2,@r1
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75 nop
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76 rts
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77 nop
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78
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79 .globl _cyg_hal_dcache_disable
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80 _cyg_hal_dcache_disable:
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81 GOTO_NONCACHED_SHADOW
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82 mov.l $nCYGARC_REG_CCR,r1
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83 mov.l @r1,r0
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84 mov #CYGARC_REG_CCR_OCE,r2
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85 not r2,r2
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86 and r2,r0
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87 mov.l r0,@r1
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88 nop
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89 rts
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90 nop
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91
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92 .globl _cyg_hal_dcache_invalidate_all
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93 _cyg_hal_dcache_invalidate_all:
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94 GOTO_NONCACHED_SHADOW
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95 mov.l $nCYGARC_REG_CCR,r1
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96 mov.l @r1,r0
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97 mov #CYGARC_REG_CCR_OCI,r2
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98 or r2,r0
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99 mov.l r0,@r1
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100 nop ! Nothing in the docs suggest we need
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101 nop ! nops here, but without them, the
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102 nop ! CPU crashes.
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103 rts
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104 nop
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105
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106 .globl _cyg_hal_dcache_sync
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107 _cyg_hal_dcache_sync:
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108 GOTO_NONCACHED_SHADOW
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109 mov.l $CYGARC_REG_DCACHE_ADDRESS_FLUSH,r0
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110 mov.l $CYGARC_REG_DCACHE_ADDRESS_BASE,r1
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111 mov.l $CYGARC_REG_DCACHE_ADDRESS_TOP,r2
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112 mov.l $CYGARC_REG_DCACHE_ADDRESS_STEP,r3
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113 1: cmp/hi r1,r2
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114 bf 2f
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115 mov.l r0,@r1
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116 bra 1b
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117 add r3,r1 ! delay slot!
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118 2: nop
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119 rts
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120 nop
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121
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122 .align 2
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123 $CYGARC_REG_DCACHE_ADDRESS_FLUSH:
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124 .long CYGARC_REG_DCACHE_ADDRESS_FLUSH
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125 $CYGARC_REG_DCACHE_ADDRESS_BASE:
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126 .long CYGARC_REG_DCACHE_ADDRESS_BASE
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127 $CYGARC_REG_DCACHE_ADDRESS_TOP:
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128 .long CYGARC_REG_DCACHE_ADDRESS_TOP
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129 $CYGARC_REG_DCACHE_ADDRESS_STEP:
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130 .long CYGARC_REG_DCACHE_ADDRESS_STEP
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131
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132
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133 ! r4 = base
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134 ! r5 = size
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135 .globl _cyg_hal_dcache_sync_region
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136 _cyg_hal_dcache_sync_region:
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137 GOTO_NONCACHED_SHADOW
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138 1: ocbp @r4 ! operand cache block purge
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139 add #CYGARC_SH_MOD_DCAC_ADDRESS_STEP,r4
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140 add #-CYGARC_SH_MOD_DCAC_ADDRESS_STEP,r5
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141 cmp/pl r5
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142 bt 1b
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143 rts
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144 nop
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145
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146 .globl _cyg_hal_dcache_write_mode
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147 _cyg_hal_dcache_write_mode:
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148 GOTO_NONCACHED_SHADOW
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149 # Mode argument in r4.
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150 # Read current state and mask out the two caching mode bits
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151 mov.l $nCYGARC_REG_CCR,r1
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152 mov.l @r1,r3
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153 mov #CYGARC_REG_CCR_CB|CYGARC_REG_CCR_WT,r2
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154 and r2,r4
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155 not r2,r2
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156 and r2,r3
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157 # Or in the new settings and restore to CCR
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158 or r4,r3
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159 mov.l r3,@r1
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160 nop
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161 rts
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162 nop
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163
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164
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165 .globl _cyg_hal_icache_enable
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166 _cyg_hal_icache_enable:
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167 GOTO_NONCACHED_SHADOW
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168 mov.l $nCYGARC_REG_CCR,r1
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169 mov.l @r1,r0
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170 mov.l $nCYGARC_REG_CCR_ICE,r2
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171 mov.l r2,@r1
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172 nop
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173 rts
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174 nop
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175
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176 .globl _cyg_hal_icache_disable
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177 _cyg_hal_icache_disable:
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178 GOTO_NONCACHED_SHADOW
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179 mov.l $nCYGARC_REG_CCR,r1
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180 mov.l @r1,r0
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181 mov.l $nCYGARC_REG_CCR_ICE,r2
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182 not r2,r2
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183 and r2,r0
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184 mov.l r0,@r1
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185 nop
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186 rts
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187 nop
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188
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189 .globl _cyg_hal_icache_invalidate_all
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190 _cyg_hal_icache_invalidate_all:
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191 GOTO_NONCACHED_SHADOW
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192 mov.l $nCYGARC_REG_CCR,r1
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193 mov.l @r1,r0
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194 mov.l $nCYGARC_REG_CCR_ICI,r2
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195 or r2,r0
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196 mov.l r0,@r1
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197 nop ! Nothing in the docs suggest we need
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198 nop ! nops here, but without them, the
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199 nop ! CPU crashes.
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200 rts
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201 nop
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202
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203 .align 2
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204 $MASK:
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205 .long 0x1fffffff ! mask off top 3 bits
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206 $BASE:
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207 .long 0xa0000000 ! base of non-cachable memory
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208 $nCYGARC_REG_CCR:
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209 .long CYGARC_REG_CCR
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210 $nCYGARC_REG_CCR_ICE:
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211 .long CYGARC_REG_CCR_ICE
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212 $nCYGARC_REG_CCR_ICI:
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213 .long CYGARC_REG_CCR_ICI