view packages/hal/sh/sh4/current/include/mod_regs_femi.h @ 1424:5268028c09c4

2003-09-21 Jonathan Larmour <jifl@eCosCentric.com> * src/var_misc.c (hal_variant_init): Set FPSCR on startup. * src/sh4_scif.c (cyg_hal_plf_scif_set_baud): New function, taken from init code, but with fix to wait for hardware to settle. (cyg_hal_plf_scif_control): Add __COMMCTL_GETBAUD and _SETBAUD support using above function. * include/sh4_scif.h: Add baud_rate to channel data. * include/mod_regs_ser.h (CYGARC_SCBRR_N): Don't tweak BRR for values < 4800 or > 115200 as it gets the values wrong. Instead trust the developer to DTRT. (CYGARC_REG_SCIF_SCLSR_ORER): Add definition for overrun in line status reg. 2003-09-19 John Dallaway <jld@ecoscentric.com> * cdl/hal_sh_sh4.cdl: Specify default CDL values for sh4_202_md target. 2003-09-11 Nick Garnett <nickg@ecoscentric.com> * include/var_regs.h (CYG_FPSCR): Changed initial value of fpscr to do round-to-nearest rather than round-to-zero. 2003-09-08 Nick Garnett <nickg@ecoscentric.com> * include/mod_202.h: Added define for UBC. The 202 appears to have one, although there is no documented info. It is also not clear what version it is. Setting this to 1 seems to work. * include/mod_regs_cac.h: * include/variant.inc: Updated cache dimensions and initialization to support larger, two way cache in sh4-202. 2003-09-05 Nick Garnett <nickg@ecoscentric.com> * include/variant.inc: * include/var_reg.h: * include/mod_202.h: * include/mod_regs_cpg.h: * include/mod_regs_emi.h: * include/mod_regs_femi.h: * include/mod_regs_intc.h: * cdl/hal_sh_sh4.cdl: Added SH-202 sub-variant, extra functional units, and modifications to existing units for this variant.
author nickg
date Fri, 05 Dec 2003 17:07:29 +0000
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//=============================================================================
//
//      mod_regs_femi.h
//
//      FEMI (FLASH External Memory Interface) Module register definitions
//
//=============================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 2003 Nick Garnett 
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting the copyright
// holder.
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//=============================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s):   nickg
// Contributors:nickg
// Date:        2003-08-20
//              
//####DESCRIPTIONEND####
//
//=============================================================================

//--------------------------------------------------------------------------

#define CYGARC_REG_FEMI_BASE    0xFF800000
#define CYGARC_REG_FEMI_VCR_L   (CYGARC_REG_FEMI_BASE+0x00)
#define CYGARC_REG_FEMI_VCR_H   (CYGARC_REG_FEMI_BASE+0x04)
#define CYGARC_REG_FEMI_MDCR    (CYGARC_REG_FEMI_BASE+0x0c)
#define CYGARC_REG_FEMI_A0MCR   (CYGARC_REG_FEMI_BASE+0x14)
#define CYGARC_REG_FEMI_A1MCR   (CYGARC_REG_FEMI_BASE+0x1c)
#define CYGARC_REG_FEMI_A2MCR   (CYGARC_REG_FEMI_BASE+0x24)
#define CYGARC_REG_FEMI_A3MCR   (CYGARC_REG_FEMI_BASE+0x2c)
#define CYGARC_REG_FEMI_A4MCR   (CYGARC_REG_FEMI_BASE+0x34)

#define CYGARC_REG_FEMI_VCR_L_ID        0x0000FFFF
#define CYGARC_REG_FEMI_VCR_L_BOT_MB    0x00FF0000
#define CYGARC_REG_FEMI_VCR_L_TOP_MB    0xFF000000

#define CYGARC_REG_FEMI_VCR_H_PERR      0x000000FF
#define CYGARC_REG_FEMI_VCR_H_MERR      0x0000FF00
#define CYGARC_REG_FEMI_VCR_H_VERS      0xFFFF0000

#define CYGARC_REG_FEMI_MDCR_HIZMEM     0x00000001
#define CYGARC_REG_FEMI_MDCR_BREQEN     0x00000002
#define CYGARC_REG_FEMI_MDCR_ENDIAN     0x00000004
#define CYGARC_REG_FEMI_MDCR_MERGE      0x00000008

#define CYGARC_REG_FEMI_ANMCR_TYPE      0x00000007
#define CYGARC_REG_FEMI_ANMCR_SZ        0x00000018
#define CYGARC_REG_FEMI_ANMCR_BST       0x000000e0
#define CYGARC_REG_FEMI_ANMCR_FLMD      0x00000100
#define CYGARC_REG_FEMI_ANMCR_FLWP      0x00000200
#define CYGARC_REG_FEMI_ANMCR_MBC       0x00000400
#define CYGARC_REG_FEMI_ANMCR_IW        0x00007000
#define CYGARC_REG_FEMI_ANMCR_BP        0x00070000
#define CYGARC_REG_FEMI_ANMCR_WS        0x00700000
#define CYGARC_REG_FEMI_ANMCR_HLD       0x03000000
#define CYGARC_REG_FEMI_ANMCR_STUP      0x08000000

// end of mod_regs_femi.h