--- a/packages/devs/serial/powerpc/quicc/current/ChangeLog
+++ b/packages/devs/serial/powerpc/quicc/current/ChangeLog
@@ -1,3 +1,8 @@
+2003-03-31  Gary Thomas  <gary@mlbassoc.com>
+
+	* src/quicc_smc_serial.c (quicc_sxx_serial_init): Handle SCC3 on
+	various processors (signal routing differs).
+
 2003-03-28  Gary Thomas  <gary@mlbassoc.com>
 
 	* src/quicc_smc_serial.c: Change how buffers are allocated & aligned

--- a/packages/devs/serial/powerpc/quicc/current/src/quicc_smc_serial.c
+++ b/packages/devs/serial/powerpc/quicc/current/src/quicc_smc_serial.c
@@ -718,9 +718,16 @@ quicc_sxx_serial_init(struct cyg_devtab_
                                    CYGNUM_IO_SERIAL_POWERPC_QUICC_SMC_SCC3_RxNUM,
                                    CYGNUM_IO_SERIAL_POWERPC_QUICC_SMC_SCC3_RxSIZE,
                                    &quicc_scc3_rxbuf[0],
+#if defined(CYGHWR_HAL_POWERPC_MPC8XX_850)
                                    0x0000, // PortA mask
                                    0x00C0, // PortB mask
                                    0x0000, // PortC mask
+#elif defined(CYGHWR_HAL_POWERPC_MPC8XX_852T)
+                                   0x0030, // PortA mask
+                                   0x0000, // PortB mask
+                                   0x0000, // PortC mask
+#err "Cannot route SCC3"
+#endif
                                    QUICC_CPM_SCC3
             );
     }

--- a/packages/hal/powerpc/adder/current/ChangeLog
+++ b/packages/hal/powerpc/adder/current/ChangeLog
@@ -1,3 +1,7 @@
+2003-03-31  Gary Thomas  <gary@mlbassoc.com>
+
+	* cdl/hal_powerpc_adder.cdl: Enable use of SCC3 on AdderII.
+
 2003-03-24  Gary Thomas  <gary@mlbassoc.com>
 
 	* misc/redboot_ROMRAM.ecm: Remove.

--- a/packages/hal/powerpc/adder/current/cdl/hal_powerpc_adder.cdl
+++ b/packages/hal/powerpc/adder/current/cdl/hal_powerpc_adder.cdl
@@ -101,7 +101,7 @@ cdl_package CYGPKG_HAL_POWERPC_ADDER {
             requires      { CYGHWR_HAL_POWERPC_MPC8XX == "852T" }
             default_value 0
             implements    CYGNUM_HAL_QUICC_SMC1
-#            implements    CYGNUM_HAL_QUICC_SCC3
+            implements    CYGNUM_HAL_QUICC_SCC3
             define_proc {
                 puts $::cdl_header "#define HAL_PLATFORM_CPU    \"PowerPC 852T\""
                 puts $::cdl_header "#define HAL_PLATFORM_BOARD  \"A&M AdderII\""

--- a/packages/hal/powerpc/quicc/current/ChangeLog
+++ b/packages/hal/powerpc/quicc/current/ChangeLog
@@ -1,3 +1,8 @@
+2003-03-31  Gary Thomas  <gary@mlbassoc.com>
+
+	* src/quicc_smc1.c (cyg_hal_sccx_init_channel): Proper handling
+	(signal routing) for SCC3 - differs on 850 and 850T!
+
 2003-03-31  Jonathan Larmour  <jifl@eCosCentric.com>
 
 	* src/quicc_smc1.c (cyg_hal_smcx_init_channel): 

--- a/packages/hal/powerpc/quicc/current/src/quicc_smc1.c
+++ b/packages/hal/powerpc/quicc/current/src/quicc_smc1.c
@@ -611,6 +611,7 @@ cyg_hal_sccx_init_channel(struct port_in
 #endif
 #if CYGNUM_HAL_QUICC_SCC3 > 0
     case QUICC_CPM_SCC3:
+#if defined(CYGHWR_HAL_POWERPC_MPC8XX_850)
 #if 0
 // CAUTION!  Enabling these bits made the port get stuck :-(
         /* CTS/RTS/CD on PortC.4/5/13 */
@@ -625,8 +626,15 @@ cyg_hal_sccx_init_channel(struct port_in
         eppc->pip_pbdir |= 0x00C0;
         eppc->pip_pbodr &= ~0x00C0;
 
+#elif defined(CYGHWR_HAL_POWERPC_MPC8XX_852T)
+        eppc->pio_papar |= 0x30;
+        eppc->pio_padir &= ~0x30;
+        eppc->pio_paodr &= ~0x30;
+#else
+#error "Cannot route SCC3 I/O"
+#endif // 850T
         break;
-#endif
+#endif // SCC3
     }
 
     // Set up baud rate generator.  These are allocated from a
@@ -639,7 +647,6 @@ cyg_hal_sccx_init_channel(struct port_in
     /*
      *  Set pointers to buffer descriptors.
      */
-    memset((void *)uart_pram, 0xFF, 0x100);
     uart_pram->rbase = _mpc8xx_allocBd(sizeof(struct cp_bufdesc)*info->Rxnum + info->Rxnum);
     uart_pram->tbase = _mpc8xx_allocBd(sizeof(struct cp_bufdesc)*info->Txnum + info->Txnum);