--- a/packages/hal/powerpc/ppc40x/current/ChangeLog
+++ b/packages/hal/powerpc/ppc40x/current/ChangeLog
@@ -1,3 +1,8 @@
+2004-02-26  Gary Thomas  <gary@mlbassoc.com>
+
+	* src/ppc405_pci.c: 
+	* cdl/hal_powerpc_ppc40x.cdl: Make display of PCI "contents" optional.
+
 2004-02-17  Gary Thomas  <gary@mlbassoc.com>
 
 	* cdl/hal_powerpc_ppc40x.cdl: Fix real time clock - this counter

--- a/packages/hal/powerpc/ppc40x/current/cdl/hal_powerpc_ppc40x.cdl
+++ b/packages/hal/powerpc/ppc40x/current/cdl/hal_powerpc_ppc40x.cdl
@@ -9,7 +9,7 @@
 ## -------------------------------------------
 ## This file is part of eCos, the Embedded Configurable Operating System.
 ## Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
-## Copyright (C) 2002, 2003 Gary Thomas
+## Copyright (C) 2002, 2003, 2004 Gary Thomas
 ##
 ## eCos is free software; you can redistribute it and/or modify it under
 ## the terms of the GNU General Public License as published by the Free
@@ -98,6 +98,11 @@ cdl_package CYGPKG_HAL_POWERPC_PPC40x {
         description   "Variant PCI support - only for 405GP"
         default_value 1
         compile       ppc405_pci.c
+
+        cdl_option CYGSEM_HAL_POWERPC_PPC405_PCI_SHOW_BUS {
+            display       "Display PCI Bus devices"
+            default_value 1
+        }
     }
 
     cdl_component CYGHWR_HAL_POWERPC_PPC405_IO {

--- a/packages/hal/powerpc/ppc40x/current/src/ppc405_pci.c
+++ b/packages/hal/powerpc/ppc40x/current/src/ppc405_pci.c
@@ -9,7 +9,7 @@
 // -------------------------------------------
 // This file is part of eCos, the Embedded Configurable Operating System.
 // Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
-// Copyright (C) 2003 Gary Thomas
+// Copyright (C) 2003, 2004 Gary Thomas
 //
 // eCos is free software; you can redistribute it and/or modify it under
 // the terms of the GNU General Public License as published by the Free
@@ -102,7 +102,9 @@ hal_ppc405_pci_init(void)
                             CYG_PCI_CFG_COMMAND, cmd_state);
     cyg_pci_init();
     if ((cmd_state & CYG_PCI_CFG_COMMAND_MEMORY) == 0) {
+#if defined(CYGPKG_IO_PCI_DEBUG)
         diag_printf("Configure PCI bus\n");
+#endif
         HAL_PCI_CFG_WRITE_UINT32(0, CYG_PCI_DEV_MAKE_DEVFN(0,0),
                                  CYG_PCI_CFG_COMMAND,
                                  CYG_PCI_CFG_COMMAND_MEMORY |
@@ -118,7 +120,8 @@ hal_ppc405_pci_init(void)
         next_bus = 1;
         cyg_pci_configure_bus(0, &next_bus);
     }
-    if (1){
+#if defined(CYGSEM_HAL_POWERPC_PPC405_PCI_SHOW_BUS)
+    if (1) {
         cyg_uint8 req;                                                            
         cyg_uint8 devfn;
         cyg_pci_device_id devid;
@@ -146,6 +149,7 @@ hal_ppc405_pci_init(void)
             }
         }
     }
+#endif
 }
 
 externC void 
@@ -168,7 +172,9 @@ hal_ppc405_pci_translate_interrupt(int b
             /* Device will not generate interrupt requests. */                      
             *valid = false;                                                        
         }                                                                           
+#if defined(CYGPKG_IO_PCI_DEBUG)
         diag_printf("Int - dev: %d, req: %d, vector: %d\n", dev, req, *vec);
+#endif
     } else {
         *valid = false;  // Invalid device
     }