--- a/packages/hal/powerpc/mpc8xxx/current/ChangeLog
+++ b/packages/hal/powerpc/mpc8xxx/current/ChangeLog
@@ -1,3 +1,11 @@
+2003-11-19  Gary Thomas  <gary@mlbassoc.com>
+
+	* include/mpc8xxx.h: Add definitions for CPM timers.
+
+	* tests/mpc8xxx_timer.c: 
+	* cdl/hal_powerpc_mpc8xxx.cdl: Add simple test to show how interrupts
+	and timers work on this platform.
+
 2003-11-09  Gary Thomas  <gary@mlbassoc.com>
 
 	* src/quicc2_diag.c: 

--- a/packages/hal/powerpc/mpc8xxx/current/cdl/hal_powerpc_mpc8xxx.cdl
+++ b/packages/hal/powerpc/mpc8xxx/current/cdl/hal_powerpc_mpc8xxx.cdl
@@ -174,4 +174,45 @@ cdl_package CYGPKG_HAL_POWERPC_MPC8XXX {
     }
 
     compile       var_intr.c var_misc.c variant.S quicc2_diag.c cpm.c
+
+    cdl_component CYGPKG_HAL_POWERPC_MPC8XXX_OPTIONS {
+        display "MPC8XXX build options"
+        flavor  none
+        description   "
+	    Package specific build options including control over
+	    compiler flags used only in building this package,
+	    and details of which tests are built."
+
+
+        cdl_option CYGPKG_HAL_POWERPC_MPC8XXX_CFLAGS_ADD {
+            display "Additional compiler flags"
+            flavor  data
+            no_define
+            default_value { "" }
+            description   "
+                This option modifies the set of compiler flags for
+                building the MPC8XXX HAL. These flags are used in addition
+                to the set of global flags."
+        }
+
+        cdl_option CYGPKG_HAL_POWERPC_MPC8XXX_CFLAGS_REMOVE {
+            display "Suppressed compiler flags"
+            flavor  data
+            no_define
+            default_value { "" }
+            description   "
+                This option modifies the set of compiler flags for
+                building the MPC8XXX HAL. These flags are removed from
+                the set of global flags if present."
+        }
+
+        cdl_option CYGPKG_HAL_POWERPC_MPC8XXX_TESTS {
+            display "MPC8XXX tests"
+            flavor  data
+            no_define
+            calculated { "tests/mpc8xxx_timer" }
+            description   "
+                This option specifies the set of tests for the MPC8XXX HAL."
+        }
+    }
 }

--- a/packages/hal/powerpc/mpc8xxx/current/include/mpc8xxx.h
+++ b/packages/hal/powerpc/mpc8xxx/current/include/mpc8xxx.h
@@ -1362,6 +1362,30 @@ struct cp_bufdesc {
 #define SMCE_Rx  0x0001                 // Rx buffer interrupt
 
 //
+// Timer/counter registers
+//
+
+// Timer/counter general control
+#define _TC_TGCR_CAS  0x80  // Cascade timers (1/2, 3/4)
+#define _TC_TGCR_STP2 0x20  // Stop timer 2
+#define _TC_TGCR_RST2 0x10  // Reset timer 2
+#define _TC_TGCR_GM   0x08  // Gate mode
+#define _TC_TGCR_STP1 0x02  // Stop timer 1
+#define _TC_TGCR_RST1 0x01  // Reset timer 1
+
+// Timer/counter mode
+#define _TC_TMR_ORI         0x0010  // Output reference interrupt enable
+#define _TC_TMR_FRR         0x0008  // Free run
+#define _TC_TMR_ICLK_CAS    0x0000  // Input clock - cascade from other timer
+#define _TC_TMR_ICLK_BUS    0x0002  // Input clock = bus clock
+#define _TC_TMR_ICLK_BUS16  0x0004  // Input clock = bus clock / 16
+#define _TC_TMR_ICLK_TIN    0x0006  // Input clock = TINx
+
+// Timer/counter event register 
+#define _TC_TER_REF         0x0002  // Reference event occurred
+#define _TC_TER_CAP         0x0001  // Capture event occurred
+
+//
 // Routines which help manage the CPM
 //
 externC void _mpc8xxx_reset_cpm(void);

new file mode 100644
--- /dev/null
+++ b/packages/hal/powerpc/mpc8xxx/current/tests/mpc8xxx_timer.c
@@ -0,0 +1,171 @@
+//==========================================================================
+//
+//        mpc8xxx_timer.c
+//
+//        PowerPC MPC8xxx timer tests
+//
+//==========================================================================
+//####ECOSGPLCOPYRIGHTBEGIN####
+// -------------------------------------------
+// This file is part of eCos, the Embedded Configurable Operating System.
+// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
+// Copyright (C) 2003 Gary Thomas
+//
+// eCos is free software; you can redistribute it and/or modify it under
+// the terms of the GNU General Public License as published by the Free
+// Software Foundation; either version 2 or (at your option) any later version.
+//
+// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
+// WARRANTY; without even the implied warranty of MERCHANTABILITY or
+// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+// for more details.
+//
+// You should have received a copy of the GNU General Public License along
+// with eCos; if not, write to the Free Software Foundation, Inc.,
+// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
+//
+// As a special exception, if other files instantiate templates or use macros
+// or inline functions from this file, or you compile this file and link it
+// with other works to produce a work based on this file, this file does not
+// by itself cause the resulting work to be covered by the GNU General Public
+// License. However the source code for this file must still be made available
+// in accordance with section (3) of the GNU General Public License.
+//
+// This exception does not invalidate any other reasons why a work based on
+// this file might be covered by the GNU General Public License.
+//
+// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
+// at http://sources.redhat.com/ecos/ecos-license/
+// -------------------------------------------
+//####ECOSGPLCOPYRIGHTEND####
+//==========================================================================
+//#####DESCRIPTIONBEGIN####
+//
+// Author(s):     gthomas
+// Contributors:  gthomas
+// Date:          2003-11-19
+//####DESCRIPTIONEND####
+
+#include <pkgconf/hal.h>
+
+#include <cyg/infra/cyg_type.h>
+#include <cyg/infra/cyg_ass.h>
+#include <cyg/infra/testcase.h>
+#include <cyg/infra/diag.h>
+#include <cyg/hal/hal_arch.h>
+#include <cyg/hal/mpc8xxx.h>
+
+#ifdef CYGPKG_KERNEL
+#include <cyg/kernel/kapi.h>
+
+#define STACK_SIZE CYGNUM_HAL_STACK_SIZE_MINIMUM
+static char main_thread_stack[STACK_SIZE];
+static cyg_thread main_thread_thread_data;
+static cyg_handle_t main_thread_thread_handle;
+
+static cyg_vector_t  interrupt;             // Interrupt vector used by controller
+static cyg_handle_t  interrupt_handle;
+static cyg_interrupt interrupt_object;
+
+static volatile intr_count;
+
+static void 
+main_thread(cyg_addrword_t param)
+{
+    int tries = 0;
+    int old_intr_count;
+    int hits = 0;
+
+    while (++tries <= 10) {
+        old_intr_count = intr_count;
+        cyg_thread_delay(100);
+        diag_printf("tick - count = %d\n", intr_count);
+        if (intr_count != old_intr_count) hits++;
+    }
+    if (hits == (tries-1)) {
+        CYG_TEST_PASS("mpc8xxx_timer works");
+    } else {
+        diag_printf("tries = %d, hits = %d\n", tries, hits);
+        CYG_TEST_FAIL("mpc8xxx_timer unreliable");
+    }
+    CYG_TEST_EXIT("mpc8xxx_timer");
+}
+
+// This ISR is called when the timer interrupt occurs
+static int
+timer_isr(cyg_vector_t vector, cyg_addrword_t data, HAL_SavedRegisters *regs)
+{
+    cyg_interrupt_mask(interrupt);
+    return (CYG_ISR_HANDLED|CYG_ISR_CALL_DSR);  // Run the DSR
+}
+
+// This DSR is called when the timer interrupt occurs
+static void
+timer_dsr(cyg_vector_t vector, cyg_ucount32 count, cyg_addrword_t data)
+{
+    intr_count++;
+    IMM->cpm_timers_ter[0] = 0xFF;  // Clears interrupt condition
+    cyg_interrupt_acknowledge(interrupt);
+    cyg_interrupt_unmask(interrupt);
+}
+
+#ifdef CYGSEM_HAL_STOP_CONSTRUCTORS_ON_FLAG
+externC void cyg_hal_invoke_constructors();
+#endif
+
+externC void
+cyg_user_start( void )
+{
+#ifdef CYGSEM_HAL_STOP_CONSTRUCTORS_ON_FLAG
+    cyg_hal_invoke_constructors();
+#endif
+    CYG_TEST_INIT();
+    CYG_TEST_INFO("cyg_user_start()");
+    cyg_thread_create(1,                             // Priority
+                      main_thread     ,              // entry
+                      (cyg_addrword_t)0,             // entry parameter
+                      "CS8900 int",                  // Name
+                      &main_thread_stack[0],         // Stack
+                      STACK_SIZE,                    // Size
+                      &main_thread_thread_handle,    // Handle
+                      &main_thread_thread_data       // Thread data structure
+            );
+    cyg_thread_resume(main_thread_thread_handle);    // Start it
+
+    interrupt = CYGNUM_HAL_INTERRUPT_TIMER1;
+    cyg_interrupt_create(interrupt,
+                             0,                     // Priority - what goes here?
+                             (cyg_addrword_t)0,     //  Data item passed to interrupt handler
+                             (cyg_ISR_t *)timer_isr,
+                             (cyg_DSR_t *)timer_dsr,
+                             &interrupt_handle,
+                             &interrupt_object);
+    cyg_interrupt_attach(interrupt_handle);
+    cyg_interrupt_acknowledge(interrupt);
+    cyg_interrupt_unmask(interrupt);
+
+    // Set up timer1
+    IMM->cpm_timers_tmr1 = _TC_TMR_ORI | _TC_TMR_ICLK_BUS16 | (0x10<<8);
+    IMM->cpm_timers_trr1 = 0x2000;  // Reference value 
+    IMM->cpm_timers_tcn1 = 0;
+    IMM->cpm_timers_ter[0] = 0xFF;
+    IMM->cpm_timers_tgcr1 = _TC_TGCR_RST1;  // Reset & enable timer1
+
+    cyg_scheduler_start();
+    CYG_TEST_PASS("mpc8xxx_timer");
+}
+
+// -------------------------------------------------------------------------
+
+#else  // ! CYGPKG_KERNEL
+#define N_A_MSG "no kernel"
+#endif // CYGPKG_KERNEL
+
+#ifdef N_A_MSG
+externC void
+cyg_start( void )
+{
+    CYG_TEST_INIT();
+    CYG_TEST_NA( N_A_MSG );
+}
+#endif // N_A_MSG defined ie. we are N/A.