changeset 316:e17d1cf55283

ARM exception handler fix
author msalter
date Thu, 29 Aug 2002 11:49:48 +0000
parents 865310daf950
children 4882695334f2
files packages/hal/arm/arch/current/ChangeLog packages/hal/arm/arch/current/src/vectors.S
diffstat 2 files changed, 7 insertions(+), 0 deletions(-) [+]
line wrap: on
line diff
--- a/packages/hal/arm/arch/current/ChangeLog
+++ b/packages/hal/arm/arch/current/ChangeLog
@@ -1,3 +1,7 @@
+2002-08-29  Mark Salter  <msalter@redhat.com>
+
+	* src/vectors.S: Avoid entering thumb mode in exception handlers.
+
 2002-08-27  Mark Salter  <msalter@redhat.com>
 
 	* src/arm.ld: Undefine arm to avoid problem with .note.arm.ident.
--- a/packages/hal/arm/arch/current/src/vectors.S
+++ b/packages/hal/arm/arch/current/src/vectors.S
@@ -585,6 +585,7 @@ 10:
         mov     r0,sp                   // r0 survives mode switch
         mrs     r2,cpsr                 // Save current psr for return
         orr     r1,r1,#CPSR_IRQ_DISABLE|CPSR_FIQ_DISABLE
+        bic     r1,r1,#CPSR_THUMB_ENABLE
         msr     cpsr,r1
         stmfd   r0!,{r8-r12,sp,lr}
         msr     cpsr,r2                 // back to svc mode
@@ -644,6 +645,7 @@ return_from_exception:
         add     r2,sp,#armreg_r8
         mrs     r1,cpsr
         orr     r0,r0,#CPSR_IRQ_DISABLE|CPSR_FIQ_DISABLE
+        bic     r0,r0,#CPSR_THUMB_ENABLE
         msr     cpsr,r0
         ldmfd   r2,{r8-r14}
         msr     cpsr, r1        // back to svc mode
@@ -724,6 +726,7 @@ handle_IRQ_or_FIQ:
         mov     r0,sp                   // r0 survives mode switch
         mrs     r2,cpsr                 // Save current psr for return
         orr     r1,r1,#CPSR_IRQ_DISABLE|CPSR_FIQ_DISABLE
+        bic     r1,r1,#CPSR_THUMB_ENABLE
         msr     cpsr,r1
         stmfd   r0!,{r8-r12,sp,lr}
         msr     cpsr,r2                 // back to svc mode