Mercurial > nand-ecoscentric

annotate packages/kernel/current/tests/kcache1.c @ 24:306eee292492 ecos-sw-1999-07-16

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Merge from eCos master repository on 1999-07-16-05:47:06-BST
author jlarmour
date Fri, 16 Jul 1999 21:54:32 +0000
parents d3fbcdfa1b2f
children 29bc183297e1
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1 /*=================================================================
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2 //
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3 // kcache1.c
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4 //
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5 // Cache timing test
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6 //
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7 //==========================================================================
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8 //####COPYRIGHTBEGIN####
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9 //
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10 // -------------------------------------------
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11 // The contents of this file are subject to the Cygnus eCos Public License
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12 // Version 1.0 (the "License"); you may not use this file except in
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13 // compliance with the License. You may obtain a copy of the License at
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14 // http://sourceware.cygnus.com/ecos
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15 //
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16 // Software distributed under the License is distributed on an "AS IS"
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17 // basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the
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18 // License for the specific language governing rights and limitations under
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19 // the License.
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20 //
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21 // The Original Code is eCos - Embedded Cygnus Operating System, released
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22 // September 30, 1998.
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23 //
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24 // The Initial Developer of the Original Code is Cygnus. Portions created
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25 // by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved.
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26 // -------------------------------------------
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27 //
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28 //####COPYRIGHTEND####
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29 //==========================================================================
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30 //#####DESCRIPTIONBEGIN####
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31 //
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32 // Author(s): dsm
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33 // Contributors: dsm, nickg
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34 // Date: 1998-06-18
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35 //####DESCRIPTIONEND####
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36 */
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37
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38 #include <cyg/hal/hal_arch.h> // CYGNUM_HAL_STACK_SIZE_TYPICAL
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39
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40 #include <cyg/kernel/kapi.h>
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41
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42 #include <cyg/infra/testcase.h>
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43
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44 #ifdef CYGVAR_KERNEL_COUNTERS_CLOCK
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45 #ifdef CYGFUN_KERNEL_API_C
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46
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47 #include <cyg/infra/diag.h>
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48 #include <cyg/hal/hal_cache.h>
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49 #include <cyg/hal/hal_intr.h>
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50
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51 // -------------------------------------------------------------------------
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52 // If the HAL does not supply this, we supply our own version
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53
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54 #ifdef HAL_DCACHE_SYNC
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55
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56 # define HAL_DCACHE_PURGE_ALL() HAL_DCACHE_SYNC()
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57
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58 #else
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59
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60 static cyg_uint8 dca[HAL_DCACHE_SIZE + HAL_DCACHE_LINE_SIZE*2];
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61
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62 #define HAL_DCACHE_PURGE_ALL() \
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63 CYG_MACRO_START \
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64 volatile cyg_uint8 *addr = &dca[HAL_DCACHE_LINE_SIZE]; \
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65 volatile cyg_uint8 tmp = 0; \
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66 int i; \
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67 for( i = 0; i < HAL_DCACHE_SIZE; i += HAL_DCACHE_LINE_SIZE ) \
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68 { \
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69 tmp = addr[i]; \
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70 } \
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71 CYG_MACRO_END
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72
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73 #endif
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74
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75 // -------------------------------------------------------------------------
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76
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77 #define NTHREADS 1
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78 #define STACKSIZE CYGNUM_HAL_STACK_SIZE_TYPICAL
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79
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80 static cyg_handle_t thread[NTHREADS];
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81
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82 static cyg_thread thread_obj[NTHREADS];
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83 static char stack[NTHREADS][STACKSIZE];
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84
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85 #define MAXSIZE 1<<18
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86
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87 volatile char m[MAXSIZE];
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88
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89 #ifndef MAX_STRIDE
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90 #define MAX_STRIDE 64
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91 #endif
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92
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93 // -------------------------------------------------------------------------
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94
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95 static void time0(register cyg_uint32 stride)
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96 {
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97 register cyg_uint32 j,k;
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98 cyg_tick_count_t count0, count1;
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99 cyg_ucount32 t;
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100 register char c;
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101
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102 count0 = cyg_current_time();
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103
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104 k = 0;
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105 if ( cyg_test_is_simulator )
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106 k = 3960;
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107
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108 for(; k<4000;k++) {
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109 for(j=0; j<(HAL_DCACHE_SIZE/HAL_DCACHE_LINE_SIZE); j++) {
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110 c=m[stride*j];
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111 }
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112 }
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113
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114 count1 = cyg_current_time();
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115 t = count1 - count0;
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116 diag_printf("stride=%d, time=%d\n", stride, t);
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117 }
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118
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119 // -------------------------------------------------------------------------
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120
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121 void time1(void)
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122 {
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123 cyg_uint32 i;
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124
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125 for(i=1; i<=MAX_STRIDE; i+=i) {
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126 time0(i);
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127 }
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128 }
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129
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130 // -------------------------------------------------------------------------
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131 // With an ICache invalidate in the middle:
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132 #ifdef HAL_ICACHE_INVALIDATE_ALL
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133 static void time0II(register cyg_uint32 stride)
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134 {
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135 register cyg_uint32 j,k;
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136 cyg_tick_count_t count0, count1;
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137 cyg_ucount32 t;
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138 register char c;
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139
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140 count0 = cyg_current_time();
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141
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142 k = 0;
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143 if ( cyg_test_is_simulator )
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144 k = 3960;
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145
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146 for(; k<4000;k++) {
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147 for(j=0; j<(HAL_DCACHE_SIZE/HAL_DCACHE_LINE_SIZE); j++) {
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148 HAL_ICACHE_INVALIDATE_ALL();
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149 c=m[stride*j];
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150 }
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151 }
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152
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153 count1 = cyg_current_time();
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154 t = count1 - count0;
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155 diag_printf("stride=%d, time=%d\n", stride, t);
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156 }
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157
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158 // -------------------------------------------------------------------------
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159
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160 void time1II(void)
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161 {
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162 cyg_uint32 i;
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163
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164 for(i=1; i<=MAX_STRIDE; i+=i) {
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165 time0II(i);
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166 }
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167 }
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168 #endif
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169 // -------------------------------------------------------------------------
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170 // With a DCache invalidate in the middle:
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171 #ifdef HAL_DCACHE_INVALIDATE_ALL
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172 static void time0DI(register cyg_uint32 stride)
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173 {
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174 register cyg_uint32 j,k;
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175 cyg_tick_count_t count0, count1;
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176 cyg_ucount32 t;
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177 register char c;
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178
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179 count0 = cyg_current_time();
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180
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181 HAL_DCACHE_SYNC();
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182
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183 k = 0;
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184 if ( cyg_test_is_simulator )
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185 k = 3960;
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186
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187 for(; k<4000;k++) {
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188 for(j=0; j<(HAL_DCACHE_SIZE/HAL_DCACHE_LINE_SIZE); j++) {
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189 HAL_DCACHE_INVALIDATE_ALL();
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190 c=m[stride*j];
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191 }
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192 }
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193
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194 count1 = cyg_current_time();
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195 t = count1 - count0;
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196 diag_printf("stride=%d, time=%d\n", stride, t);
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197 }
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198
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199 // -------------------------------------------------------------------------
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200
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201 void time1DI(void)
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202 {
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203 cyg_uint32 i;
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204
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205 for(i=1; i<=MAX_STRIDE; i+=i) {
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206 time0DI(i);
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207 }
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208 }
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209 #endif
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210 // -------------------------------------------------------------------------
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211 // This test could be improved by counting number of passes possible
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212 // in a given number of ticks.
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213
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214 static void entry0( cyg_addrword_t data )
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215 {
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216 register CYG_INTERRUPT_STATE oldints;
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217
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218 #ifdef HAL_CACHE_UNIFIED
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219
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220 HAL_DISABLE_INTERRUPTS(oldints);
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221 HAL_DCACHE_PURGE_ALL(); // rely on above definition
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222 HAL_UCACHE_INVALIDATE_ALL();
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223 HAL_UCACHE_DISABLE();
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224 HAL_RESTORE_INTERRUPTS(oldints);
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225 CYG_TEST_INFO("Cache off");
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226 time1();
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227
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228 HAL_DISABLE_INTERRUPTS(oldints);
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229 HAL_DCACHE_PURGE_ALL(); // rely on above definition
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230 HAL_UCACHE_INVALIDATE_ALL();
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231 HAL_UCACHE_ENABLE();
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232 HAL_RESTORE_INTERRUPTS(oldints);
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233 CYG_TEST_INFO("Cache on");
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234 time1();
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235
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236 #else // HAL_CACHE_UNIFIED
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237
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238 HAL_DISABLE_INTERRUPTS(oldints);
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239 HAL_DCACHE_PURGE_ALL();
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240 HAL_ICACHE_INVALIDATE_ALL();
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241 HAL_DCACHE_INVALIDATE_ALL();
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242 HAL_ICACHE_DISABLE();
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243 HAL_DCACHE_DISABLE();
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244 HAL_RESTORE_INTERRUPTS(oldints);
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245 CYG_TEST_INFO("Dcache off Icache off");
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246 time1();
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247
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248 HAL_DISABLE_INTERRUPTS(oldints);
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249 HAL_DCACHE_PURGE_ALL();
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250 HAL_ICACHE_INVALIDATE_ALL();
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251 HAL_DCACHE_INVALIDATE_ALL();
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252 HAL_ICACHE_DISABLE();
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253 HAL_DCACHE_ENABLE();
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254 HAL_RESTORE_INTERRUPTS(oldints);
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255 CYG_TEST_INFO("Dcache on Icache off");
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256 time1();
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257
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258 HAL_DISABLE_INTERRUPTS(oldints);
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259 HAL_DCACHE_PURGE_ALL();
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260 HAL_ICACHE_INVALIDATE_ALL();
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261 HAL_DCACHE_INVALIDATE_ALL();
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262 HAL_ICACHE_ENABLE();
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263 HAL_DCACHE_DISABLE();
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264 HAL_RESTORE_INTERRUPTS(oldints);
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265 CYG_TEST_INFO("Dcache off Icache on");
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266 time1();
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267
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268 HAL_DISABLE_INTERRUPTS(oldints);
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269 HAL_DCACHE_PURGE_ALL();
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270 HAL_ICACHE_INVALIDATE_ALL();
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271 HAL_DCACHE_INVALIDATE_ALL();
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272 HAL_ICACHE_ENABLE();
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273 HAL_DCACHE_ENABLE();
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274 HAL_RESTORE_INTERRUPTS(oldints);
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275 CYG_TEST_INFO("Dcache on Icache on");
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276 time1();
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277
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278
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279 HAL_DISABLE_INTERRUPTS(oldints);
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280 HAL_DCACHE_PURGE_ALL();
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281 HAL_ICACHE_INVALIDATE_ALL();
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282 HAL_DCACHE_INVALIDATE_ALL();
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283 HAL_ICACHE_DISABLE();
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284 HAL_DCACHE_DISABLE();
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285 HAL_RESTORE_INTERRUPTS(oldints);
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286 CYG_TEST_INFO("Dcache off Icache off (again)");
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287 time1();
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288
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289 #if defined(HAL_DCACHE_INVALIDATE_ALL) || defined(HAL_ICACHE_INVALIDATE_ALL)
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290 HAL_DISABLE_INTERRUPTS(oldints);
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291 HAL_DCACHE_PURGE_ALL();
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292 HAL_ICACHE_INVALIDATE_ALL();
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293 HAL_DCACHE_INVALIDATE_ALL();
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294 HAL_ICACHE_ENABLE();
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295 HAL_DCACHE_ENABLE();
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296 HAL_RESTORE_INTERRUPTS(oldints);
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297 CYG_TEST_INFO("Dcache on Icache on (again)");
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298 time1();
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299
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300 #ifdef HAL_ICACHE_INVALIDATE_ALL
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301 HAL_DISABLE_INTERRUPTS(oldints);
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302 HAL_DCACHE_PURGE_ALL();
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303 HAL_ICACHE_INVALIDATE_ALL();
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304 HAL_DCACHE_INVALIDATE_ALL();
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305 HAL_ICACHE_ENABLE();
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306 HAL_DCACHE_ENABLE();
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307 HAL_RESTORE_INTERRUPTS(oldints);
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308 CYG_TEST_INFO("Dcache on Icache on: invalidate ICache each time");
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309 time1II();
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310 #endif
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311 #ifdef HAL_DCACHE_INVALIDATE_ALL
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312 HAL_DISABLE_INTERRUPTS(oldints);
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313 HAL_DCACHE_PURGE_ALL();
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314 HAL_ICACHE_INVALIDATE_ALL();
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315 HAL_DCACHE_INVALIDATE_ALL();
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316 HAL_ICACHE_ENABLE();
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317 HAL_DCACHE_ENABLE();
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318 HAL_RESTORE_INTERRUPTS(oldints);
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319 CYG_TEST_INFO("Dcache on Icache on: invalidate DCache (expect bogus times)");
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320 time1DI();
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321 #endif
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322 #endif // either INVALIDATE_ALL macro
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323
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324 #endif // HAL_CACHE_UNIFIED
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325
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326 CYG_TEST_PASS_FINISH("End of test");
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327 }
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328
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329 // -------------------------------------------------------------------------
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330
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331 void kcache2_main( void )
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332 {
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333 CYG_TEST_INIT();
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334
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335 cyg_thread_create(4, entry0 , (cyg_addrword_t)0, "kcache1",
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336 (void *)stack[0], STACKSIZE, &thread[0], &thread_obj[0]);
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337 cyg_thread_resume(thread[0]);
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338
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339 cyg_scheduler_start();
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340 }
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341
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342 // -------------------------------------------------------------------------
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343
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344 externC void
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345 cyg_start( void )
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346 {
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347 kcache2_main();
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348 }
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349
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350 // -------------------------------------------------------------------------
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351
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352 #else // def CYGFUN_KERNEL_API_C
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353 #define N_A_MSG "Kernel C API layer disabled"
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354 #endif // def CYGFUN_KERNEL_API_C
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355 #else // def CYGVAR_KERNEL_COUNTERS_CLOCK
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356 #define N_A_MSG "Kernel real-time clock disabled"
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357 #endif // def CYGVAR_KERNEL_COUNTERS_CLOCK
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358
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359 #ifdef N_A_MSG
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360 externC void
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361 cyg_start( void )
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362 {
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363 CYG_TEST_INIT();
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364 CYG_TEST_NA( N_A_MSG );
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365 }
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366 #endif // N_A_MSG
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367
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368 // -------------------------------------------------------------------------
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369 /* EOF kcache1.c */