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annotate packages/devs/eth/arm/edb7xxx/current/src/if_edb7xxx.c @ 126:518f42066aba ecos-sw-2000-09-19

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Merge from eCos master repository on 2000-09-19-06:25:26-BST
author jlarmour
date Tue, 19 Sep 2000 05:53:51 +0000
parents 6bd9d475ed4b
children d397fc472bcf
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1 //==========================================================================
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2 //
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3 // dev/if_edb7xxx.c
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4 //
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5 // Ethernet device driver for Cirrus Logic EDB7xxx using CS8900
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6 //
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7 //==========================================================================
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8 //####COPYRIGHTBEGIN####
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9 //
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10 // -------------------------------------------
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11 // The contents of this file are subject to the Red Hat eCos Public License
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12 // Version 1.1 (the "License"); you may not use this file except in
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13 // compliance with the License. You may obtain a copy of the License at
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14 // http://www.redhat.com/
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15 //
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16 // Software distributed under the License is distributed on an "AS IS"
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17 // basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the
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18 // License for the specific language governing rights and limitations under
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19 // the License.
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20 //
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21 // The Original Code is eCos - Embedded Configurable Operating System,
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22 // released September 30, 1998.
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23 //
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24 // The Initial Developer of the Original Code is Red Hat.
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25 // Portions created by Red Hat are
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26 // Copyright (C) 1998, 1999, 2000 Red Hat, Inc.
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27 // All Rights Reserved.
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28 // -------------------------------------------
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29 //
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30 //####COPYRIGHTEND####
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31 //####BSDCOPYRIGHTBEGIN####
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32 //
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33 // -------------------------------------------
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34 //
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35 // Portions of this software may have been derived from OpenBSD or other sources,
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36 // and are covered by the appropriate copyright disclaimers included herein.
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37 //
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38 // -------------------------------------------
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39 //
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40 //####BSDCOPYRIGHTEND####
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41 //==========================================================================
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42 //#####DESCRIPTIONBEGIN####
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43 //
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44 // Author(s): gthomas
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45 // Contributors: gthomas
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46 // Date: 2000-01-10
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47 // Purpose:
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48 // Description: hardware driver for CS8900 ethernet
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49 //
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50 //
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51 //####DESCRIPTIONEND####
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52 //
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53 //==========================================================================
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54
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55 // Ethernet device driver for Cirrus Logic EDB7xxx
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56 // Based on CS8900A
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57
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58 #include <pkgconf/system.h>
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59 #include <pkgconf/devs_eth_arm_edb7xxx.h>
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60 #ifdef CYGPKG_NET
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61 #include <pkgconf/net.h>
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62 #include <cyg/kernel/kapi.h>
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63 #endif
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64 #include <cyg/infra/cyg_type.h>
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65 #include <cyg/hal/hal_arch.h>
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66 #include <cyg/hal/hal_intr.h>
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67 #include <cyg/infra/diag.h>
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68 #include <cyg/hal/drv_api.h>
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69 #include <netdev.h>
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70 #include <eth_drv.h>
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71
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72 #ifndef CYGSEM_ARM_EDB7XXX_SET_ESA
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73 #ifdef CYGPKG_REDBOOT
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74 #include <pkgconf/redboot.h>
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75 #ifdef CYGSEM_REDBOOT_FLASH_CONFIG
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76 #include <redboot.h>
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77 #include <flash_config.h>
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78 RedBoot_config_option("Network hardware address [MAC]",
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79 edb7xxx_esa,
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80 ALWAYS_ENABLED, true,
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81 CONFIG_ESA
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82 );
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83 #endif
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84 #endif
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85 #endif
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86
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87 #define INTS_DONT_WORK
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88 #undef INTS_DONT_WORK
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89
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90 #ifdef INTS_DONT_WORK
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91 #define STACK_SIZE CYGNUM_HAL_STACK_SIZE_MINIMUM
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92 static char cs8900_fake_int_stack[STACK_SIZE];
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93 static cyg_thread cs8900_fake_int_thread_data;
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94 static cyg_handle_t cs8900_fake_int_thread_handle;
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95 static void cs8900_fake_int(cyg_addrword_t);
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96 #endif
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97
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98 #define CS8900_BASE 0x20000000
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99 #include "cs8900.h"
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100 #define ETHER_ADDR_LEN 6
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101
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102 extern int net_debug; // FIXME
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103
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104 struct cs8900_priv_data {
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105 int txbusy; // A packet has been sent
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106 unsigned long txkey; // Used to ack when packet sent
126
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107 #ifdef CYGPKG_NET
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108 cyg_tick_count_t txstart;
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109 #endif
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110 } _cs8900_priv_data;
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111
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112 ETH_DRV_SC(edb7xxx_sc,
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113 &_cs8900_priv_data, // Driver specific data
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114 "eth0", // Name for this interface
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115 cs8900_start,
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116 cs8900_stop,
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117 cs8900_control,
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118 cs8900_can_send,
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119 cs8900_send,
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120 cs8900_recv,
121
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121 cs8900_deliver, // "pseudoDSR" called from fast net thread
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122 cs8900_int, // poll function, encapsulates ISR and DSR
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123 cs8900_int_vector);
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124
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125 NETDEVTAB_ENTRY(edb7xxx_netdev,
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126 "edb7xxx",
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127 edb7xxx_cs8900_init,
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128 &edb7xxx_sc);
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129
115
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130 #ifdef CYGSEM_ARM_EDB7XXX_SET_ESA
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131 static unsigned char enaddr[] = CYGDAT_ARM_EDB7XXX_ESA;
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132 #else
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133 static unsigned char enaddr[ETHER_ADDR_LEN];
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134 #endif
82
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135
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136 static void cs8900_int(struct eth_drv_sc *sc);
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137 static cyg_interrupt cs8900_interrupt;
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138 static cyg_handle_t cs8900_interrupt_handle;
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139
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140 // This ISR is called when the ethernet interrupt occurs
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141 static int
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142 cs8900_isr(cyg_vector_t vector, cyg_addrword_t data, HAL_SavedRegisters *regs)
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143 {
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144 cyg_drv_interrupt_mask(CYGNUM_HAL_INTERRUPT_EINT3);
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145 return (CYG_ISR_HANDLED|CYG_ISR_CALL_DSR); // Run the DSR
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146 }
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147
121
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148 // The deliver function (ex-DSR) handles the ethernet [logical] processing
82
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149 static void
121
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150 cs8900_deliver(struct eth_drv_sc *sc)
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151 {
121
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152 cs8900_int(sc);
82
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153 // Allow interrupts to happen again
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154 cyg_drv_interrupt_acknowledge(CYGNUM_HAL_INTERRUPT_EINT3);
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155 cyg_drv_interrupt_unmask(CYGNUM_HAL_INTERRUPT_EINT3);
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156 }
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157
117
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158 static int
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159 cs8900_int_vector(struct eth_drv_sc *sc)
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160 {
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161 return (CYGNUM_HAL_INTERRUPT_EINT3);
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162 }
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163
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164 static bool
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165 edb7xxx_cs8900_init(struct cyg_netdevtab_entry *tab)
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166 {
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167 struct eth_drv_sc *sc = (struct eth_drv_sc *)tab->device_instance;
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168 unsigned short chip_type, chip_rev, chip_status;
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169 int i;
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170
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171 // Initialize environment, setup interrupt handler
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172 cyg_drv_interrupt_create(CYGNUM_HAL_INTERRUPT_EINT3,
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173 99, // Priority - what goes here?
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174 (cyg_addrword_t)sc, // Data item passed to interrupt handler
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175 (cyg_ISR_t *)cs8900_isr,
121
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176 (cyg_DSR_t *)eth_drv_dsr, // The logical driver DSR
82
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177 &cs8900_interrupt_handle,
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178 &cs8900_interrupt);
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179 cyg_drv_interrupt_attach(cs8900_interrupt_handle);
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180 cyg_drv_interrupt_acknowledge(CYGNUM_HAL_INTERRUPT_EINT3);
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181 cyg_drv_interrupt_unmask(CYGNUM_HAL_INTERRUPT_EINT3);
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182
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183 #ifdef INTS_DONT_WORK
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184 cyg_thread_create(1, // Priority
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185 cs8900_fake_int, // entry
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186 0, // entry parameter
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187 "CS8900 int", // Name
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188 &cs8900_fake_int_stack[0], // Stack
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189 STACK_SIZE, // Size
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190 &cs8900_fake_int_thread_handle, // Handle
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191 &cs8900_fake_int_thread_data // Thread data structure
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192 );
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193 cyg_thread_resume(cs8900_fake_int_thread_handle); // Start it
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194 #endif
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195
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196 chip_type = get_reg(PP_ChipID);
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197 chip_rev = get_reg(PP_ChipRev);
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198
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199 #if 0
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200 diag_printf("CS8900 - type: %x, rev: %x\n", chip_type, chip_rev);
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201 #endif
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202
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203 // Fetch hardware address
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204 #if defined(CYGPKG_REDBOOT) && \
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205 defined(CYGSEM_REDBOOT_FLASH_CONFIG) && \
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206 !defined(CYGSEM_ARM_EDB7XXX_SET_ESA)
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207 flash_get_config("edb7xxx_esa", enaddr, CONFIG_ESA);
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208 #else
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209 for (i = 0; i < ETHER_ADDR_LEN; i += 2) {
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210 unsigned short esa_reg = get_reg(PP_IA+i);
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211 enaddr[i] = esa_reg & 0xFF;
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212 enaddr[i+1] = esa_reg >> 8;
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213 }
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214 #endif
82
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215
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216 put_reg(PP_SelfCtl, PP_SelfCtl_Reset); // Reset chip
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217 while ((get_reg(PP_SelfStat) & PP_SelfStat_InitD) == 0) ;
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218
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219 chip_status = get_reg(PP_SelfStat);
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220 #if 0
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221 diag_printf("CS8900 - status: %x (%sEEPROM present)\n", chip_status,
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222 chip_status&PP_SelfStat_EEPROM ? "" : "no ");
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223 #endif
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224
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225 // Set up hardware address
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226 for (i = 0; i < ETHER_ADDR_LEN; i += 2) {
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227 put_reg(PP_LAF+i, 0xFFFF);
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228 put_reg(PP_IA+i, enaddr[i] | (enaddr[i+1] << 8));
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229 }
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230
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231 // Initialize upper level driver
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232 (sc->funs->eth_drv->init)(sc, enaddr);
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233
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234 return true;
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235 }
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236
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237 static void
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238 cs8900_stop(struct eth_drv_sc *sc)
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239 {
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240 put_reg(PP_SelfCtl, PP_SelfCtl_Reset); // Reset chip
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241 while ((get_reg(PP_SelfStat) & PP_SelfStat_InitD) == 0) ;
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242 }
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243
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244 //
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245 // This function is called to "start up" the interface. It may be called
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246 // multiple times, even when the hardware is already running. It will be
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247 // called whenever something "hardware oriented" changes and should leave
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248 // the hardware ready to send/receive packets.
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249 //
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250 static void
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251 cs8900_start(struct eth_drv_sc *sc, unsigned char *enaddr, int flags)
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252 {
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253 unsigned short stat;
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254 put_reg(PP_BusCtl, PP_BusCtl_MemoryE); // Disable interrupts, memory mode
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255 put_reg(PP_IntReg, PP_IntReg_IRQ0); // Only possibility
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256 put_reg(PP_RxCFG, PP_RxCFG_RxOK | PP_RxCFG_CRC |
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257 PP_RxCFG_RUNT | PP_RxCFG_EXTRA);
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258 put_reg(PP_RxCTL, PP_RxCTL_RxOK | PP_RxCTL_Broadcast |
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259 PP_RxCTL_IA);
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260 put_reg(PP_TxCFG, PP_TxCFG_TxOK | PP_TxCFG_Collision |
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261 PP_TxCFG_CRS | PP_TxCFG_SQE | PP_TxCFG_Late |
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262 PP_TxCFG_Jabber | PP_TxCFG_16Collisions);
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263 put_reg(PP_BufCFG, PP_BufCFG_TxRDY | PP_BufCFG_TxUE | PP_BufCFG_RxMiss |
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264 PP_BufCFG_TxCol | PP_BufCFG_Miss | PP_BufCFG_SWI);
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265 put_reg(PP_IntReg, PP_IntReg_IRQ0); // Only possibility
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266 put_reg(PP_LineCTL, PP_LineCTL_Rx | PP_LineCTL_Tx);
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267 // Clear Interrupt Status Queue before enabling interrupts
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268 while ((stat = CS8900_ISQ) != 0) ;
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269 put_reg(PP_BusCtl, PP_BusCtl_EnableIRQ);
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270 }
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271
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272 //
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273 // This routine is called to perform special "control" opertions
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274 //
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275 static int
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276 cs8900_control(struct eth_drv_sc *sc, unsigned long key,
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277 void *data, int data_length)
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278 {
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279 switch (key) {
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280 case ETH_DRV_SET_MAC_ADDRESS:
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281 return 0;
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282 break;
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283 default:
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284 return 1;
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285 break;
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286 }
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287 }
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288
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289 //
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290 // This routine is called to see if it is possible to send another packet.
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291 // It will return non-zero if a transmit is possible, zero otherwise.
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292 //
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293 static int
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294 cs8900_can_send(struct eth_drv_sc *sc)
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295 {
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296 struct cs8900_priv_data *cpd = (struct cs8900_priv_data *)sc->driver_private;
115
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297 unsigned short stat;
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298 stat = get_reg(PP_LineStat);
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299 if ((stat & PP_LineStat_LinkOK) == 0) {
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300 return false; // Link not connected
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301 }
126
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302 #ifdef CYGPKG_NET
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303 // Horrible hack!
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304 if (cpd->txbusy > 0) {
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305 cyg_tick_count_t now = cyg_current_time();
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306 if ((now - cpd->txstart) > 25) {
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307 // 250ms is more than enough to transmit one frame
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308 diag_printf("CS8900: Tx interrupt lost\n");
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309 cpd->txbusy = 0;
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310 // Free up the buffer (with error indication)
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311 (sc->funs->eth_drv->tx_done)(sc, cpd->txkey, 1);
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312 }
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313 }
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314 #endif
82
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315 return (cpd->txbusy == 0);
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316 }
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317
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318 //
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319 // This routine is called to send data to the hardware.
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320 static void
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321 cs8900_send(struct eth_drv_sc *sc, struct eth_drv_sg *sg_list, int sg_len,
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322 int total_len, unsigned long key)
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323 {
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324 struct cs8900_priv_data *cpd = (struct cs8900_priv_data *)sc->driver_private;
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325 int i;
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326 int len;
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327 unsigned char *data;
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328 unsigned short saved_data = 0, *sdata;
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329 unsigned short stat;
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330 bool odd_byte = false;
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331
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332 // Mark xmitter busy
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333 cpd->txbusy = 1;
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334 cpd->txkey = key;
126
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335 #ifdef CYGPKG_NET
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336 cpd->txstart = cyg_current_time();
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337 #endif
82
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338 // Start the xmit sequence
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339 // Note: this can go back once the 'dump' is removed
126
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340 CS8900_TxCMD = PP_TxCmd_TxStart_5; // Start more-or-less immediately
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341 // CS8900_TxCMD = PP_TxCmd_TxStart_Full; // Start only when all data sent to chip
82
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342 CS8900_TxLEN = total_len;
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343 stat = get_reg(PP_BusStat); // This actually starts the xmit
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344
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345 // Put data into buffer
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346 for (i = 0; i < sg_len; i++) {
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347 data = (unsigned char *)sg_list[i].buf;
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348 len = sg_list[i].len;
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349 if (len > 0) {
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350 /* Finish the last word. */
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351 if (odd_byte) {
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352 saved_data |= (*data++ << 8);
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353 CS8900_RTDATA = saved_data;
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354 len--;
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355 odd_byte = false;
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356 }
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357 /* Output contiguous words. */
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358 sdata = (unsigned short *)data;
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359 while (len > 1) {
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360 CS8900_RTDATA = *sdata++;
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361 len -= sizeof(unsigned short);
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362 }
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363 /* Save last byte, if necessary. */
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364 if (len == 1) {
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365 data = (unsigned char *)sdata;
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366 saved_data = *data;
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367 odd_byte = true;
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368 }
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369 }
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370 }
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371 if (odd_byte) {
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372 CS8900_RTDATA = saved_data;
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373 }
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374 }
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375
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376 //
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377 // This function is called when a packet has been received. It's job is
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378 // to prepare to unload the packet from the hardware. Once the length of
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379 // the packet is known, the upper layer of the driver can be told. When
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380 // the upper layer is ready to unload the packet, the internal function
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381 // 'cs8900_recv' will be called to actually fetch it from the hardware.
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382 //
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383 static void
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384 cs8900_RxEvent(struct eth_drv_sc *sc)
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385 {
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386 unsigned short stat, len;
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387
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388 stat = CS8900_RTDATA;
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389 len = CS8900_RTDATA;
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390 if (net_debug) {
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391 diag_printf("RxEvent - stat: %x, len: %d\n", stat, len);
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392 }
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393 (sc->funs->eth_drv->recv)(sc, len);
82
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394 }
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395
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396 //
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397 // This function is called as a result of the "eth_drv_recv()" call above.
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398 // It's job is to actually fetch data for a packet from the hardware once
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399 // memory buffers have been allocated for the packet. Note that the buffers
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400 // may come in pieces, using a scatter-gather list. This allows for more
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401 // efficient processing in the upper layers of the stack.
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402 //
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403 static void
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404 cs8900_recv(struct eth_drv_sc *sc, struct eth_drv_sg *sg_list, int sg_len)
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405 {
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406 int i, mlen;
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407 unsigned short *data, val;
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408 unsigned char *cp, cval;
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409
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410 for (i = 0; i < sg_len; i++) {
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411 data = (unsigned short *)sg_list[i].buf;
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412 mlen = sg_list[i].len;
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413 while (mlen >= sizeof(*data)) {
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414 val = CS8900_RTDATA;
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415 if (data) {
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416 *data++ = val;
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417 }
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418 mlen -= sizeof(*data);
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419 }
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420 if (mlen) {
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421 // Fetch last odd byte
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422 cval = CS8900_RTDATA & 0xFF;
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423 if ((cp = (unsigned char *)data) != 0) {
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424 *cp = cval;
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425 }
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426 }
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427 }
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428 }
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429
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430 static void
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431 cs8900_TxEvent(struct eth_drv_sc *sc, int stat)
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432 {
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433 struct cs8900_priv_data *cpd = (struct cs8900_priv_data *)sc->driver_private;
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434 stat = get_reg(PP_TER);
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435 if (net_debug) {
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436 diag_printf("Tx event: %x\n", stat);
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437 }
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438 cpd->txbusy = 0;
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439 (sc->funs->eth_drv->tx_done)(sc, cpd->txkey, 0);
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440 }
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441
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442 static void
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443 cs8900_BufEvent(struct eth_drv_sc *sc, int stat)
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444 {
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445 if (stat & PP_BufCFG_RxMiss) {
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446 }
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447 if (stat & PP_BufCFG_TxUE) {
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448 }
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449 }
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450
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451 static void
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452 cs8900_int(struct eth_drv_sc *sc)
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453 {
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454 unsigned short event;
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455 while ((event = CS8900_ISQ) != 0) {
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456 switch (event & ISQ_EventMask) {
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457 case ISQ_RxEvent:
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458 cs8900_RxEvent(sc);
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459 break;
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460 case ISQ_TxEvent:
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461 cs8900_TxEvent(sc, event);
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462 break;
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463 case ISQ_BufEvent:
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464 cs8900_BufEvent(sc, event);
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465 break;
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466 case ISQ_RxMissEvent:
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467 // Receive miss counter has overflowed
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468 break;
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469 case ISQ_TxColEvent:
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470 // Transmit collision counter has overflowed
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471 break;
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472 default:
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473 diag_printf("%s: Unknown event: %x\n", __FUNCTION__, event);
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474 break;
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475 }
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476 }
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477 }
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478
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479 #ifdef INTS_DONT_WORK
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480 void
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481 cs8900_fake_int(cyg_addrword_t param)
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482 {
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483 int s;
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484 while (true) {
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485 cyg_thread_delay(5);
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486 s = splnet();
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487 cs8900_int(&edb7xxx_sc);
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488 splx(s);
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489 }
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490 }
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491 #endif
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492