|
2367
|
1 //========================================================================== |
|
|
2 // |
|
|
3 // dev/DM9161A.c |
|
|
4 // |
|
|
5 // Ethernet transceiver (PHY) support |
|
|
6 // |
|
|
7 //========================================================================== |
|
|
8 //####ECOSGPLCOPYRIGHTBEGIN#### |
|
|
9 // ------------------------------------------- |
|
|
10 // This file is part of eCos, the Embedded Configurable Operating System. |
|
|
11 // Copyright (C) 2003 Gary Thomas |
|
|
12 // |
|
|
13 // eCos is free software; you can redistribute it and/or modify it under |
|
|
14 // the terms of the GNU General Public License as published by the Free |
|
|
15 // Software Foundation; either version 2 or (at your option) any later version. |
|
|
16 // |
|
|
17 // eCos is distributed in the hope that it will be useful, but WITHOUT ANY |
|
|
18 // WARRANTY; without even the implied warranty of MERCHANTABILITY or |
|
|
19 // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
|
|
20 // for more details. |
|
|
21 // |
|
|
22 // You should have received a copy of the GNU General Public License along |
|
|
23 // with eCos; if not, write to the Free Software Foundation, Inc., |
|
|
24 // 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. |
|
|
25 // |
|
|
26 // As a special exception, if other files instantiate templates or use macros |
|
|
27 // or inline functions from this file, or you compile this file and link it |
|
|
28 // with other works to produce a work based on this file, this file does not |
|
|
29 // by itself cause the resulting work to be covered by the GNU General Public |
|
|
30 // License. However the source code for this file must still be made available |
|
|
31 // in accordance with section (3) of the GNU General Public License. |
|
|
32 // |
|
|
33 // This exception does not invalidate any other reasons why a work based on |
|
|
34 // this file might be covered by the GNU General Public License. |
|
|
35 // |
|
|
36 // Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. |
|
|
37 // at http://sources.redhat.com/ecos/ecos-license/ |
|
|
38 // ------------------------------------------- |
|
|
39 //####ECOSGPLCOPYRIGHTEND#### |
|
|
40 //========================================================================== |
|
|
41 //#####DESCRIPTIONBEGIN#### |
|
|
42 // |
|
|
43 // Author(s): John Eigelaar |
|
|
44 // Contributors: Gary Thomas |
|
|
45 // Date: 2006-12-07 |
|
|
46 // Purpose: |
|
|
47 // Description: Support for Davicom DM9161A PHY |
|
|
48 // |
|
|
49 // |
|
|
50 //####DESCRIPTIONEND#### |
|
|
51 // |
|
|
52 //========================================================================== |
|
|
53 |
|
|
54 #include <pkgconf/system.h> |
|
|
55 #include <pkgconf/devs_eth_phy.h> |
|
|
56 |
|
|
57 #include <cyg/infra/cyg_type.h> |
|
|
58 |
|
|
59 #include <cyg/hal/hal_arch.h> |
|
|
60 #include <cyg/hal/drv_api.h> |
|
|
61 #include <cyg/hal/hal_if.h> |
|
|
62 #include <cyg/hal/hal_tables.h> |
|
|
63 |
|
|
64 #include <cyg/io/eth_phy.h> |
|
|
65 #include <cyg/io/eth_phy_dev.h> |
|
|
66 |
|
|
67 #define DM9161A_BMSR 0x01 |
|
|
68 #define DM9161A_BMSR_ANEG_COMP (1<<5) |
|
|
69 #define DM9161A_BMSR_LINK (1<<2) |
|
|
70 |
|
|
71 #define DM9161A_BMCR 0x00 |
|
|
72 |
|
|
73 #define DM9161A_DSCSR 17 |
|
|
74 #define DM9161A_DSCSR_100FDX (1<<15) |
|
|
75 #define DM9161A_DSCSR_100HDX (1<<14) |
|
|
76 #define DM9161A_DSCSR_10FDX (1<<13) |
|
|
77 #define DM9161A_DSCSR_10HDX (1<<12) |
|
|
78 |
|
|
79 static bool dm9161a_stat(eth_phy_access_t *f, int *state) |
|
|
80 { |
|
|
81 unsigned short phy_state; |
|
|
82 int tries; |
|
|
83 |
|
|
84 *state = 0; |
|
|
85 // Read negotiated state |
|
|
86 |
|
|
87 if (_eth_phy_read(f, DM9161A_BMSR, f->phy_addr, &phy_state)) |
|
|
88 { |
|
|
89 if ((phy_state & DM9161A_BMSR_ANEG_COMP) == 0) |
|
|
90 { |
|
|
91 eth_phy_printf("... waiting for auto-negotiation"); |
|
|
92 for (tries = 0; tries < CYGINT_DEVS_ETH_PHY_AUTO_NEGOTIATION_TIME; |
|
|
93 tries++) |
|
|
94 { |
|
|
95 if (_eth_phy_read(f, DM9161A_BMSR, f->phy_addr, &phy_state)) |
|
|
96 { |
|
|
97 if ((phy_state & DM9161A_BMSR_ANEG_COMP) != 0) |
|
|
98 { |
|
|
99 break; |
|
|
100 } |
|
|
101 } |
|
|
102 CYGACC_CALL_IF_DELAY_US(1000000); // 1 second |
|
|
103 eth_phy_printf("."); |
|
|
104 } |
|
|
105 eth_phy_printf("\n"); |
|
|
106 } |
|
|
107 if ((phy_state & DM9161A_BMSR_ANEG_COMP) != 0) |
|
|
108 { |
|
|
109 *state = 0; |
|
|
110 if (!_eth_phy_read(f, DM9161A_DSCSR, f->phy_addr, &phy_state)) |
|
|
111 return false; |
|
|
112 |
|
|
113 if (phy_state & 0xF000) |
|
|
114 { |
|
|
115 *state |= ETH_PHY_STAT_LINK; |
|
|
116 } |
|
|
117 if ((phy_state & DM9161A_DSCSR_100FDX) || |
|
|
118 (phy_state & DM9161A_DSCSR_100HDX)) |
|
|
119 { |
|
|
120 *state |= ETH_PHY_STAT_100MB; |
|
|
121 } |
|
|
122 if ((phy_state & DM9161A_DSCSR_100FDX) || |
|
|
123 (phy_state & DM9161A_DSCSR_10FDX)) |
|
|
124 { |
|
|
125 *state |= ETH_PHY_STAT_FDX; |
|
|
126 } |
|
|
127 |
|
|
128 return (true); |
|
|
129 } |
|
|
130 } |
|
|
131 return (false); |
|
|
132 } |
|
|
133 |
|
|
134 _eth_phy_dev("Davicom DM9161A", 0x0181B8A0, dm9161a_stat) |
