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changeset 2575:5652a30913c1

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* cdl/hal_arm_at91sam7s.cdl * include/hal_platform_ints.h * include/plf_io.h * include/var_io.h: Add support for AT91SAM7SE * cdl/hal_arm_at91sam7s.cdl: Allow external clock input to be up to 50Mhz, but the crystal is limited to 30MHz.
author asl
date Mon, 03 Nov 2008 08:40:01 +0000
parents 1616d9615611
children 4e10fbeb81fd
files packages/hal/arm/at91/at91sam7s/current/ChangeLog packages/hal/arm/at91/at91sam7s/current/cdl/hal_arm_at91sam7s.cdl packages/hal/arm/at91/at91sam7s/current/include/hal_platform_ints.h packages/hal/arm/at91/at91sam7s/current/include/pkgconf/mlt_arm_at91sam7s512_rom.h packages/hal/arm/at91/at91sam7s/current/include/pkgconf/mlt_arm_at91sam7s512_rom.ldi packages/hal/arm/at91/at91sam7s/current/include/pkgconf/mlt_arm_at91sam7se256_rom.h packages/hal/arm/at91/at91sam7s/current/include/pkgconf/mlt_arm_at91sam7se256_rom.ldi packages/hal/arm/at91/at91sam7s/current/include/pkgconf/mlt_arm_at91sam7se32_rom.h packages/hal/arm/at91/at91sam7s/current/include/pkgconf/mlt_arm_at91sam7se32_rom.ldi packages/hal/arm/at91/at91sam7s/current/include/pkgconf/mlt_arm_at91sam7se512_rom.h packages/hal/arm/at91/at91sam7s/current/include/pkgconf/mlt_arm_at91sam7se512_rom.ldi packages/hal/arm/at91/at91sam7s/current/include/plf_io.h
diffstat 12 files changed, 275 insertions(+), 6 deletions(-) [+]
line wrap: on
line diff
--- a/packages/hal/arm/at91/at91sam7s/current/ChangeLog
+++ b/packages/hal/arm/at91/at91sam7s/current/ChangeLog
@@ -1,3 +1,15 @@
+2009-11-03  Gabor Toeroek <tgabor84@gmail.com>
+
+	* cdl/hal_arm_at91sam7s.cdl
+	* include/hal_platform_ints.h
+	* include/plf_io.h
+	* include/var_io.h: Add support for AT91SAM7SE
+	
+2009-10-31  Oliver Munz" <munz@speag.ch>
+
+	* cdl/hal_arm_at91sam7s.cdl: Allow external clock input to be up
+	to 50Mhz, but the crystal is limited to 30MHz.
+
 2008-10-19  Igor B. Poretsky <poretsky@mlbox.ru>
 	    Andrew Lunn  <andrew.lunn@ascom.ch>
 
--- a/packages/hal/arm/at91/at91sam7s/current/cdl/hal_arm_at91sam7s.cdl
+++ b/packages/hal/arm/at91/at91sam7s/current/cdl/hal_arm_at91sam7s.cdl
@@ -77,7 +77,8 @@ cdl_package CYGPKG_HAL_ARM_AT91SAM7 {
         flavor         data
         default_value  {"at91sam7s256"}
         legal_values   {"at91sam7s32" "at91sam7s321" "at91sam7s64" 
-                        "at91sam7s128" "at91sam7s256" 
+                        "at91sam7s128" "at91sam7s256" "at91sam7s512" 
+                        "at91sam7se32" "at91sam7se256" "at91sam7se512" 
                         "at91sam7x128" "at91sam7x256" "at91sam7x512" 
                         "at91sam7xc128" "at91sam7xc256" }
         description    "
@@ -90,7 +91,8 @@ cdl_package CYGPKG_HAL_ARM_AT91SAM7 {
 
     cdl_option CYGHWR_HAL_ARM_AT91SAM7S {
         display     "SAM7S device" 
-        calculated  { CYGHWR_HAL_ARM_AT91SAM7 == "at91sam7s256" ||
+        calculated  { CYGHWR_HAL_ARM_AT91SAM7 == "at91sam7s512" ||
+                      CYGHWR_HAL_ARM_AT91SAM7 == "at91sam7s256" ||
                       CYGHWR_HAL_ARM_AT91SAM7 == "at91sam7s128" ||        
                       CYGHWR_HAL_ARM_AT91SAM7 == "at91sam7s64"  ||        
                       CYGHWR_HAL_ARM_AT91SAM7 == "at91sam7s32"  ||
@@ -99,6 +101,15 @@ cdl_package CYGPKG_HAL_ARM_AT91SAM7 {
             Is the AT91SAM7 device a member of the AT91SAM7S family?"
     }
 
+    cdl_option CYGHWR_HAL_ARM_AT91SAM7SE {
+        display     "SAM7SE device" 
+        calculated  { CYGHWR_HAL_ARM_AT91SAM7 == "at91sam7se512" ||
+                      CYGHWR_HAL_ARM_AT91SAM7 == "at91sam7se256" ||
+                      CYGHWR_HAL_ARM_AT91SAM7 == "at91sam7se32" }
+        description "
+            Is the AT91SAM7 device a member of the AT91SAM7SE family?"
+    }
+
     cdl_option CYGHWR_HAL_ARM_AT91SAM7X {
         display     "SAM7X device" 
         calculated  { CYGHWR_HAL_ARM_AT91SAM7 == "at91sam7x512" ||
@@ -119,6 +130,7 @@ cdl_package CYGPKG_HAL_ARM_AT91SAM7 {
     cdl_option CYGBLD_HAL_ARM_AT91SAM7_USB {
         display       "USB device"
         active_if     {!( "at91sam7s32" == CYGHWR_HAL_ARM_AT91SAM7S) ||
+                        CYGHWR_HAL_ARM_AT91SAM7SE                    ||
                         CYGHWR_HAL_ARM_AT91SAM7X                     ||
                         CYGHWR_HAL_ARM_AT91SAM7XC }
         implements    CYGINT_DEVS_USB_AT91_HAS_USB
@@ -222,10 +234,22 @@ cdl_package CYGPKG_HAL_ARM_AT91SAM7 {
             PLL clock divided by two"
     }
 
+    cdl_option CYGNUM_HAL_ARM_AT91_CLOCK_XIN_FREQ_MAX {
+        display       "Input clock frequency maximum"
+        flavor        data
+        calculated    { CYGNUM_HAL_ARM_AT91_CLOCK_TYPE == "CRYSTAL" ? 
+                        20000000 : 50000000 }
+        description   "
+
+            The oscilator in the AT91SAM allows a crystal of up to
+            20MHz. However by feeding in directly a clock signal, it
+            is possible to use upto 50MHz in XIN."
+     }
+
     cdl_option CYGNUM_HAL_ARM_AT91_CLOCK_OSC_MAIN {
         display       "Main oscillator frequency"
         flavor        data
-        legal_values  { 3000000 to 20000000} 
+        legal_values  { 3000000 to CYGNUM_HAL_ARM_AT91_CLOCK_XIN_FREQ_MAX } 
         default_value { 18432000 }
         description   "
             The frequency of the clock input, be it a crystal or a clock 
--- a/packages/hal/arm/at91/at91sam7s/current/include/hal_platform_ints.h
+++ b/packages/hal/arm/at91/at91sam7s/current/include/hal_platform_ints.h
@@ -71,6 +71,11 @@
 #define CYGNUM_HAL_INTERRUPT_ADC		4
 #define CYGNUM_HAL_INTERRUPT_SPI		5
 #endif
+#ifdef CYGHWR_HAL_ARM_AT91SAM7SE
+#define CYGNUM_HAL_INTERRUPT_PIOB		3
+#define CYGNUM_HAL_INTERRUPT_PIOC		4
+#define CYGNUM_HAL_INTERRUPT_SPI		5
+#endif
 
 #define CYGNUM_HAL_INTERRUPT_USART0		6
 #define CYGNUM_HAL_INTERRUPT_USART1		7
@@ -82,6 +87,9 @@
 #define CYGNUM_HAL_INTERRUPT_TC1		13
 #define CYGNUM_HAL_INTERRUPT_TC2		14
 
+#ifdef CYGHWR_HAL_ARM_AT91SAM7SE
+#define CYGNUM_HAL_INTERRUPT_ADC		15
+#endif
 #ifdef CYGHWR_HAL_ARM_AT91SAM7X
 #define CYGNUM_HAL_INTERRUPT_CAN		15
 #define CYGNUM_HAL_INTERRUPT_EMAC		16
new file mode 100644
--- /dev/null
+++ b/packages/hal/arm/at91/at91sam7s/current/include/pkgconf/mlt_arm_at91sam7s512_rom.h
@@ -0,0 +1,25 @@
+// eCos memory layout - Thu Oct 09 03:46 2008
+
+// This is a generated file - do not edit
+
+#ifndef __ASSEMBLER__
+#include <cyg/infra/cyg_type.h>
+#include <stddef.h>
+
+#endif
+#define CYGMEM_REGION_ram (0x00200000)
+#define CYGMEM_REGION_ram_SIZE (0x10000)
+#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W)
+#define CYGMEM_REGION_rom (0x00100000)
+#define CYGMEM_REGION_rom_SIZE (0x80000)
+#define CYGMEM_REGION_rom_ATTR (CYGMEM_REGION_ATTR_R)
+#ifndef __ASSEMBLER__
+extern char CYG_LABEL_NAME (__reserved_bootmon) [];
+#endif
+#define CYGMEM_SECTION_reserved_bootmon (CYG_LABEL_NAME (__reserved_bootmon))
+#define CYGMEM_SECTION_reserved_bootmon_SIZE (0x01000)
+#ifndef __ASSEMBLER__
+extern char CYG_LABEL_NAME (__heap1) [];
+#endif
+#define CYGMEM_SECTION_heap1 (CYG_LABEL_NAME (__heap1))
+#define CYGMEM_SECTION_heap1_SIZE (0x00210000 - (size_t) CYG_LABEL_NAME (__heap1))
new file mode 100644
--- /dev/null
+++ b/packages/hal/arm/at91/at91sam7s/current/include/pkgconf/mlt_arm_at91sam7s512_rom.ldi
@@ -0,0 +1,30 @@
+// eCos memory layout - Thu Oct 09 03:46 2008
+
+// This is a generated file - do not edit
+
+#include <cyg/infra/cyg_type.inc>
+#include <pkgconf/hal_arm_at91sam7.h>
+
+MEMORY
+{
+    ram : ORIGIN = 0x00200000, LENGTH = 0x10000
+    rom : ORIGIN = 0x00100000, LENGTH = 0x80000
+}
+
+SECTIONS
+{
+    SECTIONS_BEGIN
+    CYG_LABEL_DEFN(__reserved_bootmon) = 0x00000000; . = CYG_LABEL_DEFN(__reserved_bootmon) + 0x01000;
+    SECTION_rom_vectors (rom, CYGNUM_HAL_ARM_AT91_IMAGE_ADDRESS, LMA_EQ_VMA)
+    SECTION_text (rom, ALIGN (0x1), LMA_EQ_VMA)
+    SECTION_fini (rom, ALIGN (0x4), LMA_EQ_VMA)
+    SECTION_rodata (rom, ALIGN (0x4), LMA_EQ_VMA)
+    SECTION_rodata1 (rom, ALIGN (0x4), LMA_EQ_VMA)
+    SECTION_fixup (rom, ALIGN (0x4), LMA_EQ_VMA)
+    SECTION_gcc_except_table (rom, ALIGN (0x4), LMA_EQ_VMA)
+    SECTION_fixed_vectors (ram, 0x00200040, LMA_EQ_VMA)
+    SECTION_data (ram, ALIGN (0x4), FOLLOWING (.gcc_except_table))
+    SECTION_bss (ram, ALIGN (0x4), LMA_EQ_VMA)
+    CYG_LABEL_DEFN(__heap1) = ALIGN (0x8);
+    SECTIONS_END
+}
new file mode 100644
--- /dev/null
+++ b/packages/hal/arm/at91/at91sam7s/current/include/pkgconf/mlt_arm_at91sam7se256_rom.h
@@ -0,0 +1,25 @@
+// eCos memory layout - Thu Oct 09 03:51 2008
+
+// This is a generated file - do not edit
+
+#ifndef __ASSEMBLER__
+#include <cyg/infra/cyg_type.h>
+#include <stddef.h>
+
+#endif
+#define CYGMEM_REGION_ram (0x00200000)
+#define CYGMEM_REGION_ram_SIZE (0x8000)
+#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W)
+#define CYGMEM_REGION_rom (0x00100000)
+#define CYGMEM_REGION_rom_SIZE (0x40000)
+#define CYGMEM_REGION_rom_ATTR (CYGMEM_REGION_ATTR_R)
+#ifndef __ASSEMBLER__
+extern char CYG_LABEL_NAME (__reserved_bootmon) [];
+#endif
+#define CYGMEM_SECTION_reserved_bootmon (CYG_LABEL_NAME (__reserved_bootmon))
+#define CYGMEM_SECTION_reserved_bootmon_SIZE (0x01000)
+#ifndef __ASSEMBLER__
+extern char CYG_LABEL_NAME (__heap1) [];
+#endif
+#define CYGMEM_SECTION_heap1 (CYG_LABEL_NAME (__heap1))
+#define CYGMEM_SECTION_heap1_SIZE (0x00208000 - (size_t) CYG_LABEL_NAME (__heap1))
new file mode 100644
--- /dev/null
+++ b/packages/hal/arm/at91/at91sam7s/current/include/pkgconf/mlt_arm_at91sam7se256_rom.ldi
@@ -0,0 +1,30 @@
+// eCos memory layout - Thu Oct 09 03:51 2008
+
+// This is a generated file - do not edit
+
+#include <cyg/infra/cyg_type.inc>
+#include <pkgconf/hal_arm_at91sam7.h>
+
+MEMORY
+{
+    ram : ORIGIN = 0x00200000, LENGTH = 0x08000
+    rom : ORIGIN = 0x00100000, LENGTH = 0x40000
+}
+
+SECTIONS
+{
+    SECTIONS_BEGIN
+    CYG_LABEL_DEFN(__reserved_bootmon) = 0x00000000; . = CYG_LABEL_DEFN(__reserved_bootmon) + 0x01000;
+    SECTION_rom_vectors (rom, CYGNUM_HAL_ARM_AT91_IMAGE_ADDRESS, LMA_EQ_VMA)
+    SECTION_text (rom, ALIGN (0x1), LMA_EQ_VMA)
+    SECTION_fini (rom, ALIGN (0x4), LMA_EQ_VMA)
+    SECTION_rodata (rom, ALIGN (0x4), LMA_EQ_VMA)
+    SECTION_rodata1 (rom, ALIGN (0x4), LMA_EQ_VMA)
+    SECTION_fixup (rom, ALIGN (0x4), LMA_EQ_VMA)
+    SECTION_gcc_except_table (rom, ALIGN (0x4), LMA_EQ_VMA)
+    SECTION_fixed_vectors (ram, 0x00200040, LMA_EQ_VMA)
+    SECTION_data (ram, ALIGN (0x4), FOLLOWING (.gcc_except_table))
+    SECTION_bss (ram, ALIGN (0x4), LMA_EQ_VMA)
+    CYG_LABEL_DEFN(__heap1) = ALIGN (0x8);
+    SECTIONS_END
+}
new file mode 100644
--- /dev/null
+++ b/packages/hal/arm/at91/at91sam7s/current/include/pkgconf/mlt_arm_at91sam7se32_rom.h
@@ -0,0 +1,25 @@
+// eCos memory layout - Wed Apr 11 13:49:55 2001
+
+// This is a generated file - do not edit
+
+#ifndef __ASSEMBLER__
+#include <cyg/infra/cyg_type.h>
+#include <stddef.h>
+
+#endif
+#define CYGMEM_REGION_ram (0x00200000)
+#define CYGMEM_REGION_ram_SIZE (0x02000)
+#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W)
+#define CYGMEM_REGION_rom (0x00100000)
+#define CYGMEM_REGION_rom_SIZE (0x08000)
+#define CYGMEM_REGION_rom_ATTR (CYGMEM_REGION_ATTR_R)
+#ifndef __ASSEMBLER__
+extern char CYG_LABEL_NAME (__reserved_bootmon) [];
+#endif
+#define CYGMEM_SECTION_reserved_bootmon (CYG_LABEL_NAME (__reserved_bootmon))
+#define CYGMEM_SECTION_reserved_bootmon_SIZE (0x01000)
+#ifndef __ASSEMBLER__
+extern char CYG_LABEL_NAME (__heap1) [];
+#endif
+#define CYGMEM_SECTION_heap1 (CYG_LABEL_NAME (__heap1))
+#define CYGMEM_SECTION_heap1_SIZE (0x00202000 - (size_t) CYG_LABEL_NAME (__heap1))
new file mode 100644
--- /dev/null
+++ b/packages/hal/arm/at91/at91sam7s/current/include/pkgconf/mlt_arm_at91sam7se32_rom.ldi
@@ -0,0 +1,30 @@
+// eCos memory layout - Wed Apr 11 13:49:55 2001
+
+// This is a generated file - do not edit
+
+#include <cyg/infra/cyg_type.inc>
+#include <pkgconf/hal_arm_at91sam7.h>
+
+MEMORY
+{
+    ram : ORIGIN = 0x00200000, LENGTH = 0x02000
+    rom : ORIGIN = 0x00100000, LENGTH = 0x08000
+}
+
+SECTIONS
+{
+    SECTIONS_BEGIN
+    CYG_LABEL_DEFN(__reserved_bootmon) = 0x00000000; . = CYG_LABEL_DEFN(__reserved_bootmon) + 0x01000;
+    SECTION_rom_vectors (rom, CYGNUM_HAL_ARM_AT91_IMAGE_ADDRESS, LMA_EQ_VMA)
+    SECTION_text (rom, ALIGN (0x1), LMA_EQ_VMA)
+    SECTION_fini (rom, ALIGN (0x4), LMA_EQ_VMA)
+    SECTION_rodata (rom, ALIGN (0x4), LMA_EQ_VMA)
+    SECTION_rodata1 (rom, ALIGN (0x4), LMA_EQ_VMA)
+    SECTION_fixup (rom, ALIGN (0x4), LMA_EQ_VMA)
+    SECTION_gcc_except_table (rom, ALIGN (0x4), LMA_EQ_VMA)
+    SECTION_fixed_vectors (ram, 0x00200040, LMA_EQ_VMA)
+    SECTION_data (ram, ALIGN (0x4), FOLLOWING (.gcc_except_table))
+    SECTION_bss (ram, ALIGN (0x4), LMA_EQ_VMA)
+    CYG_LABEL_DEFN(__heap1) = ALIGN (0x8);
+    SECTIONS_END
+}
new file mode 100644
--- /dev/null
+++ b/packages/hal/arm/at91/at91sam7s/current/include/pkgconf/mlt_arm_at91sam7se512_rom.h
@@ -0,0 +1,25 @@
+// eCos memory layout - Thu Oct 09 03:51 2008
+
+// This is a generated file - do not edit
+
+#ifndef __ASSEMBLER__
+#include <cyg/infra/cyg_type.h>
+#include <stddef.h>
+
+#endif
+#define CYGMEM_REGION_ram (0x00200000)
+#define CYGMEM_REGION_ram_SIZE (0x8000)
+#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W)
+#define CYGMEM_REGION_rom (0x00100000)
+#define CYGMEM_REGION_rom_SIZE (0x80000)
+#define CYGMEM_REGION_rom_ATTR (CYGMEM_REGION_ATTR_R)
+#ifndef __ASSEMBLER__
+extern char CYG_LABEL_NAME (__reserved_bootmon) [];
+#endif
+#define CYGMEM_SECTION_reserved_bootmon (CYG_LABEL_NAME (__reserved_bootmon))
+#define CYGMEM_SECTION_reserved_bootmon_SIZE (0x01000)
+#ifndef __ASSEMBLER__
+extern char CYG_LABEL_NAME (__heap1) [];
+#endif
+#define CYGMEM_SECTION_heap1 (CYG_LABEL_NAME (__heap1))
+#define CYGMEM_SECTION_heap1_SIZE (0x00208000 - (size_t) CYG_LABEL_NAME (__heap1))
new file mode 100644
--- /dev/null
+++ b/packages/hal/arm/at91/at91sam7s/current/include/pkgconf/mlt_arm_at91sam7se512_rom.ldi
@@ -0,0 +1,30 @@
+// eCos memory layout - Thu Oct 09 03:51 2008
+
+// This is a generated file - do not edit
+
+#include <cyg/infra/cyg_type.inc>
+#include <pkgconf/hal_arm_at91sam7.h>
+
+MEMORY
+{
+    ram : ORIGIN = 0x00200000, LENGTH = 0x08000
+    rom : ORIGIN = 0x00100000, LENGTH = 0x80000
+}
+
+SECTIONS
+{
+    SECTIONS_BEGIN
+    CYG_LABEL_DEFN(__reserved_bootmon) = 0x00000000; . = CYG_LABEL_DEFN(__reserved_bootmon) + 0x01000;
+    SECTION_rom_vectors (rom, CYGNUM_HAL_ARM_AT91_IMAGE_ADDRESS, LMA_EQ_VMA)
+    SECTION_text (rom, ALIGN (0x1), LMA_EQ_VMA)
+    SECTION_fini (rom, ALIGN (0x4), LMA_EQ_VMA)
+    SECTION_rodata (rom, ALIGN (0x4), LMA_EQ_VMA)
+    SECTION_rodata1 (rom, ALIGN (0x4), LMA_EQ_VMA)
+    SECTION_fixup (rom, ALIGN (0x4), LMA_EQ_VMA)
+    SECTION_gcc_except_table (rom, ALIGN (0x4), LMA_EQ_VMA)
+    SECTION_fixed_vectors (ram, 0x00200040, LMA_EQ_VMA)
+    SECTION_data (ram, ALIGN (0x4), FOLLOWING (.gcc_except_table))
+    SECTION_bss (ram, ALIGN (0x4), LMA_EQ_VMA)
+    CYG_LABEL_DEFN(__heap1) = ALIGN (0x8);
+    SECTIONS_END
+}
--- a/packages/hal/arm/at91/at91sam7s/current/include/plf_io.h
+++ b/packages/hal/arm/at91/at91sam7s/current/include/plf_io.h
@@ -76,9 +76,13 @@
 
 // Peripheral Input/Output Controllers
 #define AT91_PIOA   0xFFFFF400
-#ifdef CYGHWR_HAL_ARM_AT91SAM7X
+#if defined(CYGHWR_HAL_ARM_AT91SAM7X) || \
+    defined(CYGHWR_HAL_ARM_AT91SAM7SE)
 #define AT91_PIOB   0xFFFFF600
 #endif
+#if defined(CYGHWR_HAL_ARM_AT91SAM7SE)
+#define AT91_PIOC   0xFFFFF800
+#endif
 
 // USART
 
@@ -175,7 +179,9 @@ extern cyg_uint32 hal_at91_us_baud(cyg_u
 
 #endif
 
-#ifdef CYGHWR_HAL_ARM_AT91SAM7_at91sam7x512
+#if defined(CYGHWR_HAL_ARM_AT91SAM7_at91sam7x512) || \
+    defined(CYGHWR_HAL_ARM_AT91SAM7_at91sam7s512) || \
+    defined(CYGHWR_HAL_ARM_AT91SAM7_at91sam7se512)
 #define AT91_MC_FMR0 0x60
 #define AT91_MC_FMR1 0x70
 #define AT91_MC_FMR AT91_MC_FMR0
@@ -197,6 +203,5 @@ extern void hal_plf_eth_init(void);
 
 #endif  //__ASSEMBLER__         
 
-
 #endif //CYGONCE_HAL_PLF_IO_H