Mercurial > nand-ecoscentric
changeset 3148:ccfdc78c891d
Recognize In Application Programming \(IAP\) SRAM field and Valid User Code and Code Read Protection FLASH fields Reported by Bernard Fouché \[ Bugzilla 1001395 \] \[Bugzilla 1001443 \]
| author | vae |
|---|---|
| date | Tue, 24 Jan 2012 19:38:23 +0000 |
| parents | afc51ff1474b |
| children | bfdfa7ca0b5d |
| files | packages/hal/cortexm/lpc17xx/lpc1766stk/current/ChangeLog packages/hal/cortexm/lpc17xx/lpc1766stk/current/cdl/hal_cortexm_lpc17xx_lpc1766stk.cdl packages/hal/cortexm/lpc17xx/lpc1766stk/current/include/pkgconf/mlt_cortexm_lpc1766_rom.h packages/hal/cortexm/lpc17xx/lpc1766stk/current/include/pkgconf/mlt_cortexm_lpc1766_rom.ldi |
| diffstat | 4 files changed, 28 insertions(+), 3 deletions(-) [+] |
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--- a/packages/hal/cortexm/lpc17xx/lpc1766stk/current/ChangeLog +++ b/packages/hal/cortexm/lpc17xx/lpc1766stk/current/ChangeLog @@ -1,3 +1,12 @@ +2012-01-16 Ilija Kocho <ilijak@siva.com.mk> + + * cdl/hal_cortexm_lpc17xx_lpc1766stk.cdl: + * include/pkgconf/mlt_cortexm_lpc1766_rom.h: + * include/pkgconf/mlt_cortexm_lpc1766_rom.ldi: + Recognize In Application Programming (IAP) SRAM field + and Valid User Code and Code Read Protection FLASH fields + Reported by Bernard Fouché [ Bugzilla 1001395 ] [Bugzilla 1001443 ] + 2010-12-12 Ilija Kocho <ilijak@siva.com.mk> * cdl/hal_cortexm_lpc17xx_lpc1766stk.cdl:
--- a/packages/hal/cortexm/lpc17xx/lpc1766stk/current/cdl/hal_cortexm_lpc17xx_lpc1766stk.cdl +++ b/packages/hal/cortexm/lpc17xx/lpc1766stk/current/cdl/hal_cortexm_lpc17xx_lpc1766stk.cdl @@ -88,6 +88,13 @@ cdl_package CYGPKG_HAL_CORTEXM_LPC17XX_L be put into internal flash." } + cdl_option CYGHWR_HAL_CORTEXM_LPC17XX_IAP { + display "Reserve RAM for IAP (Bytes)" + flavor data + legal_values { 0 32 } + default_value 32 + } + cdl_component CYGHWR_MEMORY_LAYOUT { display "Memory layout" flavor data
--- a/packages/hal/cortexm/lpc17xx/lpc1766stk/current/include/pkgconf/mlt_cortexm_lpc1766_rom.h +++ b/packages/hal/cortexm/lpc17xx/lpc1766stk/current/include/pkgconf/mlt_cortexm_lpc1766_rom.h @@ -6,7 +6,7 @@ #endif #define CYGMEM_REGION_ram (0x10000000) -#define CYGMEM_REGION_ram_SIZE (0x00008000-CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE) +#define CYGMEM_REGION_ram_SIZE (0x00008000-CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE-CYGHWR_HAL_CORTEXM_LPC17XX_IAP) #define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W) #define CYGMEM_REGION_ahb_sram_bank0 (0x2007C000)
--- a/packages/hal/cortexm/lpc17xx/lpc1766stk/current/include/pkgconf/mlt_cortexm_lpc1766_rom.ldi +++ b/packages/hal/cortexm/lpc17xx/lpc1766stk/current/include/pkgconf/mlt_cortexm_lpc1766_rom.ldi @@ -5,7 +5,7 @@ MEMORY { - ram : ORIGIN = 0x10000000, LENGTH = 0x00008000-CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE + ram : ORIGIN = 0x10000000, LENGTH = 0x00008000-CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE-CYGHWR_HAL_CORTEXM_LPC17XX_IAP ahb_sram_bank0 : ORIGIN = 0x2007C000, LENGTH = 0x00004000 ahb_sram_bank1 : ORIGIN = 0x20080000, LENGTH = 0x00004000 flash : ORIGIN = 0x00000000, LENGTH = 0x00040000 @@ -15,6 +15,15 @@ SECTIONS { SECTIONS_BEGIN SECTION_rom_vectors (flash, 0x00000000, LMA_EQ_VMA) + USER_SECTION(lpc17xx_misc, flash, 0x00000020, LMA_EQ_VMA) + + // LPC17xx Code Read Protection field. Must be present at 0x000002FC + // Warning: Code Read Protection field or moving it to + // other location may lock LPC17xx controller. + // See src/lpc17xx_mis.c for definition + + .lpc17xxcrp 0x2FC : { KEEP (*(.lpc17xxcrp)) } > flash + SECTION_RELOCS (flash, ALIGN (0x8), LMA_EQ_VMA) SECTION_text (flash, ALIGN (0x8), LMA_EQ_VMA) SECTION_fini (flash, ALIGN (0x8), LMA_EQ_VMA) @@ -35,6 +44,6 @@ SECTIONS hal_vsr_table = 0x10000000; hal_virtual_vector_table = hal_vsr_table + 128*4; -hal_startup_stack = 0x10000000 + 1024*32; +hal_startup_stack = 0x10000000 + 1024*32-CYGHWR_HAL_CORTEXM_LPC17XX_IAP;