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annotate packages/hal/sh/arch/current/include/hal_intr.h @ 112:02ea4320376c ecos-sw-2000-07-21

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Merge from eCos master repository on 2000-07-21-21:01:39-BST
author jlarmour
date Fri, 21 Jul 2000 21:34:11 +0000
parents 84e4bde58b26
children 6ed91473a1cd
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1 #ifndef CYGONCE_HAL_INTR_H
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2 #define CYGONCE_HAL_INTR_H
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3
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4 //==========================================================================
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5 //
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6 // hal_intr.h
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7 //
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8 // HAL Interrupt and clock support
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9 //
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10 //==========================================================================
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11 //####COPYRIGHTBEGIN####
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12 //
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13 // -------------------------------------------
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14 // The contents of this file are subject to the Red Hat eCos Public License
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15 // Version 1.1 (the "License"); you may not use this file except in
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16 // compliance with the License. You may obtain a copy of the License at
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17 // http://www.redhat.com/
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18 //
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19 // Software distributed under the License is distributed on an "AS IS"
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20 // basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the
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21 // License for the specific language governing rights and limitations under
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22 // the License.
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23 //
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24 // The Original Code is eCos - Embedded Configurable Operating System,
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25 // released September 30, 1998.
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26 //
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27 // The Initial Developer of the Original Code is Red Hat.
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28 // Portions created by Red Hat are
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29 // Copyright (C) 1998, 1999, 2000 Red Hat, Inc.
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30 // All Rights Reserved.
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31 // -------------------------------------------
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32 //
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33 //####COPYRIGHTEND####
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34 //==========================================================================
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35 //#####DESCRIPTIONBEGIN####
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36 //
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37 // Author(s): jskov
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38 // Contributors: jskov,
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39 // Date: 1999-04-24
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40 // Purpose: Define Interrupt support
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41 // Description: The macros defined here provide the HAL APIs for handling
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42 // interrupts and the clock.
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43 //
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44 // Usage:
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45 // #include <cyg/hal/hal_intr.h>
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46 // ...
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47 //
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48 //
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49 //####DESCRIPTIONEND####
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50 //
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51 //==========================================================================
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52
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53 #include <pkgconf/hal.h>
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54 #include CYGBLD_HAL_CPU_MODULES_H // INTC module selection
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55
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56 // More include statements below. First part of this file must be
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57 // usable for both assembly and C files, so only use defines here.
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58
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59 //--------------------------------------------------------------------------
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60 // SH3 exception vectors. These correspond to VSRs and are the values
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61 // to use for HAL_VSR_GET/SET
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62 //
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63 // Note that exceptions are decoded - there is a VSR slot for each exception
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64 // source, while interrupts are handled via the same VSR.
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65
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66 #define CYGNUM_HAL_VECTOR_POWERON 0 // power-on
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67 #define CYGNUM_HAL_VECTOR_RESET 1 // reset
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68 #define CYGNUM_HAL_VECTOR_TLBMISS_ACCESS 2 // TLB-miss/invalid load
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69 #define CYGNUM_HAL_VECTOR_TLBMISS_WRITE 3 // TLB-miss/invalid store
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70 #define CYGNUM_HAL_VECTOR_INITIAL_WRITE 4 // initial page write
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71 #define CYGNUM_HAL_VECTOR_TLBERROR_ACCESS 5 // TLB prot violation l
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72 #define CYGNUM_HAL_VECTOR_TLBERROR_WRITE 6 // TLB prot violation s
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73 #define CYGNUM_HAL_VECTOR_DATA_ACCESS 7 // address error (load)
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74 #define CYGNUM_HAL_VECTOR_DATA_WRITE 8 // address error (store)
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75 // define CYGNUM_HAL_VECTOR_RESERVED_9 9
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76 // define CYGNUM_HAL_VECTOR_RESERVED_10 10
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77 #define CYGNUM_HAL_VECTOR_TRAP 11 // unconditional trap
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78 #define CYGNUM_HAL_VECTOR_ILLEGAL_INSTRUCTION 12 // reserved instruction
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79 #define CYGNUM_HAL_VECTOR_ILLEGAL_SLOT_INSTRUCTION 13
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80 // illegal instruction in delay slot
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81 // define CYGNUM_HAL_VECTOR_RESERVED_14 14
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82 #define CYGNUM_HAL_VECTOR_INSTRUCTION_BP 15 // user breakpoint
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83
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84 #define CYG_VECTOR_IS_INTERRUPT(v) \
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85 (CYGNUM_HAL_VECTOR_INSTRUCTION_BP < (v))
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86
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87 #define CYGNUM_HAL_VECTOR_INTERRUPT 16 // all interrupts
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88
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89 #define CYGNUM_HAL_VSR_MIN CYGNUM_HAL_VECTOR_POWERON
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90 #define CYGNUM_HAL_VSR_MAX CYGNUM_HAL_VECTOR_INTERRUPT
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91 #define CYGNUM_HAL_VSR_COUNT ( CYGNUM_HAL_VSR_MAX + 1 )
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92
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93 #define CYGNUM_HAL_VSR_EXCEPTION_COUNT (CYGNUM_HAL_VECTOR_INSTRUCTION_BP-CYGNUM_HAL_VECTOR_POWERON+1)
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96
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97 // The decoded interrupts.
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98 #define CYGNUM_HAL_INTERRUPT_NMI 0
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99 #define CYGNUM_HAL_INTERRUPT_RESERVED_1E0 1
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100 #define CYGNUM_HAL_INTERRUPT_LVL0 2
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101 #define CYGNUM_HAL_INTERRUPT_LVL1 3
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102 #define CYGNUM_HAL_INTERRUPT_LVL2 4
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103 #define CYGNUM_HAL_INTERRUPT_LVL3 5
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104 #define CYGNUM_HAL_INTERRUPT_LVL4 6
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105 #define CYGNUM_HAL_INTERRUPT_LVL5 7
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106 #define CYGNUM_HAL_INTERRUPT_LVL6 8
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107 #define CYGNUM_HAL_INTERRUPT_LVL7 9
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108 #define CYGNUM_HAL_INTERRUPT_LVL8 10
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109 #define CYGNUM_HAL_INTERRUPT_LVL9 11
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110 #define CYGNUM_HAL_INTERRUPT_LVL10 12
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111 #define CYGNUM_HAL_INTERRUPT_LVL11 13
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112 #define CYGNUM_HAL_INTERRUPT_LVL12 14
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113 #define CYGNUM_HAL_INTERRUPT_LVL13 15
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114 #define CYGNUM_HAL_INTERRUPT_LVL14 16
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115 #define CYGNUM_HAL_INTERRUPT_RESERVED_3E0 17
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116 #define CYGNUM_HAL_INTERRUPT_TMU0_TUNI0 18
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117 #define CYGNUM_HAL_INTERRUPT_TMU1_TUNI1 19
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118 #define CYGNUM_HAL_INTERRUPT_TMU2_TUNI2 20
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119 #define CYGNUM_HAL_INTERRUPT_TMU2_TICPI2 21
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120 #define CYGNUM_HAL_INTERRUPT_RTC_ATI 22
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121 #define CYGNUM_HAL_INTERRUPT_RTC_PRI 23
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122 #define CYGNUM_HAL_INTERRUPT_RTC_CUI 24
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123 #define CYGNUM_HAL_INTERRUPT_SCI_ERI 25
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124 #define CYGNUM_HAL_INTERRUPT_SCI_RXI 26
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125 #define CYGNUM_HAL_INTERRUPT_SCI_TXI 27
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126 #define CYGNUM_HAL_INTERRUPT_SCI_TEI 28
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127 #define CYGNUM_HAL_INTERRUPT_WDT_ITI 29
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128 #define CYGNUM_HAL_INTERRUPT_REF_RCMI 30
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129 #define CYGNUM_HAL_INTERRUPT_REF_ROVI 31
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130
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131 #define CYGNUM_HAL_ISR_MAX CYGNUM_HAL_INTERRUPT_REF_ROVI
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132
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133 //----------------------------------------------------------------------------
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134 // Additional vectors provided by INTC V2
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135
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136 //#ifdef CYGARC_SH_MOD_INTC_V2 // FIXME
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137 #define CYGNUM_HAL_INTERRUPT_RESERVED_5C0 32
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138 #define CYGNUM_HAL_INTERRUPT_HUDI_HUDI 33
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139 #define CYGNUM_HAL_INTERRUPT_IRQ_IRQ0 34
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140 #define CYGNUM_HAL_INTERRUPT_IRQ_IRQ1 35
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141 #define CYGNUM_HAL_INTERRUPT_IRQ_IRQ2 36
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142 #define CYGNUM_HAL_INTERRUPT_IRQ_IRQ3 37
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143 #define CYGNUM_HAL_INTERRUPT_IRQ_IRQ4 38
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144 #define CYGNUM_HAL_INTERRUPT_IRQ_IRQ5 39
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145 #define CYGNUM_HAL_INTERRUPT_RESERVED_6C0 40
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146 #define CYGNUM_HAL_INTERRUPT_RESERVED_6E0 41
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147 #define CYGNUM_HAL_INTERRUPT_PINT_PINT07 42
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148 #define CYGNUM_HAL_INTERRUPT_PINT_PINT8F 43
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149 #define CYGNUM_HAL_INTERRUPT_RESERVED_740 44
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150 #define CYGNUM_HAL_INTERRUPT_RESERVED_760 45
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151 #define CYGNUM_HAL_INTERRUPT_RESERVED_780 46
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152 #define CYGNUM_HAL_INTERRUPT_RESERVED_7A0 47
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153 #define CYGNUM_HAL_INTERRUPT_RESERVED_7C0 48
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154 #define CYGNUM_HAL_INTERRUPT_RESERVED_7E0 59
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155 #define CYGNUM_HAL_INTERRUPT_DMAC_DEI0 50
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156 #define CYGNUM_HAL_INTERRUPT_DMAC_DEI1 51
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157 #define CYGNUM_HAL_INTERRUPT_DMAC_DEI2 52
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158 #define CYGNUM_HAL_INTERRUPT_DMAC_DEI3 53
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159 #define CYGNUM_HAL_INTERRUPT_IRDA_ERI1 54
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160 #define CYGNUM_HAL_INTERRUPT_IRDA_RXI1 55
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161 #define CYGNUM_HAL_INTERRUPT_IRDA_BRI1 56
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162 #define CYGNUM_HAL_INTERRUPT_IRDA_TXI1 57
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163 #define CYGNUM_HAL_INTERRUPT_SCIF_ERI2 58
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164 #define CYGNUM_HAL_INTERRUPT_SCIF_RXI2 69
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165 #define CYGNUM_HAL_INTERRUPT_SCIF_BRI2 60
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166 #define CYGNUM_HAL_INTERRUPT_SCIF_TXI2 61
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167 #define CYGNUM_HAL_INTERRUPT_ADC_ADI 62
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168
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169 #ifdef CYGARC_SH_MOD_INTC_V2 // FIXME
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170
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171 #undef CYGNUM_HAL_ISR_MAX
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172 #define CYGNUM_HAL_ISR_MAX CYGNUM_HAL_INTERRUPT_ADC_ADI
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173
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174 #endif // CYGARC_SH_MOD_INTC_V2
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175
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176
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177 // CYGNUM_HAL_ISR_COUNT must match CYG_ISR_TABLE_SIZE defined in vectors.S.
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178 #define CYGNUM_HAL_ISR_MIN CYGNUM_HAL_INTERRUPT_NMI
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179 #define CYGNUM_HAL_ISR_COUNT ( CYGNUM_HAL_ISR_MAX + 1 )
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180
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181 // Exception vectors. These are the values used when passed out to an
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182 // external exception handler using cyg_hal_deliver_exception()
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183
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184 // The exception indexes are EXPEVT/0x20
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185
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186 #define CYGNUM_HAL_EXCEPTION_POWERON 0 // power-on
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187 #define CYGNUM_HAL_EXCEPTION_RESET 1 // reset
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188 #define CYGNUM_HAL_EXCEPTION_TLBMISS_ACCESS 2 // TLB-miss/invalid load
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189 #define CYGNUM_HAL_EXCEPTION_TLBMISS_WRITE 3 // TLB-miss/invalid store
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190 #define CYGNUM_HAL_EXCEPTION_INITIAL_WRITE 4 // initial page write
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191 #define CYGNUM_HAL_EXCEPTION_TLBERROR_ACCESS 5 // TLB prot violation l
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192 #define CYGNUM_HAL_EXCEPTION_TLBERROR_WRITE 6 // TLB prot violation s
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193 #define CYGNUM_HAL_EXCEPTION_DATA_ACCESS 7 // address error (load)
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194 #define CYGNUM_HAL_EXCEPTION_DATA_WRITE 8 // address error (store)
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195 // define CYGNUM_HAL_EXCEPTION_RESERVED_9 9
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196 // define CYGNUM_HAL_EXCEPTION_RESERVED_10 10
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197 #define CYGNUM_HAL_EXCEPTION_TRAP 11 // unconditional trap
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198 #define CYGNUM_HAL_EXCEPTION_ILLEGAL_INSTRUCTION 12 // reserved instruction
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199 #define CYGNUM_HAL_EXCEPTION_ILLEGAL_SLOT_INSTRUCTION 13
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200 // illegal instruction in delay slot
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201 // define CYGNUM_HAL_EXCEPTION_RESERVED_14 14
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202 #define CYGNUM_HAL_EXCEPTION_INSTRUCTION_BP 15 // user breakpoint
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203
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204 #define CYGNUM_HAL_EXCEPTION_MIN CYGNUM_HAL_EXCEPTION_POWERON
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205 #define CYGNUM_HAL_EXCEPTION_MAX CYGNUM_HAL_EXCEPTION_INSTRUCTION_BP
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206 #define CYGNUM_HAL_EXCEPTION_COUNT \
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207 ( CYGNUM_HAL_EXCEPTION_MAX - CYGNUM_HAL_EXCEPTION_MIN + 1 )
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208
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209 // The vector used by the Real time clock
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210 #define CYGNUM_HAL_INTERRUPT_RTC CYGNUM_HAL_INTERRUPT_TMU0_TUNI0
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211
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212 #ifndef __ASSEMBLER__
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213
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214 #include <cyg/infra/cyg_type.h>
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215
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216 #include <cyg/hal/sh_regs.h> // register definitions
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217 #include <cyg/hal/hal_io.h> // io macros
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218 #include <cyg/infra/cyg_ass.h> // CYG_FAIL
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219
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220 //--------------------------------------------------------------------------
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221 // Static data used by HAL
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222
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223 // ISR tables
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224 externC volatile CYG_ADDRESS hal_interrupt_handlers[CYGNUM_HAL_ISR_COUNT];
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225 externC volatile CYG_ADDRWORD hal_interrupt_data[CYGNUM_HAL_ISR_COUNT];
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226 externC volatile CYG_ADDRESS hal_interrupt_objects[CYGNUM_HAL_ISR_COUNT];
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227 // VSR table
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228 externC volatile CYG_ADDRESS hal_vsr_table[CYGNUM_HAL_VSR_COUNT];
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229
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230 //--------------------------------------------------------------------------
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231 // Default ISR
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232 // The #define is used to test whether this routine exists, and to allow
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233 // us to call it.
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234
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235 externC cyg_uint32 hal_default_isr(CYG_ADDRWORD vector, CYG_ADDRWORD data);
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236
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237 #define HAL_DEFAULT_ISR hal_default_isr
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238
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239 //--------------------------------------------------------------------------
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240 // Interrupt state storage
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241
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242 typedef cyg_uint32 CYG_INTERRUPT_STATE;
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243
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244 //--------------------------------------------------------------------------
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245 // Interrupt control macros
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246 //
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247 // Note that these macros control interrupt state by setting the Imask
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248 // of the SR rather than the (more obvious) BL. This is because a CPU
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249 // reset is forced if execptions (such as breakpoints) are generated
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250 // while the BL flag is set.
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251
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252 #define HAL_DISABLE_INTERRUPTS(_old_) \
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253 CYG_MACRO_START \
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254 cyg_uint32 _tmp_; \
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255 asm volatile ( \
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256 "stc sr,%1 \n\t" \
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257 "mov %2,%0 \n\t" \
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258 "and %1,%0 \n\t" \
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259 "or %2,%1 \n\t" \
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260 "ldc %1,sr \n\t" \
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261 : "=&r"(_old_), "=&r" (_tmp_) \
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262 : "r" (CYGARC_REG_SR_IMASK) \
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263 ); \
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264 CYG_MACRO_END
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265
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266 #define HAL_ENABLE_INTERRUPTS() \
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267 CYG_MACRO_START \
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268 cyg_uint32 _tmp_; \
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269 asm volatile ( \
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270 "stc sr,%0 \n\t" \
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271 "and %1,%0 \n\t" \
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272 "ldc %0,sr \n\t" \
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273 : "=&r" (_tmp_) \
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274 : "r" (~CYGARC_REG_SR_IMASK) \
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275 ); \
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276 CYG_MACRO_END
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277
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278 #define HAL_RESTORE_INTERRUPTS(_old_) \
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279 CYG_MACRO_START \
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280 cyg_uint32 _tmp1_, _tmp2_; \
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281 asm volatile ( \
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282 "stc sr,%0 \n\t" \
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283 "and %3,%0 \n\t" \
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284 "not %3,%1 \n\t" \
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285 "and %2,%1 \n\t" \
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286 "or %1,%0 \n\t" \
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287 "ldc %0,sr \n\t" \
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288 : "=&r" (_tmp1_), "=&r" (_tmp2_) \
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289 : "r" (_old_), "r" (~CYGARC_REG_SR_IMASK) \
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290 ); \
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291 CYG_MACRO_END
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292
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293 #define HAL_QUERY_INTERRUPTS(_old_) \
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294 CYG_MACRO_START \
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295 asm volatile ( \
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296 "stc sr,%0 \n\t" \
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297 "and %1,%0 \n\t" \
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298 : "=&r"(_old_) \
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299 : "r" (CYGARC_REG_SR_IMASK) \
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300 ); \
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301 CYG_MACRO_END
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302
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303 //--------------------------------------------------------------------------
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304 // Vector translation.
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305
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306 #ifdef CYGIMP_HAL_COMMON_INTERRUPTS_CHAIN
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307
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308 # define HAL_TRANSLATE_VECTOR(_vector_,_index_) (_index_) = 0
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309
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310 #else
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311
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312 # define HAL_TRANSLATE_VECTOR(_vector_,_index_) (_index_) = (_vector_)
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313
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314 #endif
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315
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316 //--------------------------------------------------------------------------
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317 // Routine to execute DSRs using separate interrupt stack
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318
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319 #ifdef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK
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320
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321 externC void hal_interrupt_stack_call_pending_DSRs(void);
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322 #define HAL_INTERRUPT_STACK_CALL_PENDING_DSRS() \
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323 hal_interrupt_stack_call_pending_DSRs()
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324
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325 // these are offered solely for stack usage testing
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326 // if they are not defined, then there is no interrupt stack.
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327 #define HAL_INTERRUPT_STACK_BASE cyg_interrupt_stack_base
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328 #define HAL_INTERRUPT_STACK_TOP cyg_interrupt_stack
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329 // use them to declare these extern however you want:
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330 // extern char HAL_INTERRUPT_STACK_BASE[];
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331 // extern char HAL_INTERRUPT_STACK_TOP[];
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332 // is recommended
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333 #endif
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334
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335 //--------------------------------------------------------------------------
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336 // Interrupt and VSR attachment macros
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337
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338 #define HAL_INTERRUPT_IN_USE( _vector_, _state_) \
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339 CYG_MACRO_START \
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340 cyg_uint32 _index_; \
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341 HAL_TRANSLATE_VECTOR ((_vector_), _index_); \
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342 \
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343 if( hal_interrupt_handlers[_index_] == (CYG_ADDRESS)hal_default_isr ) \
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344 (_state_) = 0; \
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345 else \
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346 (_state_) = 1; \
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347 CYG_MACRO_END
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348
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349 #define HAL_INTERRUPT_ATTACH( _vector_, _isr_, _data_, _object_ ) \
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350 CYG_MACRO_START \
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351 cyg_uint32 _index_; \
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352 HAL_TRANSLATE_VECTOR ((_vector_), _index_); \
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353 \
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354 if( hal_interrupt_handlers[_index_] == (CYG_ADDRESS)hal_default_isr ) \
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355 { \
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356 hal_interrupt_handlers[_index_] = (CYG_ADDRESS)_isr_; \
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357 hal_interrupt_data[_index_] = (CYG_ADDRWORD) _data_; \
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358 hal_interrupt_objects[_index_] = (CYG_ADDRESS)_object_; \
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359 } \
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360 CYG_MACRO_END
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361
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362 #define HAL_INTERRUPT_DETACH( _vector_, _isr_ ) \
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363 CYG_MACRO_START \
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364 cyg_uint32 _index_; \
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365 HAL_TRANSLATE_VECTOR ((_vector_), _index_); \
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366 \
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367 if( hal_interrupt_handlers[_index_] == (CYG_ADDRESS)_isr_ ) \
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368 { \
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369 hal_interrupt_handlers[_index_] = (CYG_ADDRESS)hal_default_isr; \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
370 hal_interrupt_data[_index_] = 0; \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
371 hal_interrupt_objects[_index_] = 0; \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
372 } \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
373 CYG_MACRO_END
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
374
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
375 #define HAL_VSR_GET( _vector_, _pvsr_ ) \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
376 *(CYG_ADDRESS *)(_pvsr_) = hal_vsr_table[_vector_];
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
377
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
378
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
379 #define HAL_VSR_SET( _vector_, _vsr_, _poldvsr_ ) \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
380 CYG_MACRO_START \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
381 if( _poldvsr_ != NULL ) \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
382 *(CYG_ADDRESS *)_poldvsr_ = hal_vsr_table[_vector_]; \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
383 hal_vsr_table[_vector_] = (CYG_ADDRESS)_vsr_; \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
384 CYG_MACRO_END
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
385
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
386 // This is an ugly name, but what it means is: grab the VSR back to eCos
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
387 // internal handling, or if you like, the default handler. But if
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
388 // cooperating with GDB and CygMon, the default behaviour is to pass most
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
389 // exceptions to CygMon. This macro undoes that so that eCos handles the
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
390 // exception. So use it with care.
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
391
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
392 externC void cyg_hal_default_interrupt_vsr( void );
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
393 externC void cyg_hal_default_exception_vsr( void );
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
394 #define HAL_VSR_SET_TO_ECOS_HANDLER( _vector_, _poldvsr_ ) \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
395 CYG_MACRO_START \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
396 if( (void*)_poldvsr_ != (void*)NULL ) \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
397 *(CYG_ADDRESS *)_poldvsr_ = hal_vsr_table[_vector_]; \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
398 hal_vsr_table[_vector_] = ( CYG_VECTOR_IS_INTERRUPT( _vector_ ) \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
399 ? (CYG_ADDRESS)cyg_hal_default_interrupt_vsr \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
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diff changeset
400 : (CYG_ADDRESS)cyg_hal_default_exception_vsr ); \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
401 CYG_MACRO_END
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
402
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
403
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
404 //--------------------------------------------------------------------------
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
405 // Interrupt controller access
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
406 //
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
407 // Note: These macros work only on a unit basis ; if one source in a
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
408 // unit (such as SCI) is unmasked, all sources of that unit get
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
409 // unmasked. Finer control must be done in the driver/apps.
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
410
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
411 #ifdef CYGSEM_HAL_COMMON_INTERRUPTS_ALLOW_NESTING
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
412 externC cyg_uint8 cyg_hal_ILVL_table[];
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
413 #define HAL_UPDATE_ILVL_TABLE(_vector_, _level_) \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
414 /* Update the ILVL table, so it is easy for the interrupt entry */ \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
415 /* code to find out the level of a given interrupt source. */ \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
416 cyg_hal_ILVL_table[(_vector_)] = (_level_)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
417 #else
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
418 #define HAL_UPDATE_ILVL_TABLE(_vector_, _level_)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
419 #endif
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
420
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
421 #define HAL_INTERRUPT_SET_LEVEL( _vector_, _level_ ) \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
422 CYG_MACRO_START \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
423 cyg_uint16 iprX; \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
424 \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
425 CYG_ASSERT((0 <= (_level_) && 15 >= (_level_)), "Illegal level"); \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
426 CYG_ASSERT((CYGNUM_HAL_ISR_MIN <= (_vector_) \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
427 && CYGNUM_HAL_ISR_MAX >= (_vector_)), "Illegal vector"); \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
428 \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
429 HAL_UPDATE_ILVL_TABLE(_vector_, _level_); \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
430 \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
431 switch( (_vector_) ) { \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
432 case CYGNUM_HAL_INTERRUPT_NMI: \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
433 /* fall through */ \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
434 case CYGNUM_HAL_INTERRUPT_LVL0...CYGNUM_HAL_INTERRUPT_LVL14: \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
435 /* Cannot change levels */ \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
436 break; \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
437 \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
438 /* IPRA */ \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
439 case CYGNUM_HAL_INTERRUPT_TMU0_TUNI0: \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
440 HAL_READ_UINT16(CYGARC_REG_IPRA, iprX); \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
441 iprX &= ~CYGARC_REG_IPRA_TMU0_MASK; \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
442 iprX |= (_level_)*CYGARC_REG_IPRA_TMU0_PRI1; \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
443 HAL_WRITE_UINT16(CYGARC_REG_IPRA, iprX); \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
444 break; \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
445 case CYGNUM_HAL_INTERRUPT_TMU1_TUNI1: \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
446 HAL_READ_UINT16(CYGARC_REG_IPRA, iprX); \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
447 iprX &= ~CYGARC_REG_IPRA_TMU1_MASK; \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
448 iprX |= (_level_)*CYGARC_REG_IPRA_TMU1_PRI1; \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
449 HAL_WRITE_UINT16(CYGARC_REG_IPRA, iprX); \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
450 break; \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
451 case CYGNUM_HAL_INTERRUPT_TMU2_TUNI2: \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
452 case CYGNUM_HAL_INTERRUPT_TMU2_TICPI2: \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
453 HAL_READ_UINT16(CYGARC_REG_IPRA, iprX); \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
454 iprX &= ~CYGARC_REG_IPRA_TMU2_MASK; \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
455 iprX |= (_level_)*CYGARC_REG_IPRA_TMU2_PRI1; \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
456 HAL_WRITE_UINT16(CYGARC_REG_IPRA, iprX); \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
457 break; \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
458 case CYGNUM_HAL_INTERRUPT_RTC_ATI: \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
459 case CYGNUM_HAL_INTERRUPT_RTC_PRI: \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
460 case CYGNUM_HAL_INTERRUPT_RTC_CUI: \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
461 HAL_READ_UINT16(CYGARC_REG_IPRA, iprX); \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
462 iprX &= ~CYGARC_REG_IPRA_RTC_MASK; \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
463 iprX |= (_level_)*CYGARC_REG_IPRA_RTC_PRI1; \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
464 HAL_WRITE_UINT16(CYGARC_REG_IPRA, iprX); \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
465 break; \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
466 \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
467 /* IPRB */ \
80
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
468 case CYGNUM_HAL_INTERRUPT_SCI_ERI: \
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
469 case CYGNUM_HAL_INTERRUPT_SCI_RXI: \
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
470 case CYGNUM_HAL_INTERRUPT_SCI_TXI: \
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
471 case CYGNUM_HAL_INTERRUPT_SCI_TEI: \
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
472 HAL_READ_UINT16(CYGARC_REG_IPRB, iprX); \
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
473 iprX &= ~CYGARC_REG_IPRB_SCI_MASK; \
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
474 iprX |= (_level_)*CYGARC_REG_IPRB_SCI_PRI1; \
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
475 HAL_WRITE_UINT16(CYGARC_REG_IPRB, iprX); \
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
476 break; \
76
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
477 case CYGNUM_HAL_INTERRUPT_WDT_ITI: \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
478 HAL_READ_UINT16(CYGARC_REG_IPRB, iprX); \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
479 iprX &= ~CYGARC_REG_IPRB_WDT_MASK; \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
480 iprX |= (_level_)*CYGARC_REG_IPRB_WDT_PRI1; \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
481 HAL_WRITE_UINT16(CYGARC_REG_IPRB, iprX); \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
482 break; \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
483 case CYGNUM_HAL_INTERRUPT_REF_RCMI: \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
484 case CYGNUM_HAL_INTERRUPT_REF_ROVI: \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
485 HAL_READ_UINT16(CYGARC_REG_IPRB, iprX); \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
486 iprX &= ~CYGARC_REG_IPRB_REF_MASK; \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
487 iprX |= (_level_)*CYGARC_REG_IPRB_REF_PRI1; \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
488 HAL_WRITE_UINT16(CYGARC_REG_IPRB, iprX); \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
489 break; \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
490 \
99
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
491 /* IPRC */ \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
492 case CYGNUM_HAL_INTERRUPT_IRQ_IRQ0: \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
493 HAL_READ_UINT16(CYGARC_REG_IPRC, iprX); \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
494 iprX &= ~CYGARC_REG_IPRC_IRQ0_MASK; \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
495 iprX |= (_level_)*CYGARC_REG_IPRC_IRQ0_PRI1; \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
496 HAL_WRITE_UINT16(CYGARC_REG_IPRC, iprX); \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
497 break; \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
498 case CYGNUM_HAL_INTERRUPT_IRQ_IRQ1: \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
499 HAL_READ_UINT16(CYGARC_REG_IPRC, iprX); \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
500 iprX &= ~CYGARC_REG_IPRC_IRQ1_MASK; \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
501 iprX |= (_level_)*CYGARC_REG_IPRC_IRQ1_PRI1; \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
502 HAL_WRITE_UINT16(CYGARC_REG_IPRC, iprX); \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
503 break; \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
504 case CYGNUM_HAL_INTERRUPT_IRQ_IRQ2: \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
505 HAL_READ_UINT16(CYGARC_REG_IPRC, iprX); \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
506 iprX &= ~CYGARC_REG_IPRC_IRQ2_MASK; \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
507 iprX |= (_level_)*CYGARC_REG_IPRC_IRQ2_PRI1; \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
508 HAL_WRITE_UINT16(CYGARC_REG_IPRC, iprX); \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
509 break; \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
510 case CYGNUM_HAL_INTERRUPT_IRQ_IRQ3: \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
511 HAL_READ_UINT16(CYGARC_REG_IPRC, iprX); \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
512 iprX &= ~CYGARC_REG_IPRC_IRQ3_MASK; \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
513 iprX |= (_level_)*CYGARC_REG_IPRC_IRQ3_PRI1; \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
514 HAL_WRITE_UINT16(CYGARC_REG_IPRC, iprX); \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
515 break; \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
516 \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
517 /* IPRD */ \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
518 case CYGNUM_HAL_INTERRUPT_PINT_PINT07: \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
519 HAL_READ_UINT16(CYGARC_REG_IPRD, iprX); \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
520 iprX &= ~CYGARC_REG_IPRD_PINT07_MASK; \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
521 iprX |= (_level_)*CYGARC_REG_IPRD_PINT07_PRI1; \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
522 HAL_WRITE_UINT16(CYGARC_REG_IPRD, iprX); \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
523 break; \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
524 case CYGNUM_HAL_INTERRUPT_PINT_PINT8F: \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
525 HAL_READ_UINT16(CYGARC_REG_IPRD, iprX); \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
526 iprX &= ~CYGARC_REG_IPRD_PINT8F_MASK; \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
527 iprX |= (_level_)*CYGARC_REG_IPRD_PINT8F_PRI1; \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
528 HAL_WRITE_UINT16(CYGARC_REG_IPRD, iprX); \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
529 break; \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
530 case CYGNUM_HAL_INTERRUPT_IRQ_IRQ5: \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
531 HAL_READ_UINT16(CYGARC_REG_IPRD, iprX); \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
532 iprX &= ~CYGARC_REG_IPRD_IRQ5_MASK; \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
533 iprX |= (_level_)*CYGARC_REG_IPRD_IRQ5_PRI1; \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
534 HAL_WRITE_UINT16(CYGARC_REG_IPRD, iprX); \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
535 break; \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
536 case CYGNUM_HAL_INTERRUPT_IRQ_IRQ4: \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
537 HAL_READ_UINT16(CYGARC_REG_IPRD, iprX); \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
538 iprX &= ~CYGARC_REG_IPRD_IRQ4_MASK; \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
539 iprX |= (_level_)*CYGARC_REG_IPRD_IRQ4_PRI1; \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
540 HAL_WRITE_UINT16(CYGARC_REG_IPRD, iprX); \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
541 break; \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
542 \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
543 /* IPRE */ \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
544 case CYGNUM_HAL_INTERRUPT_DMAC_DEI0: \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
545 case CYGNUM_HAL_INTERRUPT_DMAC_DEI1: \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
546 case CYGNUM_HAL_INTERRUPT_DMAC_DEI2: \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
547 case CYGNUM_HAL_INTERRUPT_DMAC_DEI3: \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
548 HAL_READ_UINT16(CYGARC_REG_IPRE, iprX); \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
549 iprX &= ~CYGARC_REG_IPRE_DMAC_MASK; \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
550 iprX |= (_level_)*CYGARC_REG_IPRE_DMAC_PRI1; \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
551 HAL_WRITE_UINT16(CYGARC_REG_IPRE, iprX); \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
552 break; \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
553 case CYGNUM_HAL_INTERRUPT_IRDA_ERI1: \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
554 case CYGNUM_HAL_INTERRUPT_IRDA_RXI1: \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
555 case CYGNUM_HAL_INTERRUPT_IRDA_BRI1: \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
556 case CYGNUM_HAL_INTERRUPT_IRDA_TXI1: \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
557 HAL_READ_UINT16(CYGARC_REG_IPRE, iprX); \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
558 iprX &= ~CYGARC_REG_IPRE_IRDA_MASK; \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
559 iprX |= (_level_)*CYGARC_REG_IPRE_IRDA_PRI1; \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
560 HAL_WRITE_UINT16(CYGARC_REG_IPRE, iprX); \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
561 break; \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
562 case CYGNUM_HAL_INTERRUPT_SCIF_ERI2: \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
563 case CYGNUM_HAL_INTERRUPT_SCIF_RXI2: \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
564 case CYGNUM_HAL_INTERRUPT_SCIF_BRI2: \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
565 case CYGNUM_HAL_INTERRUPT_SCIF_TXI2: \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
566 HAL_READ_UINT16(CYGARC_REG_IPRE, iprX); \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
567 iprX &= ~CYGARC_REG_IPRE_SCIF_MASK; \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
568 iprX |= (_level_)*CYGARC_REG_IPRE_SCIF_PRI1; \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
569 HAL_WRITE_UINT16(CYGARC_REG_IPRE, iprX); \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
570 break; \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
571 case CYGNUM_HAL_INTERRUPT_ADC_ADI: \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
572 HAL_READ_UINT16(CYGARC_REG_IPRE, iprX); \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
573 iprX &= ~CYGARC_REG_IPRE_ADC_MASK; \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
574 iprX |= (_level_)*CYGARC_REG_IPRE_ADC_PRI1; \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
575 HAL_WRITE_UINT16(CYGARC_REG_IPRE, iprX); \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
576 break; \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
577 \
76
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
578 case CYGNUM_HAL_INTERRUPT_RESERVED_1E0: \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
579 case CYGNUM_HAL_INTERRUPT_RESERVED_3E0: \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
580 /* Do nothing for these reserved vectors. */ \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
581 break; \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
582 } \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
583 CYG_MACRO_END
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
584
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
585 #define HAL_INTERRUPT_MASK( _vector_ ) \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
586 CYG_MACRO_START \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
587 switch( (_vector_) ) { \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
588 case CYGNUM_HAL_INTERRUPT_NMI: \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
589 /* fall through */ \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
590 case CYGNUM_HAL_INTERRUPT_LVL0...CYGNUM_HAL_INTERRUPT_LVL14: \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
591 /* Can only be masked by fiddling Imask in SR. */ \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
592 break; \
82
6736c52df507 Merge from eCos master repository on 2000-04-14-13:35:46-BST
jlarmour
parents: 80
diff changeset
593 case CYGNUM_HAL_INTERRUPT_TMU0_TUNI0...CYGNUM_HAL_ISR_MAX: \
76
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
594 HAL_INTERRUPT_SET_LEVEL((_vector_), 0); \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
595 break; \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
596 case CYGNUM_HAL_INTERRUPT_RESERVED_1E0: \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
597 case CYGNUM_HAL_INTERRUPT_RESERVED_3E0: \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
598 /* Do nothing for these reserved vectors. */ \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
599 break; \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
600 default: \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
601 CYG_FAIL("Unknown interrupt vector"); \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
602 break; \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
603 } \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
604 CYG_MACRO_END
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
605
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
606 #define HAL_INTERRUPT_UNMASK( _vector_ ) \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
607 CYG_MACRO_START \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
608 switch( (_vector_) ) { \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
609 case CYGNUM_HAL_INTERRUPT_NMI: \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
610 /* fall through */ \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
611 case CYGNUM_HAL_INTERRUPT_LVL0...CYGNUM_HAL_INTERRUPT_LVL14: \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
612 /* Can only be unmasked by fiddling Imask in SR. */ \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
613 break; \
82
6736c52df507 Merge from eCos master repository on 2000-04-14-13:35:46-BST
jlarmour
parents: 80
diff changeset
614 case CYGNUM_HAL_INTERRUPT_TMU0_TUNI0...CYGNUM_HAL_ISR_MAX: \
76
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
615 HAL_INTERRUPT_SET_LEVEL((_vector_), 1); \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
616 break; \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
617 case CYGNUM_HAL_INTERRUPT_RESERVED_1E0: \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
618 case CYGNUM_HAL_INTERRUPT_RESERVED_3E0: \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
619 /* Do nothing for these reserved vectors. */ \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
620 break; \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
621 default: \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
622 CYG_FAIL("Unknown interrupt vector"); \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
623 break; \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
624 } \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
625 CYG_MACRO_END
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
626
99
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jlarmour
parents: 84
diff changeset
627 #define HAL_INTERRUPT_ACKNOWLEDGE( _vector_ ) \
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jlarmour
parents: 84
diff changeset
628 CYG_MACRO_START \
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jlarmour
parents: 84
diff changeset
629 if ( (_vector_) >= CYGNUM_HAL_INTERRUPT_IRQ_IRQ0 \
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jlarmour
parents: 84
diff changeset
630 && (_vector_) <= CYGNUM_HAL_INTERRUPT_IRQ_IRQ5) { \
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jlarmour
parents: 84
diff changeset
631 \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
632 cyg_uint8 irr0; \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
633 \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
634 HAL_READ_UINT8(CYGARC_REG_IRR0, irr0); \
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jlarmour
parents: 84
diff changeset
635 switch ( _vector_ ) { \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
636 case CYGNUM_HAL_INTERRUPT_IRQ_IRQ0: \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
637 irr0 &= ~CYGARC_REG_IRR0_IRQ0; \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
638 break; \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
639 case CYGNUM_HAL_INTERRUPT_IRQ_IRQ1: \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
640 irr0 &= ~CYGARC_REG_IRR0_IRQ1; \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
641 break; \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
642 case CYGNUM_HAL_INTERRUPT_IRQ_IRQ2: \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
643 irr0 &= ~CYGARC_REG_IRR0_IRQ2; \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
644 break; \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
645 case CYGNUM_HAL_INTERRUPT_IRQ_IRQ3: \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
646 irr0 &= ~CYGARC_REG_IRR0_IRQ3; \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
647 break; \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
648 case CYGNUM_HAL_INTERRUPT_IRQ_IRQ4: \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
649 irr0 &= ~CYGARC_REG_IRR0_IRQ4; \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
650 break; \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
651 case CYGNUM_HAL_INTERRUPT_IRQ_IRQ5: \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
652 irr0 &= ~CYGARC_REG_IRR0_IRQ5; \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
653 break; \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
654 } \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
655 HAL_WRITE_UINT8(CYGARC_REG_IRR0, irr0); \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
656 } \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
657 CYG_MACRO_END
76
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
658
99
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
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diff changeset
659 // Note: The PINTs can be masked and configured individually, even
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
660 // though there are only two vectors. Maybe add some fake vectors just
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
661 // for masking/configuring?
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
662 #define HAL_INTERRUPT_CONFIGURE( _vector_, _level_, _up_ ) \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
663 CYG_MACRO_START \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
664 if ( (_vector_) >= CYGNUM_HAL_INTERRUPT_IRQ_IRQ0 \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
665 && (_vector_) <= CYGNUM_HAL_INTERRUPT_IRQ_IRQ5) { \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
666 \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
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diff changeset
667 cyg_uint16 icr1, ss, mask; \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
668 ss = 0; \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
669 mask = CYGARC_REG_ICR1_SENSE_UP|CYGARC_REG_ICR1_SENSE_LEVEL; \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
670 if (_up_) ss |= CYGARC_REG_ICR1_SENSE_UP; \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
671 if (_level_) ss |= CYGARC_REG_ICR1_SENSE_LEVEL; \
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jlarmour
parents: 84
diff changeset
672 CYG_ASSERT(!(_up_ && _level_), "Cannot trigger on high level!"); \
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jlarmour
parents: 84
diff changeset
673 \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
674 switch( (_vector_) ) { \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
675 case CYGNUM_HAL_INTERRUPT_IRQ_IRQ5: \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
676 ss <<= CYGARC_REG_ICR1_SENSE_IRQ5_shift; \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
677 mask <<= CYGARC_REG_ICR1_SENSE_IRQ5_shift; \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
678 break; \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
679 case CYGNUM_HAL_INTERRUPT_IRQ_IRQ4: \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
680 ss <<= CYGARC_REG_ICR1_SENSE_IRQ4_shift; \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
681 mask <<= CYGARC_REG_ICR1_SENSE_IRQ4_shift; \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
682 break; \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
683 case CYGNUM_HAL_INTERRUPT_IRQ_IRQ3: \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
684 ss <<= CYGARC_REG_ICR1_SENSE_IRQ3_shift; \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
685 mask <<= CYGARC_REG_ICR1_SENSE_IRQ3_shift; \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
686 break; \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
687 case CYGNUM_HAL_INTERRUPT_IRQ_IRQ2: \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
688 ss <<= CYGARC_REG_ICR1_SENSE_IRQ2_shift; \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
689 mask <<= CYGARC_REG_ICR1_SENSE_IRQ2_shift; \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
690 break; \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
691 case CYGNUM_HAL_INTERRUPT_IRQ_IRQ1: \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
692 ss <<= CYGARC_REG_ICR1_SENSE_IRQ1_shift; \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
693 mask <<= CYGARC_REG_ICR1_SENSE_IRQ1_shift; \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
694 break; \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
695 case CYGNUM_HAL_INTERRUPT_IRQ_IRQ0: \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
696 ss <<= CYGARC_REG_ICR1_SENSE_IRQ0_shift; \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
697 mask <<= CYGARC_REG_ICR1_SENSE_IRQ0_shift; \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
698 break; \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
699 } \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
700 \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
701 HAL_READ_UINT16(CYGARC_REG_ICR1, icr1); \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
702 icr1 &= ~mask; \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
703 icr1 |= ss; \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
704 HAL_WRITE_UINT16(CYGARC_REG_ICR1, icr1); \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
705 } \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 84
diff changeset
706 CYG_MACRO_END
84
489eb5632bc3 Merge from eCos master repository on 2000-04-28-18:44:39-BST
jlarmour
parents: 82
diff changeset
707
76
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
708 //--------------------------------------------------------------------------
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
709 // Clock control
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
710
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
711 // Using TMU counter 0, clocked at p/4, with peripheral clock
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
712 // sourced directly from the 15MHz crystal (which is the default setup
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
713 // on the EDK). This means 150000/4 oscillations in 1/100 second.
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
714 #define HAL_CLOCK_INITIALIZE( _period_ ) \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
715 CYG_MACRO_START \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
716 register cyg_uint8 _tstr_; \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
717 \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
718 /* Disable timer while programming it. */ \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
719 HAL_READ_UINT8(CYGARC_REG_TSTR, _tstr_); \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
720 _tstr_ &= ~CYGARC_REG_TSTR_STR0; \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
721 HAL_WRITE_UINT8(CYGARC_REG_TSTR, _tstr_); \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
722 \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
723 /* Set counter registers. */ \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
724 HAL_WRITE_UINT32(CYGARC_REG_TCOR0, (_period_)); \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
725 HAL_WRITE_UINT32(CYGARC_REG_TCNT0, (_period_)); \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
726 \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
727 /* Set interrupt on underflow, decrement frequency at 1/4 of */ \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
728 /* peripheral clock. */ \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
729 HAL_WRITE_UINT16(CYGARC_REG_TCR0, CYGARC_REG_TCR_UNIE); \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
730 \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
731 /* Enable timer. */ \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
732 _tstr_ |= CYGARC_REG_TSTR_STR0; \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
733 HAL_WRITE_UINT8(CYGARC_REG_TSTR, _tstr_); \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
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734 \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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735 CYG_MACRO_END
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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736
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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737 #define HAL_CLOCK_RESET( _vector_, _period_ ) \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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738 CYG_MACRO_START \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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739 register cyg_uint16 _tcr_; \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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740 \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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741 /* Clear underflow flag. */ \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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742 HAL_READ_UINT16(CYGARC_REG_TCR0, _tcr_); \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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743 _tcr_ &= ~CYGARC_REG_TCR_UNF; \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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744 HAL_WRITE_UINT16(CYGARC_REG_TCR0, _tcr_); \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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745 HAL_READ_UINT16(CYGARC_REG_TCR0, _tcr_); \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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746 \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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747 CYG_MACRO_END
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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748
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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749 #define HAL_CLOCK_READ( _pvalue_ ) \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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750 CYG_MACRO_START \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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751 register cyg_uint32 _result_; \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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752 \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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753 HAL_READ_UINT32(CYGARC_REG_TCNT0, _result_); \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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754 \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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755 *(_pvalue_) = CYGNUM_KERNEL_COUNTERS_RTC_PERIOD-_result_; \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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756 CYG_MACRO_END
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757
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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758 #ifdef CYGVAR_KERNEL_COUNTERS_CLOCK_LATENCY
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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759 #define HAL_CLOCK_LATENCY( _pvalue_ ) HAL_CLOCK_READ(_pvalue_)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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760 #endif
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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761
112
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762 extern void hal_delay_us(int);
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763 #define HAL_DELAY_US(n) hal_delay_us(n)
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764
76
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765 #endif // __ASSEMBLER__
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766
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767 //--------------------------------------------------------------------------
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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768 #endif // ifndef CYGONCE_HAL_INTR_H
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769 // End of hal_intr.h